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Colin Cross7056d422010-04-22 20:30:13 -07001/*
2 * arch/arm/mach-tegra/cpu-tegra.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/types.h>
24#include <linux/sched.h>
25#include <linux/cpufreq.h>
26#include <linux/delay.h>
27#include <linux/init.h>
28#include <linux/err.h>
29#include <linux/clk.h>
30#include <linux/io.h>
Colin Cross1eb2ecf2010-08-05 17:40:39 -070031#include <linux/suspend.h>
Colin Cross7056d422010-04-22 20:30:13 -070032
33#include <asm/system.h>
34
Colin Cross7056d422010-04-22 20:30:13 -070035#include <mach/clk.h>
36
37/* Frequency table index must be sequential starting at 0 */
38static struct cpufreq_frequency_table freq_table[] = {
Colin Cross1eb2ecf2010-08-05 17:40:39 -070039 { 0, 216000 },
40 { 1, 312000 },
41 { 2, 456000 },
42 { 3, 608000 },
43 { 4, 760000 },
44 { 5, 816000 },
45 { 6, 912000 },
46 { 7, 1000000 },
47 { 8, CPUFREQ_TABLE_END },
Colin Cross7056d422010-04-22 20:30:13 -070048};
49
50#define NUM_CPUS 2
51
52static struct clk *cpu_clk;
Colin Cross7a281282010-11-22 18:54:36 -080053static struct clk *emc_clk;
Colin Cross7056d422010-04-22 20:30:13 -070054
55static unsigned long target_cpu_speed[NUM_CPUS];
Colin Cross1eb2ecf2010-08-05 17:40:39 -070056static DEFINE_MUTEX(tegra_cpu_lock);
57static bool is_suspended;
Colin Cross7056d422010-04-22 20:30:13 -070058
Olof Johansson6686c732011-10-09 21:57:04 -070059static int tegra_verify_speed(struct cpufreq_policy *policy)
Colin Cross7056d422010-04-22 20:30:13 -070060{
61 return cpufreq_frequency_table_verify(policy, freq_table);
62}
63
Olof Johansson6686c732011-10-09 21:57:04 -070064static unsigned int tegra_getspeed(unsigned int cpu)
Colin Cross7056d422010-04-22 20:30:13 -070065{
66 unsigned long rate;
67
68 if (cpu >= NUM_CPUS)
69 return 0;
70
71 rate = clk_get_rate(cpu_clk) / 1000;
72 return rate;
73}
74
Colin Cross1eb2ecf2010-08-05 17:40:39 -070075static int tegra_update_cpu_speed(unsigned long rate)
Colin Cross7056d422010-04-22 20:30:13 -070076{
Colin Cross7056d422010-04-22 20:30:13 -070077 int ret = 0;
78 struct cpufreq_freqs freqs;
79
Colin Cross7056d422010-04-22 20:30:13 -070080 freqs.old = tegra_getspeed(0);
81 freqs.new = rate;
82
83 if (freqs.old == freqs.new)
84 return ret;
85
Colin Cross7a281282010-11-22 18:54:36 -080086 /*
87 * Vote on memory bus frequency based on cpu frequency
88 * This sets the minimum frequency, display or avp may request higher
89 */
90 if (rate >= 816000)
91 clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
92 else if (rate >= 456000)
93 clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
94 else
95 clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */
96
Colin Cross7056d422010-04-22 20:30:13 -070097 for_each_online_cpu(freqs.cpu)
98 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
99
100#ifdef CONFIG_CPU_FREQ_DEBUG
101 printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n",
102 freqs.old, freqs.new);
103#endif
104
Colin Cross41cfe362011-02-12 15:52:04 -0800105 ret = clk_set_rate(cpu_clk, freqs.new * 1000);
Colin Cross7056d422010-04-22 20:30:13 -0700106 if (ret) {
107 pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
108 freqs.new);
109 return ret;
110 }
111
112 for_each_online_cpu(freqs.cpu)
113 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
114
115 return 0;
116}
117
Colin Cross1eb2ecf2010-08-05 17:40:39 -0700118static unsigned long tegra_cpu_highest_speed(void)
119{
120 unsigned long rate = 0;
121 int i;
122
123 for_each_online_cpu(i)
124 rate = max(rate, target_cpu_speed[i]);
125 return rate;
126}
127
Colin Cross7056d422010-04-22 20:30:13 -0700128static int tegra_target(struct cpufreq_policy *policy,
129 unsigned int target_freq,
130 unsigned int relation)
131{
Olof Johanssonfdb684a2011-10-09 21:31:23 -0700132 unsigned int idx;
Colin Cross7056d422010-04-22 20:30:13 -0700133 unsigned int freq;
Colin Cross1eb2ecf2010-08-05 17:40:39 -0700134 int ret = 0;
135
136 mutex_lock(&tegra_cpu_lock);
137
138 if (is_suspended) {
139 ret = -EBUSY;
140 goto out;
141 }
Colin Cross7056d422010-04-22 20:30:13 -0700142
143 cpufreq_frequency_table_target(policy, freq_table, target_freq,
144 relation, &idx);
145
146 freq = freq_table[idx].frequency;
147
148 target_cpu_speed[policy->cpu] = freq;
149
Colin Cross1eb2ecf2010-08-05 17:40:39 -0700150 ret = tegra_update_cpu_speed(tegra_cpu_highest_speed());
151
152out:
153 mutex_unlock(&tegra_cpu_lock);
154 return ret;
Colin Cross7056d422010-04-22 20:30:13 -0700155}
156
Colin Cross1eb2ecf2010-08-05 17:40:39 -0700157static int tegra_pm_notify(struct notifier_block *nb, unsigned long event,
158 void *dummy)
159{
160 mutex_lock(&tegra_cpu_lock);
161 if (event == PM_SUSPEND_PREPARE) {
162 is_suspended = true;
163 pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n",
164 freq_table[0].frequency);
165 tegra_update_cpu_speed(freq_table[0].frequency);
166 } else if (event == PM_POST_SUSPEND) {
167 is_suspended = false;
168 }
169 mutex_unlock(&tegra_cpu_lock);
170
171 return NOTIFY_OK;
172}
173
174static struct notifier_block tegra_cpu_pm_notifier = {
175 .notifier_call = tegra_pm_notify,
176};
177
Colin Cross7056d422010-04-22 20:30:13 -0700178static int tegra_cpu_init(struct cpufreq_policy *policy)
179{
180 if (policy->cpu >= NUM_CPUS)
181 return -EINVAL;
182
183 cpu_clk = clk_get_sys(NULL, "cpu");
184 if (IS_ERR(cpu_clk))
185 return PTR_ERR(cpu_clk);
186
Colin Cross7a281282010-11-22 18:54:36 -0800187 emc_clk = clk_get_sys("cpu", "emc");
188 if (IS_ERR(emc_clk)) {
189 clk_put(cpu_clk);
190 return PTR_ERR(emc_clk);
191 }
192
193 clk_enable(emc_clk);
Colin Cross89a5fb82010-10-20 17:47:59 -0700194 clk_enable(cpu_clk);
195
Colin Cross7056d422010-04-22 20:30:13 -0700196 cpufreq_frequency_table_cpuinfo(policy, freq_table);
197 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
198 policy->cur = tegra_getspeed(policy->cpu);
199 target_cpu_speed[policy->cpu] = policy->cur;
200
201 /* FIXME: what's the actual transition time? */
202 policy->cpuinfo.transition_latency = 300 * 1000;
203
204 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
205 cpumask_copy(policy->related_cpus, cpu_possible_mask);
206
Colin Cross1eb2ecf2010-08-05 17:40:39 -0700207 if (policy->cpu == 0)
208 register_pm_notifier(&tegra_cpu_pm_notifier);
209
Colin Cross7056d422010-04-22 20:30:13 -0700210 return 0;
211}
212
213static int tegra_cpu_exit(struct cpufreq_policy *policy)
214{
215 cpufreq_frequency_table_cpuinfo(policy, freq_table);
Colin Cross7a281282010-11-22 18:54:36 -0800216 clk_disable(emc_clk);
217 clk_put(emc_clk);
Colin Cross7056d422010-04-22 20:30:13 -0700218 clk_put(cpu_clk);
219 return 0;
220}
221
222static struct freq_attr *tegra_cpufreq_attr[] = {
223 &cpufreq_freq_attr_scaling_available_freqs,
224 NULL,
225};
226
227static struct cpufreq_driver tegra_cpufreq_driver = {
228 .verify = tegra_verify_speed,
229 .target = tegra_target,
230 .get = tegra_getspeed,
231 .init = tegra_cpu_init,
232 .exit = tegra_cpu_exit,
233 .name = "tegra",
234 .attr = tegra_cpufreq_attr,
235};
236
237static int __init tegra_cpufreq_init(void)
238{
239 return cpufreq_register_driver(&tegra_cpufreq_driver);
240}
241
242static void __exit tegra_cpufreq_exit(void)
243{
244 cpufreq_unregister_driver(&tegra_cpufreq_driver);
245}
246
247
248MODULE_AUTHOR("Colin Cross <ccross@android.com>");
249MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
250MODULE_LICENSE("GPL");
251module_init(tegra_cpufreq_init);
252module_exit(tegra_cpufreq_exit);