Ben Hutchings | 94e6108 | 2008-03-05 16:52:39 +0000 | [diff] [blame] | 1 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | #include <linux/pci.h> |
| 3 | #include <linux/module.h> |
Al Viro | f6a5703 | 2006-10-18 01:47:25 -0400 | [diff] [blame] | 4 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/ioport.h> |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 6 | #include <linux/wait.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | |
Adrian Bunk | 48b1914 | 2005-11-06 01:45:08 +0100 | [diff] [blame] | 8 | #include "pci.h" |
| 9 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | /* |
| 11 | * This interrupt-safe spinlock protects all accesses to PCI |
| 12 | * configuration space. |
| 13 | */ |
| 14 | |
| 15 | static DEFINE_SPINLOCK(pci_lock); |
| 16 | |
| 17 | /* |
| 18 | * Wrappers for all PCI configuration access functions. They just check |
| 19 | * alignment, do locking and call the low-level functions pointed to |
| 20 | * by pci_dev->ops. |
| 21 | */ |
| 22 | |
| 23 | #define PCI_byte_BAD 0 |
| 24 | #define PCI_word_BAD (pos & 1) |
| 25 | #define PCI_dword_BAD (pos & 3) |
| 26 | |
| 27 | #define PCI_OP_READ(size,type,len) \ |
| 28 | int pci_bus_read_config_##size \ |
| 29 | (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \ |
| 30 | { \ |
| 31 | int res; \ |
| 32 | unsigned long flags; \ |
| 33 | u32 data = 0; \ |
| 34 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ |
| 35 | spin_lock_irqsave(&pci_lock, flags); \ |
| 36 | res = bus->ops->read(bus, devfn, pos, len, &data); \ |
| 37 | *value = (type)data; \ |
| 38 | spin_unlock_irqrestore(&pci_lock, flags); \ |
| 39 | return res; \ |
| 40 | } |
| 41 | |
| 42 | #define PCI_OP_WRITE(size,type,len) \ |
| 43 | int pci_bus_write_config_##size \ |
| 44 | (struct pci_bus *bus, unsigned int devfn, int pos, type value) \ |
| 45 | { \ |
| 46 | int res; \ |
| 47 | unsigned long flags; \ |
| 48 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ |
| 49 | spin_lock_irqsave(&pci_lock, flags); \ |
| 50 | res = bus->ops->write(bus, devfn, pos, len, value); \ |
| 51 | spin_unlock_irqrestore(&pci_lock, flags); \ |
| 52 | return res; \ |
| 53 | } |
| 54 | |
| 55 | PCI_OP_READ(byte, u8, 1) |
| 56 | PCI_OP_READ(word, u16, 2) |
| 57 | PCI_OP_READ(dword, u32, 4) |
| 58 | PCI_OP_WRITE(byte, u8, 1) |
| 59 | PCI_OP_WRITE(word, u16, 2) |
| 60 | PCI_OP_WRITE(dword, u32, 4) |
| 61 | |
| 62 | EXPORT_SYMBOL(pci_bus_read_config_byte); |
| 63 | EXPORT_SYMBOL(pci_bus_read_config_word); |
| 64 | EXPORT_SYMBOL(pci_bus_read_config_dword); |
| 65 | EXPORT_SYMBOL(pci_bus_write_config_byte); |
| 66 | EXPORT_SYMBOL(pci_bus_write_config_word); |
| 67 | EXPORT_SYMBOL(pci_bus_write_config_dword); |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 68 | |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 69 | /* |
| 70 | * The following routines are to prevent the user from accessing PCI config |
| 71 | * space when it's unsafe to do so. Some devices require this during BIST and |
| 72 | * we're required to prevent it during D-state transitions. |
| 73 | * |
| 74 | * We have a bit per device to indicate it's blocked and a global wait queue |
| 75 | * for callers to sleep on until devices are unblocked. |
| 76 | */ |
| 77 | static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait); |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 78 | |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 79 | static noinline void pci_wait_ucfg(struct pci_dev *dev) |
| 80 | { |
| 81 | DECLARE_WAITQUEUE(wait, current); |
| 82 | |
| 83 | __add_wait_queue(&pci_ucfg_wait, &wait); |
| 84 | do { |
| 85 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 86 | spin_unlock_irq(&pci_lock); |
| 87 | schedule(); |
| 88 | spin_lock_irq(&pci_lock); |
| 89 | } while (dev->block_ucfg_access); |
| 90 | __remove_wait_queue(&pci_ucfg_wait, &wait); |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | #define PCI_USER_READ_CONFIG(size,type) \ |
| 94 | int pci_user_read_config_##size \ |
| 95 | (struct pci_dev *dev, int pos, type *val) \ |
| 96 | { \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 97 | int ret = 0; \ |
| 98 | u32 data = -1; \ |
| 99 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 100 | spin_lock_irq(&pci_lock); \ |
| 101 | if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ |
| 102 | ret = dev->bus->ops->read(dev->bus, dev->devfn, \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 103 | pos, sizeof(type), &data); \ |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 104 | spin_unlock_irq(&pci_lock); \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 105 | *val = (type)data; \ |
| 106 | return ret; \ |
| 107 | } |
| 108 | |
| 109 | #define PCI_USER_WRITE_CONFIG(size,type) \ |
| 110 | int pci_user_write_config_##size \ |
| 111 | (struct pci_dev *dev, int pos, type val) \ |
| 112 | { \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 113 | int ret = -EIO; \ |
| 114 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 115 | spin_lock_irq(&pci_lock); \ |
| 116 | if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ |
| 117 | ret = dev->bus->ops->write(dev->bus, dev->devfn, \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 118 | pos, sizeof(type), val); \ |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 119 | spin_unlock_irq(&pci_lock); \ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 120 | return ret; \ |
| 121 | } |
| 122 | |
| 123 | PCI_USER_READ_CONFIG(byte, u8) |
| 124 | PCI_USER_READ_CONFIG(word, u16) |
| 125 | PCI_USER_READ_CONFIG(dword, u32) |
| 126 | PCI_USER_WRITE_CONFIG(byte, u8) |
| 127 | PCI_USER_WRITE_CONFIG(word, u16) |
| 128 | PCI_USER_WRITE_CONFIG(dword, u32) |
| 129 | |
Ben Hutchings | 94e6108 | 2008-03-05 16:52:39 +0000 | [diff] [blame] | 130 | /* VPD access through PCI 2.2+ VPD capability */ |
| 131 | |
| 132 | #define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1) |
| 133 | |
| 134 | struct pci_vpd_pci22 { |
| 135 | struct pci_vpd base; |
| 136 | spinlock_t lock; /* controls access to hardware and the flags */ |
| 137 | u8 cap; |
| 138 | bool busy; |
| 139 | bool flag; /* value of F bit to wait for */ |
| 140 | }; |
| 141 | |
| 142 | /* Wait for last operation to complete */ |
| 143 | static int pci_vpd_pci22_wait(struct pci_dev *dev) |
| 144 | { |
| 145 | struct pci_vpd_pci22 *vpd = |
| 146 | container_of(dev->vpd, struct pci_vpd_pci22, base); |
| 147 | u16 flag, status; |
| 148 | int wait; |
| 149 | int ret; |
| 150 | |
| 151 | if (!vpd->busy) |
| 152 | return 0; |
| 153 | |
| 154 | flag = vpd->flag ? PCI_VPD_ADDR_F : 0; |
| 155 | wait = vpd->flag ? 10 : 1000; /* read: 100 us; write: 10 ms */ |
| 156 | for (;;) { |
| 157 | ret = pci_user_read_config_word(dev, |
| 158 | vpd->cap + PCI_VPD_ADDR, |
| 159 | &status); |
| 160 | if (ret < 0) |
| 161 | return ret; |
| 162 | if ((status & PCI_VPD_ADDR_F) == flag) { |
| 163 | vpd->busy = false; |
| 164 | return 0; |
| 165 | } |
| 166 | if (wait-- == 0) |
| 167 | return -ETIMEDOUT; |
| 168 | udelay(10); |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | static int pci_vpd_pci22_read(struct pci_dev *dev, int pos, int size, |
| 173 | char *buf) |
| 174 | { |
| 175 | struct pci_vpd_pci22 *vpd = |
| 176 | container_of(dev->vpd, struct pci_vpd_pci22, base); |
| 177 | u32 val; |
| 178 | int ret; |
| 179 | int begin, end, i; |
| 180 | |
| 181 | if (pos < 0 || pos > PCI_VPD_PCI22_SIZE || |
| 182 | size > PCI_VPD_PCI22_SIZE - pos) |
| 183 | return -EINVAL; |
| 184 | if (size == 0) |
| 185 | return 0; |
| 186 | |
| 187 | spin_lock_irq(&vpd->lock); |
| 188 | ret = pci_vpd_pci22_wait(dev); |
| 189 | if (ret < 0) |
| 190 | goto out; |
| 191 | ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, |
| 192 | pos & ~3); |
| 193 | if (ret < 0) |
| 194 | goto out; |
| 195 | vpd->busy = true; |
| 196 | vpd->flag = 1; |
| 197 | ret = pci_vpd_pci22_wait(dev); |
| 198 | if (ret < 0) |
| 199 | goto out; |
| 200 | ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, |
| 201 | &val); |
| 202 | out: |
| 203 | spin_unlock_irq(&vpd->lock); |
| 204 | if (ret < 0) |
| 205 | return ret; |
| 206 | |
| 207 | /* Convert to bytes */ |
| 208 | begin = pos & 3; |
| 209 | end = min(4, begin + size); |
| 210 | for (i = 0; i < end; ++i) { |
| 211 | if (i >= begin) |
| 212 | *buf++ = val; |
| 213 | val >>= 8; |
| 214 | } |
| 215 | return end - begin; |
| 216 | } |
| 217 | |
| 218 | static int pci_vpd_pci22_write(struct pci_dev *dev, int pos, int size, |
| 219 | const char *buf) |
| 220 | { |
| 221 | struct pci_vpd_pci22 *vpd = |
| 222 | container_of(dev->vpd, struct pci_vpd_pci22, base); |
| 223 | u32 val; |
| 224 | int ret; |
| 225 | |
| 226 | if (pos < 0 || pos > PCI_VPD_PCI22_SIZE || pos & 3 || |
| 227 | size > PCI_VPD_PCI22_SIZE - pos || size < 4) |
| 228 | return -EINVAL; |
| 229 | |
| 230 | val = (u8) *buf++; |
| 231 | val |= ((u8) *buf++) << 8; |
| 232 | val |= ((u8) *buf++) << 16; |
| 233 | val |= ((u32)(u8) *buf++) << 24; |
| 234 | |
| 235 | spin_lock_irq(&vpd->lock); |
| 236 | ret = pci_vpd_pci22_wait(dev); |
| 237 | if (ret < 0) |
| 238 | goto out; |
| 239 | ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, |
| 240 | val); |
| 241 | if (ret < 0) |
| 242 | goto out; |
| 243 | ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, |
| 244 | pos | PCI_VPD_ADDR_F); |
| 245 | if (ret < 0) |
| 246 | goto out; |
| 247 | vpd->busy = true; |
| 248 | vpd->flag = 0; |
| 249 | ret = pci_vpd_pci22_wait(dev); |
| 250 | out: |
| 251 | spin_unlock_irq(&vpd->lock); |
| 252 | if (ret < 0) |
| 253 | return ret; |
| 254 | |
| 255 | return 4; |
| 256 | } |
| 257 | |
| 258 | static int pci_vpd_pci22_get_size(struct pci_dev *dev) |
| 259 | { |
| 260 | return PCI_VPD_PCI22_SIZE; |
| 261 | } |
| 262 | |
| 263 | static void pci_vpd_pci22_release(struct pci_dev *dev) |
| 264 | { |
| 265 | kfree(container_of(dev->vpd, struct pci_vpd_pci22, base)); |
| 266 | } |
| 267 | |
| 268 | static struct pci_vpd_ops pci_vpd_pci22_ops = { |
| 269 | .read = pci_vpd_pci22_read, |
| 270 | .write = pci_vpd_pci22_write, |
| 271 | .get_size = pci_vpd_pci22_get_size, |
| 272 | .release = pci_vpd_pci22_release, |
| 273 | }; |
| 274 | |
| 275 | int pci_vpd_pci22_init(struct pci_dev *dev) |
| 276 | { |
| 277 | struct pci_vpd_pci22 *vpd; |
| 278 | u8 cap; |
| 279 | |
| 280 | cap = pci_find_capability(dev, PCI_CAP_ID_VPD); |
| 281 | if (!cap) |
| 282 | return -ENODEV; |
| 283 | vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC); |
| 284 | if (!vpd) |
| 285 | return -ENOMEM; |
| 286 | |
| 287 | vpd->base.ops = &pci_vpd_pci22_ops; |
| 288 | spin_lock_init(&vpd->lock); |
| 289 | vpd->cap = cap; |
| 290 | vpd->busy = false; |
| 291 | dev->vpd = &vpd->base; |
| 292 | return 0; |
| 293 | } |
| 294 | |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 295 | /** |
| 296 | * pci_block_user_cfg_access - Block userspace PCI config reads/writes |
| 297 | * @dev: pci device struct |
| 298 | * |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 299 | * When user access is blocked, any reads or writes to config space will |
| 300 | * sleep until access is unblocked again. We don't allow nesting of |
| 301 | * block/unblock calls. |
| 302 | */ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 303 | void pci_block_user_cfg_access(struct pci_dev *dev) |
| 304 | { |
| 305 | unsigned long flags; |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 306 | int was_blocked; |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 307 | |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 308 | spin_lock_irqsave(&pci_lock, flags); |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 309 | was_blocked = dev->block_ucfg_access; |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 310 | dev->block_ucfg_access = 1; |
| 311 | spin_unlock_irqrestore(&pci_lock, flags); |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 312 | |
| 313 | /* If we BUG() inside the pci_lock, we're guaranteed to hose |
| 314 | * the machine */ |
| 315 | BUG_ON(was_blocked); |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 316 | } |
| 317 | EXPORT_SYMBOL_GPL(pci_block_user_cfg_access); |
| 318 | |
| 319 | /** |
| 320 | * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes |
| 321 | * @dev: pci device struct |
| 322 | * |
| 323 | * This function allows userspace PCI config accesses to resume. |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 324 | */ |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 325 | void pci_unblock_user_cfg_access(struct pci_dev *dev) |
| 326 | { |
| 327 | unsigned long flags; |
| 328 | |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 329 | spin_lock_irqsave(&pci_lock, flags); |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 330 | |
| 331 | /* This indicates a problem in the caller, but we don't need |
| 332 | * to kill them, unlike a double-block above. */ |
| 333 | WARN_ON(!dev->block_ucfg_access); |
| 334 | |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 335 | dev->block_ucfg_access = 0; |
Matthew Wilcox | 7ea7e98 | 2006-10-19 09:41:28 -0600 | [diff] [blame] | 336 | wake_up_all(&pci_ucfg_wait); |
Brian King | e04b0ea | 2005-09-27 01:21:55 -0700 | [diff] [blame] | 337 | spin_unlock_irqrestore(&pci_lock, flags); |
| 338 | } |
| 339 | EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access); |