blob: b7274757ece52b7652aed2677979ba9849e42f1a [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
451static struct platform_device msm_bt_power_device = {
452 .name = "bt_power",
453};
454 struct bahama_config_register {
455 u8 reg;
456 u8 value;
457 u8 mask;
458 };
459static const char * const vregs_bahama_name[] = {
460 "msme1",
461 "bt",
462};
463static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
464
465static int bahama_bt(int on)
466{
467
468 int rc = 0;
469 int i;
470
471 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
472
473 struct bahama_variant_register {
474 const size_t size;
475 const struct bahama_config_register *set;
476 };
477
478 const struct bahama_config_register *p;
479
480 u8 version;
481
482 const struct bahama_config_register v10_bt_on[] = {
483 { 0xE9, 0x00, 0xFF },
484 { 0xF4, 0x80, 0xFF },
485 { 0xE4, 0x00, 0xFF },
486 { 0xE5, 0x00, 0x0F },
487#ifdef CONFIG_WLAN
488 { 0xE6, 0x38, 0x7F },
489 { 0xE7, 0x06, 0xFF },
490#endif
491 { 0xE9, 0x21, 0xFF },
492 { 0x01, 0x0C, 0x1F },
493 { 0x01, 0x08, 0x1F },
494 };
495
496 const struct bahama_config_register v20_bt_on_fm_off[] = {
497 { 0x11, 0x0C, 0xFF },
498 { 0x13, 0x01, 0xFF },
499 { 0xF4, 0x80, 0xFF },
500 { 0xF0, 0x00, 0xFF },
501 { 0xE9, 0x00, 0xFF },
502#ifdef CONFIG_WLAN
503 { 0x81, 0x00, 0x7F },
504 { 0x82, 0x00, 0xFF },
505 { 0xE6, 0x38, 0x7F },
506 { 0xE7, 0x06, 0xFF },
507#endif
508 { 0x8E, 0x15, 0xFF },
509 { 0x8F, 0x15, 0xFF },
510 { 0x90, 0x15, 0xFF },
511
512 { 0xE9, 0x21, 0xFF },
513 };
514
515 const struct bahama_config_register v20_bt_on_fm_on[] = {
516 { 0x11, 0x0C, 0xFF },
517 { 0x13, 0x01, 0xFF },
518 { 0xF4, 0x86, 0xFF },
519 { 0xF0, 0x06, 0xFF },
520 { 0xE9, 0x00, 0xFF },
521#ifdef CONFIG_WLAN
522 { 0x81, 0x00, 0x7F },
523 { 0x82, 0x00, 0xFF },
524 { 0xE6, 0x38, 0x7F },
525 { 0xE7, 0x06, 0xFF },
526#endif
527 { 0xE9, 0x21, 0xFF },
528 };
529
530 const struct bahama_config_register v10_bt_off[] = {
531 { 0xE9, 0x00, 0xFF },
532 };
533
534 const struct bahama_config_register v20_bt_off_fm_off[] = {
535 { 0xF4, 0x84, 0xFF },
536 { 0xF0, 0x04, 0xFF },
537 { 0xE9, 0x00, 0xFF }
538 };
539
540 const struct bahama_config_register v20_bt_off_fm_on[] = {
541 { 0xF4, 0x86, 0xFF },
542 { 0xF0, 0x06, 0xFF },
543 { 0xE9, 0x00, 0xFF }
544 };
545 const struct bahama_variant_register bt_bahama[2][3] = {
546 {
547 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
548 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
549 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
550 },
551 {
552 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
553 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
554 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
555 }
556 };
557
558 u8 offset = 0; /* index into bahama configs */
559 on = on ? 1 : 0;
560 version = marimba_read_bahama_ver(&config);
561
562 if (version == BAHAMA_VER_UNSUPPORTED) {
563 dev_err(&msm_bt_power_device.dev,
564 "%s: unsupported version\n",
565 __func__);
566 return -EIO;
567 }
568
569 if (version == BAHAMA_VER_2_0) {
570 if (marimba_get_fm_status(&config))
571 offset = 0x01;
572 }
573
574 p = bt_bahama[on][version + offset].set;
575
576 dev_info(&msm_bt_power_device.dev,
577 "%s: found version %d\n", __func__, version);
578
579 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
580 u8 value = (p+i)->value;
581 rc = marimba_write_bit_mask(&config,
582 (p+i)->reg,
583 &value,
584 sizeof((p+i)->value),
585 (p+i)->mask);
586 if (rc < 0) {
587 dev_err(&msm_bt_power_device.dev,
588 "%s: reg %x write failed: %d\n",
589 __func__, (p+i)->reg, rc);
590 return rc;
591 }
592 dev_info(&msm_bt_power_device.dev,
593 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
594 __func__, (p+i)->reg,
595 value, (p+i)->mask);
596 value = 0;
597 rc = marimba_read_bit_mask(&config,
598 (p+i)->reg, &value,
599 sizeof((p+i)->value), (p+i)->mask);
600 if (rc < 0)
601 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
602 __func__);
603 dev_info(&msm_bt_power_device.dev,
604 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
605 __func__, (p+i)->reg,
606 value, (p+i)->mask);
607 }
608 /* Update BT Status */
609 if (on)
610 marimba_set_bt_status(&config, true);
611 else
612 marimba_set_bt_status(&config, false);
613 return rc;
614}
615static int bluetooth_switch_regulators(int on)
616{
617 int i, rc = 0;
618
619 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
620 if (!vregs_bahama[i]) {
621 pr_err("%s: vreg_get %s failed(%d)\n",
622 __func__, vregs_bahama_name[i], rc);
623 goto vreg_fail;
624 }
625 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
626 1800) : 0;
627
628 if (rc < 0) {
629 pr_err("%s: vreg set level failed (%d)\n",
630 __func__, rc);
631 goto vreg_set_level_fail;
632 }
633
634 rc = on ? vreg_enable(vregs_bahama[i]) :
635 vreg_disable(vregs_bahama[i]);
636
637 if (rc < 0) {
638 pr_err("%s: vreg %s %s failed(%d)\n",
639 __func__, vregs_bahama_name[i],
640 on ? "enable" : "disable", rc);
641 goto vreg_fail;
642 }
643 }
644 return rc;
645
646vreg_fail:
647 while (i) {
648 if (on)
649 vreg_disable(vregs_bahama[--i]);
650 }
651vreg_set_level_fail:
652 vreg_put(vregs_bahama[0]);
653 vreg_put(vregs_bahama[1]);
654 return rc;
655}
656
657static unsigned int msm_bahama_setup_power(void)
658{
659 int rc = 0;
660 struct vreg *vreg_s3 = NULL;
661
662 vreg_s3 = vreg_get(NULL, "msme1");
663 if (IS_ERR(vreg_s3)) {
664 pr_err("%s: vreg get failed (%ld)\n",
665 __func__, PTR_ERR(vreg_s3));
666 return PTR_ERR(vreg_s3);
667 }
668 rc = vreg_set_level(vreg_s3, 1800);
669 if (rc < 0) {
670 pr_err("%s: vreg set level failed (%d)\n",
671 __func__, rc);
672 goto vreg_fail;
673 }
674 rc = vreg_enable(vreg_s3);
675 if (rc < 0) {
676 pr_err("%s: vreg enable failed (%d)\n",
677 __func__, rc);
678 goto vreg_fail;
679 }
680
681 /*setup Bahama_sys_reset_n*/
682 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
683 if (rc < 0) {
684 pr_err("%s: gpio_request %d = %d\n", __func__,
685 GPIO_BT_SYS_REST_EN, rc);
686 goto vreg_fail;
687 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530688 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530690 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 GPIO_BT_SYS_REST_EN, rc);
692 goto gpio_fail;
693 }
694 return rc;
695
696gpio_fail:
697 gpio_free(GPIO_BT_SYS_REST_EN);
698vreg_fail:
699 vreg_put(vreg_s3);
700 return rc;
701}
702
703static unsigned int msm_bahama_shutdown_power(int value)
704{
705 int rc = 0;
706 struct vreg *vreg_s3 = NULL;
707
708 vreg_s3 = vreg_get(NULL, "msme1");
709 if (IS_ERR(vreg_s3)) {
710 pr_err("%s: vreg get failed (%ld)\n",
711 __func__, PTR_ERR(vreg_s3));
712 return PTR_ERR(vreg_s3);
713 }
714 rc = vreg_disable(vreg_s3);
715 if (rc) {
716 pr_err("%s: vreg disable failed (%d)\n",
717 __func__, rc);
718 vreg_put(vreg_s3);
719 return rc;
720 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530721 rc = bt_set_gpio(0);
722 if (rc) {
723 pr_err("%s: bt_set_gpio = %d\n",
724 __func__, rc);
725 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700726 return rc;
727}
728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700729static unsigned int msm_bahama_core_config(int type)
730{
731 int rc = 0;
732
733 if (type == BAHAMA_ID) {
734 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530735 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700736 const struct bahama_config_register v20_init[] = {
737 /* reg, value, mask */
738 { 0xF4, 0x84, 0xFF }, /* AREG */
739 { 0xF0, 0x04, 0xFF } /* DREG */
740 };
741 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
742 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
743 u8 value = v20_init[i].value;
744 rc = marimba_write_bit_mask(&config,
745 v20_init[i].reg,
746 &value,
747 sizeof(v20_init[i].value),
748 v20_init[i].mask);
749 if (rc < 0) {
750 pr_err("%s: reg %d write failed: %d\n",
751 __func__, v20_init[i].reg, rc);
752 return rc;
753 }
754 pr_debug("%s: reg 0x%02x value 0x%02x"
755 " mask 0x%02x\n",
756 __func__, v20_init[i].reg,
757 v20_init[i].value, v20_init[i].mask);
758 }
759 }
760 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530761 rc = bt_set_gpio(0);
762 if (rc) {
763 pr_err("%s: bt_set_gpio = %d\n",
764 __func__, rc);
765 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700766 pr_debug("core type: %d\n", type);
767 return rc;
768}
769
770static int bluetooth_power(int on)
771{
772 int pin, rc = 0;
773 const char *id = "BTPW";
774 int cid = 0;
775
776 cid = adie_get_detected_connectivity_type();
777 if (cid != BAHAMA_ID) {
778 pr_err("%s: unexpected adie connectivity type: %d\n",
779 __func__, cid);
780 return -ENODEV;
781 }
782 if (on) {
783 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530784 rc = bt_set_gpio(on);
785 if (rc) {
786 pr_err("%s: bt_set_gpio = %d\n",
787 __func__, rc);
788 goto exit;
789 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700790 rc = bluetooth_switch_regulators(on);
791 if (rc < 0) {
792 pr_err("%s: bluetooth_switch_regulators rc = %d",
793 __func__, rc);
794 goto exit;
795 }
796 /*setup BT GPIO lines*/
797 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
798 pin++) {
799 rc = gpio_tlmm_config(bt_config_power_on[pin],
800 GPIO_CFG_ENABLE);
801 if (rc < 0) {
802 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
803 __func__,
804 bt_config_power_on[pin],
805 rc);
806 goto fail_power;
807 }
808 }
809 /*Setup BT clocks*/
810 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
811 PMAPP_CLOCK_VOTE_ON);
812 if (rc < 0) {
813 pr_err("Failed to vote for TCXO_D1 ON\n");
814 goto fail_clock;
815 }
816 msleep(20);
817
818 /*I2C config for Bahama*/
819 rc = bahama_bt(1);
820 if (rc < 0) {
821 pr_err("%s: bahama_bt rc = %d", __func__, rc);
822 goto fail_i2c;
823 }
824 msleep(20);
825
826 /*setup BT PCM lines*/
827 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
828 if (rc < 0) {
829 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
830 __func__, rc);
831 goto fail_power;
832 }
833 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
834 PMAPP_CLOCK_VOTE_PIN_CTRL);
835 if (rc < 0)
836 pr_err("%s:Pin Control Failed, rc = %d",
837 __func__, rc);
838
839 } else {
840 rc = bahama_bt(0);
841 if (rc < 0)
842 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530843
844 rc = bt_set_gpio(on);
845 if (rc) {
846 pr_err("%s: bt_set_gpio = %d\n",
847 __func__, rc);
848 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700849fail_i2c:
850 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
851 PMAPP_CLOCK_VOTE_OFF);
852 if (rc < 0)
853 pr_err("%s: Failed to vote Off D1\n", __func__);
854fail_clock:
855 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
856 pin++) {
857 rc = gpio_tlmm_config(bt_config_power_off[pin],
858 GPIO_CFG_ENABLE);
859 if (rc < 0) {
860 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
861 __func__, bt_config_power_off[pin], rc);
862 }
863 }
864 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
865 if (rc < 0) {
866 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
867 __func__, rc);
868 }
869fail_power:
870 rc = bluetooth_switch_regulators(0);
871 if (rc < 0) {
872 pr_err("%s: switch_regulators : rc = %d",\
873 __func__, rc);
874 goto exit;
875 }
876 }
877 return rc;
878exit:
879 pr_err("%s: failed with rc = %d", __func__, rc);
880 return rc;
881}
882
883static int __init bt_power_init(void)
884{
885 int i, rc = 0;
886 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
887 vregs_bahama[i] = vreg_get(NULL,
888 vregs_bahama_name[i]);
889 if (IS_ERR(vregs_bahama[i])) {
890 pr_err("%s: vreg get %s failed (%ld)\n",
891 __func__, vregs_bahama_name[i],
892 PTR_ERR(vregs_bahama[i]));
893 rc = PTR_ERR(vregs_bahama[i]);
894 goto vreg_get_fail;
895 }
896 }
897
898 msm_bt_power_device.dev.platform_data = &bluetooth_power;
899
900 return rc;
901
902vreg_get_fail:
903 while (i)
904 vreg_put(vregs_bahama[--i]);
905 return rc;
906}
907
908static struct marimba_platform_data marimba_pdata = {
909 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
910 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
911 .bahama_setup = msm_bahama_setup_power,
912 .bahama_shutdown = msm_bahama_shutdown_power,
913 .bahama_core_config = msm_bahama_core_config,
914 .fm = &marimba_fm_pdata,
915};
916
917#endif
918
919#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
920static struct i2c_board_info core_exp_i2c_info[] __initdata = {
921 {
922 I2C_BOARD_INFO("sx1509q", 0x3e),
923 },
924};
925static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
926 {
927 I2C_BOARD_INFO("sx1508q", 0x22),
928 .platform_data = &sx150x_data[SX150X_CAM],
929 },
930};
931#endif
932#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
933static struct i2c_board_info bahama_devices[] = {
934{
935 I2C_BOARD_INFO("marimba", 0xc),
936 .platform_data = &marimba_pdata,
937},
938};
939#endif
940
941#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
942static void __init register_i2c_devices(void)
943{
944
945 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
946 cam_exp_i2c_info,
947 ARRAY_SIZE(cam_exp_i2c_info));
948
949 if (machine_is_msm7x27a_surf())
950 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
951
952 core_exp_i2c_info[0].platform_data =
953 &sx150x_data[SX150X_CORE];
954
955 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
956 core_exp_i2c_info,
957 ARRAY_SIZE(core_exp_i2c_info));
958#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
959 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
960 bahama_devices,
961 ARRAY_SIZE(bahama_devices));
962#endif
963}
964#endif
965
966static struct msm_gpio qup_i2c_gpios_io[] = {
967 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
968 "qup_scl" },
969 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
970 "qup_sda" },
971 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
972 "qup_scl" },
973 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
974 "qup_sda" },
975};
976
977static struct msm_gpio qup_i2c_gpios_hw[] = {
978 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
979 "qup_scl" },
980 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
981 "qup_sda" },
982 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
983 "qup_scl" },
984 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
985 "qup_sda" },
986};
987
988static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
989{
990 int rc;
991
992 if (adap_id < 0 || adap_id > 1)
993 return;
994
995 /* Each adapter gets 2 lines from the table */
996 if (config_type)
997 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
998 else
999 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1000 if (rc < 0)
1001 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1002}
1003
1004static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1005 .clk_freq = 100000,
1006 .clk = "gsbi_qup_clk",
1007 .pclk = "gsbi_qup_pclk",
1008 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1009};
1010
1011static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1012 .clk_freq = 100000,
1013 .clk = "gsbi_qup_clk",
1014 .pclk = "gsbi_qup_pclk",
1015 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1016};
1017
1018#ifdef CONFIG_ARCH_MSM7X27A
1019#define MSM_PMEM_MDP_SIZE 0x1DD1000
1020#define MSM_PMEM_ADSP_SIZE 0x1000000
1021
1022#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1023#define MSM_FB_SIZE 0x260000
1024#else
1025#define MSM_FB_SIZE 0x195000
1026#endif
1027
1028#endif
1029
1030static struct android_usb_platform_data android_usb_pdata = {
1031 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1032};
1033
1034static struct platform_device android_usb_device = {
1035 .name = "android_usb",
1036 .id = -1,
1037 .dev = {
1038 .platform_data = &android_usb_pdata,
1039 },
1040};
1041
1042#ifdef CONFIG_USB_EHCI_MSM_72K
1043static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1044{
1045 int rc = 0;
1046 unsigned gpio;
1047
1048 gpio = GPIO_HOST_VBUS_EN;
1049
1050 rc = gpio_request(gpio, "i2c_host_vbus_en");
1051 if (rc < 0) {
1052 pr_err("failed to request %d GPIO\n", gpio);
1053 return;
1054 }
1055 gpio_direction_output(gpio, !!on);
1056 gpio_set_value_cansleep(gpio, !!on);
1057 gpio_free(gpio);
1058}
1059
1060static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1061 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1062};
1063
1064static void __init msm7x2x_init_host(void)
1065{
1066 msm_add_host(0, &msm_usb_host_pdata);
1067}
1068#endif
1069
1070#ifdef CONFIG_USB_MSM_OTG_72K
1071static int hsusb_rpc_connect(int connect)
1072{
1073 if (connect)
1074 return msm_hsusb_rpc_connect();
1075 else
1076 return msm_hsusb_rpc_close();
1077}
1078
1079static struct vreg *vreg_3p3;
1080static int msm_hsusb_ldo_init(int init)
1081{
1082 if (init) {
1083 vreg_3p3 = vreg_get(NULL, "usb");
1084 if (IS_ERR(vreg_3p3))
1085 return PTR_ERR(vreg_3p3);
1086 } else
1087 vreg_put(vreg_3p3);
1088
1089 return 0;
1090}
1091
1092static int msm_hsusb_ldo_enable(int enable)
1093{
1094 static int ldo_status;
1095
1096 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1097 return -ENODEV;
1098
1099 if (ldo_status == enable)
1100 return 0;
1101
1102 ldo_status = enable;
1103
1104 if (enable)
1105 return vreg_enable(vreg_3p3);
1106
1107 return vreg_disable(vreg_3p3);
1108}
1109
1110#ifndef CONFIG_USB_EHCI_MSM_72K
1111static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1112{
1113 int ret = 0;
1114
1115 if (init)
1116 ret = msm_pm_app_rpc_init(callback);
1117 else
1118 msm_pm_app_rpc_deinit(callback);
1119
1120 return ret;
1121}
1122#endif
1123
1124static struct msm_otg_platform_data msm_otg_pdata = {
1125#ifndef CONFIG_USB_EHCI_MSM_72K
1126 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1127#else
1128 .vbus_power = msm_hsusb_vbus_power,
1129#endif
1130 .rpc_connect = hsusb_rpc_connect,
1131 .core_clk = 1,
1132 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1133 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1134 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1135 .se1_gating = SE1_GATING_DISABLE,
1136 .ldo_init = msm_hsusb_ldo_init,
1137 .ldo_enable = msm_hsusb_ldo_enable,
1138 .chg_init = hsusb_chg_init,
1139 .chg_connected = hsusb_chg_connected,
1140 .chg_vbus_draw = hsusb_chg_vbus_draw,
1141};
1142#endif
1143
1144static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1145 .is_phy_status_timer_on = 1,
1146};
1147
1148static struct resource smc91x_resources[] = {
1149 [0] = {
1150 .start = 0x90000300,
1151 .end = 0x900003ff,
1152 .flags = IORESOURCE_MEM,
1153 },
1154 [1] = {
1155 .start = MSM_GPIO_TO_INT(4),
1156 .end = MSM_GPIO_TO_INT(4),
1157 .flags = IORESOURCE_IRQ,
1158 },
1159};
1160
1161static struct platform_device smc91x_device = {
1162 .name = "smc91x",
1163 .id = 0,
1164 .num_resources = ARRAY_SIZE(smc91x_resources),
1165 .resource = smc91x_resources,
1166};
1167
1168#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1169 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1170 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1171 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1172
1173static unsigned long vreg_sts, gpio_sts;
1174static struct vreg *vreg_mmc;
1175static struct vreg *vreg_emmc;
1176
1177struct sdcc_vreg {
1178 struct vreg *vreg_data;
1179 unsigned level;
1180};
1181
1182static struct sdcc_vreg sdcc_vreg_data[4];
1183
1184struct sdcc_gpio {
1185 struct msm_gpio *cfg_data;
1186 uint32_t size;
1187 struct msm_gpio *sleep_cfg_data;
1188};
1189
1190static struct msm_gpio sdc1_cfg_data[] = {
1191 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1192 "sdc1_dat_3"},
1193 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1194 "sdc1_dat_2"},
1195 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1196 "sdc1_dat_1"},
1197 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1198 "sdc1_dat_0"},
1199 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1200 "sdc1_cmd"},
1201 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1202 "sdc1_clk"},
1203};
1204
1205static struct msm_gpio sdc2_cfg_data[] = {
1206 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1207 "sdc2_clk"},
1208 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1209 "sdc2_cmd"},
1210 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1211 "sdc2_dat_3"},
1212 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1213 "sdc2_dat_2"},
1214 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1215 "sdc2_dat_1"},
1216 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1217 "sdc2_dat_0"},
1218};
1219
1220static struct msm_gpio sdc2_sleep_cfg_data[] = {
1221 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1222 "sdc2_clk"},
1223 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1224 "sdc2_cmd"},
1225 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1226 "sdc2_dat_3"},
1227 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1228 "sdc2_dat_2"},
1229 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1230 "sdc2_dat_1"},
1231 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1232 "sdc2_dat_0"},
1233};
1234static struct msm_gpio sdc3_cfg_data[] = {
1235 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1236 "sdc3_clk"},
1237 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1238 "sdc3_cmd"},
1239 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1240 "sdc3_dat_3"},
1241 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1242 "sdc3_dat_2"},
1243 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1244 "sdc3_dat_1"},
1245 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1246 "sdc3_dat_0"},
1247#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1248 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1249 "sdc3_dat_7"},
1250 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1251 "sdc3_dat_6"},
1252 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1253 "sdc3_dat_5"},
1254 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1255 "sdc3_dat_4"},
1256#endif
1257};
1258
1259static struct msm_gpio sdc4_cfg_data[] = {
1260 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1261 "sdc4_dat_3"},
1262 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1263 "sdc4_dat_2"},
1264 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1265 "sdc4_dat_1"},
1266 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1267 "sdc4_cmd"},
1268 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1269 "sdc4_dat_0"},
1270 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1271 "sdc4_clk"},
1272};
1273
1274static struct sdcc_gpio sdcc_cfg_data[] = {
1275 {
1276 .cfg_data = sdc1_cfg_data,
1277 .size = ARRAY_SIZE(sdc1_cfg_data),
1278 },
1279 {
1280 .cfg_data = sdc2_cfg_data,
1281 .size = ARRAY_SIZE(sdc2_cfg_data),
1282 .sleep_cfg_data = sdc2_sleep_cfg_data,
1283 },
1284 {
1285 .cfg_data = sdc3_cfg_data,
1286 .size = ARRAY_SIZE(sdc3_cfg_data),
1287 },
1288 {
1289 .cfg_data = sdc4_cfg_data,
1290 .size = ARRAY_SIZE(sdc4_cfg_data),
1291 },
1292};
1293
1294static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1295{
1296 int rc = 0;
1297 struct sdcc_gpio *curr;
1298
1299 curr = &sdcc_cfg_data[dev_id - 1];
1300 if (!(test_bit(dev_id, &gpio_sts)^enable))
1301 return rc;
1302
1303 if (enable) {
1304 set_bit(dev_id, &gpio_sts);
1305 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1306 if (rc)
1307 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1308 __func__, dev_id);
1309 } else {
1310 clear_bit(dev_id, &gpio_sts);
1311 if (curr->sleep_cfg_data) {
1312 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1313 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1314 return rc;
1315 }
1316 msm_gpios_disable_free(curr->cfg_data, curr->size);
1317 }
1318 return rc;
1319}
1320
1321static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1322{
1323 int rc = 0;
1324 struct sdcc_vreg *curr;
1325
1326 curr = &sdcc_vreg_data[dev_id - 1];
1327
1328 if (!(test_bit(dev_id, &vreg_sts)^enable))
1329 return rc;
1330
1331 if (enable) {
1332 set_bit(dev_id, &vreg_sts);
1333 rc = vreg_set_level(curr->vreg_data, curr->level);
1334 if (rc)
1335 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1336
1337 rc = vreg_enable(curr->vreg_data);
1338 if (rc)
1339 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1340 } else {
1341 clear_bit(dev_id, &vreg_sts);
1342 rc = vreg_disable(curr->vreg_data);
1343 if (rc)
1344 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1345 }
1346 return rc;
1347}
1348
1349static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1350{
1351 int rc = 0;
1352 struct platform_device *pdev;
1353
1354 pdev = container_of(dv, struct platform_device, dev);
1355
1356 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1357 if (rc)
1358 goto out;
1359
1360 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1361out:
1362 return rc;
1363}
1364
1365#define GPIO_SDC1_HW_DET 85
1366
1367#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1368 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1369static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1370{
1371 int status;
1372
1373 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1374 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1375 if (status)
1376 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1377 GPIO_SDC1_HW_DET);
1378
1379 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1380 if (status) {
1381 pr_err("%s:Failed to request GPIO %d\n", __func__,
1382 GPIO_SDC1_HW_DET);
1383 } else {
1384 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1385 if (!status)
1386 status = gpio_get_value(GPIO_SDC1_HW_DET);
1387 gpio_free(GPIO_SDC1_HW_DET);
1388 }
1389 return status;
1390}
1391#endif
1392
1393#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1394static struct mmc_platform_data sdc1_plat_data = {
1395 .ocr_mask = MMC_VDD_28_29,
1396 .translate_vdd = msm_sdcc_setup_power,
1397 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1398 .msmsdcc_fmin = 144000,
1399 .msmsdcc_fmid = 24576000,
1400 .msmsdcc_fmax = 49152000,
1401#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1402 .status = msm7x2xa_sdcc_slot_status,
1403 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1404 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1405#endif
1406};
1407#endif
1408
1409#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1410static struct mmc_platform_data sdc2_plat_data = {
1411 /*
1412 * SDC2 supports only 1.8V, claim for 2.85V range is just
1413 * for allowing buggy cards who advertise 2.8V even though
1414 * they can operate at 1.8V supply.
1415 */
1416 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1417 .translate_vdd = msm_sdcc_setup_power,
1418 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1419#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1420 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1421#endif
1422 .msmsdcc_fmin = 144000,
1423 .msmsdcc_fmid = 24576000,
1424 .msmsdcc_fmax = 49152000,
1425#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1426 .dummy52_required = 1,
1427#endif
1428};
1429#endif
1430
1431#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1432static struct mmc_platform_data sdc3_plat_data = {
1433 .ocr_mask = MMC_VDD_28_29,
1434 .translate_vdd = msm_sdcc_setup_power,
1435#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1436 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1437#else
1438 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1439#endif
1440 .msmsdcc_fmin = 144000,
1441 .msmsdcc_fmid = 24576000,
1442 .msmsdcc_fmax = 49152000,
1443 .nonremovable = 1,
1444};
1445#endif
1446
1447#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1448 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1449static struct mmc_platform_data sdc4_plat_data = {
1450 .ocr_mask = MMC_VDD_28_29,
1451 .translate_vdd = msm_sdcc_setup_power,
1452 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1453 .msmsdcc_fmin = 144000,
1454 .msmsdcc_fmid = 24576000,
1455 .msmsdcc_fmax = 49152000,
1456};
1457#endif
1458#endif
1459
1460#ifdef CONFIG_SERIAL_MSM_HS
1461static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1462 .inject_rx_on_wakeup = 1,
1463 .rx_to_inject = 0xFD,
1464};
1465#endif
1466static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1467 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1468 .idle_supported = 1,
1469 .suspend_supported = 1,
1470 .idle_enabled = 1,
1471 .suspend_enabled = 1,
1472 .latency = 16000,
1473 .residency = 20000,
1474 },
1475 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1476 .idle_supported = 1,
1477 .suspend_supported = 1,
1478 .idle_enabled = 1,
1479 .suspend_enabled = 1,
1480 .latency = 12000,
1481 .residency = 20000,
1482 },
1483 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1484 .idle_supported = 1,
1485 .suspend_supported = 1,
1486 .idle_enabled = 0,
1487 .suspend_enabled = 1,
1488 .latency = 2000,
1489 .residency = 0,
1490 },
1491 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1492 .idle_supported = 1,
1493 .suspend_supported = 1,
1494 .idle_enabled = 1,
1495 .suspend_enabled = 1,
1496 .latency = 2,
1497 .residency = 0,
1498 },
1499};
1500
1501static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1502 .name = "pmem_adsp",
1503 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1504 .cached = 0,
1505 .memory_type = MEMTYPE_EBI1,
1506};
1507
1508static struct platform_device android_pmem_adsp_device = {
1509 .name = "android_pmem",
1510 .id = 1,
1511 .dev = { .platform_data = &android_pmem_adsp_pdata },
1512};
1513
1514static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1515static int __init pmem_mdp_size_setup(char *p)
1516{
1517 pmem_mdp_size = memparse(p, NULL);
1518 return 0;
1519}
1520
1521early_param("pmem_mdp_size", pmem_mdp_size_setup);
1522
1523static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1524static int __init pmem_adsp_size_setup(char *p)
1525{
1526 pmem_adsp_size = memparse(p, NULL);
1527 return 0;
1528}
1529
1530early_param("pmem_adsp_size", pmem_adsp_size_setup);
1531
1532static unsigned fb_size = MSM_FB_SIZE;
1533static int __init fb_size_setup(char *p)
1534{
1535 fb_size = memparse(p, NULL);
1536 return 0;
1537}
1538
1539early_param("fb_size", fb_size_setup);
1540
1541
1542#define LCDC_CONFIG_PROC 21
1543#define LCDC_UN_CONFIG_PROC 22
1544#define LCDC_API_PROG 0x30000066
1545#define LCDC_API_VERS 0x00010001
1546
1547static struct msm_rpc_endpoint *lcdc_ep;
1548
1549static int msm_fb_lcdc_config(int on)
1550{
1551 int rc = 0;
1552 struct rpc_request_hdr hdr;
1553
1554 if (on)
1555 pr_info("lcdc config\n");
1556 else
1557 pr_info("lcdc un-config\n");
1558
1559 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
1560
1561 if (IS_ERR(lcdc_ep)) {
1562 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
1563 __func__, PTR_ERR(lcdc_ep));
1564 return -EINVAL;
1565 }
1566
1567 rc = msm_rpc_call(lcdc_ep,
1568 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
1569 &hdr, sizeof(hdr), 5 * HZ);
1570
1571 if (rc)
1572 printk(KERN_ERR
1573 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
1574
1575 msm_rpc_close(lcdc_ep);
1576 return rc;
1577}
1578
1579static const char * const msm_fb_lcdc_vreg[] = {
1580 "gp2",
1581 "msme1",
1582};
1583
1584static const int msm_fb_lcdc_vreg_mV[] = {
1585 2850,
1586 1800,
1587};
1588
1589struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1590
1591static uint32_t lcdc_gpio_initialized;
1592
1593static void lcdc_toshiba_gpio_init(void)
1594{
1595 int i, rc = 0;
1596 if (!lcdc_gpio_initialized) {
1597 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1598 pr_err("failed to request gpio spi_clk\n");
1599 return;
1600 }
1601 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1602 pr_err("failed to request gpio spi_cs0_N\n");
1603 goto fail_gpio6;
1604 }
1605 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1606 pr_err("failed to request gpio spi_mosi\n");
1607 goto fail_gpio5;
1608 }
1609 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1610 pr_err("failed to request gpio spi_miso\n");
1611 goto fail_gpio4;
1612 }
1613 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1614 pr_err("failed to request gpio_disp_pwr\n");
1615 goto fail_gpio3;
1616 }
1617 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1618 pr_err("failed to request gpio_bkl_en\n");
1619 goto fail_gpio2;
1620 }
1621 pmapp_disp_backlight_init();
1622
1623 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1624 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1625
1626 rc = vreg_set_level(lcdc_vreg[i],
1627 msm_fb_lcdc_vreg_mV[i]);
1628
1629 if (rc < 0) {
1630 pr_err("%s: set regulator level failed "
1631 "with :(%d)\n", __func__, rc);
1632 goto fail_gpio1;
1633 }
1634 }
1635 lcdc_gpio_initialized = 1;
1636 }
1637 return;
1638
1639fail_gpio1:
1640 for (; i > 0; i--)
1641 vreg_put(lcdc_vreg[i - 1]);
1642
1643 gpio_free(GPIO_BACKLIGHT_EN);
1644fail_gpio2:
1645 gpio_free(GPIO_DISPLAY_PWR_EN);
1646fail_gpio3:
1647 gpio_free(GPIO_SPI_MISO);
1648fail_gpio4:
1649 gpio_free(GPIO_SPI_MOSI);
1650fail_gpio5:
1651 gpio_free(GPIO_SPI_CS0_N);
1652fail_gpio6:
1653 gpio_free(GPIO_SPI_CLK);
1654 lcdc_gpio_initialized = 0;
1655}
1656
1657static uint32_t lcdc_gpio_table[] = {
1658 GPIO_SPI_CLK,
1659 GPIO_SPI_CS0_N,
1660 GPIO_SPI_MOSI,
1661 GPIO_DISPLAY_PWR_EN,
1662 GPIO_BACKLIGHT_EN,
1663 GPIO_SPI_MISO,
1664};
1665
1666static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1667{
1668 int n;
1669
1670 if (lcdc_gpio_initialized) {
1671 /* All are IO Expander GPIOs */
1672 for (n = 0; n < (len - 1); n++)
1673 gpio_direction_output(table[n], 1);
1674 }
1675}
1676
1677static void lcdc_toshiba_config_gpios(int enable)
1678{
1679 config_lcdc_gpio_table(lcdc_gpio_table,
1680 ARRAY_SIZE(lcdc_gpio_table), enable);
1681}
1682
1683static int msm_fb_lcdc_power_save(int on)
1684{
1685 int i, rc = 0;
1686 /* Doing the init of the LCDC GPIOs very late as they are from
1687 an I2C-controlled IO Expander */
1688 lcdc_toshiba_gpio_init();
1689
1690 if (lcdc_gpio_initialized) {
1691 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1692 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1693
1694 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1695 if (on) {
1696 rc = vreg_enable(lcdc_vreg[i]);
1697
1698 if (rc) {
1699 printk(KERN_ERR "vreg_enable: %s vreg"
1700 "operation failed\n",
1701 msm_fb_lcdc_vreg[i]);
1702 goto lcdc_vreg_fail;
1703 }
1704 } else {
1705 rc = vreg_disable(lcdc_vreg[i]);
1706
1707 if (rc) {
1708 printk(KERN_ERR "vreg_disable: %s vreg "
1709 "operation failed\n",
1710 msm_fb_lcdc_vreg[i]);
1711 goto lcdc_vreg_fail;
1712 }
1713 }
1714 }
1715 }
1716
1717 return rc;
1718
1719lcdc_vreg_fail:
1720 if (on) {
1721 for (; i > 0; i--)
1722 vreg_disable(lcdc_vreg[i - 1]);
1723 } else {
1724 for (; i > 0; i--)
1725 vreg_enable(lcdc_vreg[i - 1]);
1726 }
1727
1728return rc;
1729
1730}
1731
1732
1733static int lcdc_toshiba_set_bl(int level)
1734{
1735 int ret;
1736
1737 ret = pmapp_disp_backlight_set_brightness(level);
1738 if (ret)
1739 pr_err("%s: can't set lcd backlight!\n", __func__);
1740
1741 return ret;
1742}
1743
1744
1745static struct lcdc_platform_data lcdc_pdata = {
1746 .lcdc_gpio_config = msm_fb_lcdc_config,
1747 .lcdc_power_save = msm_fb_lcdc_power_save,
1748};
1749
1750static int lcd_panel_spi_gpio_num[] = {
1751 GPIO_SPI_MOSI, /* spi_sdi */
1752 GPIO_SPI_MISO, /* spi_sdoi */
1753 GPIO_SPI_CLK, /* spi_clk */
1754 GPIO_SPI_CS0_N, /* spi_cs */
1755};
1756
1757static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1758 .panel_config_gpio = lcdc_toshiba_config_gpios,
1759 .pmic_backlight = lcdc_toshiba_set_bl,
1760 .gpio_num = lcd_panel_spi_gpio_num,
1761};
1762
1763static struct platform_device lcdc_toshiba_panel_device = {
1764 .name = "lcdc_toshiba_fwvga_pt",
1765 .id = 0,
1766 .dev = {
1767 .platform_data = &lcdc_toshiba_panel_data,
1768 }
1769};
1770
1771static struct resource msm_fb_resources[] = {
1772 {
1773 .flags = IORESOURCE_DMA,
1774 }
1775};
1776
1777static int msm_fb_detect_panel(const char *name)
1778{
1779 int ret = -EPERM;
1780
1781 if (machine_is_msm7x27a_surf()) {
1782 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1783 ret = 0;
1784 } else {
1785 ret = -ENODEV;
1786 }
1787
1788 return ret;
1789}
1790
1791static struct msm_fb_platform_data msm_fb_pdata = {
1792 .detect_client = msm_fb_detect_panel,
1793};
1794
1795static struct platform_device msm_fb_device = {
1796 .name = "msm_fb",
1797 .id = 0,
1798 .num_resources = ARRAY_SIZE(msm_fb_resources),
1799 .resource = msm_fb_resources,
1800 .dev = {
1801 .platform_data = &msm_fb_pdata,
1802 }
1803};
1804
1805#ifdef CONFIG_FB_MSM_MIPI_DSI
1806static int mipi_renesas_set_bl(int level)
1807{
1808 int ret;
1809
1810 ret = pmapp_disp_backlight_set_brightness(level);
1811
1812 if (ret)
1813 pr_err("%s: can't set lcd backlight!\n", __func__);
1814
1815 return ret;
1816}
1817
1818static struct msm_panel_common_pdata mipi_renesas_pdata = {
1819 .pmic_backlight = mipi_renesas_set_bl,
1820};
1821
1822
1823static struct platform_device mipi_dsi_renesas_panel_device = {
1824 .name = "mipi_renesas",
1825 .id = 0,
1826 .dev = {
1827 .platform_data = &mipi_renesas_pdata,
1828 }
1829};
1830#endif
1831
1832static void __init msm7x27a_init_mmc(void)
1833{
1834 vreg_emmc = vreg_get(NULL, "emmc");
1835 if (IS_ERR(vreg_emmc)) {
1836 pr_err("%s: vreg get failed (%ld)\n",
1837 __func__, PTR_ERR(vreg_emmc));
1838 return;
1839 }
1840
1841 vreg_mmc = vreg_get(NULL, "mmc");
1842 if (IS_ERR(vreg_mmc)) {
1843 pr_err("%s: vreg get failed (%ld)\n",
1844 __func__, PTR_ERR(vreg_mmc));
1845 return;
1846 }
1847
1848 /* eMMC slot */
1849#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1850 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1851 sdcc_vreg_data[2].level = 3000;
1852 msm_add_sdcc(3, &sdc3_plat_data);
1853#endif
1854 /* Micro-SD slot */
1855#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1856 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1857 sdcc_vreg_data[0].level = 2850;
1858 msm_add_sdcc(1, &sdc1_plat_data);
1859#endif
1860 /* SDIO WLAN slot */
1861#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1862 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1863 sdcc_vreg_data[1].level = 2850;
1864 msm_add_sdcc(2, &sdc2_plat_data);
1865#endif
1866 /* Not Used */
1867#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1868 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1869 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1870 sdcc_vreg_data[3].level = 2850;
1871 msm_add_sdcc(4, &sdc4_plat_data);
1872#endif
1873}
1874#define SND(desc, num) { .name = #desc, .id = num }
1875static struct snd_endpoint snd_endpoints_list[] = {
1876 SND(HANDSET, 0),
1877 SND(MONO_HEADSET, 2),
1878 SND(HEADSET, 3),
1879 SND(SPEAKER, 6),
1880 SND(TTY_HEADSET, 8),
1881 SND(TTY_VCO, 9),
1882 SND(TTY_HCO, 10),
1883 SND(BT, 12),
1884 SND(IN_S_SADC_OUT_HANDSET, 16),
1885 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1886 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1887 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1888 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1889 SND(CURRENT, 34),
1890 SND(FM_ANALOG_STEREO_HEADSET, 35),
1891 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1892};
1893#undef SND
1894
1895static struct msm_snd_endpoints msm_device_snd_endpoints = {
1896 .endpoints = snd_endpoints_list,
1897 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1898};
1899
1900static struct platform_device msm_device_snd = {
1901 .name = "msm_snd",
1902 .id = -1,
1903 .dev = {
1904 .platform_data = &msm_device_snd_endpoints
1905 },
1906};
1907
1908#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1909 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1910 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1911 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1912 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1913 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1914#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1915 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1916 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1917 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1918 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1919 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1920#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1921 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1922 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1923 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1924 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1925 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1926#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1927 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1928 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1929 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1930 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1931 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1932#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1933
1934static unsigned int dec_concurrency_table[] = {
1935 /* Audio LP */
1936 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1937 0, 0, 0,
1938
1939 /* Concurrency 1 */
1940 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1941 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1942 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1943 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1944 (DEC4_FORMAT),
1945
1946 /* Concurrency 2 */
1947 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1949 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1950 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1951 (DEC4_FORMAT),
1952
1953 /* Concurrency 3 */
1954 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1956 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1957 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1958 (DEC4_FORMAT),
1959
1960 /* Concurrency 4 */
1961 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1962 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1963 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1964 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1965 (DEC4_FORMAT),
1966
1967 /* Concurrency 5 */
1968 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1969 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1970 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1971 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1972 (DEC4_FORMAT),
1973
1974 /* Concurrency 6 */
1975 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1976 0, 0, 0, 0,
1977
1978 /* Concurrency 7 */
1979 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1980 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1981 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1982 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1983 (DEC4_FORMAT),
1984};
1985
1986#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1987 .module_queueid = queueid, .module_decid = decid, \
1988 .nr_codec_support = nr_codec}
1989
1990static struct msm_adspdec_info dec_info_list[] = {
1991 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1992 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1993 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1994 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1995 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1996};
1997
1998static struct msm_adspdec_database msm_device_adspdec_database = {
1999 .num_dec = ARRAY_SIZE(dec_info_list),
2000 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
2001 ARRAY_SIZE(dec_info_list)),
2002 .dec_concurrency_table = dec_concurrency_table,
2003 .dec_info_list = dec_info_list,
2004};
2005
2006static struct platform_device msm_device_adspdec = {
2007 .name = "msm_adspdec",
2008 .id = -1,
2009 .dev = {
2010 .platform_data = &msm_device_adspdec_database
2011 },
2012};
2013
2014static struct android_pmem_platform_data android_pmem_audio_pdata = {
2015 .name = "pmem_audio",
2016 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2017 .cached = 0,
2018 .memory_type = MEMTYPE_EBI1,
2019};
2020
2021static struct platform_device android_pmem_audio_device = {
2022 .name = "android_pmem",
2023 .id = 2,
2024 .dev = { .platform_data = &android_pmem_audio_pdata },
2025};
2026
2027static struct android_pmem_platform_data android_pmem_pdata = {
2028 .name = "pmem",
2029 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2030 .cached = 1,
2031 .memory_type = MEMTYPE_EBI1,
2032};
2033static struct platform_device android_pmem_device = {
2034 .name = "android_pmem",
2035 .id = 0,
2036 .dev = { .platform_data = &android_pmem_pdata },
2037};
2038
2039static u32 msm_calculate_batt_capacity(u32 current_voltage);
2040
2041static struct msm_psy_batt_pdata msm_psy_batt_data = {
2042 .voltage_min_design = 2800,
2043 .voltage_max_design = 4300,
2044 .avail_chg_sources = AC_CHG | USB_CHG ,
2045 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2046 .calculate_capacity = &msm_calculate_batt_capacity,
2047};
2048
2049static u32 msm_calculate_batt_capacity(u32 current_voltage)
2050{
2051 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2052 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2053
2054 return (current_voltage - low_voltage) * 100
2055 / (high_voltage - low_voltage);
2056}
2057
2058static struct platform_device msm_batt_device = {
2059 .name = "msm-battery",
2060 .id = -1,
2061 .dev.platform_data = &msm_psy_batt_data,
2062};
2063
2064static struct smsc911x_platform_config smsc911x_config = {
2065 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2066 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2067 .flags = SMSC911X_USE_16BIT,
2068};
2069
2070static struct resource smsc911x_resources[] = {
2071 [0] = {
2072 .start = 0x90000000,
2073 .end = 0x90007fff,
2074 .flags = IORESOURCE_MEM,
2075 },
2076 [1] = {
2077 .start = MSM_GPIO_TO_INT(48),
2078 .end = MSM_GPIO_TO_INT(48),
2079 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2080 },
2081};
2082
2083static struct platform_device smsc911x_device = {
2084 .name = "smsc911x",
2085 .id = 0,
2086 .num_resources = ARRAY_SIZE(smsc911x_resources),
2087 .resource = smsc911x_resources,
2088 .dev = {
2089 .platform_data = &smsc911x_config,
2090 },
2091};
2092
2093static struct msm_gpio smsc911x_gpios[] = {
2094 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2095 "smsc911x_irq" },
2096 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2097 "eth_fifo_sel" },
2098};
2099
2100#define ETH_FIFO_SEL_GPIO 49
2101static void msm7x27a_cfg_smsc911x(void)
2102{
2103 int res;
2104
2105 res = msm_gpios_request_enable(smsc911x_gpios,
2106 ARRAY_SIZE(smsc911x_gpios));
2107 if (res) {
2108 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2109 return;
2110 }
2111
2112 /* ETH_FIFO_SEL */
2113 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2114 if (res) {
2115 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2116 ETH_FIFO_SEL_GPIO);
2117 msm_gpios_disable_free(smsc911x_gpios,
2118 ARRAY_SIZE(smsc911x_gpios));
2119 return;
2120 }
2121 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2122}
2123
2124#ifdef CONFIG_MSM_CAMERA
2125static uint32_t camera_off_gpio_table[] = {
2126 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2127};
2128
2129static uint32_t camera_on_gpio_table[] = {
2130 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2131};
2132
2133#ifdef CONFIG_MSM_CAMERA_FLASH
2134static struct msm_camera_sensor_flash_src msm_flash_src = {
2135 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2136 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2137 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2138};
2139#endif
2140
2141static struct vreg *vreg_gp1;
2142static struct vreg *vreg_gp2;
2143static struct vreg *vreg_gp3;
2144static void msm_camera_vreg_config(int vreg_en)
2145{
2146 int rc;
2147
2148 if (vreg_gp1 == NULL) {
2149 vreg_gp1 = vreg_get(NULL, "msme1");
2150 if (IS_ERR(vreg_gp1)) {
2151 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2152 __func__, "msme1", PTR_ERR(vreg_gp1));
2153 return;
2154 }
2155
2156 rc = vreg_set_level(vreg_gp1, 1800);
2157 if (rc) {
2158 pr_err("%s: GP1 set_level failed (%d)\n",
2159 __func__, rc);
2160 return;
2161 }
2162 }
2163
2164 if (vreg_gp2 == NULL) {
2165 vreg_gp2 = vreg_get(NULL, "gp2");
2166 if (IS_ERR(vreg_gp2)) {
2167 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2168 __func__, "gp2", PTR_ERR(vreg_gp2));
2169 return;
2170 }
2171
2172 rc = vreg_set_level(vreg_gp2, 2850);
2173 if (rc) {
2174 pr_err("%s: GP2 set_level failed (%d)\n",
2175 __func__, rc);
2176 }
2177 }
2178
2179 if (vreg_gp3 == NULL) {
2180 vreg_gp3 = vreg_get(NULL, "usb2");
2181 if (IS_ERR(vreg_gp3)) {
2182 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2183 __func__, "gp3", PTR_ERR(vreg_gp3));
2184 return;
2185 }
2186
2187 rc = vreg_set_level(vreg_gp3, 1800);
2188 if (rc) {
2189 pr_err("%s: GP3 set level failed (%d)\n",
2190 __func__, rc);
2191 }
2192 }
2193
2194 if (vreg_en) {
2195 rc = vreg_enable(vreg_gp1);
2196 if (rc) {
2197 pr_err("%s: GP1 enable failed (%d)\n",
2198 __func__, rc);
2199 return;
2200 }
2201
2202 rc = vreg_enable(vreg_gp2);
2203 if (rc) {
2204 pr_err("%s: GP2 enable failed (%d)\n",
2205 __func__, rc);
2206 }
2207
2208 rc = vreg_enable(vreg_gp3);
2209 if (rc) {
2210 pr_err("%s: GP3 enable failed (%d)\n",
2211 __func__, rc);
2212 }
2213 } else {
2214 rc = vreg_disable(vreg_gp1);
2215 if (rc)
2216 pr_err("%s: GP1 disable failed (%d)\n",
2217 __func__, rc);
2218
2219 rc = vreg_disable(vreg_gp2);
2220 if (rc) {
2221 pr_err("%s: GP2 disable failed (%d)\n",
2222 __func__, rc);
2223 }
2224
2225 rc = vreg_disable(vreg_gp3);
2226 if (rc) {
2227 pr_err("%s: GP3 disable failed (%d)\n",
2228 __func__, rc);
2229 }
2230 }
2231}
2232
2233static int config_gpio_table(uint32_t *table, int len)
2234{
2235 int rc = 0, i = 0;
2236
2237 for (i = 0; i < len; i++) {
2238 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2239 if (rc) {
2240 pr_err("%s not able to get gpio\n", __func__);
2241 for (i--; i >= 0; i--)
2242 gpio_tlmm_config(camera_off_gpio_table[i],
2243 GPIO_CFG_ENABLE);
2244 break;
2245 }
2246 }
2247 return rc;
2248}
2249
2250static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2251static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2252static int config_camera_on_gpios_rear(void)
2253{
2254 int rc = 0;
2255
2256 if (machine_is_msm7x27a_ffa())
2257 msm_camera_vreg_config(1);
2258
2259 rc = config_gpio_table(camera_on_gpio_table,
2260 ARRAY_SIZE(camera_on_gpio_table));
2261 if (rc < 0) {
2262 pr_err("%s: CAMSENSOR gpio table request"
2263 "failed\n", __func__);
2264 return rc;
2265 }
2266
2267 return rc;
2268}
2269
2270static void config_camera_off_gpios_rear(void)
2271{
2272 if (machine_is_msm7x27a_ffa())
2273 msm_camera_vreg_config(0);
2274
2275 config_gpio_table(camera_off_gpio_table,
2276 ARRAY_SIZE(camera_off_gpio_table));
2277}
2278
2279static int config_camera_on_gpios_front(void)
2280{
2281 int rc = 0;
2282
2283 if (machine_is_msm7x27a_ffa())
2284 msm_camera_vreg_config(1);
2285
2286 rc = config_gpio_table(camera_on_gpio_table,
2287 ARRAY_SIZE(camera_on_gpio_table));
2288 if (rc < 0) {
2289 pr_err("%s: CAMSENSOR gpio table request"
2290 "failed\n", __func__);
2291 return rc;
2292 }
2293
2294 return rc;
2295}
2296
2297static void config_camera_off_gpios_front(void)
2298{
2299 if (machine_is_msm7x27a_ffa())
2300 msm_camera_vreg_config(0);
2301
2302 config_gpio_table(camera_off_gpio_table,
2303 ARRAY_SIZE(camera_off_gpio_table));
2304}
2305
2306struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2307 .camera_gpio_on = config_camera_on_gpios_rear,
2308 .camera_gpio_off = config_camera_off_gpios_rear,
2309 .ioext.csiphy = 0xA1000000,
2310 .ioext.csisz = 0x00100000,
2311 .ioext.csiirq = INT_CSI_IRQ_1,
2312 .ioclk.mclk_clk_rate = 24000000,
2313 .ioclk.vfe_clk_rate = 192000000,
2314 .ioext.appphy = MSM_CLK_CTL_PHYS,
2315 .ioext.appsz = MSM_CLK_CTL_SIZE,
2316};
2317
2318struct msm_camera_device_platform_data msm_camera_device_data_front = {
2319 .camera_gpio_on = config_camera_on_gpios_front,
2320 .camera_gpio_off = config_camera_off_gpios_front,
2321 .ioext.csiphy = 0xA0F00000,
2322 .ioext.csisz = 0x00100000,
2323 .ioext.csiirq = INT_CSI_IRQ_0,
2324 .ioclk.mclk_clk_rate = 24000000,
2325 .ioclk.vfe_clk_rate = 192000000,
2326 .ioext.appphy = MSM_CLK_CTL_PHYS,
2327 .ioext.appsz = MSM_CLK_CTL_SIZE,
2328};
2329
2330#ifdef CONFIG_S5K4E1
2331static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2332 .mount_angle = 90
2333};
2334
2335static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2336 .flash_type = MSM_CAMERA_FLASH_LED,
2337 .flash_src = &msm_flash_src
2338};
2339
2340static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2341 .sensor_name = "s5k4e1",
2342 .sensor_reset_enable = 1,
2343 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2344 .sensor_pwd = 85,
2345 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2346 .vcm_enable = 1,
2347 .pdata = &msm_camera_device_data_rear,
2348 .flash_data = &flash_s5k4e1,
2349 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2350 .csi_if = 1
2351};
2352
2353static struct platform_device msm_camera_sensor_s5k4e1 = {
2354 .name = "msm_camera_s5k4e1",
2355 .dev = {
2356 .platform_data = &msm_camera_sensor_s5k4e1_data,
2357 },
2358};
2359#endif
2360
2361#ifdef CONFIG_IMX072
2362static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2363 .mount_angle = 90
2364};
2365
2366static struct msm_camera_sensor_flash_data flash_imx072 = {
2367 .flash_type = MSM_CAMERA_FLASH_LED,
2368 .flash_src = &msm_flash_src
2369};
2370
2371static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2372 .sensor_name = "imx072",
2373 .sensor_reset_enable = 1,
2374 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2375 .sensor_pwd = 85,
2376 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2377 .vcm_enable = 1,
2378 .pdata = &msm_camera_device_data_rear,
2379 .flash_data = &flash_imx072,
2380 .sensor_platform_info = &imx072_sensor_7627a_info,
2381 .csi_if = 1
2382};
2383
2384static struct platform_device msm_camera_sensor_imx072 = {
2385 .name = "msm_camera_imx072",
2386 .dev = {
2387 .platform_data = &msm_camera_sensor_imx072_data,
2388 },
2389};
2390#endif
2391
2392#ifdef CONFIG_WEBCAM_OV9726
2393static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2394 .mount_angle = 90
2395};
2396
2397static struct msm_camera_sensor_flash_data flash_ov9726 = {
2398 .flash_type = MSM_CAMERA_FLASH_NONE,
2399 .flash_src = &msm_flash_src
2400};
2401
2402static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2403 .sensor_name = "ov9726",
2404 .sensor_reset_enable = 0,
2405 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2406 .sensor_pwd = 85,
2407 .vcm_pwd = 1,
2408 .vcm_enable = 0,
2409 .pdata = &msm_camera_device_data_front,
2410 .flash_data = &flash_ov9726,
2411 .sensor_platform_info = &ov9726_sensor_7627a_info,
2412 .csi_if = 1
2413};
2414
2415static struct platform_device msm_camera_sensor_ov9726 = {
2416 .name = "msm_camera_ov9726",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_ov9726_data,
2419 },
2420};
2421#endif
2422
2423#ifdef CONFIG_MT9E013
2424static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2425 .mount_angle = 90
2426};
2427
2428static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2429 .flash_type = MSM_CAMERA_FLASH_LED,
2430 .flash_src = &msm_flash_src
2431};
2432
2433static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2434 .sensor_name = "mt9e013",
2435 .sensor_reset = 0,
2436 .sensor_reset_enable = 1,
2437 .sensor_pwd = 85,
2438 .vcm_pwd = 1,
2439 .vcm_enable = 0,
2440 .pdata = &msm_camera_device_data_rear,
2441 .flash_data = &flash_mt9e013,
2442 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2443 .csi_if = 1
2444};
2445
2446static struct platform_device msm_camera_sensor_mt9e013 = {
2447 .name = "msm_camera_mt9e013",
2448 .dev = {
2449 .platform_data = &msm_camera_sensor_mt9e013_data,
2450 },
2451};
2452#endif
2453
2454static struct i2c_board_info i2c_camera_devices[] = {
2455 #ifdef CONFIG_S5K4E1
2456 {
2457 I2C_BOARD_INFO("s5k4e1", 0x36),
2458 },
2459 {
2460 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2461 },
2462 #endif
2463 #ifdef CONFIG_WEBCAM_OV9726
2464 {
2465 I2C_BOARD_INFO("ov9726", 0x10),
2466 },
2467 #endif
2468 #ifdef CONFIG_IMX072
2469 {
2470 I2C_BOARD_INFO("imx072", 0x34),
2471 },
2472 #endif
2473 #ifdef CONFIG_MT9E013
2474 {
2475 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2476 },
2477 #endif
2478 {
2479 I2C_BOARD_INFO("sc628a", 0x37),
2480 },
2481};
2482#endif
2483#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2484 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2485static struct msm_gpio uart2dm_gpios[] = {
2486 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2487 "uart2dm_rfr_n" },
2488 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2489 "uart2dm_cts_n" },
2490 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2491 "uart2dm_rx" },
2492 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2493 "uart2dm_tx" },
2494};
2495
2496static void msm7x27a_cfg_uart2dm_serial(void)
2497{
2498 int ret;
2499 ret = msm_gpios_request_enable(uart2dm_gpios,
2500 ARRAY_SIZE(uart2dm_gpios));
2501 if (ret)
2502 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2503}
2504#else
2505static void msm7x27a_cfg_uart2dm_serial(void) { }
2506#endif
2507
2508static struct platform_device *rumi_sim_devices[] __initdata = {
2509 &msm_device_dmov,
2510 &msm_device_smd,
2511 &smc91x_device,
2512 &msm_device_uart1,
2513 &msm_device_nand,
2514 &msm_device_uart_dm1,
2515 &msm_gsbi0_qup_i2c_device,
2516 &msm_gsbi1_qup_i2c_device,
2517};
2518
2519static struct platform_device *surf_ffa_devices[] __initdata = {
2520 &msm_device_dmov,
2521 &msm_device_smd,
2522 &msm_device_uart1,
2523 &msm_device_uart_dm1,
2524 &msm_device_uart_dm2,
2525 &msm_device_nand,
2526 &msm_gsbi0_qup_i2c_device,
2527 &msm_gsbi1_qup_i2c_device,
2528 &msm_device_otg,
2529 &msm_device_gadget_peripheral,
2530 &android_usb_device,
2531 &android_pmem_device,
2532 &android_pmem_adsp_device,
2533 &android_pmem_audio_device,
2534 &msm_device_snd,
2535 &msm_device_adspdec,
2536 &msm_fb_device,
2537 &lcdc_toshiba_panel_device,
2538 &msm_batt_device,
2539 &smsc911x_device,
2540#ifdef CONFIG_S5K4E1
2541 &msm_camera_sensor_s5k4e1,
2542#endif
2543#ifdef CONFIG_IMX072
2544 &msm_camera_sensor_imx072,
2545#endif
2546#ifdef CONFIG_WEBCAM_OV9726
2547 &msm_camera_sensor_ov9726,
2548#endif
2549#ifdef CONFIG_MT9E013
2550 &msm_camera_sensor_mt9e013,
2551#endif
2552#ifdef CONFIG_FB_MSM_MIPI_DSI
2553 &mipi_dsi_renesas_panel_device,
2554#endif
2555 &msm_kgsl_3d0,
2556#ifdef CONFIG_BT
2557 &msm_bt_power_device,
2558#endif
2559};
2560
2561static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2562static int __init pmem_kernel_ebi1_size_setup(char *p)
2563{
2564 pmem_kernel_ebi1_size = memparse(p, NULL);
2565 return 0;
2566}
2567early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2568
2569static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2570static int __init pmem_audio_size_setup(char *p)
2571{
2572 pmem_audio_size = memparse(p, NULL);
2573 return 0;
2574}
2575early_param("pmem_audio_size", pmem_audio_size_setup);
2576
2577static void __init msm_msm7x2x_allocate_memory_regions(void)
2578{
2579 void *addr;
2580 unsigned long size;
2581
2582 size = fb_size ? : MSM_FB_SIZE;
2583 addr = alloc_bootmem_align(size, 0x1000);
2584 msm_fb_resources[0].start = __pa(addr);
2585 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2586 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2587 size, addr, __pa(addr));
2588}
2589
2590static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2591 [MEMTYPE_SMI] = {
2592 },
2593 [MEMTYPE_EBI0] = {
2594 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2595 },
2596 [MEMTYPE_EBI1] = {
2597 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2598 },
2599};
2600
2601static void __init size_pmem_devices(void)
2602{
2603#ifdef CONFIG_ANDROID_PMEM
2604 android_pmem_adsp_pdata.size = pmem_adsp_size;
2605 android_pmem_pdata.size = pmem_mdp_size;
2606 android_pmem_audio_pdata.size = pmem_audio_size;
2607#endif
2608}
2609
2610static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2611{
2612 msm7x27a_reserve_table[p->memory_type].size += p->size;
2613}
2614
2615static void __init reserve_pmem_memory(void)
2616{
2617#ifdef CONFIG_ANDROID_PMEM
2618 reserve_memory_for(&android_pmem_adsp_pdata);
2619 reserve_memory_for(&android_pmem_pdata);
2620 reserve_memory_for(&android_pmem_audio_pdata);
2621 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2622#endif
2623}
2624
2625static void __init msm7x27a_calculate_reserve_sizes(void)
2626{
2627 size_pmem_devices();
2628 reserve_pmem_memory();
2629}
2630
2631static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2632{
2633 return MEMTYPE_EBI1;
2634}
2635
2636static struct reserve_info msm7x27a_reserve_info __initdata = {
2637 .memtype_reserve_table = msm7x27a_reserve_table,
2638 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2639 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2640};
2641
2642static void __init msm7x27a_reserve(void)
2643{
2644 reserve_info = &msm7x27a_reserve_info;
2645 msm_reserve();
2646}
2647
2648static void __init msm_device_i2c_init(void)
2649{
2650 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2651 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2652}
2653
2654static struct msm_panel_common_pdata mdp_pdata = {
2655 .gpio = 97,
2656 .mdp_rev = MDP_REV_303,
2657};
2658
2659#define GPIO_LCDC_BRDG_PD 128
2660#define GPIO_LCDC_BRDG_RESET_N 129
2661
2662#define LCDC_RESET_PHYS 0x90008014
2663static void __iomem *lcdc_reset_ptr;
2664
2665static unsigned mipi_dsi_gpio[] = {
2666 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2667 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2668 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2669 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2670};
2671
2672enum {
2673 DSI_SINGLE_LANE = 1,
2674 DSI_TWO_LANES,
2675};
2676
2677static int msm_fb_get_lane_config(void)
2678{
2679 int rc = DSI_TWO_LANES;
2680
2681 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2682 rc = DSI_SINGLE_LANE;
2683 pr_info("DSI Single Lane\n");
2684 } else {
2685 pr_info("DSI Two Lanes\n");
2686 }
2687 return rc;
2688}
2689
2690static int msm_fb_dsi_client_reset(void)
2691{
2692 int rc = 0;
2693
2694 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2695 if (rc < 0) {
2696 pr_err("failed to request lcd brdg reset_n\n");
2697 return rc;
2698 }
2699
2700 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2701 if (rc < 0) {
2702 pr_err("failed to request lcd brdg pd\n");
2703 return rc;
2704 }
2705
2706 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2707 if (rc) {
2708 pr_err("Failed to enable LCDC Bridge reset enable\n");
2709 goto gpio_error;
2710 }
2711
2712 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2713 if (rc) {
2714 pr_err("Failed to enable LCDC Bridge pd enable\n");
2715 goto gpio_error2;
2716 }
2717
2718 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2719 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2720 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2721
2722 if (!rc) {
2723 if (machine_is_msm7x27a_surf()) {
2724 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2725 sizeof(uint32_t));
2726
2727 if (!lcdc_reset_ptr)
2728 return 0;
2729 }
2730 return rc;
2731 } else {
2732 goto gpio_error;
2733 }
2734
2735gpio_error2:
2736 pr_err("Failed GPIO bridge pd\n");
2737 gpio_free(GPIO_LCDC_BRDG_PD);
2738
2739gpio_error:
2740 pr_err("Failed GPIO bridge reset\n");
2741 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2742 return rc;
2743}
2744
2745static const char * const msm_fb_dsi_vreg[] = {
2746 "gp2",
2747 "msme1",
2748};
2749
2750static const int msm_fb_dsi_vreg_mV[] = {
2751 2850,
2752 1800,
2753};
2754
2755static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2756static int dsi_gpio_initialized;
2757
2758static int mipi_dsi_panel_power(int on)
2759{
2760 int i, rc = 0;
2761 uint32_t lcdc_reset_cfg;
2762
2763 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2764 if (!dsi_gpio_initialized) {
2765 pmapp_disp_backlight_init();
2766
2767 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2768 if (rc < 0) {
2769 pr_err("failed to request gpio_disp_pwr\n");
2770 return rc;
2771 }
2772
2773 if (machine_is_msm7x27a_surf()) {
2774 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2775 if (rc < 0) {
2776 pr_err("failed to enable display pwr\n");
2777 goto fail_gpio1;
2778 }
2779
2780 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2781 if (rc < 0) {
2782 pr_err("failed to request gpio_bkl_en\n");
2783 goto fail_gpio1;
2784 }
2785
2786 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2787 if (rc < 0) {
2788 pr_err("failed to enable backlight\n");
2789 goto fail_gpio2;
2790 }
2791 }
2792
2793 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2794 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2795
2796 if (IS_ERR(dsi_vreg[i])) {
2797 pr_err("%s: vreg get failed with : (%ld)\n",
2798 __func__, PTR_ERR(dsi_vreg[i]));
2799 goto fail_gpio2;
2800 }
2801
2802 rc = vreg_set_level(dsi_vreg[i],
2803 msm_fb_dsi_vreg_mV[i]);
2804
2805 if (rc < 0) {
2806 pr_err("%s: set regulator level failed "
2807 "with :(%d)\n", __func__, rc);
2808 goto vreg_fail1;
2809 }
2810 }
2811 dsi_gpio_initialized = 1;
2812 }
2813
2814 if (machine_is_msm7x27a_surf()) {
2815 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2816 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2817 } else if (machine_is_msm7x27a_ffa()) {
2818 if (on) {
2819 /* This line drives an active low pin on FFA */
2820 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2821 !on);
2822 if (rc < 0)
2823 pr_err("failed to set direction for "
2824 "display pwr\n");
2825 } else {
2826 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2827 !on);
2828 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2829 if (rc < 0)
2830 pr_err("failed to set direction for "
2831 "display pwr\n");
2832 }
2833 }
2834
2835 if (on) {
2836 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2837
2838 if (machine_is_msm7x27a_surf()) {
2839 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2840 rmb();
2841 lcdc_reset_cfg &= ~1;
2842
2843 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2844 msleep(20);
2845 wmb();
2846 lcdc_reset_cfg |= 1;
2847 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2848 } else {
2849 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2850 0);
2851 msleep(20);
2852 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2853 1);
2854 }
2855
2856 if (pmapp_disp_backlight_set_brightness(100))
2857 pr_err("backlight set brightness failed\n");
2858 } else {
2859 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2860
2861 if (pmapp_disp_backlight_set_brightness(0))
2862 pr_err("backlight set brightness failed\n");
2863 }
2864
2865 /*Configure vreg lines */
2866 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2867 if (on) {
2868 rc = vreg_enable(dsi_vreg[i]);
2869
2870 if (rc) {
2871 printk(KERN_ERR "vreg_enable: %s vreg"
2872 "operation failed\n",
2873 msm_fb_dsi_vreg[i]);
2874
2875 goto vreg_fail2;
2876 }
2877 } else {
2878 rc = vreg_disable(dsi_vreg[i]);
2879
2880 if (rc) {
2881 printk(KERN_ERR "vreg_disable: %s vreg "
2882 "operation failed\n",
2883 msm_fb_dsi_vreg[i]);
2884 goto vreg_fail2;
2885 }
2886 }
2887 }
2888
2889 return rc;
2890
2891vreg_fail2:
2892 if (on) {
2893 for (; i > 0; i--)
2894 vreg_disable(dsi_vreg[i - 1]);
2895 } else {
2896 for (; i > 0; i--)
2897 vreg_enable(dsi_vreg[i - 1]);
2898 }
2899
2900 return rc;
2901
2902vreg_fail1:
2903 for (; i > 0; i--)
2904 vreg_put(dsi_vreg[i - 1]);
2905
2906fail_gpio2:
2907 gpio_free(GPIO_BACKLIGHT_EN);
2908fail_gpio1:
2909 gpio_free(GPIO_DISPLAY_PWR_EN);
2910 dsi_gpio_initialized = 0;
2911 return rc;
2912}
2913
2914#define MDP_303_VSYNC_GPIO 97
2915
2916#ifdef CONFIG_FB_MSM_MDP303
2917static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2918 .vsync_gpio = MDP_303_VSYNC_GPIO,
2919 .dsi_power_save = mipi_dsi_panel_power,
2920 .dsi_client_reset = msm_fb_dsi_client_reset,
2921 .get_lane_config = msm_fb_get_lane_config,
2922};
2923#endif
2924
2925static void __init msm_fb_add_devices(void)
2926{
2927 msm_fb_register_device("mdp", &mdp_pdata);
2928 msm_fb_register_device("lcdc", &lcdc_pdata);
2929 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2930}
2931
2932#define MSM_EBI2_PHYS 0xa0d00000
2933#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2934
2935static void __init msm7x27a_init_ebi2(void)
2936{
2937 uint32_t ebi2_cfg;
2938 void __iomem *ebi2_cfg_ptr;
2939
2940 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2941 if (!ebi2_cfg_ptr)
2942 return;
2943
2944 ebi2_cfg = readl(ebi2_cfg_ptr);
2945 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2946 ebi2_cfg |= (1 << 4); /* CS2 */
2947
2948 writel(ebi2_cfg, ebi2_cfg_ptr);
2949 iounmap(ebi2_cfg_ptr);
2950
2951 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2952 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2953 sizeof(uint32_t));
2954 if (!ebi2_cfg_ptr)
2955 return;
2956
2957 ebi2_cfg = readl(ebi2_cfg_ptr);
2958 if (machine_is_msm7x27a_surf())
2959 ebi2_cfg |= (1 << 31);
2960
2961 writel(ebi2_cfg, ebi2_cfg_ptr);
2962 iounmap(ebi2_cfg_ptr);
2963}
2964
2965#define ATMEL_TS_I2C_NAME "maXTouch"
2966static struct vreg *vreg_l12;
2967static struct vreg *vreg_s3;
2968
2969#define ATMEL_TS_GPIO_IRQ 82
2970
2971static int atmel_ts_power_on(bool on)
2972{
2973 int rc;
2974
2975 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2976 if (rc) {
2977 pr_err("%s: vreg %sable failed (%d)\n",
2978 __func__, on ? "en" : "dis", rc);
2979 return rc;
2980 }
2981
2982 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2983 if (rc) {
2984 pr_err("%s: vreg %sable failed (%d) for S3\n",
2985 __func__, on ? "en" : "dis", rc);
2986 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2987 return rc;
2988 }
2989 /* vreg stabilization delay */
2990 msleep(50);
2991 return 0;
2992}
2993
2994static int atmel_ts_platform_init(struct i2c_client *client)
2995{
2996 int rc;
2997
2998 vreg_l12 = vreg_get(NULL, "gp2");
2999 if (IS_ERR(vreg_l12)) {
3000 pr_err("%s: vreg_get for L2 failed\n", __func__);
3001 return PTR_ERR(vreg_l12);
3002 }
3003
3004 rc = vreg_set_level(vreg_l12, 2850);
3005 if (rc) {
3006 pr_err("%s: vreg set level failed (%d) for l2\n",
3007 __func__, rc);
3008 goto vreg_put_l2;
3009 }
3010
3011 vreg_s3 = vreg_get(NULL, "msme1");
3012 if (IS_ERR(vreg_s3)) {
3013 pr_err("%s: vreg_get for S3 failed\n", __func__);
3014 rc = PTR_ERR(vreg_s3);
3015 goto vreg_put_l2;
3016 }
3017
3018 rc = vreg_set_level(vreg_s3, 1800);
3019 if (rc) {
3020 pr_err("%s: vreg set level failed (%d) for S3\n",
3021 __func__, rc);
3022 goto vreg_put_s3;
3023 }
3024
3025 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3026 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3027 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3028 if (rc) {
3029 pr_err("%s: gpio_tlmm_config for %d failed\n",
3030 __func__, ATMEL_TS_GPIO_IRQ);
3031 goto vreg_put_s3;
3032 }
3033
3034 /* configure touchscreen interrupt gpio */
3035 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3036 if (rc) {
3037 pr_err("%s: unable to request gpio %d\n",
3038 __func__, ATMEL_TS_GPIO_IRQ);
3039 goto ts_gpio_tlmm_unconfig;
3040 }
3041
3042 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3043 if (rc < 0) {
3044 pr_err("%s: unable to set the direction of gpio %d\n",
3045 __func__, ATMEL_TS_GPIO_IRQ);
3046 goto free_ts_gpio;
3047 }
3048 return 0;
3049
3050free_ts_gpio:
3051 gpio_free(ATMEL_TS_GPIO_IRQ);
3052ts_gpio_tlmm_unconfig:
3053 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3054 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3055 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3056vreg_put_s3:
3057 vreg_put(vreg_s3);
3058vreg_put_l2:
3059 vreg_put(vreg_l12);
3060 return rc;
3061}
3062
3063static int atmel_ts_platform_exit(struct i2c_client *client)
3064{
3065 gpio_free(ATMEL_TS_GPIO_IRQ);
3066 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3067 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3068 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3069 vreg_disable(vreg_s3);
3070 vreg_put(vreg_s3);
3071 vreg_disable(vreg_l12);
3072 vreg_put(vreg_l12);
3073 return 0;
3074}
3075
3076static u8 atmel_ts_read_chg(void)
3077{
3078 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3079}
3080
3081static u8 atmel_ts_valid_interrupt(void)
3082{
3083 return !atmel_ts_read_chg();
3084}
3085
3086#define ATMEL_X_OFFSET 13
3087#define ATMEL_Y_OFFSET 0
3088
3089static struct mxt_platform_data atmel_ts_pdata = {
3090 .numtouch = 4,
3091 .init_platform_hw = atmel_ts_platform_init,
3092 .exit_platform_hw = atmel_ts_platform_exit,
3093 .power_on = atmel_ts_power_on,
3094 .display_res_x = 480,
3095 .display_res_y = 864,
3096 .min_x = ATMEL_X_OFFSET,
3097 .max_x = (505 - ATMEL_X_OFFSET),
3098 .min_y = ATMEL_Y_OFFSET,
3099 .max_y = (863 - ATMEL_Y_OFFSET),
3100 .valid_interrupt = atmel_ts_valid_interrupt,
3101 .read_chg = atmel_ts_read_chg,
3102};
3103
3104static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3105 {
3106 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3107 .platform_data = &atmel_ts_pdata,
3108 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3109 },
3110};
3111
3112#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3113
3114static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3115static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3116
3117static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3118 ARRAY_SIZE(kp_row_gpios)] = {
3119 [KP_INDEX(0, 0)] = KEY_7,
3120 [KP_INDEX(0, 1)] = KEY_DOWN,
3121 [KP_INDEX(0, 2)] = KEY_UP,
3122 [KP_INDEX(0, 3)] = KEY_RIGHT,
3123 [KP_INDEX(0, 4)] = KEY_ENTER,
3124
3125 [KP_INDEX(1, 0)] = KEY_LEFT,
3126 [KP_INDEX(1, 1)] = KEY_SEND,
3127 [KP_INDEX(1, 2)] = KEY_1,
3128 [KP_INDEX(1, 3)] = KEY_4,
3129 [KP_INDEX(1, 4)] = KEY_CLEAR,
3130
3131 [KP_INDEX(2, 0)] = KEY_6,
3132 [KP_INDEX(2, 1)] = KEY_5,
3133 [KP_INDEX(2, 2)] = KEY_8,
3134 [KP_INDEX(2, 3)] = KEY_3,
3135 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3136
3137 [KP_INDEX(3, 0)] = KEY_9,
3138 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3139 [KP_INDEX(3, 2)] = KEY_0,
3140 [KP_INDEX(3, 3)] = KEY_2,
3141 [KP_INDEX(3, 4)] = KEY_SLEEP,
3142
3143 [KP_INDEX(4, 0)] = KEY_BACK,
3144 [KP_INDEX(4, 1)] = KEY_HOME,
3145 [KP_INDEX(4, 2)] = KEY_MENU,
3146 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3147 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3148};
3149
3150/* SURF keypad platform device information */
3151static struct gpio_event_matrix_info kp_matrix_info = {
3152 .info.func = gpio_event_matrix_func,
3153 .keymap = keymap,
3154 .output_gpios = kp_row_gpios,
3155 .input_gpios = kp_col_gpios,
3156 .noutputs = ARRAY_SIZE(kp_row_gpios),
3157 .ninputs = ARRAY_SIZE(kp_col_gpios),
3158 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3159 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3160 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3161 GPIOKPF_PRINT_UNMAPPED_KEYS,
3162};
3163
3164static struct gpio_event_info *kp_info[] = {
3165 &kp_matrix_info.info
3166};
3167
3168static struct gpio_event_platform_data kp_pdata = {
3169 .name = "7x27a_kp",
3170 .info = kp_info,
3171 .info_count = ARRAY_SIZE(kp_info)
3172};
3173
3174static struct platform_device kp_pdev = {
3175 .name = GPIO_EVENT_DEV_NAME,
3176 .id = -1,
3177 .dev = {
3178 .platform_data = &kp_pdata,
3179 },
3180};
3181
3182static struct msm_handset_platform_data hs_platform_data = {
3183 .hs_name = "7k_handset",
3184 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3185};
3186
3187static struct platform_device hs_pdev = {
3188 .name = "msm-handset",
3189 .id = -1,
3190 .dev = {
3191 .platform_data = &hs_platform_data,
3192 },
3193};
3194
3195#define LED_GPIO_PDM 96
3196#define UART1DM_RX_GPIO 45
3197static void __init msm7x2x_init(void)
3198{
3199
3200 /* Common functions for SURF/FFA/RUMI3 */
3201 msm_device_i2c_init();
3202 msm7x27a_init_mmc();
3203 msm7x27a_init_ebi2();
3204 msm7x27a_cfg_uart2dm_serial();
3205#ifdef CONFIG_SERIAL_MSM_HS
3206 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3207 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3208#endif
3209
3210 if (machine_is_msm7x27a_rumi3()) {
3211 platform_add_devices(rumi_sim_devices,
3212 ARRAY_SIZE(rumi_sim_devices));
3213 }
3214 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3215#ifdef CONFIG_USB_MSM_OTG_72K
3216 msm_otg_pdata.swfi_latency =
3217 msm7x27a_pm_data
3218 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3219 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3220#endif
3221 msm_device_gadget_peripheral.dev.platform_data =
3222 &msm_gadget_pdata;
3223 msm7x27a_cfg_smsc911x();
3224 platform_add_devices(msm_footswitch_devices,
3225 msm_num_footswitch_devices);
3226 platform_add_devices(surf_ffa_devices,
3227 ARRAY_SIZE(surf_ffa_devices));
3228 msm_fb_add_devices();
3229#ifdef CONFIG_USB_EHCI_MSM_72K
3230 msm7x2x_init_host();
3231#endif
3232 }
3233
3234 msm_pm_set_platform_data(msm7x27a_pm_data,
3235 ARRAY_SIZE(msm7x27a_pm_data));
3236
3237#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3238 register_i2c_devices();
3239#endif
3240#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3241 bt_power_init();
3242#endif
3243 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3244 atmel_ts_pdata.min_x = 0;
3245 atmel_ts_pdata.max_x = 480;
3246 atmel_ts_pdata.min_y = 0;
3247 atmel_ts_pdata.max_y = 320;
3248 }
3249
3250 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3251 atmel_ts_i2c_info,
3252 ARRAY_SIZE(atmel_ts_i2c_info));
3253
3254 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3255 i2c_camera_devices,
3256 ARRAY_SIZE(i2c_camera_devices));
3257 platform_device_register(&kp_pdev);
3258 platform_device_register(&hs_pdev);
3259
3260 /* configure it as a pdm function*/
3261 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3262 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3263 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3264 pr_err("%s: gpio_tlmm_config for %d failed\n",
3265 __func__, LED_GPIO_PDM);
3266 else
3267 platform_device_register(&led_pdev);
3268
3269#ifdef CONFIG_MSM_RPC_VIBRATOR
3270 if (machine_is_msm7x27a_ffa())
3271 msm_init_pmic_vibrator();
3272#endif
3273 /*7x25a kgsl initializations*/
3274 msm7x25a_kgsl_3d0_init();
3275}
3276
3277static void __init msm7x2x_init_early(void)
3278{
3279 msm7x2x_misc_init();
3280 msm_msm7x2x_allocate_memory_regions();
3281}
3282
3283MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3284 .boot_params = PHYS_OFFSET + 0x100,
3285 .map_io = msm_common_io_init,
3286 .reserve = msm7x27a_reserve,
3287 .init_irq = msm_init_irq,
3288 .init_machine = msm7x2x_init,
3289 .timer = &msm_timer,
3290 .init_early = msm7x2x_init_early,
3291MACHINE_END
3292MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3293 .boot_params = PHYS_OFFSET + 0x100,
3294 .map_io = msm_common_io_init,
3295 .reserve = msm7x27a_reserve,
3296 .init_irq = msm_init_irq,
3297 .init_machine = msm7x2x_init,
3298 .timer = &msm_timer,
3299 .init_early = msm7x2x_init_early,
3300MACHINE_END
3301MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3302 .boot_params = PHYS_OFFSET + 0x100,
3303 .map_io = msm_common_io_init,
3304 .reserve = msm7x27a_reserve,
3305 .init_irq = msm_init_irq,
3306 .init_machine = msm7x2x_init,
3307 .timer = &msm_timer,
3308 .init_early = msm7x2x_init_early,
3309MACHINE_END