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gerrit-public.fairphone.software / kernel / msm / 1f26591ba2cc433d244fe5b52e89c9be1be1a6b4 / . / arch / arm / boot / dts / msm8226.dtsi
blob: f68d72dea287c46cdea71824ba603febcc5d9f18 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]52 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
53 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]54 };
55
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]56 memory {
57 secure_mem: secure_region {
58 linux,contiguous-region;
59 reg = <0 0x3800000>;
60 label = "secure_mem";
61 };
62 };
63
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]65 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]66 interrupts = <1 2 0 1 3 0>;
67 clock-frequency = <19200000>;
68 };
69
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]70 timer@f9020000 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 compatible = "arm,armv7-timer-mem";
75 reg = <0xf9020000 0x1000>;
76 clock-frequency = <19200000>;
77
78 frame@f9021000 {
79 frame-number = <0>;
80 interrupts = <0 8 0x4>,
81 <0 7 0x4>;
82 reg = <0xf9021000 0x1000>,
83 <0xf9022000 0x1000>;
84 };
85
86 frame@f9023000 {
87 frame-number = <1>;
88 interrupts = <0 9 0x4>;
89 reg = <0xf9023000 0x1000>;
90 status = "disabled";
91 };
92
93 frame@f9024000 {
94 frame-number = <2>;
95 interrupts = <0 10 0x4>;
96 reg = <0xf9024000 0x1000>;
97 status = "disabled";
98 };
99
100 frame@f9025000 {
101 frame-number = <3>;
102 interrupts = <0 11 0x4>;
103 reg = <0xf9025000 0x1000>;
104 status = "disabled";
105 };
106
107 frame@f9026000 {
108 frame-number = <4>;
109 interrupts = <0 12 0x4>;
110 reg = <0xf9026000 0x1000>;
111 status = "disabled";
112 };
113
114 frame@f9027000 {
115 frame-number = <5>;
116 interrupts = <0 13 0x4>;
117 reg = <0xf9027000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9028000 {
122 frame-number = <6>;
123 interrupts = <0 14 0x4>;
124 reg = <0xf9028000 0x1000>;
125 status = "disabled";
126 };
127 };
128
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]129 qcom,vidc@fdc00000 {
130 compatible = "qcom,msm-vidc";
131 reg = <0xfdc00000 0xff000>;
132 interrupts = <0 44 0>;
133 qcom,load-freq-tbl = <352800 160000000>,
134 <244800 133330000>,
135 <108000 66700000>;
136 qcom,hfi = "venus";
137 qcom,bus-ports = <1>;
138 qcom,reg-presets = <0xE0024 0x0>,
139 <0x80124 0x3>,
140 <0xE0020 0x5555556>,
141 <0x800B0 0x10101001>,
142 <0x800B4 0x00101010>,
143 <0x800C0 0x1010100f>,
144 <0x800C4 0x00101010>,
145 <0x800D0 0x00000010>,
146 <0x800D4 0x00000010>,
147 <0x800D8 0x00000707>;
148 qcom,enc-ddr-ab-ib = <0 0>,
149 <129000 142000>,
150 <384000 422000>,
151 <866000 953000>;
152 qcom,dec-ddr-ab-ib = <0 0>,
153 <103000 134000>,
154 <268000 348000>,
155 <505000 657000>;
156 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
157 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
158 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
159 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]160 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]161 };
162
163 qcom,wfd {
164 compatible = "qcom,msm-wfd";
165 };
166
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]167 serial@f991f000 {
168 compatible = "qcom,msm-lsuart-v14";
169 reg = <0xf991f000 0x1000>;
170 interrupts = <0 109 0>;
171 status = "disabled";
172 };
173
174 serial@f995e000 {
175 compatible = "qcom,msm-lsuart-v14";
176 reg = <0xf995e000 0x1000>;
177 interrupts = <0 114 0>;
178 status = "disabled";
179 };
180
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]181 qcom,msm-imem@fe805000 {
182 compatible = "qcom,msm-imem";
183 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
184 };
185
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]186 qcom,sps@f9984000 {
187 compatible = "qcom,msm_sps";
188 reg = <0xf9984000 0x15000>,
189 <0xf9999000 0xb000>;
190 interrupts = <0 94 0>;
191 };
192
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]193 qcom,usbbam@f9a44000 {
194 compatible = "qcom,usb-bam-msm";
195 reg = <0xf9a44000 0x11000>;
196 reg-names = "hsusb";
197 interrupts = <0 135 0>;
198 interrupt-names = "hsusb";
199 qcom,usb-bam-num-pipes = <16>;
200 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
201 qcom,ignore-core-reset-ack;
202 qcom,disable-clk-gating;
203
204 qcom,pipe0 {
205 label = "hsusb-qdss-in-0";
206 qcom,usb-bam-mem-type = <3>;
207 qcom,bam-type = <1>;
208 qcom,dir = <1>;
209 qcom,pipe-num = <0>;
210 qcom,peer-bam = <1>;
211 qcom,src-bam-physical-address = <0xfc37c000>;
212 qcom,src-bam-pipe-index = <0>;
213 qcom,dst-bam-physical-address = <0xf9a44000>;
214 qcom,dst-bam-pipe-index = <2>;
215 qcom,data-fifo-offset = <0x0>;
216 qcom,data-fifo-size = <0x600>;
217 qcom,descriptor-fifo-offset = <0x600>;
218 qcom,descriptor-fifo-size = <0x200>;
219 };
220 };
221
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]222 usb@f9a55000 {
223 compatible = "qcom,hsusb-otg";
224 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]225 interrupts = <0 134 0>, <0 140 0>;
226 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]227 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]228 HSUSB_1p8-supply = <&pm8226_l10>;
229 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]230 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]231
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame^]232 qcom,hsusb-otg-phy-init-seq =
233 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]234 qcom,hsusb-otg-phy-type = <2>;
235 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]236 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]237 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]238 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]239
240 qcom,msm-bus,name = "usb2";
241 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]242 qcom,msm-bus,num-paths = <1>;
243 qcom,msm-bus,vectors-KBps =
244 <87 512 0 0>,
245 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]246 };
247
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]248 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]249 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]250 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]251 };
252
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]253 wcd9xxx_intc: wcd9xxx-irq {
254 compatible = "qcom,wcd9xxx-irq";
255 interrupt-controller;
256 #interrupt-cells = <1>;
257 interrupt-parent = <&msmgpio>;
258 interrupts = <68 0>;
259 interrupt-names = "cdc-int";
260 };
261
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]262 slim@fe12f000 {
263 cell-index = <1>;
264 compatible = "qcom,slim-ngd";
265 reg = <0xfe12f000 0x35000>,
266 <0xfe104000 0x20000>;
267 reg-names = "slimbus_physical", "slimbus_bam_physical";
268 interrupts = <0 163 0>, <0 164 0>;
269 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]270
271 tapan_codec {
272 compatible = "qcom,tapan-slim-pgd";
273 elemental-addr = [00 01 E0 00 17 02];
274
275 interrupt-parent = <&wcd9xxx_intc>;
276 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
277 17 18 19 20 21 22 23 24 25 26 27 28>;
278 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
279
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]280 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]281 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
282 qcom,cdc-vdd-buck-current = <650000>;
283
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]284 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]285 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
286 qcom,cdc-vdd-h-current = <25000>;
287
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]288 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]289 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
290 qcom,cdc-vdd-px-current = <25000>;
291
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]292 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]293 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
294 qcom,cdc-vdd-a-1p2v-current = <10000>;
295
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]296 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]297 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
298 qcom,cdc-vdd-cx-current = <10000>;
299
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]300 qcom,cdc-static-supplies = "cdc-vdd-buck",
301 "cdc-vdd-h",
302 "cdc-vdd-px",
303 "cdc-vdd-a-1p2v",
304 "cdc-vdd-cx";
305
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]306 qcom,cdc-micbias-ldoh-v = <0x3>;
307 qcom,cdc-micbias-cfilt1-mv = <1800>;
308 qcom,cdc-micbias-cfilt2-mv = <1800>;
309 qcom,cdc-micbias-cfilt3-mv = <1800>;
310
311 qcom,cdc-micbias1-cfilt-sel = <0x0>;
312 qcom,cdc-micbias2-cfilt-sel = <0x1>;
313 qcom,cdc-micbias3-cfilt-sel = <0x2>;
314
315 qcom,cdc-mclk-clk-rate = <9600000>;
316 qcom,cdc-slim-ifd = "tapan-slim-ifd";
317 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
318 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]319 };
320
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]321 qcom,msm-adsp-loader {
322 compatible = "qcom,adsp-loader";
323 qcom,adsp-state = <0>;
324 };
325
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]326 sound {
327 compatible = "qcom,msm8226-audio-tapan";
328 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]329 qcom,tapan-mclk-clk-freq = <9600000>;
330 };
331
332 qcom,msm-pcm {
333 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]334 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]335 };
336
337 qcom,msm-pcm-routing {
338 compatible = "qcom,msm-pcm-routing";
339 };
340
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]341 qcom,msm-pcm-low-latency {
342 compatible = "qcom,msm-pcm-dsp";
343 qcom,msm-pcm-dsp-id = <1>;
344 qcom,msm-pcm-low-latency;
345 };
346
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]347 qcom,msm-pcm-lpa {
348 compatible = "qcom,msm-pcm-lpa";
349 };
350
351 qcom,msm-compr-dsp {
352 compatible = "qcom,msm-compr-dsp";
353 };
354
355 qcom,msm-voip-dsp {
356 compatible = "qcom,msm-voip-dsp";
357 };
358
359 qcom,msm-pcm-voice {
360 compatible = "qcom,msm-pcm-voice";
361 };
362
363 qcom,msm-stub-codec {
364 compatible = "qcom,msm-stub-codec";
365 };
366
367 qcom,msm-dai-fe {
368 compatible = "qcom,msm-dai-fe";
369 };
370
371 qcom,msm-pcm-afe {
372 compatible = "qcom,msm-pcm-afe";
373 };
374
375 qcom,msm-dai-q6-hdmi {
376 compatible = "qcom,msm-dai-q6-hdmi";
377 qcom,msm-dai-q6-dev-id = <8>;
378 };
379
380 qcom,msm-dai-q6 {
381 compatible = "qcom,msm-dai-q6";
382 qcom,msm-dai-q6-sb-0-rx {
383 compatible = "qcom,msm-dai-q6-dev";
384 qcom,msm-dai-q6-dev-id = <16384>;
385 };
386
387 qcom,msm-dai-q6-sb-0-tx {
388 compatible = "qcom,msm-dai-q6-dev";
389 qcom,msm-dai-q6-dev-id = <16385>;
390 };
391
392 qcom,msm-dai-q6-sb-1-rx {
393 compatible = "qcom,msm-dai-q6-dev";
394 qcom,msm-dai-q6-dev-id = <16386>;
395 };
396
397 qcom,msm-dai-q6-sb-1-tx {
398 compatible = "qcom,msm-dai-q6-dev";
399 qcom,msm-dai-q6-dev-id = <16387>;
400 };
401
402 qcom,msm-dai-q6-sb-3-rx {
403 compatible = "qcom,msm-dai-q6-dev";
404 qcom,msm-dai-q6-dev-id = <16390>;
405 };
406
407 qcom,msm-dai-q6-sb-3-tx {
408 compatible = "qcom,msm-dai-q6-dev";
409 qcom,msm-dai-q6-dev-id = <16391>;
410 };
411
412 qcom,msm-dai-q6-sb-4-rx {
413 compatible = "qcom,msm-dai-q6-dev";
414 qcom,msm-dai-q6-dev-id = <16392>;
415 };
416
417 qcom,msm-dai-q6-sb-4-tx {
418 compatible = "qcom,msm-dai-q6-dev";
419 qcom,msm-dai-q6-dev-id = <16393>;
420 };
421
422 qcom,msm-dai-q6-bt-sco-rx {
423 compatible = "qcom,msm-dai-q6-dev";
424 qcom,msm-dai-q6-dev-id = <12288>;
425 };
426
427 qcom,msm-dai-q6-bt-sco-tx {
428 compatible = "qcom,msm-dai-q6-dev";
429 qcom,msm-dai-q6-dev-id = <12289>;
430 };
431
432 qcom,msm-dai-q6-int-fm-rx {
433 compatible = "qcom,msm-dai-q6-dev";
434 qcom,msm-dai-q6-dev-id = <12292>;
435 };
436
437 qcom,msm-dai-q6-int-fm-tx {
438 compatible = "qcom,msm-dai-q6-dev";
439 qcom,msm-dai-q6-dev-id = <12293>;
440 };
441
442 qcom,msm-dai-q6-be-afe-pcm-rx {
443 compatible = "qcom,msm-dai-q6-dev";
444 qcom,msm-dai-q6-dev-id = <224>;
445 };
446
447 qcom,msm-dai-q6-be-afe-pcm-tx {
448 compatible = "qcom,msm-dai-q6-dev";
449 qcom,msm-dai-q6-dev-id = <225>;
450 };
451
452 qcom,msm-dai-q6-afe-proxy-rx {
453 compatible = "qcom,msm-dai-q6-dev";
454 qcom,msm-dai-q6-dev-id = <241>;
455 };
456
457 qcom,msm-dai-q6-afe-proxy-tx {
458 compatible = "qcom,msm-dai-q6-dev";
459 qcom,msm-dai-q6-dev-id = <240>;
460 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]461
462 qcom,msm-dai-q6-incall-record-rx {
463 compatible = "qcom,msm-dai-q6-dev";
464 qcom,msm-dai-q6-dev-id = <32771>;
465 };
466
467 qcom,msm-dai-q6-incall-record-tx {
468 compatible = "qcom,msm-dai-q6-dev";
469 qcom,msm-dai-q6-dev-id = <32772>;
470 };
471
472 qcom,msm-dai-q6-incall-music-rx {
473 compatible = "qcom,msm-dai-q6-dev";
474 qcom,msm-dai-q6-dev-id = <32773>;
475 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]476 };
477
478 qcom,msm-pcm-hostless {
479 compatible = "qcom,msm-pcm-hostless";
480 };
481
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]482 qcom,wcnss-wlan@fb000000 {
483 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]484 reg = <0xfb000000 0x280000>,
485 <0xf9011008 0x04>;
486 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]487 interrupts = <0 145 0 0 146 0>;
488 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
489
490 qcom,pronto-vddmx-supply = <&pm8226_l3>;
491 qcom,pronto-vddcx-supply = <&pm8226_s1>;
492 qcom,pronto-vddpx-supply = <&pm8226_l6>;
493 qcom,iris-vddxo-supply = <&pm8226_l10>;
494 qcom,iris-vddrfa-supply = <&pm8226_l24>;
495 qcom,iris-vddpa-supply = <&pm8226_l16>;
496 qcom,iris-vdddig-supply = <&pm8226_l24>;
497
498 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
499 qcom,has_pronto_hw;
500 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]501
502 qcom,msm-adsp-sensors {
503 compatible = "qcom,msm-adsp-sensors";
504 qcom,src-id = <11>;
505 qcom,dst-id = <604>;
506 qcom,ab = <32505856>;
507 qcom,ib = <32505856>;
508 };
509
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]510 qcom,wdt@f9017000 {
511 compatible = "qcom,msm-watchdog";
512 reg = <0xf9017000 0x1000>;
513 interrupts = <0 3 0>, <0 4 0>;
514 qcom,bark-time = <11000>;
515 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]516 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]517 };
518
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]519 qcom,smem@fa00000 {
520 compatible = "qcom,smem";
521 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]522 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]523 <0xfc428000 0x4000>;
524 reg-names = "smem", "irq-reg-base", "aux-mem1";
525
526 qcom,smd-modem {
527 compatible = "qcom,smd";
528 qcom,smd-edge = <0>;
529 qcom,smd-irq-offset = <0x8>;
530 qcom,smd-irq-bitmask = <0x1000>;
531 qcom,pil-string = "modem";
532 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]533 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]534
535 qcom,smsm-modem {
536 compatible = "qcom,smsm";
537 qcom,smsm-edge = <0>;
538 qcom,smsm-irq-offset = <0x8>;
539 qcom,smsm-irq-bitmask = <0x2000>;
540 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]541 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]542
543 qcom,smd-adsp {
544 compatible = "qcom,smd";
545 qcom,smd-edge = <1>;
546 qcom,smd-irq-offset = <0x8>;
547 qcom,smd-irq-bitmask = <0x100>;
548 qcom,pil-string = "adsp";
549 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]550 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]551
552 qcom,smsm-adsp {
553 compatible = "qcom,smsm";
554 qcom,smsm-edge = <1>;
555 qcom,smsm-irq-offset = <0x8>;
556 qcom,smsm-irq-bitmask = <0x200>;
557 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]558 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]559
560 qcom,smd-wcnss {
561 compatible = "qcom,smd";
562 qcom,smd-edge = <6>;
563 qcom,smd-irq-offset = <0x8>;
564 qcom,smd-irq-bitmask = <0x20000>;
565 qcom,pil-string = "wcnss";
566 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]567 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]568
569 qcom,smsm-wcnss {
570 compatible = "qcom,smsm";
571 qcom,smsm-edge = <6>;
572 qcom,smsm-irq-offset = <0x8>;
573 qcom,smsm-irq-bitmask = <0x80000>;
574 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]575 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]576
577 qcom,smd-rpm {
578 compatible = "qcom,smd";
579 qcom,smd-edge = <15>;
580 qcom,smd-irq-offset = <0x8>;
581 qcom,smd-irq-bitmask = <0x1>;
582 interrupts = <0 168 1>;
583 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]584 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]585 };
586
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]587 rpm_bus: qcom,rpm-smd {
588 compatible = "qcom,rpm-smd";
589 rpm-channel-name = "rpm_requests";
590 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]591 };
592
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]593 sdcc1: qcom,sdcc@f9824000 {
594 cell-index = <1>; /* SDC1 eMMC slot */
595 compatible = "qcom,msm-sdcc";
596
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]597 reg = <0xf9824000 0x800>,
598 <0xf9824800 0x100>,
599 <0xf9804000 0x7000>;
600 reg-names = "core_mem", "dml_mem", "bam_mem";
601 interrupts = <0 123 0>, <0 137 0>;
602 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]603
604 qcom,bus-width = <8>;
605 status = "disabled";
606 };
607
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]608 sdhc_1: sdhci@f9824900 {
609 compatible = "qcom,sdhci-msm";
610 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
611 reg-names = "hc_mem", "core_mem";
612
613 interrupts = <0 123 0>, <0 138 0>;
614 interrupt-names = "hc_irq", "pwr_irq";
615
616 qcom,bus-width = <8>;
617 status = "disabled";
618 };
619
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]620 sdcc2: qcom,sdcc@f98a4000 {
621 cell-index = <2>; /* SDC2 SD card slot */
622 compatible = "qcom,msm-sdcc";
623
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]624 reg = <0xf98a4000 0x800>,
625 <0xf98a4800 0x100>,
626 <0xf9884000 0x7000>;
627 reg-names = "core_mem", "dml_mem", "bam_mem";
628 interrupts = <0 125 0>, <0 220 0>;
629 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]630
631 qcom,bus-width = <4>;
632 status = "disabled";
633 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]634
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]635 sdhc_2: sdhci@f98a4900 {
636 compatible = "qcom,sdhci-msm";
637 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
638 reg-names = "hc_mem", "core_mem";
639
640 interrupts = <0 125 0>, <0 221 0>;
641 interrupt-names = "hc_irq", "pwr_irq";
642
643 qcom,bus-width = <4>;
644 status = "disabled";
645 };
646
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]647 spmi_bus: qcom,spmi@fc4c0000 {
648 cell-index = <0>;
649 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]650 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]651 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]652 <0Xfc4cb000 0x1000>,
653 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]654 /* 190,ee0_krait_hlos_spmi_periph_irq */
655 /* 187,channel_0_krait_hlos_trans_done_irq */
656 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]657 qcom,pmic-arb-ee = <0>;
658 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]659 };
660
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]661 i2c@f9926000 { /* BLSP-1 QUP-4 */
662 cell-index = <0>;
663 compatible = "qcom,i2c-qup";
664 reg = <0xf9926000 0x1000>;
665 #address-cells = <1>;
666 #size-cells = <0>;
667 reg-names = "qup_phys_addr";
668 interrupts = <0 98 0>;
669 interrupt-names = "qup_err_intr";
670 qcom,i2c-bus-freq = <100000>;
671 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]672
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]673 i2c@f9927000 { /* BLSP1 QUP5 */
674 cell-index = <5>;
675 compatible = "qcom,i2c-qup";
676 #address-cells = <1>;
677 #size-cells = <0>;
678 reg-names = "qup_phys_addr";
679 reg = <0xf9927000 0x1000>;
680 interrupt-names = "qup_err_intr";
681 interrupts = <0 99 0>;
682 qcom,i2c-bus-freq = <100000>;
683 qcom,i2c-src-freq = <19200000>;
684 };
685
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]686 qcom,acpuclk@f9011050 {
687 compatible = "qcom,acpuclk-a7";
688 reg = <0xf9011050 0x8>;
689 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]690 a7_cpu-supply = <&apc_vreg_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]691 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]692 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]693
694 qcom,ocmem@fdd00000 {
695 compatible = "qcom,msm-ocmem";
696 reg = <0xfdd00000 0x2000>,
697 <0xfdd02000 0x2000>,
698 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]699 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]700 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
701 interrupts = <0 76 0 0 77 0>;
702 interrupt-names = "ocmem_irq", "dm_irq";
703 qcom,ocmem-num-regions = <0x1>;
704 qcom,ocmem-num-macros = <0x2>;
705 qcom,resource-type = <0x706d636f>;
706 #address-cells = <1>;
707 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]708 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]709
710 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]711 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]712 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]713 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]714 };
715 };
716
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]717 qcom,venus@fdce0000 {
718 compatible = "qcom,pil-venus";
719 reg = <0xfdce0000 0x4000>,
720 <0xfdc80000 0x400>;
721 reg-names = "wrapper_base", "vbif_base";
722 vdd-supply = <&gdsc_venus>;
723
724 qcom,firmware-name = "venus";
725 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]726
727 qcom,pronto@fb21b000 {
728 compatible = "qcom,pil-pronto";
729 reg = <0xfb21b000 0x3000>,
730 <0xfc401700 0x4>,
731 <0xfd485300 0xc>;
732 reg-names = "pmu_base", "clk_base", "halt_base";
733 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]734 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]735
736 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]737
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]738 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]739 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]740 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]741
742 /* GPIO output to wcnss */
743 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]744 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]745
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]746 qcom,iris-fm {
747 compatible = "qcom,iris_fm";
748 };
749
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]750 qcom,lpass@fe200000 {
751 compatible = "qcom,pil-q6v5-lpass";
752 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]753 <0xfd485100 0x00010>,
754 <0xfc4016c0 0x00004>;
755 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]756 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]757 interrupts = <0 162 1>;
758
759 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]760
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]761 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]762 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]763 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]764
765 /* GPIO output to lpass */
766 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]767 };
768
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]769 qcom,mss@fc880000 {
770 compatible = "qcom,pil-q6v5-mss";
771 reg = <0xfc880000 0x100>,
772 <0xfd485000 0x400>,
773 <0xfc820000 0x020>,
774 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]775 <0xfd485194 0x4>;
776 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]777 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]778
779 interrupts = <0 24 1>;
780 vdd_mss-supply = <&pm8226_s1>;
781 vdd_cx-supply = <&pm8226_s1_corner>;
782 vdd_mx-supply = <&pm8226_l3>;
783 vdd_pll-supply = <&pm8226_l8>;
784 qcom,vdd_pll = <1800000>;
785
786 qcom,is-loadable;
787 qcom,firmware-name = "mba";
788 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]789
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]790 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]791 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]792 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]793
794 /* GPIO output to mss */
795 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]796 };
797
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]798 qcom,msm-mem-hole {
799 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]800 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]801 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]802
803 tsens: tsens@fc4a8000 {
804 compatible = "qcom,msm-tsens";
805 reg = <0xfc4a8000 0x2000>,
806 <0xfc4b8000 0x1000>;
807 reg-names = "tsens_physical", "tsens_eeprom_physical";
808 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]809 qcom,sensors = <4>;
810 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]811 qcom,calib-mode = "fuse_map2";
812 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]813
814 qcom,msm-thermal {
815 compatible = "qcom,msm-thermal";
816 qcom,sensor-id = <0>;
817 qcom,poll-ms = <250>;
818 qcom,limit-temp = <60>;
819 qcom,temp-hysteresis = <10>;
820 qcom,freq-step = <2>;
821 };
822
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]823 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
824 compatible = "qcom,spi-qup-v2";
825 #address-cells = <1>;
826 #size-cells = <0>;
827 reg-names = "spi_physical", "spi_bam_physical";
828 reg = <0xf9923000 0x1000>,
829 <0xf9904000 0xF000>;
830 interrupt-names = "spi_irq", "spi_bam_irq";
831 interrupts = <0 95 0>, <0 238 0>;
832 spi-max-frequency = <19200000>;
833
834 gpios = <&msmgpio 3 0>, /* CLK */
835 <&msmgpio 1 0>, /* MISO */
836 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]837 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]838
839 qcom,infinite-mode = <0>;
840 qcom,use-bam;
841 qcom,ver-reg-exists;
842 qcom,bam-consumer-pipe-index = <12>;
843 qcom,bam-producer-pipe-index = <13>;
844 };
845
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]846 qcom,bam_dmux@fc834000 {
847 compatible = "qcom,bam_dmux";
848 reg = <0xfc834000 0x7000>;
849 interrupts = <0 29 1>;
850 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]851
852 qcom,msm-rtb {
853 compatible = "qcom,msm-rtb";
854 qcom,memory-reservation-type = "EBI1";
855 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
856 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]857
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]858 qcom,msm-rng@f9bff000 {
859 compatible = "qcom,msm-rng";
860 reg = <0xf9bff000 0x200>;
861 qcom,msm-rng-iface-clk;
862 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]863
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]864 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]865 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]866 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]867 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]868
869 jtag_mm0: jtagmm@fc33c000 {
870 compatible = "qcom,jtag-mm";
871 reg = <0xfc33c000 0x1000>,
872 <0xfc330000 0x1000>;
873 reg-names = "etm-base","debug-base";
874 };
875
876 jtag_mm1: jtagmm@fc33d000 {
877 compatible = "qcom,jtag-mm";
878 reg = <0xfc33d000 0x1000>,
879 <0xfc332000 0x1000>;
880 reg-names = "etm-base","debug-base";
881 };
882
883 jtag_mm2: jtagmm@fc33e000 {
884 compatible = "qcom,jtag-mm";
885 reg = <0xfc33e000 0x1000>,
886 <0xfc334000 0x1000>;
887 reg-names = "etm-base","debug-base";
888 };
889
890 jtag_mm3: jtagmm@fc33f000 {
891 compatible = "qcom,jtag-mm";
892 reg = <0xfc33f000 0x1000>,
893 <0xfc336000 0x1000>;
894 reg-names = "etm-base","debug-base";
895 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]896
897 qcom,ipc-spinlock@fd484000 {
898 compatible = "qcom,ipc-spinlock-sfpb";
899 reg = <0xfd484000 0x400>;
900 qcom,num-locks = <8>;
901 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]902
903 qcom,qseecom@d980000 {
904 compatible = "qcom,qseecom";
905 reg = <0xd980000 0x256000>;
906 reg-names = "secapp-region";
907 qcom,disk-encrypt-pipe-pair = <2>;
908 qcom,hlos-ce-hw-instance = <0>;
909 qcom,qsee-ce-hw-instance = <0>;
910 qcom,msm-bus,name = "qseecom-noc";
911 qcom,msm-bus,num-cases = <4>;
912 qcom,msm-bus,active-only = <0>;
913 qcom,msm-bus,num-paths = <1>;
914 qcom,msm-bus,vectors-KBps =
915 <55 512 0 0>,
916 <55 512 3936000 393600>,
917 <55 512 3936000 393600>,
918 <55 512 3936000 393600>;
919 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]920};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]921
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]922&gdsc_venus {
923 status = "ok";
924};
925
926&gdsc_mdss {
927 status = "ok";
928};
929
930&gdsc_jpeg {
931 status = "ok";
932};
933
934&gdsc_vfe {
935 status = "ok";
936};
937
938&gdsc_oxili_cx {
939 status = "ok";
940};
941
942&gdsc_usb_hsic {
943 status = "ok";
944};
945
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]946/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]947/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]948/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]949
950&pm8226_vadc {
951 chan@0 {
952 label = "usb_in";
953 reg = <0>;
954 qcom,decimation = <0>;
955 qcom,pre-div-channel-scaling = <4>;
956 qcom,calibration-type = "absolute";
957 qcom,scale-function = <0>;
958 qcom,hw-settle-time = <0>;
959 qcom,fast-avg-setup = <0>;
960 };
961
962 chan@2 {
963 label = "vchg_sns";
964 reg = <2>;
965 qcom,decimation = <0>;
966 qcom,pre-div-channel-scaling = <3>;
967 qcom,calibration-type = "absolute";
968 qcom,scale-function = <0>;
969 qcom,hw-settle-time = <0>;
970 qcom,fast-avg-setup = <0>;
971 };
972
973 chan@5 {
974 label = "vcoin";
975 reg = <5>;
976 qcom,decimation = <0>;
977 qcom,pre-div-channel-scaling = <1>;
978 qcom,calibration-type = "absolute";
979 qcom,scale-function = <0>;
980 qcom,hw-settle-time = <0>;
981 qcom,fast-avg-setup = <0>;
982 };
983
984 chan@6 {
985 label = "vbat_sns";
986 reg = <6>;
987 qcom,decimation = <0>;
988 qcom,pre-div-channel-scaling = <1>;
989 qcom,calibration-type = "absolute";
990 qcom,scale-function = <0>;
991 qcom,hw-settle-time = <0>;
992 qcom,fast-avg-setup = <0>;
993 };
994
995 chan@7 {
996 label = "vph_pwr";
997 reg = <7>;
998 qcom,decimation = <0>;
999 qcom,pre-div-channel-scaling = <1>;
1000 qcom,calibration-type = "absolute";
1001 qcom,scale-function = <0>;
1002 qcom,hw-settle-time = <0>;
1003 qcom,fast-avg-setup = <0>;
1004 };
1005
1006 chan@30 {
1007 label = "batt_therm";
1008 reg = <0x30>;
1009 qcom,decimation = <0>;
1010 qcom,pre-div-channel-scaling = <0>;
1011 qcom,calibration-type = "ratiometric";
1012 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1013 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1014 qcom,fast-avg-setup = <0>;
1015 };
1016
1017 chan@31 {
1018 label = "batt_id";
1019 reg = <0x31>;
1020 qcom,decimation = <0>;
1021 qcom,pre-div-channel-scaling = <0>;
1022 qcom,calibration-type = "ratiometric";
1023 qcom,scale-function = <0>;
1024 qcom,hw-settle-time = <2>;
1025 qcom,fast-avg-setup = <0>;
1026 };
1027
1028 chan@b2 {
1029 label = "xo_therm_pu2";
1030 reg = <0xb2>;
1031 qcom,decimation = <0>;
1032 qcom,pre-div-channel-scaling = <0>;
1033 qcom,calibration-type = "ratiometric";
1034 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1035 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1036 qcom,fast-avg-setup = <0>;
1037 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1038
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1039 chan@39 {
1040 label = "usb_id_nopull";
1041 reg = <0x39>;
1042 qcom,decimation = <0>;
1043 qcom,pre-div-channel-scaling = <0>;
1044 qcom,calibration-type = "ratiometric";
1045 qcom,scale-function = <0>;
1046 qcom,hw-settle-time = <2>;
1047 qcom,fast-avg-setup = <0>;
1048 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1049};
1050
1051&pm8226_chg {
1052 status = "ok";
1053
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1054 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1055 status = "ok";
1056 };
1057
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1058 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1059 status = "ok";
1060 };
1061
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1062 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1063 status = "ok";
1064 };
1065
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1066 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1067 status = "ok";
1068 };
1069
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1070 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1071 status = "ok";
1072 };
1073
1074 qcom,chg-misc@1600 {
1075 status = "ok";
1076 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1077};