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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#ifndef _I915_DRV_H_
31#define _I915_DRV_H_
32
Jesse Barnes585fb112008-07-29 11:54:06 -070033#include "i915_reg.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080034#include "intel_bios.h"
Keith Packard0839ccb2008-10-30 19:38:48 -070035#include <linux/io-mapping.h>
Jesse Barnes585fb112008-07-29 11:54:06 -070036
Linus Torvalds1da177e2005-04-16 15:20:36 -070037/* General customization:
38 */
39
40#define DRIVER_AUTHOR "Tungsten Graphics, Inc."
41
42#define DRIVER_NAME "i915"
43#define DRIVER_DESC "Intel Graphics"
Eric Anholt673a3942008-07-30 12:06:12 -070044#define DRIVER_DATE "20080730"
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Jesse Barnes317c35d2008-08-25 15:11:06 -070046enum pipe {
47 PIPE_A = 0,
48 PIPE_B,
49};
50
Keith Packard52440212008-11-18 09:30:25 -080051#define I915_NUM_PIPE 2
52
Linus Torvalds1da177e2005-04-16 15:20:36 -070053/* Interface history:
54 *
55 * 1.1: Original.
Dave Airlie0d6aa602006-01-02 20:14:23 +110056 * 1.2: Add Power Management
57 * 1.3: Add vblank support
Dave Airliede227f52006-01-25 15:31:43 +110058 * 1.4: Fix cmdbuffer path, add heap destroy
Dave Airlie702880f2006-06-24 17:07:34 +100059 * 1.5: Add vblank pipe configuration
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100060 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
61 * - Support vertical blank on secondary display pipe
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 */
63#define DRIVER_MAJOR 1
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100064#define DRIVER_MINOR 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070065#define DRIVER_PATCHLEVEL 0
66
Eric Anholt673a3942008-07-30 12:06:12 -070067#define WATCH_COHERENCY 0
68#define WATCH_BUF 0
69#define WATCH_EXEC 0
70#define WATCH_LRU 0
71#define WATCH_RELOC 0
72#define WATCH_INACTIVE 0
73#define WATCH_PWRITE 0
74
Dave Airlie71acb5e2008-12-30 20:31:46 +100075#define I915_GEM_PHYS_CURSOR_0 1
76#define I915_GEM_PHYS_CURSOR_1 2
77#define I915_GEM_PHYS_OVERLAY_REGS 3
78#define I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS)
79
80struct drm_i915_gem_phys_object {
81 int id;
82 struct page **page_list;
83 drm_dma_handle_t *handle;
84 struct drm_gem_object *cur_obj;
85};
86
Linus Torvalds1da177e2005-04-16 15:20:36 -070087typedef struct _drm_i915_ring_buffer {
88 int tail_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 unsigned long Size;
90 u8 *virtual_start;
91 int head;
92 int tail;
93 int space;
94 drm_local_map_t map;
Eric Anholt673a3942008-07-30 12:06:12 -070095 struct drm_gem_object *ring_obj;
Linus Torvalds1da177e2005-04-16 15:20:36 -070096} drm_i915_ring_buffer_t;
97
98struct mem_block {
99 struct mem_block *next;
100 struct mem_block *prev;
101 int start;
102 int size;
Eric Anholt6c340ea2007-08-25 20:23:09 +1000103 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104};
105
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700106struct opregion_header;
107struct opregion_acpi;
108struct opregion_swsci;
109struct opregion_asle;
110
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100111struct intel_opregion {
112 struct opregion_header *header;
113 struct opregion_acpi *acpi;
114 struct opregion_swsci *swsci;
115 struct opregion_asle *asle;
116 int enabled;
117};
118
Dave Airlie7c1c2872008-11-28 14:22:24 +1000119struct drm_i915_master_private {
120 drm_local_map_t *sarea;
121 struct _drm_i915_sarea *sarea_priv;
122};
Jesse Barnesde151cf2008-11-12 10:03:55 -0800123#define I915_FENCE_REG_NONE -1
124
125struct drm_i915_fence_reg {
126 struct drm_gem_object *obj;
127};
Dave Airlie7c1c2872008-11-28 14:22:24 +1000128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129typedef struct drm_i915_private {
Eric Anholt673a3942008-07-30 12:06:12 -0700130 struct drm_device *dev;
131
Dave Airlieac5c4e72008-12-19 15:38:34 +1000132 int has_gem;
133
Eric Anholt3043c602008-10-02 12:24:47 -0700134 void __iomem *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 drm_i915_ring_buffer_t ring;
137
Dave Airlie9c8da5e2005-07-10 15:38:56 +1000138 drm_dma_handle_t *status_page_dmah;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 void *hw_status_page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 dma_addr_t dma_status_page;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700141 uint32_t counter;
Wang Zhenyudc7a9312007-06-10 15:58:19 +1000142 unsigned int status_gfx_addr;
143 drm_local_map_t hws_map;
Eric Anholt673a3942008-07-30 12:06:12 -0700144 struct drm_gem_object *hws_obj;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000146 unsigned int cpp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 int back_offset;
148 int front_offset;
149 int current_page;
150 int page_flipping;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
152 wait_queue_head_t irq_queue;
153 atomic_t irq_received;
Eric Anholted4cb412008-07-29 12:10:39 -0700154 /** Protects user_irq_refcount and irq_mask_reg */
155 spinlock_t user_irq_lock;
156 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
157 int user_irq_refcount;
158 /** Cached value of IMR to avoid reads in updating the bitfield */
159 u32 irq_mask_reg;
Keith Packard7c463582008-11-04 02:03:27 -0800160 u32 pipestat[2];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161
Jesse Barnes5ca58282009-03-31 14:11:15 -0700162 u32 hotplug_supported_mask;
163 struct work_struct hotplug_work;
164
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 int tex_lru_log_granularity;
166 int allow_batchbuffer;
167 struct mem_block *agp_heap;
Dave Airlie0d6aa602006-01-02 20:14:23 +1100168 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
Dave Airlie702880f2006-06-24 17:07:34 +1000169 int vblank_pipe;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000170
Jesse Barnes79e53942008-11-07 14:24:08 -0800171 bool cursor_needs_physical;
172
173 struct drm_mm vram;
174
175 int irq_enabled;
176
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100177 struct intel_opregion opregion;
178
Jesse Barnes79e53942008-11-07 14:24:08 -0800179 /* LVDS info */
180 int backlight_duty_cycle; /* restore backlight to this value */
181 bool panel_wants_dither;
182 struct drm_display_mode *panel_fixed_mode;
Ma Ling88631702009-05-13 11:19:55 +0800183 struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
184 struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
Jesse Barnes79e53942008-11-07 14:24:08 -0800185
186 /* Feature bits from the VBIOS */
Hannes Eder95281e32008-12-18 15:09:00 +0100187 unsigned int int_tv_support:1;
188 unsigned int lvds_dither:1;
189 unsigned int lvds_vbt:1;
190 unsigned int int_crt_support:1;
Kristian Høgsberg43565a02009-02-13 20:56:52 -0500191 unsigned int lvds_use_ssc:1;
192 int lvds_ssc_freq;
Jesse Barnes79e53942008-11-07 14:24:08 -0800193
Jesse Barnesde151cf2008-11-12 10:03:55 -0800194 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
195 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
196 int num_fence_regs; /* 8 on pre-965, 16 otherwise */
197
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000198 /* Register state */
199 u8 saveLBB;
200 u32 saveDSPACNTR;
201 u32 saveDSPBCNTR;
Keith Packarde948e992008-05-07 12:27:53 +1000202 u32 saveDSPARB;
Keith Packard881ee982008-11-02 23:08:44 -0800203 u32 saveRENDERSTANDBY;
Peng Li461cba22008-11-18 12:39:02 +0800204 u32 saveHWS;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000205 u32 savePIPEACONF;
206 u32 savePIPEBCONF;
207 u32 savePIPEASRC;
208 u32 savePIPEBSRC;
209 u32 saveFPA0;
210 u32 saveFPA1;
211 u32 saveDPLL_A;
212 u32 saveDPLL_A_MD;
213 u32 saveHTOTAL_A;
214 u32 saveHBLANK_A;
215 u32 saveHSYNC_A;
216 u32 saveVTOTAL_A;
217 u32 saveVBLANK_A;
218 u32 saveVSYNC_A;
219 u32 saveBCLRPAT_A;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000220 u32 savePIPEASTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000221 u32 saveDSPASTRIDE;
222 u32 saveDSPASIZE;
223 u32 saveDSPAPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700224 u32 saveDSPAADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000225 u32 saveDSPASURF;
226 u32 saveDSPATILEOFF;
227 u32 savePFIT_PGM_RATIOS;
228 u32 saveBLC_PWM_CTL;
229 u32 saveBLC_PWM_CTL2;
230 u32 saveFPB0;
231 u32 saveFPB1;
232 u32 saveDPLL_B;
233 u32 saveDPLL_B_MD;
234 u32 saveHTOTAL_B;
235 u32 saveHBLANK_B;
236 u32 saveHSYNC_B;
237 u32 saveVTOTAL_B;
238 u32 saveVBLANK_B;
239 u32 saveVSYNC_B;
240 u32 saveBCLRPAT_B;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000241 u32 savePIPEBSTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000242 u32 saveDSPBSTRIDE;
243 u32 saveDSPBSIZE;
244 u32 saveDSPBPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700245 u32 saveDSPBADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000246 u32 saveDSPBSURF;
247 u32 saveDSPBTILEOFF;
Jesse Barnes585fb112008-07-29 11:54:06 -0700248 u32 saveVGA0;
249 u32 saveVGA1;
250 u32 saveVGA_PD;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000251 u32 saveVGACNTRL;
252 u32 saveADPA;
253 u32 saveLVDS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700254 u32 savePP_ON_DELAYS;
255 u32 savePP_OFF_DELAYS;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000256 u32 saveDVOA;
257 u32 saveDVOB;
258 u32 saveDVOC;
259 u32 savePP_ON;
260 u32 savePP_OFF;
261 u32 savePP_CONTROL;
Jesse Barnes585fb112008-07-29 11:54:06 -0700262 u32 savePP_DIVISOR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000263 u32 savePFIT_CONTROL;
264 u32 save_palette_a[256];
265 u32 save_palette_b[256];
266 u32 saveFBC_CFB_BASE;
267 u32 saveFBC_LL_BASE;
268 u32 saveFBC_CONTROL;
269 u32 saveFBC_CONTROL2;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000270 u32 saveIER;
271 u32 saveIIR;
272 u32 saveIMR;
Keith Packard1f84e552008-02-16 19:19:29 -0800273 u32 saveCACHE_MODE_0;
Keith Packarde948e992008-05-07 12:27:53 +1000274 u32 saveD_STATE;
Jesse Barnes585fb112008-07-29 11:54:06 -0700275 u32 saveCG_2D_DIS;
Keith Packard1f84e552008-02-16 19:19:29 -0800276 u32 saveMI_ARB_STATE;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000277 u32 saveSWF0[16];
278 u32 saveSWF1[16];
279 u32 saveSWF2[3];
280 u8 saveMSR;
281 u8 saveSR[8];
Jesse Barnes123f7942008-02-07 11:15:20 -0800282 u8 saveGR[25];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000283 u8 saveAR_INDEX;
Jesse Barnesa59e1222008-05-07 12:25:46 +1000284 u8 saveAR[21];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000285 u8 saveDACMASK;
Jesse Barnesa59e1222008-05-07 12:25:46 +1000286 u8 saveCR[37];
Keith Packard79f11c12009-04-30 14:43:44 -0700287 uint64_t saveFENCE[16];
Eric Anholt1fd1c622009-06-03 07:26:58 +0000288 u32 saveCURACNTR;
289 u32 saveCURAPOS;
290 u32 saveCURABASE;
291 u32 saveCURBCNTR;
292 u32 saveCURBPOS;
293 u32 saveCURBBASE;
294 u32 saveCURSIZE;
Eric Anholt673a3942008-07-30 12:06:12 -0700295
296 struct {
297 struct drm_mm gtt_space;
298
Keith Packard0839ccb2008-10-30 19:38:48 -0700299 struct io_mapping *gtt_mapping;
Eric Anholtab657db12009-01-23 12:57:47 -0800300 int gtt_mtrr;
Keith Packard0839ccb2008-10-30 19:38:48 -0700301
Eric Anholt673a3942008-07-30 12:06:12 -0700302 /**
303 * List of objects currently involved in rendering from the
304 * ringbuffer.
305 *
Eric Anholtce44b0e2008-11-06 16:00:31 -0800306 * Includes buffers having the contents of their GPU caches
307 * flushed, not necessarily primitives. last_rendering_seqno
308 * represents when the rendering involved will be completed.
309 *
Eric Anholt673a3942008-07-30 12:06:12 -0700310 * A reference is held on the buffer while on this list.
311 */
Carl Worth5e118f42009-03-20 11:54:25 -0700312 spinlock_t active_list_lock;
Eric Anholt673a3942008-07-30 12:06:12 -0700313 struct list_head active_list;
314
315 /**
316 * List of objects which are not in the ringbuffer but which
317 * still have a write_domain which needs to be flushed before
318 * unbinding.
319 *
Eric Anholtce44b0e2008-11-06 16:00:31 -0800320 * last_rendering_seqno is 0 while an object is in this list.
321 *
Eric Anholt673a3942008-07-30 12:06:12 -0700322 * A reference is held on the buffer while on this list.
323 */
324 struct list_head flushing_list;
325
326 /**
327 * LRU list of objects which are not in the ringbuffer and
328 * are ready to unbind, but are still in the GTT.
329 *
Eric Anholtce44b0e2008-11-06 16:00:31 -0800330 * last_rendering_seqno is 0 while an object is in this list.
331 *
Eric Anholt673a3942008-07-30 12:06:12 -0700332 * A reference is not held on the buffer while on this list,
333 * as merely being GTT-bound shouldn't prevent its being
334 * freed, and we'll pull it off the list in the free path.
335 */
336 struct list_head inactive_list;
337
338 /**
339 * List of breadcrumbs associated with GPU requests currently
340 * outstanding.
341 */
342 struct list_head request_list;
343
344 /**
345 * We leave the user IRQ off as much as possible,
346 * but this means that requests will finish and never
347 * be retired once the system goes idle. Set a timer to
348 * fire periodically while the ring is running. When it
349 * fires, go retire requests.
350 */
351 struct delayed_work retire_work;
352
353 uint32_t next_gem_seqno;
354
355 /**
356 * Waiting sequence number, if any
357 */
358 uint32_t waiting_gem_seqno;
359
360 /**
361 * Last seq seen at irq time
362 */
363 uint32_t irq_gem_seqno;
364
365 /**
366 * Flag if the X Server, and thus DRM, is not currently in
367 * control of the device.
368 *
369 * This is set between LeaveVT and EnterVT. It needs to be
370 * replaced with a semaphore. It also needs to be
371 * transitioned away from for kernel modesetting.
372 */
373 int suspended;
374
375 /**
376 * Flag if the hardware appears to be wedged.
377 *
378 * This is set when attempts to idle the device timeout.
379 * It prevents command submission from occuring and makes
380 * every pending request fail
381 */
382 int wedged;
383
384 /** Bit 6 swizzling required for X tiling */
385 uint32_t bit_6_swizzle_x;
386 /** Bit 6 swizzling required for Y tiling */
387 uint32_t bit_6_swizzle_y;
Dave Airlie71acb5e2008-12-30 20:31:46 +1000388
389 /* storage for physical objects */
390 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
Eric Anholt673a3942008-07-30 12:06:12 -0700391 } mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392} drm_i915_private_t;
393
Eric Anholt673a3942008-07-30 12:06:12 -0700394/** driver private structure attached to each drm_gem_object */
395struct drm_i915_gem_object {
396 struct drm_gem_object *obj;
397
398 /** Current space allocated to this object in the GTT, if any. */
399 struct drm_mm_node *gtt_space;
400
401 /** This object's place on the active/flushing/inactive lists */
402 struct list_head list;
403
404 /**
405 * This is set if the object is on the active or flushing lists
406 * (has pending rendering), and is not set if it's on inactive (ready
407 * to be unbound).
408 */
409 int active;
410
411 /**
412 * This is set if the object has been written to since last bound
413 * to the GTT
414 */
415 int dirty;
416
417 /** AGP memory structure for our GTT binding. */
418 DRM_AGP_MEM *agp_mem;
419
Eric Anholt856fa192009-03-19 14:10:50 -0700420 struct page **pages;
421 int pages_refcount;
Eric Anholt673a3942008-07-30 12:06:12 -0700422
423 /**
424 * Current offset of the object in GTT space.
425 *
426 * This is the same as gtt_space->start
427 */
428 uint32_t gtt_offset;
Jesse Barnesde151cf2008-11-12 10:03:55 -0800429 /**
430 * Required alignment for the object
431 */
432 uint32_t gtt_alignment;
433 /**
434 * Fake offset for use by mmap(2)
435 */
436 uint64_t mmap_offset;
437
438 /**
439 * Fence register bits (if any) for this object. Will be set
440 * as needed when mapped into the GTT.
441 * Protected by dev->struct_mutex.
442 */
443 int fence_reg;
Eric Anholt673a3942008-07-30 12:06:12 -0700444
445 /** Boolean whether this object has a valid gtt offset. */
446 int gtt_bound;
447
448 /** How many users have pinned this object in GTT space */
449 int pin_count;
450
451 /** Breadcrumb of last rendering to the buffer. */
452 uint32_t last_rendering_seqno;
453
454 /** Current tiling mode for the object. */
455 uint32_t tiling_mode;
Jesse Barnesde151cf2008-11-12 10:03:55 -0800456 uint32_t stride;
Eric Anholt673a3942008-07-30 12:06:12 -0700457
Eric Anholt280b7132009-03-12 16:56:27 -0700458 /** Record of address bit 17 of each page at last unbind. */
459 long *bit_17;
460
Keith Packardba1eb1d2008-10-14 19:55:10 -0700461 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
462 uint32_t agp_type;
463
Eric Anholt673a3942008-07-30 12:06:12 -0700464 /**
Eric Anholte47c68e2008-11-14 13:35:19 -0800465 * If present, while GEM_DOMAIN_CPU is in the read domain this array
466 * flags which individual pages are valid.
Eric Anholt673a3942008-07-30 12:06:12 -0700467 */
468 uint8_t *page_cpu_valid;
Jesse Barnes79e53942008-11-07 14:24:08 -0800469
470 /** User space pin count and filp owning the pin */
471 uint32_t user_pin_count;
472 struct drm_file *pin_filp;
Dave Airlie71acb5e2008-12-30 20:31:46 +1000473
474 /** for phy allocated objects */
475 struct drm_i915_gem_phys_object *phys_obj;
Kristian Høgsbergb70d11d2009-03-03 14:45:57 -0500476
477 /**
478 * Used for checking the object doesn't appear more than once
479 * in an execbuffer object list.
480 */
481 int in_execbuffer;
Eric Anholt673a3942008-07-30 12:06:12 -0700482};
483
484/**
485 * Request queue structure.
486 *
487 * The request queue allows us to note sequence numbers that have been emitted
488 * and may be associated with active buffers to be retired.
489 *
490 * By keeping this list, we can avoid having to do questionable
491 * sequence-number comparisons on buffer last_rendering_seqnos, and associate
492 * an emission time with seqnos for tracking how far ahead of the GPU we are.
493 */
494struct drm_i915_gem_request {
495 /** GEM sequence number associated with this request. */
496 uint32_t seqno;
497
498 /** Time at which this request was emitted, in jiffies. */
499 unsigned long emitted_jiffies;
500
Eric Anholt673a3942008-07-30 12:06:12 -0700501 struct list_head list;
502};
503
504struct drm_i915_file_private {
505 struct {
506 uint32_t last_gem_seqno;
507 uint32_t last_gem_throttle_seqno;
508 } mm;
509};
510
Jesse Barnes79e53942008-11-07 14:24:08 -0800511enum intel_chip_family {
512 CHIP_I8XX = 0x01,
513 CHIP_I9XX = 0x02,
514 CHIP_I915 = 0x04,
515 CHIP_I965 = 0x08,
516};
517
Eric Anholtc153f452007-09-03 12:06:45 +1000518extern struct drm_ioctl_desc i915_ioctls[];
Dave Airlieb3a83632005-09-30 18:37:36 +1000519extern int i915_max_ioctl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800520extern unsigned int i915_fbpercrtc;
Dave Airlieb3a83632005-09-30 18:37:36 +1000521
Dave Airlie7c1c2872008-11-28 14:22:24 +1000522extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
523extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
524
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 /* i915_dma.c */
Dave Airlie84b1fd12007-07-11 15:53:27 +1000526extern void i915_kernel_lost_context(struct drm_device * dev);
Dave Airlie22eae942005-11-10 22:16:34 +1100527extern int i915_driver_load(struct drm_device *, unsigned long flags);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000528extern int i915_driver_unload(struct drm_device *);
Eric Anholt673a3942008-07-30 12:06:12 -0700529extern int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000530extern void i915_driver_lastclose(struct drm_device * dev);
Eric Anholt6c340ea2007-08-25 20:23:09 +1000531extern void i915_driver_preclose(struct drm_device *dev,
532 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700533extern void i915_driver_postclose(struct drm_device *dev,
534 struct drm_file *file_priv);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000535extern int i915_driver_device_is_agp(struct drm_device * dev);
Dave Airlie0d6aa602006-01-02 20:14:23 +1100536extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
537 unsigned long arg);
Eric Anholt673a3942008-07-30 12:06:12 -0700538extern int i915_emit_box(struct drm_device *dev,
Eric Anholt201361a2009-03-11 12:30:04 -0700539 struct drm_clip_rect *boxes,
Eric Anholt673a3942008-07-30 12:06:12 -0700540 int i, int DR1, int DR4);
Dave Airlieaf6061a2008-05-07 12:15:39 +1000541
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542/* i915_irq.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000543extern int i915_irq_emit(struct drm_device *dev, void *data,
544 struct drm_file *file_priv);
545extern int i915_irq_wait(struct drm_device *dev, void *data,
546 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700547void i915_user_irq_get(struct drm_device *dev);
548void i915_user_irq_put(struct drm_device *dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800549extern void i915_enable_interrupt (struct drm_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700550
551extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000552extern void i915_driver_irq_preinstall(struct drm_device * dev);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700553extern int i915_driver_irq_postinstall(struct drm_device *dev);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000554extern void i915_driver_irq_uninstall(struct drm_device * dev);
Eric Anholtc153f452007-09-03 12:06:45 +1000555extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
556 struct drm_file *file_priv);
557extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
558 struct drm_file *file_priv);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700559extern int i915_enable_vblank(struct drm_device *dev, int crtc);
560extern void i915_disable_vblank(struct drm_device *dev, int crtc);
561extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
Jesse Barnes9880b7a2009-02-06 10:22:41 -0800562extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
Eric Anholtc153f452007-09-03 12:06:45 +1000563extern int i915_vblank_swap(struct drm_device *dev, void *data,
564 struct drm_file *file_priv);
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100565extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566
Keith Packard7c463582008-11-04 02:03:27 -0800567void
568i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
569
570void
571i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
572
573
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574/* i915_mem.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000575extern int i915_mem_alloc(struct drm_device *dev, void *data,
576 struct drm_file *file_priv);
577extern int i915_mem_free(struct drm_device *dev, void *data,
578 struct drm_file *file_priv);
579extern int i915_mem_init_heap(struct drm_device *dev, void *data,
580 struct drm_file *file_priv);
581extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
582 struct drm_file *file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583extern void i915_mem_takedown(struct mem_block **heap);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000584extern void i915_mem_release(struct drm_device * dev,
Eric Anholt6c340ea2007-08-25 20:23:09 +1000585 struct drm_file *file_priv, struct mem_block *heap);
Eric Anholt673a3942008-07-30 12:06:12 -0700586/* i915_gem.c */
587int i915_gem_init_ioctl(struct drm_device *dev, void *data,
588 struct drm_file *file_priv);
589int i915_gem_create_ioctl(struct drm_device *dev, void *data,
590 struct drm_file *file_priv);
591int i915_gem_pread_ioctl(struct drm_device *dev, void *data,
592 struct drm_file *file_priv);
593int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
594 struct drm_file *file_priv);
595int i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
596 struct drm_file *file_priv);
Jesse Barnesde151cf2008-11-12 10:03:55 -0800597int i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
598 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700599int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
600 struct drm_file *file_priv);
601int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
602 struct drm_file *file_priv);
603int i915_gem_execbuffer(struct drm_device *dev, void *data,
604 struct drm_file *file_priv);
605int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
606 struct drm_file *file_priv);
607int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
608 struct drm_file *file_priv);
609int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
610 struct drm_file *file_priv);
611int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
612 struct drm_file *file_priv);
613int i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
614 struct drm_file *file_priv);
615int i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
616 struct drm_file *file_priv);
617int i915_gem_set_tiling(struct drm_device *dev, void *data,
618 struct drm_file *file_priv);
619int i915_gem_get_tiling(struct drm_device *dev, void *data,
620 struct drm_file *file_priv);
Eric Anholt5a125c32008-10-22 21:40:13 -0700621int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
622 struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700623void i915_gem_load(struct drm_device *dev);
Eric Anholt673a3942008-07-30 12:06:12 -0700624int i915_gem_init_object(struct drm_gem_object *obj);
625void i915_gem_free_object(struct drm_gem_object *obj);
626int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
627void i915_gem_object_unpin(struct drm_gem_object *obj);
Jesse Barnes0f973f22009-01-26 17:10:45 -0800628int i915_gem_object_unbind(struct drm_gem_object *obj);
Eric Anholt673a3942008-07-30 12:06:12 -0700629void i915_gem_lastclose(struct drm_device *dev);
630uint32_t i915_get_gem_seqno(struct drm_device *dev);
631void i915_gem_retire_requests(struct drm_device *dev);
632void i915_gem_retire_work_handler(struct work_struct *work);
633void i915_gem_clflush_object(struct drm_gem_object *obj);
Jesse Barnes79e53942008-11-07 14:24:08 -0800634int i915_gem_object_set_domain(struct drm_gem_object *obj,
635 uint32_t read_domains,
636 uint32_t write_domain);
637int i915_gem_init_ringbuffer(struct drm_device *dev);
638void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
639int i915_gem_do_init(struct drm_device *dev, unsigned long start,
640 unsigned long end);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800641int i915_gem_idle(struct drm_device *dev);
Jesse Barnesde151cf2008-11-12 10:03:55 -0800642int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
Jesse Barnes79e53942008-11-07 14:24:08 -0800643int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
644 int write);
Dave Airlie71acb5e2008-12-30 20:31:46 +1000645int i915_gem_attach_phys_object(struct drm_device *dev,
646 struct drm_gem_object *obj, int id);
647void i915_gem_detach_phys_object(struct drm_device *dev,
648 struct drm_gem_object *obj);
649void i915_gem_free_all_phys_object(struct drm_device *dev);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700650int i915_gem_object_get_pages(struct drm_gem_object *obj);
651void i915_gem_object_put_pages(struct drm_gem_object *obj);
Eric Anholt1fd1c622009-06-03 07:26:58 +0000652void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
Eric Anholt673a3942008-07-30 12:06:12 -0700653
654/* i915_gem_tiling.c */
655void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
Eric Anholt280b7132009-03-12 16:56:27 -0700656void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
657void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
Eric Anholt673a3942008-07-30 12:06:12 -0700658
659/* i915_gem_debug.c */
660void i915_gem_dump_object(struct drm_gem_object *obj, int len,
661 const char *where, uint32_t mark);
662#if WATCH_INACTIVE
663void i915_verify_inactive(struct drm_device *dev, char *file, int line);
664#else
665#define i915_verify_inactive(dev, file, line)
666#endif
667void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle);
668void i915_gem_dump_object(struct drm_gem_object *obj, int len,
669 const char *where, uint32_t mark);
670void i915_dump_lru(struct drm_device *dev, const char *where);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671
Ben Gamari20172632009-02-17 20:08:50 -0500672/* i915_debugfs.c */
673int i915_gem_debugfs_init(struct drm_minor *minor);
674void i915_gem_debugfs_cleanup(struct drm_minor *minor);
675
Jesse Barnes317c35d2008-08-25 15:11:06 -0700676/* i915_suspend.c */
677extern int i915_save_state(struct drm_device *dev);
678extern int i915_restore_state(struct drm_device *dev);
679
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700680/* i915_suspend.c */
681extern int i915_save_state(struct drm_device *dev);
682extern int i915_restore_state(struct drm_device *dev);
683
Len Brown65e082c2008-10-24 17:18:10 -0400684#ifdef CONFIG_ACPI
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100685/* i915_opregion.c */
Matthew Garrett74a365b2009-03-19 21:35:39 +0000686extern int intel_opregion_init(struct drm_device *dev, int resume);
Matthew Garrett3b1c1c12009-04-01 19:52:29 +0100687extern void intel_opregion_free(struct drm_device *dev, int suspend);
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100688extern void opregion_asle_intr(struct drm_device *dev);
689extern void opregion_enable_asle(struct drm_device *dev);
Len Brown65e082c2008-10-24 17:18:10 -0400690#else
Len Brown03ae61d2009-03-28 01:41:14 -0400691static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; }
Matthew Garrett3b1c1c12009-04-01 19:52:29 +0100692static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; }
Len Brown65e082c2008-10-24 17:18:10 -0400693static inline void opregion_asle_intr(struct drm_device *dev) { return; }
694static inline void opregion_enable_asle(struct drm_device *dev) { return; }
695#endif
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100696
Jesse Barnes79e53942008-11-07 14:24:08 -0800697/* modesetting */
698extern void intel_modeset_init(struct drm_device *dev);
699extern void intel_modeset_cleanup(struct drm_device *dev);
700
Eric Anholt546b0972008-09-01 16:45:29 -0700701/**
702 * Lock test for when it's just for synchronization of ring access.
703 *
704 * In that case, we don't need to do it when GEM is initialized as nobody else
705 * has access to the ring.
706 */
707#define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
708 if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \
709 LOCK_TEST_WITH_RETURN(dev, file_priv); \
710} while (0)
711
Eric Anholt3043c602008-10-02 12:24:47 -0700712#define I915_READ(reg) readl(dev_priv->regs + (reg))
713#define I915_WRITE(reg, val) writel(val, dev_priv->regs + (reg))
714#define I915_READ16(reg) readw(dev_priv->regs + (reg))
715#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
716#define I915_READ8(reg) readb(dev_priv->regs + (reg))
717#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
Jesse Barnesde151cf2008-11-12 10:03:55 -0800718#define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg))
Keith Packard049ef7e2009-04-30 14:43:43 -0700719#define I915_READ64(reg) readq(dev_priv->regs + (reg))
Eric Anholt7d573822009-01-02 13:33:00 -0800720#define POSTING_READ(reg) (void)I915_READ(reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721
722#define I915_VERBOSE 0
723
724#define RING_LOCALS unsigned int outring, ringmask, outcount; \
725 volatile char *virt;
726
727#define BEGIN_LP_RING(n) do { \
728 if (I915_VERBOSE) \
Márton Németh3e684ea2008-01-24 15:58:57 +1000729 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
730 if (dev_priv->ring.space < (n)*4) \
Harvey Harrisonbf9d8922008-04-30 00:55:10 -0700731 i915_wait_ring(dev, (n)*4, __func__); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732 outcount = 0; \
733 outring = dev_priv->ring.tail; \
734 ringmask = dev_priv->ring.tail_mask; \
735 virt = dev_priv->ring.virtual_start; \
736} while (0)
737
738#define OUT_RING(n) do { \
739 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
Alan Hourihanec29b6692006-08-12 16:29:24 +1000740 *(volatile unsigned int *)(virt + outring) = (n); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 outcount++; \
742 outring += 4; \
743 outring &= ringmask; \
744} while (0)
745
746#define ADVANCE_LP_RING() do { \
747 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
748 dev_priv->ring.tail = outring; \
749 dev_priv->ring.space -= outcount * 4; \
Jesse Barnes585fb112008-07-29 11:54:06 -0700750 I915_WRITE(PRB0_TAIL, outring); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751} while(0)
752
Jesse Barnes585fb112008-07-29 11:54:06 -0700753/**
754 * Reads a dword out of the status page, which is written to from the command
755 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
756 * MI_STORE_DATA_IMM.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000757 *
Jesse Barnes585fb112008-07-29 11:54:06 -0700758 * The following dwords have a reserved meaning:
Keith Packard0cdad7e2008-10-14 17:19:38 -0700759 * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
760 * 0x04: ring 0 head pointer
761 * 0x05: ring 1 head pointer (915-class)
762 * 0x06: ring 2 head pointer (915-class)
763 * 0x10-0x1b: Context status DWords (GM45)
764 * 0x1f: Last written status offset. (GM45)
Jesse Barnes585fb112008-07-29 11:54:06 -0700765 *
Keith Packard0cdad7e2008-10-14 17:19:38 -0700766 * The area from dword 0x20 to 0x3ff is available for driver usage.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000767 */
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000768#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
Keith Packard0baf8232008-11-08 11:44:14 +1000769#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
Keith Packard0cdad7e2008-10-14 17:19:38 -0700770#define I915_GEM_HWS_INDEX 0x20
Keith Packard0baf8232008-11-08 11:44:14 +1000771#define I915_BREADCRUMB_INDEX 0x21
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000772
Jesse Barnes585fb112008-07-29 11:54:06 -0700773extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000774
775#define IS_I830(dev) ((dev)->pci_device == 0x3577)
776#define IS_845G(dev) ((dev)->pci_device == 0x2562)
777#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
778#define IS_I855(dev) ((dev)->pci_device == 0x3582)
779#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
780
Carlos Martín4d1f7882008-01-23 16:41:17 +1000781#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000782#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
783#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
Jesse Barnes3bf48462008-04-06 11:55:04 -0700784#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
785 (dev)->pci_device == 0x27AE)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000786#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
787 (dev)->pci_device == 0x2982 || \
788 (dev)->pci_device == 0x2992 || \
789 (dev)->pci_device == 0x29A2 || \
790 (dev)->pci_device == 0x2A02 || \
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000791 (dev)->pci_device == 0x2A12 || \
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000792 (dev)->pci_device == 0x2A42 || \
793 (dev)->pci_device == 0x2E02 || \
794 (dev)->pci_device == 0x2E12 || \
Zhenyu Wang72021782008-11-17 13:58:11 +0800795 (dev)->pci_device == 0x2E22 || \
796 (dev)->pci_device == 0x2E32)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000797
Ma Lingc9ed4482009-05-13 15:08:27 +0800798#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
799 (dev)->pci_device == 0x2A12)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000800
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700801#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000802
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000803#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
804 (dev)->pci_device == 0x2E12 || \
Eric Anholt60fd99e2008-12-03 22:50:02 -0800805 (dev)->pci_device == 0x2E22 || \
Zhenyu Wang72021782008-11-17 13:58:11 +0800806 (dev)->pci_device == 0x2E32 || \
Eric Anholt60fd99e2008-12-03 22:50:02 -0800807 IS_GM45(dev))
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000808
Shaohua Li21778322009-02-23 15:19:16 +0800809#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
810#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
811#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
812
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000813#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
814 (dev)->pci_device == 0x29B2 || \
Shaohua Li21778322009-02-23 15:19:16 +0800815 (dev)->pci_device == 0x29D2 || \
816 (IS_IGD(dev)))
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000817
818#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
819 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
820
821#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
Shaohua Li21778322009-02-23 15:19:16 +0800822 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
823 IS_IGD(dev))
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000824
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700825#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
Jesse Barnes0f973f22009-01-26 17:10:45 -0800826/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
827 * rows, which changed the alignment requirements and fence programming.
828 */
829#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
830 IS_I915GM(dev)))
Eric Anholt7d573822009-01-02 13:33:00 -0800831#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev))
Jesse Barnes5ca58282009-03-31 14:11:15 -0700832#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
Zhenyu Wangb39d50e2008-02-19 20:59:09 +1000833
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000834#define PRIMARY_RINGBUFFER_SIZE (128*1024)
Dave Airlie0d6aa602006-01-02 20:14:23 +1100835
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836#endif