Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 2 | * ata_piix.c - Intel PATA/SATA controllers |
| 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
| 7 | * |
| 8 | * |
| 9 | * Copyright 2003-2005 Red Hat Inc |
| 10 | * Copyright 2003-2005 Jeff Garzik |
| 11 | * |
| 12 | * |
| 13 | * Copyright header from piix.c: |
| 14 | * |
| 15 | * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer |
| 16 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
| 17 | * Copyright (C) 2003 Red Hat Inc <alan@redhat.com> |
| 18 | * |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2, or (at your option) |
| 23 | * any later version. |
| 24 | * |
| 25 | * This program is distributed in the hope that it will be useful, |
| 26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 28 | * GNU General Public License for more details. |
| 29 | * |
| 30 | * You should have received a copy of the GNU General Public License |
| 31 | * along with this program; see the file COPYING. If not, write to |
| 32 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 33 | * |
| 34 | * |
| 35 | * libata documentation is available via 'make {ps|pdf}docs', |
| 36 | * as Documentation/DocBook/libata.* |
| 37 | * |
| 38 | * Hardware documentation available at http://developer.intel.com/ |
| 39 | * |
Alan Cox | d96212e | 2005-12-08 19:19:50 +0000 | [diff] [blame] | 40 | * Documentation |
| 41 | * Publically available from Intel web site. Errata documentation |
| 42 | * is also publically available. As an aide to anyone hacking on this |
| 43 | * driver the list of errata that are relevant is below.going back to |
| 44 | * PIIX4. Older device documentation is now a bit tricky to find. |
| 45 | * |
| 46 | * The chipsets all follow very much the same design. The orginal Triton |
| 47 | * series chipsets do _not_ support independant device timings, but this |
| 48 | * is fixed in Triton II. With the odd mobile exception the chips then |
| 49 | * change little except in gaining more modes until SATA arrives. This |
| 50 | * driver supports only the chips with independant timing (that is those |
| 51 | * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix |
| 52 | * for the early chip drivers. |
| 53 | * |
| 54 | * Errata of note: |
| 55 | * |
| 56 | * Unfixable |
| 57 | * PIIX4 errata #9 - Only on ultra obscure hw |
| 58 | * ICH3 errata #13 - Not observed to affect real hw |
| 59 | * by Intel |
| 60 | * |
| 61 | * Things we must deal with |
| 62 | * PIIX4 errata #10 - BM IDE hang with non UDMA |
| 63 | * (must stop/start dma to recover) |
| 64 | * 440MX errata #15 - As PIIX4 errata #10 |
| 65 | * PIIX4 errata #15 - Must not read control registers |
| 66 | * during a PIO transfer |
| 67 | * 440MX errata #13 - As PIIX4 errata #15 |
| 68 | * ICH2 errata #21 - DMA mode 0 doesn't work right |
| 69 | * ICH0/1 errata #55 - As ICH2 errata #21 |
| 70 | * ICH2 spec c #9 - Extra operations needed to handle |
| 71 | * drive hotswap [NOT YET SUPPORTED] |
| 72 | * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary |
| 73 | * and must be dword aligned |
| 74 | * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 |
| 75 | * |
| 76 | * Should have been BIOS fixed: |
| 77 | * 450NX: errata #19 - DMA hangs on old 450NX |
| 78 | * 450NX: errata #20 - DMA hangs on old 450NX |
| 79 | * 450NX: errata #25 - Corruption with DMA on old 450NX |
| 80 | * ICH3 errata #15 - IDE deadlock under high load |
| 81 | * (BIOS must set dev 31 fn 0 bit 23) |
| 82 | * ICH3 errata #18 - Don't use native mode |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | */ |
| 84 | |
| 85 | #include <linux/kernel.h> |
| 86 | #include <linux/module.h> |
| 87 | #include <linux/pci.h> |
| 88 | #include <linux/init.h> |
| 89 | #include <linux/blkdev.h> |
| 90 | #include <linux/delay.h> |
Jeff Garzik | 6248e64 | 2005-10-30 06:42:18 -0500 | [diff] [blame] | 91 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | #include <scsi/scsi_host.h> |
| 93 | #include <linux/libata.h> |
| 94 | |
| 95 | #define DRV_NAME "ata_piix" |
Jeff Garzik | 7bdd720 | 2005-11-16 11:06:59 -0500 | [diff] [blame] | 96 | #define DRV_VERSION "1.05" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | |
| 98 | enum { |
| 99 | PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ |
| 100 | ICH5_PMR = 0x90, /* port mapping register */ |
| 101 | ICH5_PCS = 0x92, /* port control and status */ |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 102 | PIIX_SCC = 0x0A, /* sub-class code register */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
Tejun Heo | 219e621 | 2006-03-05 14:28:51 +0900 | [diff] [blame^] | 104 | PIIX_FLAG_IGNORE_PCS = (1 << 25), /* ignore PCS present bits */ |
Tejun Heo | d435804 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 105 | PIIX_FLAG_SCR = (1 << 26), /* SCR available */ |
Tejun Heo | ff0fc14 | 2005-12-18 17:17:07 +0900 | [diff] [blame] | 106 | PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */ |
| 107 | PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */ |
| 108 | PIIX_FLAG_COMBINED = (1 << 29), /* combined mode possible */ |
| 109 | /* ICH6/7 use different scheme for map value */ |
| 110 | PIIX_FLAG_COMBINED_ICH6 = PIIX_FLAG_COMBINED | (1 << 30), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
| 112 | /* combined mode. if set, PATA is channel 0. |
| 113 | * if clear, PATA is channel 1. |
| 114 | */ |
Hannes Reinecke | 6a690df | 2005-06-28 17:30:38 -0700 | [diff] [blame] | 115 | PIIX_PORT_ENABLED = (1 << 0), |
| 116 | PIIX_PORT_PRESENT = (1 << 4), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | |
| 118 | PIIX_80C_PRI = (1 << 5) | (1 << 4), |
| 119 | PIIX_80C_SEC = (1 << 7) | (1 << 6), |
| 120 | |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 121 | /* controller IDs */ |
| 122 | piix4_pata = 0, |
| 123 | ich5_pata = 1, |
| 124 | ich5_sata = 2, |
| 125 | esb_sata = 3, |
| 126 | ich6_sata = 4, |
| 127 | ich6_sata_ahci = 5, |
| 128 | ich6m_sata_ahci = 6, |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 129 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 130 | /* constants for mapping table */ |
| 131 | P0 = 0, /* port 0 */ |
| 132 | P1 = 1, /* port 1 */ |
| 133 | P2 = 2, /* port 2 */ |
| 134 | P3 = 3, /* port 3 */ |
| 135 | IDE = -1, /* IDE */ |
| 136 | NA = -2, /* not avaliable */ |
| 137 | RV = -3, /* reserved */ |
| 138 | |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 139 | PIIX_AHCI_DEVICE = 6, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | }; |
| 141 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 142 | struct piix_map_db { |
| 143 | const u32 mask; |
| 144 | const int map[][4]; |
| 145 | }; |
| 146 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | static int piix_init_one (struct pci_dev *pdev, |
| 148 | const struct pci_device_id *ent); |
| 149 | |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 150 | static int piix_pata_probe_reset(struct ata_port *ap, unsigned int *classes); |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 151 | static int piix_sata_probe_reset(struct ata_port *ap, unsigned int *classes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev); |
| 153 | static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev); |
| 154 | |
| 155 | static unsigned int in_module_init = 1; |
| 156 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 157 | static const struct pci_device_id piix_pci_tbl[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | #ifdef ATA_ENABLE_PATA |
| 159 | { 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix4_pata }, |
| 160 | { 0x8086, 0x24db, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_pata }, |
| 161 | { 0x8086, 0x25a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_pata }, |
| 162 | #endif |
| 163 | |
| 164 | /* NOTE: The following PCI ids must be kept in sync with the |
| 165 | * list in drivers/pci/quirks.c. |
| 166 | */ |
| 167 | |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 168 | /* 82801EB (ICH5) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | { 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 170 | /* 82801EB (ICH5) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | { 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 172 | /* 6300ESB (ICH5 variant with broken PCS present bits) */ |
| 173 | { 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata }, |
| 174 | /* 6300ESB pretending RAID */ |
| 175 | { 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata }, |
| 176 | /* 82801FB/FW (ICH6/ICH6W) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 178 | /* 82801FR/FRW (ICH6R/ICH6RW) */ |
Jeff Garzik | 1c24a41 | 2005-11-14 18:20:23 -0500 | [diff] [blame] | 179 | { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 180 | /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented) */ |
| 181 | { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, |
| 182 | /* 82801GB/GR/GH (ICH7, identical to ICH6) */ |
Jeff Garzik | 1c24a41 | 2005-11-14 18:20:23 -0500 | [diff] [blame] | 183 | { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 184 | /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ |
| 185 | { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, |
| 186 | /* Enterprise Southbridge 2 (where's the datasheet?) */ |
Jeff Garzik | 1c24a41 | 2005-11-14 18:20:23 -0500 | [diff] [blame] | 187 | { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 188 | /* SATA Controller 1 IDE (ICH8, no datasheet yet) */ |
Jason Gaston | 012b265 | 2006-01-17 12:28:48 -0800 | [diff] [blame] | 189 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 190 | /* SATA Controller 2 IDE (ICH8, ditto) */ |
Jason Gaston | 012b265 | 2006-01-17 12:28:48 -0800 | [diff] [blame] | 191 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 192 | /* Mobile SATA Controller IDE (ICH8M, ditto) */ |
| 193 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | |
| 195 | { } /* terminate list */ |
| 196 | }; |
| 197 | |
| 198 | static struct pci_driver piix_pci_driver = { |
| 199 | .name = DRV_NAME, |
| 200 | .id_table = piix_pci_tbl, |
| 201 | .probe = piix_init_one, |
| 202 | .remove = ata_pci_remove_one, |
Jens Axboe | 9b84754 | 2006-01-06 09:28:07 +0100 | [diff] [blame] | 203 | .suspend = ata_pci_device_suspend, |
| 204 | .resume = ata_pci_device_resume, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | }; |
| 206 | |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 207 | static struct scsi_host_template piix_sht = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | .module = THIS_MODULE, |
| 209 | .name = DRV_NAME, |
| 210 | .ioctl = ata_scsi_ioctl, |
| 211 | .queuecommand = ata_scsi_queuecmd, |
Tejun Heo | 35daeb8 | 2006-02-10 15:10:48 +0900 | [diff] [blame] | 212 | .eh_timed_out = ata_scsi_timed_out, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | .eh_strategy_handler = ata_scsi_error, |
| 214 | .can_queue = ATA_DEF_QUEUE, |
| 215 | .this_id = ATA_SHT_THIS_ID, |
| 216 | .sg_tablesize = LIBATA_MAX_PRD, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 218 | .emulated = ATA_SHT_EMULATED, |
| 219 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 220 | .proc_name = DRV_NAME, |
| 221 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 222 | .slave_configure = ata_scsi_slave_config, |
| 223 | .bios_param = ata_std_bios_param, |
Jens Axboe | 9b84754 | 2006-01-06 09:28:07 +0100 | [diff] [blame] | 224 | .resume = ata_scsi_device_resume, |
| 225 | .suspend = ata_scsi_device_suspend, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | }; |
| 227 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 228 | static const struct ata_port_operations piix_pata_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | .port_disable = ata_port_disable, |
| 230 | .set_piomode = piix_set_piomode, |
| 231 | .set_dmamode = piix_set_dmamode, |
| 232 | |
| 233 | .tf_load = ata_tf_load, |
| 234 | .tf_read = ata_tf_read, |
| 235 | .check_status = ata_check_status, |
| 236 | .exec_command = ata_exec_command, |
| 237 | .dev_select = ata_std_dev_select, |
| 238 | |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 239 | .probe_reset = piix_pata_probe_reset, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | |
| 241 | .bmdma_setup = ata_bmdma_setup, |
| 242 | .bmdma_start = ata_bmdma_start, |
| 243 | .bmdma_stop = ata_bmdma_stop, |
| 244 | .bmdma_status = ata_bmdma_status, |
| 245 | .qc_prep = ata_qc_prep, |
| 246 | .qc_issue = ata_qc_issue_prot, |
| 247 | |
| 248 | .eng_timeout = ata_eng_timeout, |
| 249 | |
| 250 | .irq_handler = ata_interrupt, |
| 251 | .irq_clear = ata_bmdma_irq_clear, |
| 252 | |
| 253 | .port_start = ata_port_start, |
| 254 | .port_stop = ata_port_stop, |
Jeff Garzik | aa8f0dc | 2005-05-26 21:54:27 -0400 | [diff] [blame] | 255 | .host_stop = ata_host_stop, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | }; |
| 257 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 258 | static const struct ata_port_operations piix_sata_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | .port_disable = ata_port_disable, |
| 260 | |
| 261 | .tf_load = ata_tf_load, |
| 262 | .tf_read = ata_tf_read, |
| 263 | .check_status = ata_check_status, |
| 264 | .exec_command = ata_exec_command, |
| 265 | .dev_select = ata_std_dev_select, |
| 266 | |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 267 | .probe_reset = piix_sata_probe_reset, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | |
| 269 | .bmdma_setup = ata_bmdma_setup, |
| 270 | .bmdma_start = ata_bmdma_start, |
| 271 | .bmdma_stop = ata_bmdma_stop, |
| 272 | .bmdma_status = ata_bmdma_status, |
| 273 | .qc_prep = ata_qc_prep, |
| 274 | .qc_issue = ata_qc_issue_prot, |
| 275 | |
| 276 | .eng_timeout = ata_eng_timeout, |
| 277 | |
| 278 | .irq_handler = ata_interrupt, |
| 279 | .irq_clear = ata_bmdma_irq_clear, |
| 280 | |
| 281 | .port_start = ata_port_start, |
| 282 | .port_stop = ata_port_stop, |
Jeff Garzik | aa8f0dc | 2005-05-26 21:54:27 -0400 | [diff] [blame] | 283 | .host_stop = ata_host_stop, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | }; |
| 285 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 286 | static struct piix_map_db ich5_map_db = { |
| 287 | .mask = 0x7, |
| 288 | .map = { |
| 289 | /* PM PS SM SS MAP */ |
| 290 | { P0, NA, P1, NA }, /* 000b */ |
| 291 | { P1, NA, P0, NA }, /* 001b */ |
| 292 | { RV, RV, RV, RV }, |
| 293 | { RV, RV, RV, RV }, |
| 294 | { P0, P1, IDE, IDE }, /* 100b */ |
| 295 | { P1, P0, IDE, IDE }, /* 101b */ |
| 296 | { IDE, IDE, P0, P1 }, /* 110b */ |
| 297 | { IDE, IDE, P1, P0 }, /* 111b */ |
| 298 | }, |
| 299 | }; |
| 300 | |
| 301 | static struct piix_map_db ich6_map_db = { |
| 302 | .mask = 0x3, |
| 303 | .map = { |
| 304 | /* PM PS SM SS MAP */ |
| 305 | { P0, P1, P2, P3 }, /* 00b */ |
| 306 | { IDE, IDE, P1, P3 }, /* 01b */ |
| 307 | { P0, P2, IDE, IDE }, /* 10b */ |
| 308 | { RV, RV, RV, RV }, |
| 309 | }, |
| 310 | }; |
| 311 | |
| 312 | static struct piix_map_db ich6m_map_db = { |
| 313 | .mask = 0x3, |
| 314 | .map = { |
| 315 | /* PM PS SM SS MAP */ |
| 316 | { P0, P1, P2, P3 }, /* 00b */ |
| 317 | { RV, RV, RV, RV }, |
| 318 | { P0, P2, IDE, IDE }, /* 10b */ |
| 319 | { RV, RV, RV, RV }, |
| 320 | }, |
| 321 | }; |
| 322 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | static struct ata_port_info piix_port_info[] = { |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 324 | /* piix4_pata */ |
| 325 | { |
| 326 | .sht = &piix_sht, |
| 327 | .host_flags = ATA_FLAG_SLAVE_POSS, |
| 328 | .pio_mask = 0x1f, /* pio0-4 */ |
| 329 | #if 0 |
| 330 | .mwdma_mask = 0x06, /* mwdma1-2 */ |
| 331 | #else |
| 332 | .mwdma_mask = 0x00, /* mwdma broken */ |
| 333 | #endif |
| 334 | .udma_mask = ATA_UDMA_MASK_40C, |
| 335 | .port_ops = &piix_pata_ops, |
| 336 | }, |
| 337 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | /* ich5_pata */ |
| 339 | { |
| 340 | .sht = &piix_sht, |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 341 | .host_flags = ATA_FLAG_SLAVE_POSS | PIIX_FLAG_CHECKINTR, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | .pio_mask = 0x1f, /* pio0-4 */ |
| 343 | #if 0 |
| 344 | .mwdma_mask = 0x06, /* mwdma1-2 */ |
| 345 | #else |
| 346 | .mwdma_mask = 0x00, /* mwdma broken */ |
| 347 | #endif |
| 348 | .udma_mask = 0x3f, /* udma0-5 */ |
| 349 | .port_ops = &piix_pata_ops, |
| 350 | }, |
| 351 | |
| 352 | /* ich5_sata */ |
| 353 | { |
| 354 | .sht = &piix_sht, |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 355 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED | |
| 356 | PIIX_FLAG_CHECKINTR, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | .pio_mask = 0x1f, /* pio0-4 */ |
| 358 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 359 | .udma_mask = 0x7f, /* udma0-6 */ |
| 360 | .port_ops = &piix_sata_ops, |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 361 | .private_data = &ich5_map_db, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | }, |
| 363 | |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 364 | /* i6300esb_sata */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | { |
| 366 | .sht = &piix_sht, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 367 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED | |
Tejun Heo | 219e621 | 2006-03-05 14:28:51 +0900 | [diff] [blame^] | 368 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_IGNORE_PCS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | .pio_mask = 0x1f, /* pio0-4 */ |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 370 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 371 | .udma_mask = 0x7f, /* udma0-6 */ |
| 372 | .port_ops = &piix_sata_ops, |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 373 | .private_data = &ich5_map_db, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | }, |
| 375 | |
| 376 | /* ich6_sata */ |
| 377 | { |
| 378 | .sht = &piix_sht, |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 379 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 380 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | .pio_mask = 0x1f, /* pio0-4 */ |
| 382 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 383 | .udma_mask = 0x7f, /* udma0-6 */ |
| 384 | .port_ops = &piix_sata_ops, |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 385 | .private_data = &ich6_map_db, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | }, |
| 387 | |
Jeff Garzik | 1c24a41 | 2005-11-14 18:20:23 -0500 | [diff] [blame] | 388 | /* ich6_sata_ahci */ |
Jason Gaston | c368ca4 | 2005-04-16 15:24:44 -0700 | [diff] [blame] | 389 | { |
| 390 | .sht = &piix_sht, |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 391 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 392 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR | |
| 393 | PIIX_FLAG_AHCI, |
Jason Gaston | c368ca4 | 2005-04-16 15:24:44 -0700 | [diff] [blame] | 394 | .pio_mask = 0x1f, /* pio0-4 */ |
| 395 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 396 | .udma_mask = 0x7f, /* udma0-6 */ |
| 397 | .port_ops = &piix_sata_ops, |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 398 | .private_data = &ich6_map_db, |
Jason Gaston | c368ca4 | 2005-04-16 15:24:44 -0700 | [diff] [blame] | 399 | }, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 400 | |
| 401 | /* ich6m_sata_ahci */ |
| 402 | { |
| 403 | .sht = &piix_sht, |
| 404 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 405 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR | |
| 406 | PIIX_FLAG_AHCI, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 407 | .pio_mask = 0x1f, /* pio0-4 */ |
| 408 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 409 | .udma_mask = 0x7f, /* udma0-6 */ |
| 410 | .port_ops = &piix_sata_ops, |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 411 | .private_data = &ich6m_map_db, |
Tejun Heo | 1d076e5 | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 412 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | }; |
| 414 | |
| 415 | static struct pci_bits piix_enable_bits[] = { |
| 416 | { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ |
| 417 | { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */ |
| 418 | }; |
| 419 | |
| 420 | MODULE_AUTHOR("Andre Hedrick, Alan Cox, Andrzej Krzysztofowicz, Jeff Garzik"); |
| 421 | MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers"); |
| 422 | MODULE_LICENSE("GPL"); |
| 423 | MODULE_DEVICE_TABLE(pci, piix_pci_tbl); |
| 424 | MODULE_VERSION(DRV_VERSION); |
| 425 | |
| 426 | /** |
| 427 | * piix_pata_cbl_detect - Probe host controller cable detect info |
| 428 | * @ap: Port for which cable detect info is desired |
| 429 | * |
| 430 | * Read 80c cable indicator from ATA PCI device's PCI config |
| 431 | * register. This register is normally set by firmware (BIOS). |
| 432 | * |
| 433 | * LOCKING: |
| 434 | * None (inherited from caller). |
| 435 | */ |
| 436 | static void piix_pata_cbl_detect(struct ata_port *ap) |
| 437 | { |
| 438 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); |
| 439 | u8 tmp, mask; |
| 440 | |
| 441 | /* no 80c support in host controller? */ |
| 442 | if ((ap->udma_mask & ~ATA_UDMA_MASK_40C) == 0) |
| 443 | goto cbl40; |
| 444 | |
| 445 | /* check BIOS cable detect results */ |
| 446 | mask = ap->hard_port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC; |
| 447 | pci_read_config_byte(pdev, PIIX_IOCFG, &tmp); |
| 448 | if ((tmp & mask) == 0) |
| 449 | goto cbl40; |
| 450 | |
| 451 | ap->cbl = ATA_CBL_PATA80; |
| 452 | return; |
| 453 | |
| 454 | cbl40: |
| 455 | ap->cbl = ATA_CBL_PATA40; |
| 456 | ap->udma_mask &= ATA_UDMA_MASK_40C; |
| 457 | } |
| 458 | |
| 459 | /** |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 460 | * piix_pata_probeinit - probeinit for PATA host controller |
| 461 | * @ap: Target port |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | * |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 463 | * Probeinit including cable detection. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | * |
| 465 | * LOCKING: |
| 466 | * None (inherited from caller). |
| 467 | */ |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 468 | static void piix_pata_probeinit(struct ata_port *ap) |
| 469 | { |
| 470 | piix_pata_cbl_detect(ap); |
| 471 | ata_std_probeinit(ap); |
| 472 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 474 | /** |
| 475 | * piix_pata_probe_reset - Perform reset on PATA port and classify |
| 476 | * @ap: Port to reset |
| 477 | * @classes: Resulting classes of attached devices |
| 478 | * |
| 479 | * Reset PATA phy and classify attached devices. |
| 480 | * |
| 481 | * LOCKING: |
| 482 | * None (inherited from caller). |
| 483 | */ |
| 484 | static int piix_pata_probe_reset(struct ata_port *ap, unsigned int *classes) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | { |
| 486 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); |
| 487 | |
| 488 | if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->hard_port_no])) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 490 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | } |
| 492 | |
Tejun Heo | 573db6b | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 493 | return ata_drive_probe_reset(ap, piix_pata_probeinit, |
| 494 | ata_std_softreset, NULL, |
| 495 | ata_std_postreset, classes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | } |
| 497 | |
| 498 | /** |
| 499 | * piix_sata_probe - Probe PCI device for present SATA devices |
| 500 | * @ap: Port associated with the PCI device we wish to probe |
| 501 | * |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 502 | * Reads and configures SATA PCI device's PCI config register |
| 503 | * Port Configuration and Status (PCS) to determine port and |
| 504 | * device availability. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | * |
| 506 | * LOCKING: |
| 507 | * None (inherited from caller). |
| 508 | * |
| 509 | * RETURNS: |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 510 | * Mask of avaliable devices on the port. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | */ |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 512 | static unsigned int piix_sata_probe (struct ata_port *ap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | { |
| 514 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 515 | const unsigned int *map = ap->host_set->private_data; |
| 516 | int base = 2 * ap->hard_port_no; |
| 517 | unsigned int present_mask = 0; |
| 518 | int port, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | u8 pcs; |
| 520 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | pci_read_config_byte(pdev, ICH5_PCS, &pcs); |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 522 | DPRINTK("ata%u: ENTER, pcs=0x%x base=%d\n", ap->id, pcs, base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 524 | /* enable all ports on this ap and wait for them to settle */ |
| 525 | for (i = 0; i < 2; i++) { |
| 526 | port = map[base + i]; |
| 527 | if (port >= 0) |
| 528 | pcs |= 1 << port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | } |
| 530 | |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 531 | pci_write_config_byte(pdev, ICH5_PCS, pcs); |
| 532 | msleep(100); |
| 533 | |
| 534 | /* let's see which devices are present */ |
| 535 | pci_read_config_byte(pdev, ICH5_PCS, &pcs); |
| 536 | |
| 537 | for (i = 0; i < 2; i++) { |
| 538 | port = map[base + i]; |
| 539 | if (port < 0) |
| 540 | continue; |
Tejun Heo | 219e621 | 2006-03-05 14:28:51 +0900 | [diff] [blame^] | 541 | if (ap->flags & PIIX_FLAG_IGNORE_PCS || pcs & 1 << (4 + port)) |
Tejun Heo | d133eca | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 542 | present_mask |= 1 << i; |
| 543 | else |
| 544 | pcs &= ~(1 << port); |
| 545 | } |
| 546 | |
| 547 | /* disable offline ports on non-AHCI controllers */ |
| 548 | if (!(ap->flags & PIIX_FLAG_AHCI)) |
| 549 | pci_write_config_byte(pdev, ICH5_PCS, pcs); |
| 550 | |
| 551 | DPRINTK("ata%u: LEAVE, pcs=0x%x present_mask=0x%x\n", |
| 552 | ap->id, pcs, present_mask); |
| 553 | |
| 554 | return present_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | } |
| 556 | |
| 557 | /** |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 558 | * piix_sata_probe_reset - Perform reset on SATA port and classify |
| 559 | * @ap: Port to reset |
| 560 | * @classes: Resulting classes of attached devices |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | * |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 562 | * Reset SATA phy and classify attached devices. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | * |
| 564 | * LOCKING: |
| 565 | * None (inherited from caller). |
| 566 | */ |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 567 | static int piix_sata_probe_reset(struct ata_port *ap, unsigned int *classes) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | { |
| 569 | if (!piix_sata_probe(ap)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | printk(KERN_INFO "ata%u: SATA port has no device.\n", ap->id); |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 571 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | } |
| 573 | |
Tejun Heo | ccbe6d5 | 2006-02-15 15:01:42 +0900 | [diff] [blame] | 574 | return ata_drive_probe_reset(ap, ata_std_probeinit, |
| 575 | ata_std_softreset, NULL, |
| 576 | ata_std_postreset, classes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | } |
| 578 | |
| 579 | /** |
| 580 | * piix_set_piomode - Initialize host controller PATA PIO timings |
| 581 | * @ap: Port whose timings we are configuring |
| 582 | * @adev: um |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | * |
| 584 | * Set PIO mode for device, in host controller PCI config space. |
| 585 | * |
| 586 | * LOCKING: |
| 587 | * None (inherited from caller). |
| 588 | */ |
| 589 | |
| 590 | static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) |
| 591 | { |
| 592 | unsigned int pio = adev->pio_mode - XFER_PIO_0; |
| 593 | struct pci_dev *dev = to_pci_dev(ap->host_set->dev); |
| 594 | unsigned int is_slave = (adev->devno != 0); |
| 595 | unsigned int master_port= ap->hard_port_no ? 0x42 : 0x40; |
| 596 | unsigned int slave_port = 0x44; |
| 597 | u16 master_data; |
| 598 | u8 slave_data; |
| 599 | |
| 600 | static const /* ISP RTC */ |
| 601 | u8 timings[][2] = { { 0, 0 }, |
| 602 | { 0, 0 }, |
| 603 | { 1, 0 }, |
| 604 | { 2, 1 }, |
| 605 | { 2, 3 }, }; |
| 606 | |
| 607 | pci_read_config_word(dev, master_port, &master_data); |
| 608 | if (is_slave) { |
| 609 | master_data |= 0x4000; |
| 610 | /* enable PPE, IE and TIME */ |
| 611 | master_data |= 0x0070; |
| 612 | pci_read_config_byte(dev, slave_port, &slave_data); |
| 613 | slave_data &= (ap->hard_port_no ? 0x0f : 0xf0); |
| 614 | slave_data |= |
| 615 | (timings[pio][0] << 2) | |
| 616 | (timings[pio][1] << (ap->hard_port_no ? 4 : 0)); |
| 617 | } else { |
| 618 | master_data &= 0xccf8; |
| 619 | /* enable PPE, IE and TIME */ |
| 620 | master_data |= 0x0007; |
| 621 | master_data |= |
| 622 | (timings[pio][0] << 12) | |
| 623 | (timings[pio][1] << 8); |
| 624 | } |
| 625 | pci_write_config_word(dev, master_port, master_data); |
| 626 | if (is_slave) |
| 627 | pci_write_config_byte(dev, slave_port, slave_data); |
| 628 | } |
| 629 | |
| 630 | /** |
| 631 | * piix_set_dmamode - Initialize host controller PATA PIO timings |
| 632 | * @ap: Port whose timings we are configuring |
| 633 | * @adev: um |
| 634 | * @udma: udma mode, 0 - 6 |
| 635 | * |
| 636 | * Set UDMA mode for device, in host controller PCI config space. |
| 637 | * |
| 638 | * LOCKING: |
| 639 | * None (inherited from caller). |
| 640 | */ |
| 641 | |
| 642 | static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 643 | { |
| 644 | unsigned int udma = adev->dma_mode; /* FIXME: MWDMA too */ |
| 645 | struct pci_dev *dev = to_pci_dev(ap->host_set->dev); |
| 646 | u8 maslave = ap->hard_port_no ? 0x42 : 0x40; |
| 647 | u8 speed = udma; |
| 648 | unsigned int drive_dn = (ap->hard_port_no ? 2 : 0) + adev->devno; |
| 649 | int a_speed = 3 << (drive_dn * 4); |
| 650 | int u_flag = 1 << drive_dn; |
| 651 | int v_flag = 0x01 << drive_dn; |
| 652 | int w_flag = 0x10 << drive_dn; |
| 653 | int u_speed = 0; |
| 654 | int sitre; |
| 655 | u16 reg4042, reg4a; |
| 656 | u8 reg48, reg54, reg55; |
| 657 | |
| 658 | pci_read_config_word(dev, maslave, ®4042); |
| 659 | DPRINTK("reg4042 = 0x%04x\n", reg4042); |
| 660 | sitre = (reg4042 & 0x4000) ? 1 : 0; |
| 661 | pci_read_config_byte(dev, 0x48, ®48); |
| 662 | pci_read_config_word(dev, 0x4a, ®4a); |
| 663 | pci_read_config_byte(dev, 0x54, ®54); |
| 664 | pci_read_config_byte(dev, 0x55, ®55); |
| 665 | |
| 666 | switch(speed) { |
| 667 | case XFER_UDMA_4: |
| 668 | case XFER_UDMA_2: u_speed = 2 << (drive_dn * 4); break; |
| 669 | case XFER_UDMA_6: |
| 670 | case XFER_UDMA_5: |
| 671 | case XFER_UDMA_3: |
| 672 | case XFER_UDMA_1: u_speed = 1 << (drive_dn * 4); break; |
| 673 | case XFER_UDMA_0: u_speed = 0 << (drive_dn * 4); break; |
| 674 | case XFER_MW_DMA_2: |
| 675 | case XFER_MW_DMA_1: break; |
| 676 | default: |
| 677 | BUG(); |
| 678 | return; |
| 679 | } |
| 680 | |
| 681 | if (speed >= XFER_UDMA_0) { |
| 682 | if (!(reg48 & u_flag)) |
| 683 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); |
| 684 | if (speed == XFER_UDMA_5) { |
| 685 | pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag); |
| 686 | } else { |
| 687 | pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); |
| 688 | } |
| 689 | if ((reg4a & a_speed) != u_speed) |
| 690 | pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed); |
| 691 | if (speed > XFER_UDMA_2) { |
| 692 | if (!(reg54 & v_flag)) |
| 693 | pci_write_config_byte(dev, 0x54, reg54 | v_flag); |
| 694 | } else |
| 695 | pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); |
| 696 | } else { |
| 697 | if (reg48 & u_flag) |
| 698 | pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); |
| 699 | if (reg4a & a_speed) |
| 700 | pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); |
| 701 | if (reg54 & v_flag) |
| 702 | pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); |
| 703 | if (reg55 & w_flag) |
| 704 | pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); |
| 705 | } |
| 706 | } |
| 707 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | #define AHCI_PCI_BAR 5 |
| 709 | #define AHCI_GLOBAL_CTL 0x04 |
| 710 | #define AHCI_ENABLE (1 << 31) |
| 711 | static int piix_disable_ahci(struct pci_dev *pdev) |
| 712 | { |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 713 | void __iomem *mmio; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | u32 tmp; |
| 715 | int rc = 0; |
| 716 | |
| 717 | /* BUG: pci_enable_device has not yet been called. This |
| 718 | * works because this device is usually set up by BIOS. |
| 719 | */ |
| 720 | |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 721 | if (!pci_resource_start(pdev, AHCI_PCI_BAR) || |
| 722 | !pci_resource_len(pdev, AHCI_PCI_BAR)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | return 0; |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 724 | |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 725 | mmio = pci_iomap(pdev, AHCI_PCI_BAR, 64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | if (!mmio) |
| 727 | return -ENOMEM; |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 728 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | tmp = readl(mmio + AHCI_GLOBAL_CTL); |
| 730 | if (tmp & AHCI_ENABLE) { |
| 731 | tmp &= ~AHCI_ENABLE; |
| 732 | writel(tmp, mmio + AHCI_GLOBAL_CTL); |
| 733 | |
| 734 | tmp = readl(mmio + AHCI_GLOBAL_CTL); |
| 735 | if (tmp & AHCI_ENABLE) |
| 736 | rc = -EIO; |
| 737 | } |
Greg Felix | 7b6dbd6 | 2005-07-28 15:54:15 -0400 | [diff] [blame] | 738 | |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 739 | pci_iounmap(pdev, mmio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | return rc; |
| 741 | } |
| 742 | |
| 743 | /** |
Alan Cox | c621b14 | 2005-12-08 19:22:28 +0000 | [diff] [blame] | 744 | * piix_check_450nx_errata - Check for problem 450NX setup |
Randy Dunlap | c893a3a | 2006-01-28 13:15:32 -0500 | [diff] [blame] | 745 | * @ata_dev: the PCI device to check |
Alan Cox | c621b14 | 2005-12-08 19:22:28 +0000 | [diff] [blame] | 746 | * |
| 747 | * Check for the present of 450NX errata #19 and errata #25. If |
| 748 | * they are found return an error code so we can turn off DMA |
| 749 | */ |
| 750 | |
| 751 | static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) |
| 752 | { |
| 753 | struct pci_dev *pdev = NULL; |
| 754 | u16 cfg; |
| 755 | u8 rev; |
| 756 | int no_piix_dma = 0; |
| 757 | |
| 758 | while((pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) |
| 759 | { |
| 760 | /* Look for 450NX PXB. Check for problem configurations |
| 761 | A PCI quirk checks bit 6 already */ |
| 762 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); |
| 763 | pci_read_config_word(pdev, 0x41, &cfg); |
| 764 | /* Only on the original revision: IDE DMA can hang */ |
| 765 | if(rev == 0x00) |
| 766 | no_piix_dma = 1; |
| 767 | /* On all revisions below 5 PXB bus lock must be disabled for IDE */ |
| 768 | else if(cfg & (1<<14) && rev < 5) |
| 769 | no_piix_dma = 2; |
| 770 | } |
| 771 | if(no_piix_dma) |
| 772 | dev_printk(KERN_WARNING, &ata_dev->dev, "450NX errata present, disabling IDE DMA.\n"); |
| 773 | if(no_piix_dma == 2) |
| 774 | dev_printk(KERN_WARNING, &ata_dev->dev, "A BIOS update may resolve this.\n"); |
| 775 | return no_piix_dma; |
| 776 | } |
| 777 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 778 | static void __devinit piix_init_sata_map(struct pci_dev *pdev, |
| 779 | struct ata_port_info *pinfo) |
| 780 | { |
| 781 | struct piix_map_db *map_db = pinfo[0].private_data; |
| 782 | const unsigned int *map; |
| 783 | int i, invalid_map = 0; |
| 784 | u8 map_value; |
| 785 | |
| 786 | pci_read_config_byte(pdev, ICH5_PMR, &map_value); |
| 787 | |
| 788 | map = map_db->map[map_value & map_db->mask]; |
| 789 | |
| 790 | dev_printk(KERN_INFO, &pdev->dev, "MAP ["); |
| 791 | for (i = 0; i < 4; i++) { |
| 792 | switch (map[i]) { |
| 793 | case RV: |
| 794 | invalid_map = 1; |
| 795 | printk(" XX"); |
| 796 | break; |
| 797 | |
| 798 | case NA: |
| 799 | printk(" --"); |
| 800 | break; |
| 801 | |
| 802 | case IDE: |
| 803 | WARN_ON((i & 1) || map[i + 1] != IDE); |
| 804 | pinfo[i / 2] = piix_port_info[ich5_pata]; |
| 805 | i++; |
| 806 | printk(" IDE IDE"); |
| 807 | break; |
| 808 | |
| 809 | default: |
| 810 | printk(" P%d", map[i]); |
| 811 | if (i & 1) |
| 812 | pinfo[i / 2].host_flags |= ATA_FLAG_SLAVE_POSS; |
| 813 | break; |
| 814 | } |
| 815 | } |
| 816 | printk(" ]\n"); |
| 817 | |
| 818 | if (invalid_map) |
| 819 | dev_printk(KERN_ERR, &pdev->dev, |
| 820 | "invalid MAP value %u\n", map_value); |
| 821 | |
| 822 | pinfo[0].private_data = (void *)map; |
| 823 | pinfo[1].private_data = (void *)map; |
| 824 | } |
| 825 | |
Alan Cox | c621b14 | 2005-12-08 19:22:28 +0000 | [diff] [blame] | 826 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | * piix_init_one - Register PIIX ATA PCI device with kernel services |
| 828 | * @pdev: PCI device to register |
| 829 | * @ent: Entry in piix_pci_tbl matching with @pdev |
| 830 | * |
| 831 | * Called from kernel PCI layer. We probe for combined mode (sigh), |
| 832 | * and then hand over control to libata, for it to do the rest. |
| 833 | * |
| 834 | * LOCKING: |
| 835 | * Inherited from PCI layer (may sleep). |
| 836 | * |
| 837 | * RETURNS: |
| 838 | * Zero on success, or -ERRNO value. |
| 839 | */ |
| 840 | |
| 841 | static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
| 842 | { |
| 843 | static int printed_version; |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 844 | struct ata_port_info port_info[2]; |
| 845 | struct ata_port_info *ppinfo[2] = { &port_info[0], &port_info[1] }; |
Tejun Heo | ff0fc14 | 2005-12-18 17:17:07 +0900 | [diff] [blame] | 846 | unsigned long host_flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | |
| 848 | if (!printed_version++) |
Jeff Garzik | 6248e64 | 2005-10-30 06:42:18 -0500 | [diff] [blame] | 849 | dev_printk(KERN_DEBUG, &pdev->dev, |
| 850 | "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | |
| 852 | /* no hotplugging support (FIXME) */ |
| 853 | if (!in_module_init) |
| 854 | return -ENODEV; |
| 855 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 856 | port_info[0] = piix_port_info[ent->driver_data]; |
| 857 | port_info[1] = piix_port_info[ent->driver_data]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 859 | host_flags = port_info[0].host_flags; |
Tejun Heo | ff0fc14 | 2005-12-18 17:17:07 +0900 | [diff] [blame] | 860 | |
| 861 | if (host_flags & PIIX_FLAG_AHCI) { |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 862 | u8 tmp; |
| 863 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); |
| 864 | if (tmp == PIIX_AHCI_DEVICE) { |
| 865 | int rc = piix_disable_ahci(pdev); |
| 866 | if (rc) |
| 867 | return rc; |
| 868 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | } |
| 870 | |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 871 | /* Initialize SATA map */ |
| 872 | if (host_flags & ATA_FLAG_SATA) |
| 873 | piix_init_sata_map(pdev, port_info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | |
| 875 | /* On ICH5, some BIOSen disable the interrupt using the |
| 876 | * PCI_COMMAND_INTX_DISABLE bit added in PCI 2.3. |
| 877 | * On ICH6, this bit has the same effect, but only when |
| 878 | * MSI is disabled (and it is disabled, as we don't use |
| 879 | * message-signalled interrupts currently). |
| 880 | */ |
Tejun Heo | ff0fc14 | 2005-12-18 17:17:07 +0900 | [diff] [blame] | 881 | if (host_flags & PIIX_FLAG_CHECKINTR) |
Brett M Russ | a04ce0f | 2005-08-15 15:23:41 -0400 | [diff] [blame] | 882 | pci_intx(pdev, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | |
Alan Cox | c621b14 | 2005-12-08 19:22:28 +0000 | [diff] [blame] | 884 | if (piix_check_450nx_errata(pdev)) { |
| 885 | /* This writes into the master table but it does not |
| 886 | really matter for this errata as we will apply it to |
| 887 | all the PIIX devices on the board */ |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 888 | port_info[0].mwdma_mask = 0; |
| 889 | port_info[0].udma_mask = 0; |
| 890 | port_info[1].mwdma_mask = 0; |
| 891 | port_info[1].udma_mask = 0; |
Alan Cox | c621b14 | 2005-12-08 19:22:28 +0000 | [diff] [blame] | 892 | } |
Tejun Heo | d33f58b | 2006-03-01 01:25:39 +0900 | [diff] [blame] | 893 | return ata_pci_init_one(pdev, ppinfo, 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | } |
| 895 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | static int __init piix_init(void) |
| 897 | { |
| 898 | int rc; |
| 899 | |
| 900 | DPRINTK("pci_module_init\n"); |
| 901 | rc = pci_module_init(&piix_pci_driver); |
| 902 | if (rc) |
| 903 | return rc; |
| 904 | |
| 905 | in_module_init = 0; |
| 906 | |
| 907 | DPRINTK("done\n"); |
| 908 | return 0; |
| 909 | } |
| 910 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 911 | static void __exit piix_exit(void) |
| 912 | { |
| 913 | pci_unregister_driver(&piix_pci_driver); |
| 914 | } |
| 915 | |
| 916 | module_init(piix_init); |
| 917 | module_exit(piix_exit); |
| 918 | |