Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm / c3cceeddf0b5f97b0d2352b98ef0f025e31a9ae3 / . / drivers / gpu / drm / radeon / evergreen_blit_shaders.c
blob: 5d5045027b46aad961978089a078c8e4baadaca0 [file] [log] [blame]
Alex Deucherd7ccd8f2010-09-09 11:33:36 -0400[diff] [blame]1/*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Alex Deucher <alexander.deucher@amd.com>
25 */
26
27#include <linux/types.h>
28#include <linux/kernel.h>
29
30/*
31 * evergreen cards need to use the 3D engine to blit data which requires
32 * quite a bit of hw state setup. Rather than pull the whole 3D driver
33 * (which normally generates the 3D state) into the DRM, we opt to use
34 * statically generated state tables. The regsiter state and shaders
35 * were hand generated to support blitting functionality. See the 3D
36 * driver or documentation for descriptions of the registers and
37 * shader instructions.
38 */
39
40const u32 evergreen_default_state[] =
41{
42 0xc0012800, /* CONTEXT_CONTROL */
43 0x80000000,
44 0x80000000,
45
46 0xc0016900,
47 0x0000023b,
48 0x00000000, /* SQ_LDS_ALLOC_PS */
49
50 0xc0066900,
51 0x00000240,
52 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
53 0x00000000,
54 0x00000000,
55 0x00000000,
56 0x00000000,
57 0x00000000,
58
59 0xc0046900,
60 0x00000247,
61 0x00000000, /* SQ_GS_VERT_ITEMSIZE */
62 0x00000000,
63 0x00000000,
64 0x00000000,
65
66 0xc0026f00,
67 0x00000000,
68 0x00000000, /* SQ_VTX_BASE_VTX_LOC */
69 0x00000000,
70
71 0xc0026900,
72 0x00000010,
73 0x00000000, /* DB_Z_INFO */
74 0x00000000, /* DB_STENCIL_INFO */
75
76
77 0xc0016900,
78 0x00000200,
79 0x00000000, /* DB_DEPTH_CONTROL */
80
81 0xc0066900,
82 0x00000000,
83 0x00000060, /* DB_RENDER_CONTROL */
84 0x00000000, /* DB_COUNT_CONTROL */
85 0x00000000, /* DB_DEPTH_VIEW */
86 0x0000002a, /* DB_RENDER_OVERRIDE */
87 0x00000000, /* DB_RENDER_OVERRIDE2 */
88 0x00000000, /* DB_HTILE_DATA_BASE */
89
90 0xc0026900,
91 0x0000000a,
92 0x00000000, /* DB_STENCIL_CLEAR */
93 0x00000000, /* DB_DEPTH_CLEAR */
94
95 0xc0016900,
96 0x000002dc,
97 0x0000aa00, /* DB_ALPHA_TO_MASK */
98
99 0xc0016900,
100 0x00000080,
101 0x00000000, /* PA_SC_WINDOW_OFFSET */
102
103 0xc00d6900,
104 0x00000083,
105 0x0000ffff, /* PA_SC_CLIPRECT_RULE */
106 0x00000000, /* PA_SC_CLIPRECT_0_TL */
107 0x20002000, /* PA_SC_CLIPRECT_0_BR */
108 0x00000000,
109 0x20002000,
110 0x00000000,
111 0x20002000,
112 0x00000000,
113 0x20002000,
114 0xaaaaaaaa, /* PA_SC_EDGERULE */
115 0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
116 0x0000000f, /* CB_TARGET_MASK */
117 0x0000000f, /* CB_SHADER_MASK */
118
119 0xc0226900,
120 0x00000094,
121 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
122 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
123 0x80000000,
124 0x20002000,
125 0x80000000,
126 0x20002000,
127 0x80000000,
128 0x20002000,
129 0x80000000,
130 0x20002000,
131 0x80000000,
132 0x20002000,
133 0x80000000,
134 0x20002000,
135 0x80000000,
136 0x20002000,
137 0x80000000,
138 0x20002000,
139 0x80000000,
140 0x20002000,
141 0x80000000,
142 0x20002000,
143 0x80000000,
144 0x20002000,
145 0x80000000,
146 0x20002000,
147 0x80000000,
148 0x20002000,
149 0x80000000,
150 0x20002000,
151 0x80000000,
152 0x20002000,
153 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
154 0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
155
156 0xc0016900,
157 0x000000d4,
158 0x00000000, /* SX_MISC */
159
160 0xc0026900,
161 0x00000292,
162 0x00000000, /* PA_SC_MODE_CNTL_0 */
163 0x00000000, /* PA_SC_MODE_CNTL_1 */
164
165 0xc0106900,
166 0x00000300,
167 0x00000000, /* PA_SC_LINE_CNTL */
168 0x00000000, /* PA_SC_AA_CONFIG */
169 0x00000005, /* PA_SU_VTX_CNTL */
170 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
171 0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
172 0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
173 0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
174 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_0 */
175 0x00000000, /* */
176 0x00000000, /* */
177 0x00000000, /* */
178 0x00000000, /* */
179 0x00000000, /* */
180 0x00000000, /* */
181 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_7 */
182 0xffffffff, /* PA_SC_AA_MASK */
183
184 0xc00d6900,
185 0x00000202,
186 0x00cc0010, /* CB_COLOR_CONTROL */
187 0x00000210, /* DB_SHADER_CONTROL */
188 0x00010000, /* PA_CL_CLIP_CNTL */
189 0x00000004, /* PA_SU_SC_MODE_CNTL */
190 0x00000100, /* PA_CL_VTE_CNTL */
191 0x00000000, /* PA_CL_VS_OUT_CNTL */
192 0x00000000, /* PA_CL_NANINF_CNTL */
193 0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
194 0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
195 0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
196 0x00000000, /* */
197 0x00000000, /* */
198 0x00000000, /* SQ_DYN_GPR_RESOURCE_LIMIT_1 */
199
200 0xc0066900,
201 0x000002de,
202 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
203 0x00000000, /* */
204 0x00000000, /* */
205 0x00000000, /* */
206 0x00000000, /* */
207 0x00000000, /* */
208
209 0xc0016900,
210 0x00000229,
211 0x00000000, /* SQ_PGM_START_FS */
212
213 0xc0016900,
214 0x0000022a,
215 0x00000000, /* SQ_PGM_RESOURCES_FS */
216
217 0xc0096900,
218 0x00000100,
219 0x00ffffff, /* VGT_MAX_VTX_INDX */
220 0x00000000, /* */
221 0x00000000, /* */
222 0x00000000, /* */
223 0x00000000, /* SX_ALPHA_TEST_CONTROL */
224 0x00000000, /* CB_BLEND_RED */
225 0x00000000, /* CB_BLEND_GREEN */
226 0x00000000, /* CB_BLEND_BLUE */
227 0x00000000, /* CB_BLEND_ALPHA */
228
229 0xc0026900,
230 0x000002a8,
231 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
232 0x00000000, /* */
233
234 0xc0026900,
235 0x000002ad,
236 0x00000000, /* VGT_REUSE_OFF */
237 0x00000000, /* */
238
239 0xc0116900,
240 0x00000280,
241 0x00000000, /* PA_SU_POINT_SIZE */
242 0x00000000, /* PA_SU_POINT_MINMAX */
243 0x00000008, /* PA_SU_LINE_CNTL */
244 0x00000000, /* PA_SC_LINE_STIPPLE */
245 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
246 0x00000000, /* VGT_HOS_CNTL */
247 0x00000000, /* */
248 0x00000000, /* */
249 0x00000000, /* */
250 0x00000000, /* */
251 0x00000000, /* */
252 0x00000000, /* */
253 0x00000000, /* */
254 0x00000000, /* */
255 0x00000000, /* */
256 0x00000000, /* */
257 0x00000000, /* VGT_GS_MODE */
258
259 0xc0016900,
260 0x000002a1,
261 0x00000000, /* VGT_PRIMITIVEID_EN */
262
263 0xc0016900,
264 0x000002a5,
265 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
266
267 0xc0016900,
268 0x000002d5,
269 0x00000000, /* VGT_SHADER_STAGES_EN */
270
271 0xc0026900,
272 0x000002e5,
273 0x00000000, /* VGT_STRMOUT_CONFIG */
274 0x00000000, /* */
275
276 0xc0016900,
277 0x000001e0,
278 0x00000000, /* CB_BLEND0_CONTROL */
279
280 0xc0016900,
281 0x000001b1,
282 0x00000000, /* SPI_VS_OUT_CONFIG */
283
284 0xc0016900,
285 0x00000187,
286 0x00000000, /* SPI_VS_OUT_ID_0 */
287
288 0xc0016900,
289 0x00000191,
290 0x00000100, /* SPI_PS_INPUT_CNTL_0 */
291
292 0xc00b6900,
293 0x000001b3,
294 0x20000001, /* SPI_PS_IN_CONTROL_0 */
295 0x00000000, /* SPI_PS_IN_CONTROL_1 */
296 0x00000000, /* SPI_INTERP_CONTROL_0 */
297 0x00000000, /* SPI_INPUT_Z */
298 0x00000000, /* SPI_FOG_CNTL */
299 0x00100000, /* SPI_BARYC_CNTL */
300 0x00000000, /* SPI_PS_IN_CONTROL_2 */
301 0x00000000, /* */
302 0x00000000, /* */
303 0x00000000, /* */
304 0x00000000, /* */
305
306 0xc0036e00, /* SET_SAMPLER */
307 0x00000000,
308 0x00000012,
309 0x00000000,
310 0x00000000,
311};
312
313const u32 evergreen_vs[] =
314{
315 0x00000004,
316 0x80800400,
317 0x0000a03c,
318 0x95000688,
319 0x00004000,
320 0x15200688,
321 0x00000000,
322 0x00000000,
323 0x3c000000,
324 0x67961001,
325 0x00080000,
326 0x00000000,
327 0x1c000000,
328 0x67961000,
329 0x00000008,
330 0x00000000,
331};
332
333const u32 evergreen_ps[] =
334{
335 0x00000003,
336 0xa00c0000,
337 0x00000008,
338 0x80400000,
339 0x00000000,
340 0x95200688,
341 0x00380400,
342 0x00146b10,
343 0x00380000,
344 0x20146b10,
345 0x00380400,
346 0x40146b00,
347 0x80380000,
348 0x60146b00,
349 0x00000000,
350 0x00000000,
351 0x00000010,
352 0x000d1000,
353 0xb0800000,
354 0x00000000,
355};
356
357const u32 evergreen_ps_size = ARRAY_SIZE(evergreen_ps);
358const u32 evergreen_vs_size = ARRAY_SIZE(evergreen_vs);
359const u32 evergreen_default_size = ARRAY_SIZE(evergreen_default_state);