Roy Huang | 24a07a1 | 2007-07-12 22:41:45 +0800 | [diff] [blame^] | 1 | if (BF54x) |
| 2 | |
| 3 | menu "BF548 Specific Configuration" |
| 4 | |
| 5 | comment "Interrupt Priority Assignment" |
| 6 | menu "Priority" |
| 7 | |
| 8 | config IRQ_PLL_WAKEUP |
| 9 | int "IRQ_PLL_WAKEUP" |
| 10 | default 7 |
| 11 | config IRQ_DMAC0_ERR |
| 12 | int "IRQ_DMAC0_ERR" |
| 13 | default 7 |
| 14 | config IRQ_EPPI0_ERR |
| 15 | int "IRQ_EPPI0_ERR" |
| 16 | default 7 |
| 17 | config IRQ_SPORT0_ERR |
| 18 | int "IRQ_SPORT0_ERR" |
| 19 | default 7 |
| 20 | config IRQ_SPORT1_ERR |
| 21 | int "IRQ_SPORT1_ERR" |
| 22 | default 7 |
| 23 | config IRQ_SPI0_ERR |
| 24 | int "IRQ_SPI0_ERR" |
| 25 | default 7 |
| 26 | config IRQ_UART0_ERR |
| 27 | int "IRQ_UART0_ERR" |
| 28 | default 7 |
| 29 | config IRQ_RTC |
| 30 | int "IRQ_RTC" |
| 31 | default 8 |
| 32 | config IRQ_EPPI0 |
| 33 | int "IRQ_EPPI0" |
| 34 | default 8 |
| 35 | config IRQ_SPORT0_RX |
| 36 | int "IRQ_SPORT0_RX" |
| 37 | default 9 |
| 38 | config IRQ_SPORT0_TX |
| 39 | int "IRQ_SPORT0_TX" |
| 40 | default 9 |
| 41 | config IRQ_SPORT1_RX |
| 42 | int "IRQ_SPORT1_RX" |
| 43 | default 9 |
| 44 | config IRQ_SPORT1_TX |
| 45 | int "IRQ_SPORT1_TX" |
| 46 | default 9 |
| 47 | config IRQ_SPI0 |
| 48 | int "IRQ_SPI0" |
| 49 | default 10 |
| 50 | config IRQ_UART0_RX |
| 51 | int "IRQ_UART0_RX" |
| 52 | default 10 |
| 53 | config IRQ_UART0_TX |
| 54 | int "IRQ_UART0_TX" |
| 55 | default 10 |
| 56 | config IRQ_TIMER8 |
| 57 | int "IRQ_TIMER8" |
| 58 | default 11 |
| 59 | config IRQ_TIMER9 |
| 60 | int "IRQ_TIMER9" |
| 61 | default 11 |
| 62 | config IRQ_TIMER10 |
| 63 | int "IRQ_TIMER10" |
| 64 | default 11 |
| 65 | config IRQ_PINT0 |
| 66 | int "IRQ_PINT0" |
| 67 | default 12 |
| 68 | config IRQ_PINT1 |
| 69 | int "IRQ_PINT0" |
| 70 | default 12 |
| 71 | config IRQ_MDMAS0 |
| 72 | int "IRQ_MDMAS0" |
| 73 | default 13 |
| 74 | config IRQ_MDMAS1 |
| 75 | int "IRQ_DMDMAS1" |
| 76 | default 13 |
| 77 | config IRQ_WATCHDOG |
| 78 | int "IRQ_WATCHDOG" |
| 79 | default 13 |
| 80 | config IRQ_DMAC1_ERR |
| 81 | int "IRQ_DMAC1_ERR" |
| 82 | default 7 |
| 83 | config IRQ_SPORT2_ERR |
| 84 | int "IRQ_SPORT2_ERR" |
| 85 | default 7 |
| 86 | config IRQ_SPORT3_ERR |
| 87 | int "IRQ_SPORT3_ERR" |
| 88 | default 7 |
| 89 | config IRQ_MXVR_DATA |
| 90 | int "IRQ MXVR Data" |
| 91 | default 7 |
| 92 | config IRQ_SPI1_ERR |
| 93 | int "IRQ_SPI1_ERR" |
| 94 | default 7 |
| 95 | config IRQ_SPI2_ERR |
| 96 | int "IRQ_SPI2_ERR" |
| 97 | default 7 |
| 98 | config IRQ_UART1_ERR |
| 99 | int "IRQ_UART1_ERR" |
| 100 | default 7 |
| 101 | config IRQ_UART2_ERR |
| 102 | int "IRQ_UART2_ERR" |
| 103 | default 7 |
| 104 | config IRQ_CAN0_ERR |
| 105 | int "IRQ_CAN0_ERR" |
| 106 | default 7 |
| 107 | config IRQ_SPORT2_RX |
| 108 | int "IRQ_SPORT2_RX" |
| 109 | default 9 |
| 110 | config IRQ_SPORT2_TX |
| 111 | int "IRQ_SPORT2_TX" |
| 112 | default 9 |
| 113 | config IRQ_SPORT3_RX |
| 114 | int "IRQ_SPORT3_RX" |
| 115 | default 9 |
| 116 | config IRQ_SPORT3_TX |
| 117 | int "IRQ_SPORT3_TX" |
| 118 | default 9 |
| 119 | config IRQ_EPPI1 |
| 120 | int "IRQ_EPPI1" |
| 121 | default 9 |
| 122 | config IRQ_EPPI2 |
| 123 | int "IRQ_EPPI2" |
| 124 | default 9 |
| 125 | config IRQ_SPI1 |
| 126 | int "IRQ_SPI1" |
| 127 | default 10 |
| 128 | config IRQ_SPI2 |
| 129 | int "IRQ_SPI2" |
| 130 | default 10 |
| 131 | config IRQ_UART1_RX |
| 132 | int "IRQ_UART1_RX" |
| 133 | default 10 |
| 134 | config IRQ_UART1_TX |
| 135 | int "IRQ_UART1_TX" |
| 136 | default 10 |
| 137 | config IRQ_ATAPI_RX |
| 138 | int "IRQ_ATAPI_RX" |
| 139 | default 10 |
| 140 | config IRQ_ATAPI_TX |
| 141 | int "IRQ_ATAPI_TX" |
| 142 | default 10 |
| 143 | config IRQ_TWI0 |
| 144 | int "IRQ_TWI0" |
| 145 | default 11 |
| 146 | config IRQ_TWI1 |
| 147 | int "IRQ_TWI1" |
| 148 | default 11 |
| 149 | config IRQ_CAN0_RX |
| 150 | int "IRQ_CAN_RX" |
| 151 | default 11 |
| 152 | config IRQ_CAN0_TX |
| 153 | int "IRQ_CAN_TX" |
| 154 | default 11 |
| 155 | config IRQ_MDMAS2 |
| 156 | int "IRQ_MDMAS2" |
| 157 | default 13 |
| 158 | config IRQ_MDMAS3 |
| 159 | int "IRQ_DMMAS3" |
| 160 | default 13 |
| 161 | config IRQ_MXVR_ERR |
| 162 | int "IRQ_MXVR_ERR" |
| 163 | default 11 |
| 164 | config IRQ_MXVR_MSG |
| 165 | int "IRQ_MXVR_MSG" |
| 166 | default 11 |
| 167 | config IRQ_MXVR_PKT |
| 168 | int "IRQ_MXVR_PKT" |
| 169 | default 11 |
| 170 | config IRQ_EPPI1_ERR |
| 171 | int "IRQ_EPPI1_ERR" |
| 172 | default 7 |
| 173 | config IRQ_EPPI2_ERR |
| 174 | int "IRQ_EPPI2_ERR" |
| 175 | default 7 |
| 176 | config IRQ_UART3_ERR |
| 177 | int "IRQ_UART3_ERR" |
| 178 | default 7 |
| 179 | config IRQ_HOST_ERR |
| 180 | int "IRQ_HOST_ERR" |
| 181 | default 7 |
| 182 | config IRQ_PIXC_ERR |
| 183 | int "IRQ_PIXC_ERR" |
| 184 | default 7 |
| 185 | config IRQ_NFC_ERR |
| 186 | int "IRQ_NFC_ERR" |
| 187 | default 7 |
| 188 | config IRQ_ATAPI_ERR |
| 189 | int "IRQ_ATAPI_ERR" |
| 190 | default 7 |
| 191 | config IRQ_CAN1_ERR |
| 192 | int "IRQ_CAN1_ERR" |
| 193 | default 7 |
| 194 | config IRQ_HS_DMA_ERR |
| 195 | int "IRQ Handshake DMA Status" |
| 196 | default 7 |
| 197 | config IRQ_PIXC_IN0 |
| 198 | int "IRQ PIXC IN0" |
| 199 | default 8 |
| 200 | config IRQ_PIXC_IN1 |
| 201 | int "IRQ PIXC IN1" |
| 202 | default 8 |
| 203 | config IRQ_PIXC_OUT |
| 204 | int "IRQ PIXC OUT" |
| 205 | default 8 |
| 206 | config IRQ_SDH |
| 207 | int "IRQ SDH" |
| 208 | default 8 |
| 209 | config IRQ_CNT |
| 210 | int "IRQ CNT" |
| 211 | default 8 |
| 212 | config IRQ_KEY |
| 213 | int "IRQ KEY" |
| 214 | default 8 |
| 215 | config IRQ_CAN1_RX |
| 216 | int "IRQ CAN1 RX" |
| 217 | default 11 |
| 218 | config IRQ_CAN1_TX |
| 219 | int "IRQ_CAN1_TX" |
| 220 | default 11 |
| 221 | config IRQ_SDH_MASK0 |
| 222 | int "IRQ_SDH_MASK0" |
| 223 | default 11 |
| 224 | config IRQ_SDH_MASK1 |
| 225 | int "IRQ_SDH_MASK1" |
| 226 | default 11 |
| 227 | config IRQ_USB_INT0 |
| 228 | int "IRQ USB INT0" |
| 229 | default 11 |
| 230 | config IRQ_USB_INT1 |
| 231 | int "IRQ USB INT1" |
| 232 | default 11 |
| 233 | config IRQ_USB_INT2 |
| 234 | int "IRQ USB INT2" |
| 235 | default 11 |
| 236 | config IRQ_USB_DMA |
| 237 | int "IRQ USB DMA" |
| 238 | default 11 |
| 239 | config IRQ_OTPSEC |
| 240 | int "IRQ OPTSEC" |
| 241 | default 11 |
| 242 | config IRQ_TIMER0 |
| 243 | int "IRQ_TIMER0" |
| 244 | default 11 |
| 245 | config IRQ_TIMER1 |
| 246 | int "IRQ_TIMER1" |
| 247 | default 11 |
| 248 | config IRQ_TIMER2 |
| 249 | int "IRQ_TIMER2" |
| 250 | default 11 |
| 251 | config IRQ_TIMER3 |
| 252 | int "IRQ_TIMER3" |
| 253 | default 11 |
| 254 | config IRQ_TIMER4 |
| 255 | int "IRQ_TIMER4" |
| 256 | default 11 |
| 257 | config IRQ_TIMER5 |
| 258 | int "IRQ_TIMER5" |
| 259 | default 11 |
| 260 | config IRQ_TIMER6 |
| 261 | int "IRQ_TIMER6" |
| 262 | default 11 |
| 263 | config IRQ_TIMER7 |
| 264 | int "IRQ_TIMER7" |
| 265 | default 11 |
| 266 | config IRQ_PINT2 |
| 267 | int "IRQ_PIN2" |
| 268 | default 11 |
| 269 | config IRQ_PINT3 |
| 270 | int "IRQ_PIN3" |
| 271 | default 11 |
| 272 | |
| 273 | help |
| 274 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. |
| 275 | This applies to all the above. It is not recommended to assign the |
| 276 | highest priority number 7 to UART or any other device. |
| 277 | |
| 278 | endmenu |
| 279 | |
| 280 | endmenu |
| 281 | |
| 282 | endif |