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Alexander Grafc8621252009-10-30 05:47:09 +00001/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/ppc_asm.h>
21#include <asm/kvm_asm.h>
22#include <asm/reg.h>
23#include <asm/page.h>
24#include <asm/asm-offsets.h>
Alexander Graf8c3a4e02010-04-16 00:11:46 +020025
26#ifdef CONFIG_PPC_BOOK3S_64
Alexander Grafc8621252009-10-30 05:47:09 +000027#include <asm/exception-64s.h>
Alexander Graf8c3a4e02010-04-16 00:11:46 +020028#endif
Alexander Grafc8621252009-10-30 05:47:09 +000029
30/*****************************************************************************
31 * *
32 * Real Mode handlers that need to be in low physical memory *
33 * *
34 ****************************************************************************/
35
Alexander Graf8c3a4e02010-04-16 00:11:46 +020036#if defined(CONFIG_PPC_BOOK3S_64)
37
38#define LOAD_SHADOW_VCPU(reg) \
39 mfspr reg, SPRN_SPRG_PACA
40
41#define SHADOW_VCPU_OFF PACA_KVM_SVCPU
42#define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR)
43#define FUNC(name) GLUE(.,name)
44
45#elif defined(CONFIG_PPC_BOOK3S_32)
46
47#define LOAD_SHADOW_VCPU(reg) \
48 mfspr reg, SPRN_SPRG_THREAD; \
49 lwz reg, THREAD_KVM_SVCPU(reg); \
50 /* PPC32 can have a NULL pointer - let's check for that */ \
51 mtspr SPRN_SPRG_SCRATCH1, r12; /* Save r12 */ \
52 mfcr r12; \
53 cmpwi reg, 0; \
54 bne 1f; \
55 mfspr reg, SPRN_SPRG_SCRATCH0; \
56 mtcr r12; \
57 mfspr r12, SPRN_SPRG_SCRATCH1; \
58 b kvmppc_resume_\intno; \
591:; \
60 mtcr r12; \
61 mfspr r12, SPRN_SPRG_SCRATCH1; \
62 tophys(reg, reg)
63
64#define SHADOW_VCPU_OFF 0
65#define MSR_NOIRQ MSR_KERNEL
66#define FUNC(name) name
67
68#endif
Alexander Grafc8621252009-10-30 05:47:09 +000069
70.macro INTERRUPT_TRAMPOLINE intno
71
72.global kvmppc_trampoline_\intno
73kvmppc_trampoline_\intno:
74
75 mtspr SPRN_SPRG_SCRATCH0, r13 /* Save r13 */
76
77 /*
78 * First thing to do is to find out if we're coming
79 * from a KVM guest or a Linux process.
80 *
Alexander Graf8c3a4e02010-04-16 00:11:46 +020081 * To distinguish, we check a magic byte in the PACA/current
Alexander Grafc8621252009-10-30 05:47:09 +000082 */
Alexander Graf8c3a4e02010-04-16 00:11:46 +020083 LOAD_SHADOW_VCPU(r13)
84 PPC_STL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000085 mfcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +020086 stw r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
87 lbz r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +010088 cmpwi r12, KVM_GUEST_MODE_NONE
Alexander Grafc8621252009-10-30 05:47:09 +000089 bne ..kvmppc_handler_hasmagic_\intno
90 /* No KVM guest? Then jump back to the Linux handler! */
Alexander Graf8c3a4e02010-04-16 00:11:46 +020091 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000092 mtcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +020093 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000094 mfspr r13, SPRN_SPRG_SCRATCH0 /* r13 = original r13 */
95 b kvmppc_resume_\intno /* Get back original handler */
96
97 /* Now we know we're handling a KVM guest */
98..kvmppc_handler_hasmagic_\intno:
Alexander Grafb4433a72010-01-08 02:58:04 +010099
100 /* Should we just skip the faulting instruction? */
101 cmpwi r12, KVM_GUEST_MODE_SKIP
102 beq kvmppc_handler_skip_ins
103
Alexander Grafc8621252009-10-30 05:47:09 +0000104 /* Let's store which interrupt we're handling */
105 li r12, \intno
106
107 /* Jump into the SLB exit code that goes to the highmem handler */
108 b kvmppc_handler_trampoline_exit
109
110.endm
111
112INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET
113INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK
114INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE
Alexander Grafc8621252009-10-30 05:47:09 +0000115INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE
Alexander Grafc8621252009-10-30 05:47:09 +0000116INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL
117INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT
118INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM
119INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_FP_UNAVAIL
120INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DECREMENTER
121INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSCALL
122INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE
123INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON
124INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200125
126/* Those are only available on 64 bit machines */
127
128#ifdef CONFIG_PPC_BOOK3S_64
129INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT
130INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT
Alexander Grafc8621252009-10-30 05:47:09 +0000131INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200132#endif
Alexander Grafc8621252009-10-30 05:47:09 +0000133
134/*
Alexander Grafb4433a72010-01-08 02:58:04 +0100135 * Bring us back to the faulting code, but skip the
136 * faulting instruction.
137 *
138 * This is a generic exit path from the interrupt
139 * trampolines above.
140 *
141 * Input Registers:
142 *
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200143 * R12 = free
144 * R13 = Shadow VCPU (PACA)
145 * SVCPU.SCRATCH0 = guest R12
146 * SVCPU.SCRATCH1 = guest CR
147 * SPRG_SCRATCH0 = guest R13
Alexander Grafb4433a72010-01-08 02:58:04 +0100148 *
149 */
150kvmppc_handler_skip_ins:
151
152 /* Patch the IP to the next instruction */
153 mfsrr0 r12
154 addi r12, r12, 4
155 mtsrr0 r12
156
157 /* Clean up all state */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200158 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +0100159 mtcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200160 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +0100161 mfspr r13, SPRN_SPRG_SCRATCH0
162
163 /* And get back into the code */
164 RFI
165
166/*
Alexander Grafc8621252009-10-30 05:47:09 +0000167 * This trampoline brings us back to a real mode handler
168 *
169 * Input Registers:
170 *
Alexander Graf7e57cba2010-01-08 02:58:03 +0100171 * R5 = SRR0
172 * R6 = SRR1
Alexander Grafc8621252009-10-30 05:47:09 +0000173 * LR = real-mode IP
174 *
175 */
176.global kvmppc_handler_lowmem_trampoline
177kvmppc_handler_lowmem_trampoline:
178
Alexander Graf7e57cba2010-01-08 02:58:03 +0100179 mtsrr0 r5
180 mtsrr1 r6
Alexander Grafc8621252009-10-30 05:47:09 +0000181 blr
182kvmppc_handler_lowmem_trampoline_end:
183
Alexander Graf021ec9c2010-01-08 02:58:06 +0100184/*
185 * Call a function in real mode
186 *
187 * Input Registers:
188 *
189 * R3 = function
190 * R4 = MSR
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200191 * R5 = scratch register
Alexander Graf021ec9c2010-01-08 02:58:06 +0100192 *
193 */
194_GLOBAL(kvmppc_rmcall)
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200195 LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ)
196 mtmsr r5 /* Disable relocation and interrupts, so mtsrr
Alexander Graf021ec9c2010-01-08 02:58:06 +0100197 doesn't get interrupted */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200198 sync
Alexander Graf021ec9c2010-01-08 02:58:06 +0100199 mtsrr0 r3
200 mtsrr1 r4
201 RFI
202
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200203#if defined(CONFIG_PPC_BOOK3S_32)
204#define STACK_LR INT_FRAME_SIZE+4
Alexander Graf0e677902010-07-29 15:04:20 +0200205
206/* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
207#define MSR_EXT_START \
208 PPC_STL r20, _NIP(r1); \
209 mfmsr r20; \
210 LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE); \
211 andc r3,r20,r3; /* Disable DR,EE */ \
212 mtmsr r3; \
213 sync
214
215#define MSR_EXT_END \
216 mtmsr r20; /* Enable DR,EE */ \
217 sync; \
218 PPC_LL r20, _NIP(r1)
219
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200220#elif defined(CONFIG_PPC_BOOK3S_64)
221#define STACK_LR _LINK
Alexander Graf0e677902010-07-29 15:04:20 +0200222#define MSR_EXT_START
223#define MSR_EXT_END
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200224#endif
225
Alexander Grafd5e52812010-01-15 14:49:10 +0100226/*
227 * Activate current's external feature (FPU/Altivec/VSX)
228 */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200229#define define_load_up(what) \
230 \
231_GLOBAL(kvmppc_load_up_ ## what); \
232 PPC_STLU r1, -INT_FRAME_SIZE(r1); \
233 mflr r3; \
234 PPC_STL r3, STACK_LR(r1); \
Alexander Graf0e677902010-07-29 15:04:20 +0200235 MSR_EXT_START; \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200236 \
237 bl FUNC(load_up_ ## what); \
238 \
Alexander Graf0e677902010-07-29 15:04:20 +0200239 MSR_EXT_END; \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200240 PPC_LL r3, STACK_LR(r1); \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200241 mtlr r3; \
242 addi r1, r1, INT_FRAME_SIZE; \
Alexander Grafd5e52812010-01-15 14:49:10 +0100243 blr
244
245define_load_up(fpu)
246#ifdef CONFIG_ALTIVEC
247define_load_up(altivec)
248#endif
249#ifdef CONFIG_VSX
250define_load_up(vsx)
251#endif
252
Alexander Grafc8621252009-10-30 05:47:09 +0000253.global kvmppc_trampoline_lowmem
254kvmppc_trampoline_lowmem:
Alexander Graf2b05d712010-07-29 15:04:21 +0200255 PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
Alexander Grafc8621252009-10-30 05:47:09 +0000256
257.global kvmppc_trampoline_enter
258kvmppc_trampoline_enter:
Alexander Graf2b05d712010-07-29 15:04:21 +0200259 PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
Alexander Grafc8621252009-10-30 05:47:09 +0000260
Alexander Graf53e5b8b2010-04-16 00:11:48 +0200261#include "book3s_segment.S"