blob: 3813d15e2df75d613392bf20f5e134f358cd26ed [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070027#include <linux/module.h>
28#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080029#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070030#include <linux/etherdevice.h>
31#include <linux/ethtool.h>
32#include <linux/pci.h>
33#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030034#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070035#include <linux/tcp.h>
36#include <linux/in.h>
37#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080038#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070039#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080040#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070041#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080042#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070043
44#include <asm/irq.h>
45
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070046#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
47#define SKY2_VLAN_TAG_USED 1
48#endif
49
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070050#include "sky2.h"
51
52#define DRV_NAME "sky2"
Stephen Hemminger743d32a2008-06-17 09:04:28 -070053#define DRV_VERSION "1.22"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070054#define PFX DRV_NAME " "
55
56/*
57 * The Yukon II chipset takes 64 bit command blocks (called list elements)
58 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070059 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070060 */
61
Stephen Hemminger14d02632006-09-26 11:57:43 -070062#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070063#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070064#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080065#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070066
Stephen Hemminger793b8832005-09-14 16:06:14 -070067#define TX_RING_SIZE 512
68#define TX_DEF_PENDING (TX_RING_SIZE - 1)
69#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080070#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070071
72#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070073#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070074#define TX_WATCHDOG (5 * HZ)
75#define NAPI_WEIGHT 64
76#define PHY_RETRIES 1000
77
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070078#define SKY2_EEPROM_MAGIC 0x9955aabb
79
80
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070081#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
82
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070083static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070084 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
85 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080086 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070087
Stephen Hemminger793b8832005-09-14 16:06:14 -070088static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070089module_param(debug, int, 0);
90MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
91
Stephen Hemminger14d02632006-09-26 11:57:43 -070092static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080093module_param(copybreak, int, 0);
94MODULE_PARM_DESC(copybreak, "Receive copy threshold");
95
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080096static int disable_msi = 0;
97module_param(disable_msi, int, 0);
98MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
99
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -0700100static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
102 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700103 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700140 { 0 }
141};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700142
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700143MODULE_DEVICE_TABLE(pci, sky2_id_table);
144
145/* Avoid conditionals by using array */
146static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
147static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700148static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700149
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100150static void sky2_set_multicast(struct net_device *dev);
151
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800152/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800153static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700154{
155 int i;
156
157 gma_write16(hw, port, GM_SMI_DATA, val);
158 gma_write16(hw, port, GM_SMI_CTRL,
159 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
160
161 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800162 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
163 if (ctrl == 0xffff)
164 goto io_error;
165
166 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800167 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800168
169 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700170 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800171
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800172 dev_warn(&hw->pdev->dev,"%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800173 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800174
175io_error:
176 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
177 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700178}
179
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800180static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700181{
182 int i;
183
Stephen Hemminger793b8832005-09-14 16:06:14 -0700184 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700185 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
186
187 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800188 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
189 if (ctrl == 0xffff)
190 goto io_error;
191
192 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800193 *val = gma_read16(hw, port, GM_SMI_DATA);
194 return 0;
195 }
196
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800197 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700198 }
199
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800200 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800201 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800202io_error:
203 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
204 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800205}
206
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800207static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800208{
209 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800210 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800211 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700212}
213
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800214
215static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700216{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800217 /* switch power to VCC (WA for VAUX problem) */
218 sky2_write8(hw, B0_POWER_CTRL,
219 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700220
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800221 /* disable Core Clock Division, */
222 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700223
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800224 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
225 /* enable bits are inverted */
226 sky2_write8(hw, B2_Y2_CLK_GATE,
227 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
228 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
229 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
230 else
231 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700232
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700233 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700234 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700235
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800236 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700237
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800238 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700239 /* set all bits to 0 except bits 15..12 and 8 */
240 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800241 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700242
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800243 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700244 /* set all bits to 0 except bits 28 & 27 */
245 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800246 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700247
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800248 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700249
250 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
251 reg = sky2_read32(hw, B2_GP_IO);
252 reg |= GLB_GPIO_STAT_RACE_DIS;
253 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700254
255 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700256 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800257}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700258
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800259static void sky2_power_aux(struct sky2_hw *hw)
260{
261 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
262 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
263 else
264 /* enable bits are inverted */
265 sky2_write8(hw, B2_Y2_CLK_GATE,
266 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
267 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
268 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
269
270 /* switch power to VAUX */
271 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
272 sky2_write8(hw, B0_POWER_CTRL,
273 (PC_VAUX_ENA | PC_VCC_ENA |
274 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700275}
276
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700277static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700278{
279 u16 reg;
280
281 /* disable all GMAC IRQ's */
282 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700283
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700284 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
285 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
286 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
287 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
288
289 reg = gma_read16(hw, port, GM_RX_CTRL);
290 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
291 gma_write16(hw, port, GM_RX_CTRL, reg);
292}
293
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700294/* flow control to advertise bits */
295static const u16 copper_fc_adv[] = {
296 [FC_NONE] = 0,
297 [FC_TX] = PHY_M_AN_ASP,
298 [FC_RX] = PHY_M_AN_PC,
299 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
300};
301
302/* flow control to advertise bits when using 1000BaseX */
303static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700304 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700305 [FC_TX] = PHY_M_P_ASYM_MD_X,
306 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700307 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700308};
309
310/* flow control to GMA disable bits */
311static const u16 gm_fc_disable[] = {
312 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
313 [FC_TX] = GM_GPCR_FC_RX_DIS,
314 [FC_RX] = GM_GPCR_FC_TX_DIS,
315 [FC_BOTH] = 0,
316};
317
318
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700319static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
320{
321 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700322 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700323
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700324 if (sky2->autoneg == AUTONEG_ENABLE &&
325 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700326 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
327
328 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700329 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700330 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
331
Stephen Hemminger53419c62007-05-14 12:38:11 -0700332 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700333 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700334 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700335 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
336 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700337 /* set master & slave downshift counter to 1x */
338 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700339
340 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
341 }
342
343 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700344 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700345 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700346 /* enable automatic crossover */
347 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700348
349 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
350 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
351 u16 spec;
352
353 /* Enable Class A driver for FE+ A0 */
354 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
355 spec |= PHY_M_FESC_SEL_CL_A;
356 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
357 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700358 } else {
359 /* disable energy detect */
360 ctrl &= ~PHY_M_PC_EN_DET_MSK;
361
362 /* enable automatic crossover */
363 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
364
Stephen Hemminger53419c62007-05-14 12:38:11 -0700365 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger93745492007-02-06 10:45:43 -0800366 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700367 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700368 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700369 ctrl &= ~PHY_M_PC_DSC_MSK;
370 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
371 }
372 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700373 } else {
374 /* workaround for deviation #4.88 (CRC errors) */
375 /* disable Automatic Crossover */
376
377 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700378 }
379
380 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
381
382 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700383 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700384 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
385
386 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
387 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
388 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
389 ctrl &= ~PHY_M_MAC_MD_MSK;
390 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700391 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
392
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700393 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700394 /* select page 1 to access Fiber registers */
395 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700396
397 /* for SFP-module set SIGDET polarity to low */
398 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
399 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700400 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700401 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700402
403 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700404 }
405
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700406 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700407 ct1000 = 0;
408 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700409 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700410
411 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700412 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700413 if (sky2->advertising & ADVERTISED_1000baseT_Full)
414 ct1000 |= PHY_M_1000C_AFD;
415 if (sky2->advertising & ADVERTISED_1000baseT_Half)
416 ct1000 |= PHY_M_1000C_AHD;
417 if (sky2->advertising & ADVERTISED_100baseT_Full)
418 adv |= PHY_M_AN_100_FD;
419 if (sky2->advertising & ADVERTISED_100baseT_Half)
420 adv |= PHY_M_AN_100_HD;
421 if (sky2->advertising & ADVERTISED_10baseT_Full)
422 adv |= PHY_M_AN_10_FD;
423 if (sky2->advertising & ADVERTISED_10baseT_Half)
424 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700425
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700426 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700427 } else { /* special defines for FIBER (88E1040S only) */
428 if (sky2->advertising & ADVERTISED_1000baseT_Full)
429 adv |= PHY_M_AN_1000X_AFD;
430 if (sky2->advertising & ADVERTISED_1000baseT_Half)
431 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700432
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700433 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700434 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700435
436 /* Restart Auto-negotiation */
437 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
438 } else {
439 /* forced speed/duplex settings */
440 ct1000 = PHY_M_1000C_MSE;
441
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700442 /* Disable auto update for duplex flow control and speed */
443 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700444
445 switch (sky2->speed) {
446 case SPEED_1000:
447 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700448 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700449 break;
450 case SPEED_100:
451 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700452 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700453 break;
454 }
455
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700456 if (sky2->duplex == DUPLEX_FULL) {
457 reg |= GM_GPCR_DUP_FULL;
458 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700459 } else if (sky2->speed < SPEED_1000)
460 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700461
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700462
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700463 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700464
465 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700466 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700467 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
468 else
469 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700470 }
471
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700472 gma_write16(hw, port, GM_GP_CTRL, reg);
473
Stephen Hemminger05745c42007-09-19 15:36:45 -0700474 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700475 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
476
477 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
478 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
479
480 /* Setup Phy LED's */
481 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
482 ledover = 0;
483
484 switch (hw->chip_id) {
485 case CHIP_ID_YUKON_FE:
486 /* on 88E3082 these bits are at 11..9 (shifted left) */
487 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
488
489 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
490
491 /* delete ACT LED control bits */
492 ctrl &= ~PHY_M_FELP_LED1_MSK;
493 /* change ACT LED control to blink mode */
494 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
495 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
496 break;
497
Stephen Hemminger05745c42007-09-19 15:36:45 -0700498 case CHIP_ID_YUKON_FE_P:
499 /* Enable Link Partner Next Page */
500 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
501 ctrl |= PHY_M_PC_ENA_LIP_NP;
502
503 /* disable Energy Detect and enable scrambler */
504 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
505 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
506
507 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
508 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
509 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
510 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
511
512 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
513 break;
514
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700515 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700516 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700517
518 /* select page 3 to access LED control register */
519 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
520
521 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700522 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
523 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
524 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
525 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
526 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700527
528 /* set Polarity Control register */
529 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700530 (PHY_M_POLC_LS1_P_MIX(4) |
531 PHY_M_POLC_IS0_P_MIX(4) |
532 PHY_M_POLC_LOS_CTRL(2) |
533 PHY_M_POLC_INIT_CTRL(2) |
534 PHY_M_POLC_STA1_CTRL(2) |
535 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700536
537 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700538 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700539 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800540
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700541 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800542 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800543 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700544 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
545
546 /* select page 3 to access LED control register */
547 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
548
549 /* set LED Function Control register */
550 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
551 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
552 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
553 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
554 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
555
556 /* set Blink Rate in LED Timer Control Register */
557 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
558 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
559 /* restore page register */
560 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
561 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700562
563 default:
564 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
565 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800566
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700567 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800568 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700569 }
570
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700571 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800572 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700573 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
574
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800575 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700576 gm_phy_write(hw, port, 0x18, 0xaa99);
577 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700578
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700579 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
580 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
581 gm_phy_write(hw, port, 0x18, 0xa204);
582 gm_phy_write(hw, port, 0x17, 0x2002);
583 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800584
585 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700586 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700587 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
588 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
589 /* apply workaround for integrated resistors calibration */
590 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
591 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700592 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
593 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700594 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800595 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
596
597 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
598 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800599 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800600 }
601
602 if (ledover)
603 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
604
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700605 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700606
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700607 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700608 if (sky2->autoneg == AUTONEG_ENABLE)
609 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
610 else
611 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
612}
613
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700614static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
615static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
616
617static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700618{
619 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700620
Stephen Hemminger82637e82008-01-23 19:16:04 -0800621 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800622 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700623 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700624
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700625 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
Stephen Hemmingerff351642007-10-11 19:47:44 -0700626 reg1 |= coma_mode[port];
627
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800628 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800629 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
630 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700631
632 if (hw->chip_id == CHIP_ID_YUKON_FE)
633 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
634 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
635 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700636}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700637
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700638static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
639{
640 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700641 u16 ctrl;
642
643 /* release GPHY Control reset */
644 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
645
646 /* release GMAC reset */
647 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
648
649 if (hw->flags & SKY2_HW_NEWER_PHY) {
650 /* select page 2 to access MAC control register */
651 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
652
653 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
654 /* allow GMII Power Down */
655 ctrl &= ~PHY_M_MAC_GMIF_PUP;
656 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
657
658 /* set page register back to 0 */
659 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
660 }
661
662 /* setup General Purpose Control Register */
663 gma_write16(hw, port, GM_GP_CTRL,
664 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
665
666 if (hw->chip_id != CHIP_ID_YUKON_EC) {
667 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200668 /* select page 2 to access MAC control register */
669 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700670
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200671 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700672 /* enable Power Down */
673 ctrl |= PHY_M_PC_POW_D_ENA;
674 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200675
676 /* set page register back to 0 */
677 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700678 }
679
680 /* set IEEE compatible Power Down Mode (dev. #4.99) */
681 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
682 }
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700683
684 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
685 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700686 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700687 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
688 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700689}
690
Stephen Hemminger1b537562005-12-20 15:08:07 -0800691/* Force a renegotiation */
692static void sky2_phy_reinit(struct sky2_port *sky2)
693{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800694 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800695 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800696 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800697}
698
Stephen Hemmingere3173832007-02-06 10:45:39 -0800699/* Put device in state to listen for Wake On Lan */
700static void sky2_wol_init(struct sky2_port *sky2)
701{
702 struct sky2_hw *hw = sky2->hw;
703 unsigned port = sky2->port;
704 enum flow_control save_mode;
705 u16 ctrl;
706 u32 reg1;
707
708 /* Bring hardware out of reset */
709 sky2_write16(hw, B0_CTST, CS_RST_CLR);
710 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
711
712 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
713 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
714
715 /* Force to 10/100
716 * sky2_reset will re-enable on resume
717 */
718 save_mode = sky2->flow_mode;
719 ctrl = sky2->advertising;
720
721 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
722 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700723
724 spin_lock_bh(&sky2->phy_lock);
725 sky2_phy_power_up(hw, port);
726 sky2_phy_init(hw, port);
727 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800728
729 sky2->flow_mode = save_mode;
730 sky2->advertising = ctrl;
731
732 /* Set GMAC to no flow control and auto update for speed/duplex */
733 gma_write16(hw, port, GM_GP_CTRL,
734 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
735 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
736
737 /* Set WOL address */
738 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
739 sky2->netdev->dev_addr, ETH_ALEN);
740
741 /* Turn on appropriate WOL control bits */
742 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
743 ctrl = 0;
744 if (sky2->wol & WAKE_PHY)
745 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
746 else
747 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
748
749 if (sky2->wol & WAKE_MAGIC)
750 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
751 else
752 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
753
754 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
755 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
756
757 /* Turn on legacy PCI-Express PME mode */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800758 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800759 reg1 |= PCI_Y2_PME_LEGACY;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800760 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800761
762 /* block receiver */
763 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
764
765}
766
Stephen Hemminger69161612007-06-04 17:23:26 -0700767static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
768{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700769 struct net_device *dev = hw->dev[port];
770
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800771 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
772 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
773 hw->chip_id == CHIP_ID_YUKON_FE_P ||
774 hw->chip_id == CHIP_ID_YUKON_SUPR) {
775 /* Yukon-Extreme B0 and further Extreme devices */
776 /* enable Store & Forward mode for TX */
Stephen Hemminger69161612007-06-04 17:23:26 -0700777
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800778 if (dev->mtu <= ETH_DATA_LEN)
779 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
780 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700781
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800782 else
783 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
784 TX_JUMBO_ENA| TX_STFW_ENA);
785 } else {
786 if (dev->mtu <= ETH_DATA_LEN)
787 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
788 else {
789 /* set Tx GMAC FIFO Almost Empty Threshold */
790 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
791 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700792
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800793 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
794
795 /* Can't do offload because of lack of store/forward */
796 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
797 }
Stephen Hemminger69161612007-06-04 17:23:26 -0700798 }
799}
800
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700801static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
802{
803 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
804 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100805 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700806 int i;
807 const u8 *addr = hw->dev[port]->dev_addr;
808
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700809 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
810 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700811
812 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
813
Stephen Hemminger793b8832005-09-14 16:06:14 -0700814 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700815 /* WA DEV_472 -- looks like crossed wires on port 2 */
816 /* clear GMAC 1 Control reset */
817 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
818 do {
819 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
820 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
821 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
822 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
823 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
824 }
825
Stephen Hemminger793b8832005-09-14 16:06:14 -0700826 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700827
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700828 /* Enable Transmit FIFO Underrun */
829 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
830
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800831 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700832 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700833 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800834 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700835
836 /* MIB clear */
837 reg = gma_read16(hw, port, GM_PHY_ADDR);
838 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
839
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700840 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
841 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700842 gma_write16(hw, port, GM_PHY_ADDR, reg);
843
844 /* transmit control */
845 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
846
847 /* receive control reg: unicast + multicast + no FCS */
848 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700849 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700850
851 /* transmit flow control */
852 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
853
854 /* transmit parameter */
855 gma_write16(hw, port, GM_TX_PARAM,
856 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
857 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
858 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
859 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
860
861 /* serial mode register */
862 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700863 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700864
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700865 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700866 reg |= GM_SMOD_JUMBO_ENA;
867
868 gma_write16(hw, port, GM_SERIAL_MODE, reg);
869
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700870 /* virtual address for data */
871 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
872
Stephen Hemminger793b8832005-09-14 16:06:14 -0700873 /* physical address: used for pause frames */
874 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
875
876 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700877 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
878 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
879 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
880
881 /* Configure Rx MAC FIFO */
882 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100883 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700884 if (hw->chip_id == CHIP_ID_YUKON_EX ||
885 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100886 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700887
Al Viro25cccec2007-07-20 16:07:33 +0100888 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700889
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800890 if (hw->chip_id == CHIP_ID_YUKON_XL) {
891 /* Hardware errata - clear flush mask */
892 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
893 } else {
894 /* Flush Rx MAC FIFO on any flow control or error */
895 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
896 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700897
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800898 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700899 reg = RX_GMF_FL_THR_DEF + 1;
900 /* Another magic mystery workaround from sk98lin */
901 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
902 hw->chip_rev == CHIP_REV_YU_FE2_A0)
903 reg = 0x178;
904 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700905
906 /* Configure Tx MAC FIFO */
907 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
908 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800909
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700910 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800911 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800912 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800913 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700914
Stephen Hemminger69161612007-06-04 17:23:26 -0700915 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800916 }
917
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800918 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
919 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
920 /* disable dynamic watermark */
921 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
922 reg &= ~TX_DYN_WM_ENA;
923 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
924 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700925}
926
Stephen Hemminger67712902006-12-04 15:53:45 -0800927/* Assign Ram Buffer allocation to queue */
928static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700929{
Stephen Hemminger67712902006-12-04 15:53:45 -0800930 u32 end;
931
932 /* convert from K bytes to qwords used for hw register */
933 start *= 1024/8;
934 space *= 1024/8;
935 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700936
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700937 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
938 sky2_write32(hw, RB_ADDR(q, RB_START), start);
939 sky2_write32(hw, RB_ADDR(q, RB_END), end);
940 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
941 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
942
943 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800944 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700945
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800946 /* On receive queue's set the thresholds
947 * give receiver priority when > 3/4 full
948 * send pause when down to 2K
949 */
950 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
951 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700952
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800953 tp = space - 2048/8;
954 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
955 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700956 } else {
957 /* Enable store & forward on Tx queue's because
958 * Tx FIFO is only 1K on Yukon
959 */
960 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
961 }
962
963 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700964 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700965}
966
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700967/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800968static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700969{
970 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
971 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
972 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800973 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700974}
975
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700976/* Setup prefetch unit registers. This is the interface between
977 * hardware and driver list elements
978 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800979static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700980 u64 addr, u32 last)
981{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700982 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
983 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
984 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
985 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
986 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
987 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700988
989 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700990}
991
Stephen Hemminger793b8832005-09-14 16:06:14 -0700992static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
993{
994 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
995
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700996 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700997 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700998 return le;
999}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001001static void tx_init(struct sky2_port *sky2)
1002{
1003 struct sky2_tx_le *le;
1004
1005 sky2->tx_prod = sky2->tx_cons = 0;
1006 sky2->tx_tcpsum = 0;
1007 sky2->tx_last_mss = 0;
1008
1009 le = get_tx_le(sky2);
1010 le->addr = 0;
1011 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001012}
1013
Stephen Hemminger291ea612006-09-26 11:57:41 -07001014static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
1015 struct sky2_tx_le *le)
1016{
1017 return sky2->tx_ring + (le - sky2->tx_le);
1018}
1019
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001020/* Update chip's next pointer */
1021static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001022{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001023 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001024 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001025 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1026
1027 /* Synchronize I/O on since next processor may write to tail */
1028 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001029}
1030
Stephen Hemminger793b8832005-09-14 16:06:14 -07001031
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001032static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1033{
1034 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001035 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001036 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001037 return le;
1038}
1039
Stephen Hemminger14d02632006-09-26 11:57:43 -07001040/* Build description to hardware for one receive segment */
1041static void sky2_rx_add(struct sky2_port *sky2, u8 op,
1042 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001043{
1044 struct sky2_rx_le *le;
1045
Stephen Hemminger86c68872008-01-10 16:14:12 -08001046 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001047 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001048 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001049 le->opcode = OP_ADDR64 | HW_OWNER;
1050 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001051
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001052 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -08001053 le->addr = cpu_to_le32((u32) map);
1054 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001055 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001056}
1057
Stephen Hemminger14d02632006-09-26 11:57:43 -07001058/* Build description to hardware for one possibly fragmented skb */
1059static void sky2_rx_submit(struct sky2_port *sky2,
1060 const struct rx_ring_info *re)
1061{
1062 int i;
1063
1064 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1065
1066 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1067 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1068}
1069
1070
1071static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
1072 unsigned size)
1073{
1074 struct sk_buff *skb = re->skb;
1075 int i;
1076
1077 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
1078 pci_unmap_len_set(re, data_size, size);
1079
1080 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1081 re->frag_addr[i] = pci_map_page(pdev,
1082 skb_shinfo(skb)->frags[i].page,
1083 skb_shinfo(skb)->frags[i].page_offset,
1084 skb_shinfo(skb)->frags[i].size,
1085 PCI_DMA_FROMDEVICE);
1086}
1087
1088static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1089{
1090 struct sk_buff *skb = re->skb;
1091 int i;
1092
1093 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1094 PCI_DMA_FROMDEVICE);
1095
1096 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1097 pci_unmap_page(pdev, re->frag_addr[i],
1098 skb_shinfo(skb)->frags[i].size,
1099 PCI_DMA_FROMDEVICE);
1100}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001101
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001102/* Tell chip where to start receive checksum.
1103 * Actually has two checksums, but set both same to avoid possible byte
1104 * order problems.
1105 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001106static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001107{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001108 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001109
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001110 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1111 le->ctrl = 0;
1112 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001113
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001114 sky2_write32(sky2->hw,
1115 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1116 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001117}
1118
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001119/*
1120 * The RX Stop command will not work for Yukon-2 if the BMU does not
1121 * reach the end of packet and since we can't make sure that we have
1122 * incoming data, we must reset the BMU while it is not doing a DMA
1123 * transfer. Since it is possible that the RX path is still active,
1124 * the RX RAM buffer will be stopped first, so any possible incoming
1125 * data will not trigger a DMA. After the RAM buffer is stopped, the
1126 * BMU is polled until any DMA in progress is ended and only then it
1127 * will be reset.
1128 */
1129static void sky2_rx_stop(struct sky2_port *sky2)
1130{
1131 struct sky2_hw *hw = sky2->hw;
1132 unsigned rxq = rxqaddr[sky2->port];
1133 int i;
1134
1135 /* disable the RAM Buffer receive queue */
1136 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1137
1138 for (i = 0; i < 0xffff; i++)
1139 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1140 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1141 goto stopped;
1142
1143 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1144 sky2->netdev->name);
1145stopped:
1146 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1147
1148 /* reset the Rx prefetch unit */
1149 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001150 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001151}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001152
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001153/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001154static void sky2_rx_clean(struct sky2_port *sky2)
1155{
1156 unsigned i;
1157
1158 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001159 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001160 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001161
1162 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001163 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001164 kfree_skb(re->skb);
1165 re->skb = NULL;
1166 }
1167 }
1168}
1169
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001170/* Basic MII support */
1171static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1172{
1173 struct mii_ioctl_data *data = if_mii(ifr);
1174 struct sky2_port *sky2 = netdev_priv(dev);
1175 struct sky2_hw *hw = sky2->hw;
1176 int err = -EOPNOTSUPP;
1177
1178 if (!netif_running(dev))
1179 return -ENODEV; /* Phy still in reset */
1180
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001181 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001182 case SIOCGMIIPHY:
1183 data->phy_id = PHY_ADDR_MARV;
1184
1185 /* fallthru */
1186 case SIOCGMIIREG: {
1187 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001188
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001189 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001190 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001191 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001192
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001193 data->val_out = val;
1194 break;
1195 }
1196
1197 case SIOCSMIIREG:
1198 if (!capable(CAP_NET_ADMIN))
1199 return -EPERM;
1200
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001201 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001202 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1203 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001204 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001205 break;
1206 }
1207 return err;
1208}
1209
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001210#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001211static void sky2_set_vlan_mode(struct sky2_hw *hw, u16 port, bool onoff)
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001212{
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001213 if (onoff) {
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001214 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1215 RX_VLAN_STRIP_ON);
1216 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1217 TX_VLAN_TAG_ON);
1218 } else {
1219 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1220 RX_VLAN_STRIP_OFF);
1221 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1222 TX_VLAN_TAG_OFF);
1223 }
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001224}
1225
1226static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1227{
1228 struct sky2_port *sky2 = netdev_priv(dev);
1229 struct sky2_hw *hw = sky2->hw;
1230 u16 port = sky2->port;
1231
1232 netif_tx_lock_bh(dev);
1233 napi_disable(&hw->napi);
1234
1235 sky2->vlgrp = grp;
1236 sky2_set_vlan_mode(hw, port, grp != NULL);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001237
David S. Millerd1d08d12008-01-07 20:53:33 -08001238 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001239 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001240 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001241}
1242#endif
1243
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001244/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001245 * Allocate an skb for receiving. If the MTU is large enough
1246 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001247 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001248static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001249{
1250 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001251 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001252
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001253 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001254 unsigned char *start;
1255 /*
1256 * Workaround for a bug in FIFO that cause hang
1257 * if the FIFO if the receive buffer is not 64 byte aligned.
1258 * The buffer returned from netdev_alloc_skb is
1259 * aligned except if slab debugging is enabled.
1260 */
1261 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + 8);
1262 if (!skb)
1263 goto nomem;
1264 start = PTR_ALIGN(skb->data, 8);
1265 skb_reserve(skb, start - skb->data);
1266 } else {
1267 skb = netdev_alloc_skb(sky2->netdev,
1268 sky2->rx_data_size + NET_IP_ALIGN);
1269 if (!skb)
1270 goto nomem;
1271 skb_reserve(skb, NET_IP_ALIGN);
1272 }
Stephen Hemminger14d02632006-09-26 11:57:43 -07001273
1274 for (i = 0; i < sky2->rx_nfrags; i++) {
1275 struct page *page = alloc_page(GFP_ATOMIC);
1276
1277 if (!page)
1278 goto free_partial;
1279 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001280 }
1281
1282 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001283free_partial:
1284 kfree_skb(skb);
1285nomem:
1286 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001287}
1288
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001289static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1290{
1291 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1292}
1293
Stephen Hemminger82788c72006-01-17 13:43:10 -08001294/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001295 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001296 * Normal case this ends up creating one list element for skb
1297 * in the receive ring. Worst case if using large MTU and each
1298 * allocation falls on a different 64 bit region, that results
1299 * in 6 list elements per ring entry.
1300 * One element is used for checksum enable/disable, and one
1301 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001302 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001303static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001304{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001305 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001306 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001307 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001308 unsigned i, size, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001309
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001310 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001311 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001312
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001313 /* On PCI express lowering the watermark gives better performance */
1314 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1315 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1316
1317 /* These chips have no ram buffer?
1318 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001319 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001320 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1321 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001322 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001323
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001324 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1325
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001326 if (!(hw->flags & SKY2_HW_NEW_LE))
1327 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001328
Stephen Hemminger14d02632006-09-26 11:57:43 -07001329 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001330 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001331
1332 /* Stopping point for hardware truncation */
1333 thresh = (size - 8) / sizeof(u32);
1334
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001335 sky2->rx_nfrags = size >> PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001336 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1337
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001338 /* Compute residue after pages */
1339 size -= sky2->rx_nfrags << PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001340
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001341 /* Optimize to handle small packets and headers */
1342 if (size < copybreak)
1343 size = copybreak;
1344 if (size < ETH_HLEN)
1345 size = ETH_HLEN;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001346
Stephen Hemminger14d02632006-09-26 11:57:43 -07001347 sky2->rx_data_size = size;
1348
1349 /* Fill Rx ring */
1350 for (i = 0; i < sky2->rx_pending; i++) {
1351 re = sky2->rx_ring + i;
1352
1353 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001354 if (!re->skb)
1355 goto nomem;
1356
Stephen Hemminger14d02632006-09-26 11:57:43 -07001357 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1358 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001359 }
1360
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001361 /*
1362 * The receiver hangs if it receives frames larger than the
1363 * packet buffer. As a workaround, truncate oversize frames, but
1364 * the register is limited to 9 bits, so if you do frames > 2052
1365 * you better get the MTU right!
1366 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001367 if (thresh > 0x1ff)
1368 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1369 else {
1370 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1371 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1372 }
1373
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001374 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001375 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001376 return 0;
1377nomem:
1378 sky2_rx_clean(sky2);
1379 return -ENOMEM;
1380}
1381
1382/* Bring up network interface. */
1383static int sky2_up(struct net_device *dev)
1384{
1385 struct sky2_port *sky2 = netdev_priv(dev);
1386 struct sky2_hw *hw = sky2->hw;
1387 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001388 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001389 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001390 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001391
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001392 /*
1393 * On dual port PCI-X card, there is an problem where status
1394 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001395 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001396 if (otherdev && netif_running(otherdev) &&
1397 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001398 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001399
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001400 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001401 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001402 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1403
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001404 }
1405
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001406 if (netif_msg_ifup(sky2))
1407 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1408
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001409 netif_carrier_off(dev);
1410
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001411 /* must be power of 2 */
1412 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001413 TX_RING_SIZE *
1414 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001415 &sky2->tx_le_map);
1416 if (!sky2->tx_le)
1417 goto err_out;
1418
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001419 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001420 GFP_KERNEL);
1421 if (!sky2->tx_ring)
1422 goto err_out;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001423
1424 tx_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001425
1426 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1427 &sky2->rx_le_map);
1428 if (!sky2->rx_le)
1429 goto err_out;
1430 memset(sky2->rx_le, 0, RX_LE_BYTES);
1431
Stephen Hemminger291ea612006-09-26 11:57:41 -07001432 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001433 GFP_KERNEL);
1434 if (!sky2->rx_ring)
1435 goto err_out;
1436
1437 sky2_mac_init(hw, port);
1438
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001439 /* Register is number of 4K blocks on internal RAM buffer. */
1440 ramsize = sky2_read8(hw, B2_E_0) * 4;
1441 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001442 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001443
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001444 hw->flags |= SKY2_HW_RAM_BUFFER;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001445 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001446 if (ramsize < 16)
1447 rxspace = ramsize / 2;
1448 else
1449 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001450
Stephen Hemminger67712902006-12-04 15:53:45 -08001451 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1452 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1453
1454 /* Make sure SyncQ is disabled */
1455 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1456 RB_RST_SET);
1457 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001458
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001459 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001460
Stephen Hemminger69161612007-06-04 17:23:26 -07001461 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1462 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1463 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1464
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001465 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001466 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1467 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001468 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001469
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001470 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1471 TX_RING_SIZE - 1);
1472
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001473#ifdef SKY2_VLAN_TAG_USED
1474 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1475#endif
1476
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001477 err = sky2_rx_start(sky2);
Stephen Hemminger6de16232007-10-17 13:26:42 -07001478 if (err)
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001479 goto err_out;
1480
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001481 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001482 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001483 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001484 sky2_write32(hw, B0_IMSK, imask);
1485
Stephen Hemmingera7bffe72008-01-23 19:11:51 -08001486 sky2_set_multicast(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001487 return 0;
1488
1489err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001490 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001491 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1492 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001493 sky2->rx_le = NULL;
1494 }
1495 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001496 pci_free_consistent(hw->pdev,
1497 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1498 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001499 sky2->tx_le = NULL;
1500 }
1501 kfree(sky2->tx_ring);
1502 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001503
Stephen Hemminger1b537562005-12-20 15:08:07 -08001504 sky2->tx_ring = NULL;
1505 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001506 return err;
1507}
1508
Stephen Hemminger793b8832005-09-14 16:06:14 -07001509/* Modular subtraction in ring */
1510static inline int tx_dist(unsigned tail, unsigned head)
1511{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001512 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001513}
1514
1515/* Number of list elements available for next tx */
1516static inline int tx_avail(const struct sky2_port *sky2)
1517{
1518 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1519}
1520
1521/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001522static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001523{
1524 unsigned count;
1525
1526 count = sizeof(dma_addr_t) / sizeof(u32);
1527 count += skb_shinfo(skb)->nr_frags * count;
1528
Herbert Xu89114af2006-07-08 13:34:32 -07001529 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001530 ++count;
1531
Patrick McHardy84fa7932006-08-29 16:44:56 -07001532 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001533 ++count;
1534
1535 return count;
1536}
1537
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001538/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001539 * Put one packet in ring for transmit.
1540 * A single packet can generate multiple list elements, and
1541 * the number of ring elements will probably be less than the number
1542 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001543 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001544static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1545{
1546 struct sky2_port *sky2 = netdev_priv(dev);
1547 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001548 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001549 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001550 unsigned i, len;
1551 dma_addr_t mapping;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001552 u16 mss;
1553 u8 ctrl;
1554
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001555 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1556 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001557
Stephen Hemminger793b8832005-09-14 16:06:14 -07001558 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001559 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1560 dev->name, sky2->tx_prod, skb->len);
1561
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001562 len = skb_headlen(skb);
1563 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001564
Stephen Hemminger86c68872008-01-10 16:14:12 -08001565 /* Send high bits if needed */
1566 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001567 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001568 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001569 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001570 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001571
1572 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001573 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001574 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001575
1576 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001577 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001578
Stephen Hemminger69161612007-06-04 17:23:26 -07001579 if (mss != sky2->tx_last_mss) {
1580 le = get_tx_le(sky2);
1581 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001582
1583 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001584 le->opcode = OP_MSS | HW_OWNER;
1585 else
1586 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001587 sky2->tx_last_mss = mss;
1588 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001589 }
1590
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001591 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001592#ifdef SKY2_VLAN_TAG_USED
1593 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1594 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1595 if (!le) {
1596 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001597 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001598 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001599 } else
1600 le->opcode |= OP_VLAN;
1601 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1602 ctrl |= INS_VLAN;
1603 }
1604#endif
1605
1606 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001607 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001608 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001609 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001610 ctrl |= CALSUM; /* auto checksum */
1611 else {
1612 const unsigned offset = skb_transport_offset(skb);
1613 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001614
Stephen Hemminger69161612007-06-04 17:23:26 -07001615 tcpsum = offset << 16; /* sum start */
1616 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001617
Stephen Hemminger69161612007-06-04 17:23:26 -07001618 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1619 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1620 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001621
Stephen Hemminger69161612007-06-04 17:23:26 -07001622 if (tcpsum != sky2->tx_tcpsum) {
1623 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001624
Stephen Hemminger69161612007-06-04 17:23:26 -07001625 le = get_tx_le(sky2);
1626 le->addr = cpu_to_le32(tcpsum);
1627 le->length = 0; /* initial checksum value */
1628 le->ctrl = 1; /* one packet */
1629 le->opcode = OP_TCPLISW | HW_OWNER;
1630 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001631 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001632 }
1633
1634 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001635 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001636 le->length = cpu_to_le16(len);
1637 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001638 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001639
Stephen Hemminger291ea612006-09-26 11:57:41 -07001640 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001641 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001642 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001643 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001644
1645 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001646 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001647
1648 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1649 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001650
1651 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001652 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001653 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001654 le->ctrl = 0;
1655 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001656 }
1657
1658 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001659 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001660 le->length = cpu_to_le16(frag->size);
1661 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001662 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001663
Stephen Hemminger291ea612006-09-26 11:57:41 -07001664 re = tx_le_re(sky2, le);
1665 re->skb = skb;
1666 pci_unmap_addr_set(re, mapaddr, mapping);
1667 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001668 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001669
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001670 le->ctrl |= EOP;
1671
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001672 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1673 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001674
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001675 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001676
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001677 dev->trans_start = jiffies;
1678 return NETDEV_TX_OK;
1679}
1680
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001681/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001682 * Free ring elements from starting at tx_cons until "done"
1683 *
1684 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001685 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001686 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001687static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001688{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001689 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001690 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001691 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001692
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001693 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001694
Stephen Hemminger291ea612006-09-26 11:57:41 -07001695 for (idx = sky2->tx_cons; idx != done;
1696 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1697 struct sky2_tx_le *le = sky2->tx_le + idx;
1698 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001699
Stephen Hemminger291ea612006-09-26 11:57:41 -07001700 switch(le->opcode & ~HW_OWNER) {
1701 case OP_LARGESEND:
1702 case OP_PACKET:
1703 pci_unmap_single(pdev,
1704 pci_unmap_addr(re, mapaddr),
1705 pci_unmap_len(re, maplen),
1706 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001707 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001708 case OP_BUFFER:
1709 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1710 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001711 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001712 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001713 }
1714
Stephen Hemminger291ea612006-09-26 11:57:41 -07001715 if (le->ctrl & EOP) {
1716 if (unlikely(netif_msg_tx_done(sky2)))
1717 printk(KERN_DEBUG "%s: tx done %u\n",
1718 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001719
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001720 dev->stats.tx_packets++;
1721 dev->stats.tx_bytes += re->skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001722
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001723 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001724 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001725 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001726 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001727
Stephen Hemminger291ea612006-09-26 11:57:41 -07001728 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001729 smp_mb();
1730
Stephen Hemminger22e11702006-07-12 15:23:48 -07001731 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001732 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001733}
1734
1735/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001736static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001737{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001738 struct sky2_port *sky2 = netdev_priv(dev);
1739
1740 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001741 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001742 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001743}
1744
1745/* Network shutdown */
1746static int sky2_down(struct net_device *dev)
1747{
1748 struct sky2_port *sky2 = netdev_priv(dev);
1749 struct sky2_hw *hw = sky2->hw;
1750 unsigned port = sky2->port;
1751 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001752 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001753
Stephen Hemminger1b537562005-12-20 15:08:07 -08001754 /* Never really got started! */
1755 if (!sky2->tx_le)
1756 return 0;
1757
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001758 if (netif_msg_ifdown(sky2))
1759 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1760
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001761 /* Disable port IRQ */
1762 imask = sky2_read32(hw, B0_IMSK);
1763 imask &= ~portirq_msk[port];
1764 sky2_write32(hw, B0_IMSK, imask);
1765
Stephen Hemminger6de16232007-10-17 13:26:42 -07001766 synchronize_irq(hw->pdev->irq);
1767
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001768 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001769
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001770 /* Stop transmitter */
1771 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1772 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1773
1774 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001775 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001776
1777 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001778 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001779 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1780
Stephen Hemminger6de16232007-10-17 13:26:42 -07001781 /* Make sure no packets are pending */
1782 napi_synchronize(&hw->napi);
1783
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001784 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1785
1786 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001787 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1788 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001789 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1790
1791 /* Disable Force Sync bit and Enable Alloc bit */
1792 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1793 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1794
1795 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1796 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1797 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1798
1799 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001800 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1801 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001802
1803 /* Reset the Tx prefetch units */
1804 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1805 PREF_UNIT_RST_SET);
1806
1807 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1808
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001809 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001810
1811 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1812 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1813
Stephen Hemmingerb96936d2008-05-14 17:04:15 -07001814 sky2_phy_power_down(hw, port);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001815
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001816 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001817 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1818
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001819 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001820 sky2_rx_clean(sky2);
1821
1822 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1823 sky2->rx_le, sky2->rx_le_map);
1824 kfree(sky2->rx_ring);
1825
1826 pci_free_consistent(hw->pdev,
1827 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1828 sky2->tx_le, sky2->tx_le_map);
1829 kfree(sky2->tx_ring);
1830
Stephen Hemminger1b537562005-12-20 15:08:07 -08001831 sky2->tx_le = NULL;
1832 sky2->rx_le = NULL;
1833
1834 sky2->rx_ring = NULL;
1835 sky2->tx_ring = NULL;
1836
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001837 return 0;
1838}
1839
1840static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1841{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001842 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001843 return SPEED_1000;
1844
Stephen Hemminger05745c42007-09-19 15:36:45 -07001845 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1846 if (aux & PHY_M_PS_SPEED_100)
1847 return SPEED_100;
1848 else
1849 return SPEED_10;
1850 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001851
1852 switch (aux & PHY_M_PS_SPEED_MSK) {
1853 case PHY_M_PS_SPEED_1000:
1854 return SPEED_1000;
1855 case PHY_M_PS_SPEED_100:
1856 return SPEED_100;
1857 default:
1858 return SPEED_10;
1859 }
1860}
1861
1862static void sky2_link_up(struct sky2_port *sky2)
1863{
1864 struct sky2_hw *hw = sky2->hw;
1865 unsigned port = sky2->port;
1866 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001867 static const char *fc_name[] = {
1868 [FC_NONE] = "none",
1869 [FC_TX] = "tx",
1870 [FC_RX] = "rx",
1871 [FC_BOTH] = "both",
1872 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001873
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001874 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001875 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001876 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1877 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001878
1879 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1880
1881 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001882
Stephen Hemminger75e80682007-09-19 15:36:46 -07001883 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001884
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001885 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001886 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001887 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1888
1889 if (netif_msg_link(sky2))
1890 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001891 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001892 sky2->netdev->name, sky2->speed,
1893 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001894 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001895}
1896
1897static void sky2_link_down(struct sky2_port *sky2)
1898{
1899 struct sky2_hw *hw = sky2->hw;
1900 unsigned port = sky2->port;
1901 u16 reg;
1902
1903 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1904
1905 reg = gma_read16(hw, port, GM_GP_CTRL);
1906 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1907 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001908
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001909 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001910
1911 /* Turn on link LED */
1912 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1913
1914 if (netif_msg_link(sky2))
1915 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001916
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001917 sky2_phy_init(hw, port);
1918}
1919
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001920static enum flow_control sky2_flow(int rx, int tx)
1921{
1922 if (rx)
1923 return tx ? FC_BOTH : FC_RX;
1924 else
1925 return tx ? FC_TX : FC_NONE;
1926}
1927
Stephen Hemminger793b8832005-09-14 16:06:14 -07001928static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1929{
1930 struct sky2_hw *hw = sky2->hw;
1931 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001932 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001933
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001934 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001935 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001936 if (lpa & PHY_M_AN_RF) {
1937 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1938 return -1;
1939 }
1940
Stephen Hemminger793b8832005-09-14 16:06:14 -07001941 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1942 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
1943 sky2->netdev->name);
1944 return -1;
1945 }
1946
Stephen Hemminger793b8832005-09-14 16:06:14 -07001947 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07001948 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001949
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001950 /* Since the pause result bits seem to in different positions on
1951 * different chips. look at registers.
1952 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001953 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001954 /* Shift for bits in fiber PHY */
1955 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
1956 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001957
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001958 if (advert & ADVERTISE_1000XPAUSE)
1959 advert |= ADVERTISE_PAUSE_CAP;
1960 if (advert & ADVERTISE_1000XPSE_ASYM)
1961 advert |= ADVERTISE_PAUSE_ASYM;
1962 if (lpa & LPA_1000XPAUSE)
1963 lpa |= LPA_PAUSE_CAP;
1964 if (lpa & LPA_1000XPAUSE_ASYM)
1965 lpa |= LPA_PAUSE_ASYM;
1966 }
1967
1968 sky2->flow_status = FC_NONE;
1969 if (advert & ADVERTISE_PAUSE_CAP) {
1970 if (lpa & LPA_PAUSE_CAP)
1971 sky2->flow_status = FC_BOTH;
1972 else if (advert & ADVERTISE_PAUSE_ASYM)
1973 sky2->flow_status = FC_RX;
1974 } else if (advert & ADVERTISE_PAUSE_ASYM) {
1975 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
1976 sky2->flow_status = FC_TX;
1977 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001978
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001979 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger93745492007-02-06 10:45:43 -08001980 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001981 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001982
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001983 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001984 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1985 else
1986 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1987
1988 return 0;
1989}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001990
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001991/* Interrupt from PHY */
1992static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001993{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001994 struct net_device *dev = hw->dev[port];
1995 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001996 u16 istatus, phystat;
1997
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001998 if (!netif_running(dev))
1999 return;
2000
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002001 spin_lock(&sky2->phy_lock);
2002 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2003 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2004
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002005 if (netif_msg_intr(sky2))
2006 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
2007 sky2->netdev->name, istatus, phystat);
2008
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002009 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002010 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002011 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002012 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002013 }
2014
Stephen Hemminger793b8832005-09-14 16:06:14 -07002015 if (istatus & PHY_M_IS_LSP_CHANGE)
2016 sky2->speed = sky2_phy_speed(hw, phystat);
2017
2018 if (istatus & PHY_M_IS_DUP_CHANGE)
2019 sky2->duplex =
2020 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2021
2022 if (istatus & PHY_M_IS_LST_CHANGE) {
2023 if (phystat & PHY_M_PS_LINK_UP)
2024 sky2_link_up(sky2);
2025 else
2026 sky2_link_down(sky2);
2027 }
2028out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002029 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002030}
2031
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002032/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002033 * and tx queue is full (stopped).
2034 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002035static void sky2_tx_timeout(struct net_device *dev)
2036{
2037 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002038 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002039
2040 if (netif_msg_timer(sky2))
2041 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
2042
Stephen Hemminger8f246642006-03-20 15:48:21 -08002043 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002044 dev->name, sky2->tx_cons, sky2->tx_prod,
2045 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2046 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002047
Stephen Hemminger81906792007-02-15 16:40:33 -08002048 /* can't restart safely under softirq */
2049 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002050}
2051
2052static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2053{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002054 struct sky2_port *sky2 = netdev_priv(dev);
2055 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002056 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002057 int err;
2058 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002059 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002060
2061 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2062 return -EINVAL;
2063
Stephen Hemminger05745c42007-09-19 15:36:45 -07002064 if (new_mtu > ETH_DATA_LEN &&
2065 (hw->chip_id == CHIP_ID_YUKON_FE ||
2066 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002067 return -EINVAL;
2068
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002069 if (!netif_running(dev)) {
2070 dev->mtu = new_mtu;
2071 return 0;
2072 }
2073
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002074 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002075 sky2_write32(hw, B0_IMSK, 0);
2076
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002077 dev->trans_start = jiffies; /* prevent tx timeout */
2078 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002079 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002080
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002081 synchronize_irq(hw->pdev->irq);
2082
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002083 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002084 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002085
2086 ctl = gma_read16(hw, port, GM_GP_CTRL);
2087 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002088 sky2_rx_stop(sky2);
2089 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002090
2091 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002092
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002093 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2094 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002095
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002096 if (dev->mtu > ETH_DATA_LEN)
2097 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002098
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002099 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002100
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002101 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002102
2103 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002104 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002105
David S. Millerd1d08d12008-01-07 20:53:33 -08002106 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002107 napi_enable(&hw->napi);
2108
Stephen Hemminger1b537562005-12-20 15:08:07 -08002109 if (err)
2110 dev_close(dev);
2111 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002112 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002113
Stephen Hemminger1b537562005-12-20 15:08:07 -08002114 netif_wake_queue(dev);
2115 }
2116
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002117 return err;
2118}
2119
Stephen Hemminger14d02632006-09-26 11:57:43 -07002120/* For small just reuse existing skb for next receive */
2121static struct sk_buff *receive_copy(struct sky2_port *sky2,
2122 const struct rx_ring_info *re,
2123 unsigned length)
2124{
2125 struct sk_buff *skb;
2126
2127 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2128 if (likely(skb)) {
2129 skb_reserve(skb, 2);
2130 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2131 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002132 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002133 skb->ip_summed = re->skb->ip_summed;
2134 skb->csum = re->skb->csum;
2135 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2136 length, PCI_DMA_FROMDEVICE);
2137 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002138 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002139 }
2140 return skb;
2141}
2142
2143/* Adjust length of skb with fragments to match received data */
2144static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2145 unsigned int length)
2146{
2147 int i, num_frags;
2148 unsigned int size;
2149
2150 /* put header into skb */
2151 size = min(length, hdr_space);
2152 skb->tail += size;
2153 skb->len += size;
2154 length -= size;
2155
2156 num_frags = skb_shinfo(skb)->nr_frags;
2157 for (i = 0; i < num_frags; i++) {
2158 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2159
2160 if (length == 0) {
2161 /* don't need this page */
2162 __free_page(frag->page);
2163 --skb_shinfo(skb)->nr_frags;
2164 } else {
2165 size = min(length, (unsigned) PAGE_SIZE);
2166
2167 frag->size = size;
2168 skb->data_len += size;
2169 skb->truesize += size;
2170 skb->len += size;
2171 length -= size;
2172 }
2173 }
2174}
2175
2176/* Normal packet - take skb from ring element and put in a new one */
2177static struct sk_buff *receive_new(struct sky2_port *sky2,
2178 struct rx_ring_info *re,
2179 unsigned int length)
2180{
2181 struct sk_buff *skb, *nskb;
2182 unsigned hdr_space = sky2->rx_data_size;
2183
Stephen Hemminger14d02632006-09-26 11:57:43 -07002184 /* Don't be tricky about reusing pages (yet) */
2185 nskb = sky2_rx_alloc(sky2);
2186 if (unlikely(!nskb))
2187 return NULL;
2188
2189 skb = re->skb;
2190 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2191
2192 prefetch(skb->data);
2193 re->skb = nskb;
2194 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2195
2196 if (skb_shinfo(skb)->nr_frags)
2197 skb_put_frags(skb, hdr_space, length);
2198 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002199 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002200 return skb;
2201}
2202
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002203/*
2204 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002205 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002206 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002207static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002208 u16 length, u32 status)
2209{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002210 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002211 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002212 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002213 u16 count = (status & GMR_FS_LEN) >> 16;
2214
2215#ifdef SKY2_VLAN_TAG_USED
2216 /* Account for vlan tag */
2217 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2218 count -= VLAN_HLEN;
2219#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002220
2221 if (unlikely(netif_msg_rx_status(sky2)))
2222 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002223 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002224
Stephen Hemminger793b8832005-09-14 16:06:14 -07002225 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002226 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002227
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002228 /* This chip has hardware problems that generates bogus status.
2229 * So do only marginal checking and expect higher level protocols
2230 * to handle crap frames.
2231 */
2232 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2233 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2234 length != count)
2235 goto okay;
2236
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002237 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002238 goto error;
2239
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002240 if (!(status & GMR_FS_RX_OK))
2241 goto resubmit;
2242
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002243 /* if length reported by DMA does not match PHY, packet was truncated */
2244 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002245 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002246
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002247okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002248 if (length < copybreak)
2249 skb = receive_copy(sky2, re, length);
2250 else
2251 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002252resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002253 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002254
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002255 return skb;
2256
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002257len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002258 /* Truncation of overlength packets
2259 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002260 ++dev->stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002261 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002262 pr_info(PFX "%s: rx length error: status %#x length %d\n",
2263 dev->name, status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002264 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002265
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002266error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002267 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002268 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002269 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002270 goto resubmit;
2271 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002272
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002273 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002274 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002275 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002276
2277 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002278 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002279 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002280 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002281 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002282 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002283
Stephen Hemminger793b8832005-09-14 16:06:14 -07002284 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002285}
2286
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002287/* Transmit complete */
2288static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002289{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002290 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002291
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002292 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002293 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002294 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002295 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002296 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002297}
2298
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002299/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002300static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002301{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002302 int work_done = 0;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002303 unsigned rx[2] = { 0, 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002304
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002305 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002306 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002307 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002308 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002309 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002310 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002311 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002312 u32 status;
2313 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002314 u8 opcode = le->opcode;
2315
2316 if (!(opcode & HW_OWNER))
2317 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002318
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002319 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002320
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002321 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002322 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002323 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002324 length = le16_to_cpu(le->length);
2325 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002326
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002327 le->opcode = 0;
2328 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002329 case OP_RXSTAT:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002330 ++rx[port];
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002331 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002332 if (unlikely(!skb)) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002333 dev->stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002334 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002335 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002336
Stephen Hemminger69161612007-06-04 17:23:26 -07002337 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002338 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002339 if (sky2->rx_csum &&
2340 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2341 (le->css & CSS_TCPUDPCSOK))
2342 skb->ip_summed = CHECKSUM_UNNECESSARY;
2343 else
2344 skb->ip_summed = CHECKSUM_NONE;
2345 }
2346
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002347 skb->protocol = eth_type_trans(skb, dev);
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002348 dev->stats.rx_packets++;
2349 dev->stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002350 dev->last_rx = jiffies;
2351
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002352#ifdef SKY2_VLAN_TAG_USED
2353 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2354 vlan_hwaccel_receive_skb(skb,
2355 sky2->vlgrp,
2356 be16_to_cpu(sky2->rx_tag));
2357 } else
2358#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002359 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002360
Stephen Hemminger22e11702006-07-12 15:23:48 -07002361 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002362 if (++work_done >= to_do)
2363 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002364 break;
2365
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002366#ifdef SKY2_VLAN_TAG_USED
2367 case OP_RXVLAN:
2368 sky2->rx_tag = length;
2369 break;
2370
2371 case OP_RXCHKSVLAN:
2372 sky2->rx_tag = length;
2373 /* fall through */
2374#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002375 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002376 if (!sky2->rx_csum)
2377 break;
2378
Stephen Hemminger05745c42007-09-19 15:36:45 -07002379 /* If this happens then driver assuming wrong format */
2380 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2381 if (net_ratelimit())
2382 printk(KERN_NOTICE "%s: unexpected"
2383 " checksum status\n",
2384 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002385 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002386 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002387
Stephen Hemminger87418302007-03-08 12:42:30 -08002388 /* Both checksum counters are programmed to start at
2389 * the same offset, so unless there is a problem they
2390 * should match. This failure is an early indication that
2391 * hardware receive checksumming won't work.
2392 */
2393 if (likely(status >> 16 == (status & 0xffff))) {
2394 skb = sky2->rx_ring[sky2->rx_next].skb;
2395 skb->ip_summed = CHECKSUM_COMPLETE;
2396 skb->csum = status & 0xffff;
2397 } else {
2398 printk(KERN_NOTICE PFX "%s: hardware receive "
2399 "checksum problem (status = %#x)\n",
2400 dev->name, status);
2401 sky2->rx_csum = 0;
2402 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002403 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002404 BMU_DIS_RX_CHKSUM);
2405 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002406 break;
2407
2408 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002409 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002410 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2411 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002412 if (hw->dev[1])
2413 sky2_tx_done(hw->dev[1],
2414 ((status >> 24) & 0xff)
2415 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002416 break;
2417
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002418 default:
2419 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002420 printk(KERN_WARNING PFX
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002421 "unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002422 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002423 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002424
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002425 /* Fully processed status ring so clear irq */
2426 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2427
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002428exit_loop:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002429 if (rx[0])
2430 sky2_rx_update(netdev_priv(hw->dev[0]), Q_R1);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002431
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002432 if (rx[1])
2433 sky2_rx_update(netdev_priv(hw->dev[1]), Q_R2);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002434
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002435 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002436}
2437
2438static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2439{
2440 struct net_device *dev = hw->dev[port];
2441
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002442 if (net_ratelimit())
2443 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2444 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002445
2446 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002447 if (net_ratelimit())
2448 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2449 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002450 /* Clear IRQ */
2451 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2452 }
2453
2454 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002455 if (net_ratelimit())
2456 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2457 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002458
2459 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2460 }
2461
2462 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002463 if (net_ratelimit())
2464 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002465 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2466 }
2467
2468 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002469 if (net_ratelimit())
2470 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002471 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2472 }
2473
2474 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002475 if (net_ratelimit())
2476 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2477 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002478 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2479 }
2480}
2481
2482static void sky2_hw_intr(struct sky2_hw *hw)
2483{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002484 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002485 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002486 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2487
2488 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002489
Stephen Hemminger793b8832005-09-14 16:06:14 -07002490 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002491 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002492
2493 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002494 u16 pci_err;
2495
Stephen Hemminger82637e82008-01-23 19:16:04 -08002496 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002497 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002498 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002499 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002500 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002501
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002502 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002503 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002504 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002505 }
2506
2507 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002508 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002509 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002510
Stephen Hemminger82637e82008-01-23 19:16:04 -08002511 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002512 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2513 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2514 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002515 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002516 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002517
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002518 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002519 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002520 }
2521
2522 if (status & Y2_HWE_L1_MASK)
2523 sky2_hw_error(hw, 0, status);
2524 status >>= 8;
2525 if (status & Y2_HWE_L1_MASK)
2526 sky2_hw_error(hw, 1, status);
2527}
2528
2529static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2530{
2531 struct net_device *dev = hw->dev[port];
2532 struct sky2_port *sky2 = netdev_priv(dev);
2533 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2534
2535 if (netif_msg_intr(sky2))
2536 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2537 dev->name, status);
2538
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002539 if (status & GM_IS_RX_CO_OV)
2540 gma_read16(hw, port, GM_RX_IRQ_SRC);
2541
2542 if (status & GM_IS_TX_CO_OV)
2543 gma_read16(hw, port, GM_TX_IRQ_SRC);
2544
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002545 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002546 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002547 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2548 }
2549
2550 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002551 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002552 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2553 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002554}
2555
Stephen Hemminger40b01722007-04-11 14:47:59 -07002556/* This should never happen it is a bug. */
2557static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2558 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002559{
2560 struct net_device *dev = hw->dev[port];
2561 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002562 unsigned idx;
2563 const u64 *le = (q == Q_R1 || q == Q_R2)
2564 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002565
Stephen Hemminger40b01722007-04-11 14:47:59 -07002566 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2567 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2568 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2569 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002570
Stephen Hemminger40b01722007-04-11 14:47:59 -07002571 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002572}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002573
Stephen Hemminger75e80682007-09-19 15:36:46 -07002574static int sky2_rx_hung(struct net_device *dev)
2575{
2576 struct sky2_port *sky2 = netdev_priv(dev);
2577 struct sky2_hw *hw = sky2->hw;
2578 unsigned port = sky2->port;
2579 unsigned rxq = rxqaddr[port];
2580 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2581 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2582 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2583 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2584
2585 /* If idle and MAC or PCI is stuck */
2586 if (sky2->check.last == dev->last_rx &&
2587 ((mac_rp == sky2->check.mac_rp &&
2588 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2589 /* Check if the PCI RX hang */
2590 (fifo_rp == sky2->check.fifo_rp &&
2591 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2592 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2593 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2594 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2595 return 1;
2596 } else {
2597 sky2->check.last = dev->last_rx;
2598 sky2->check.mac_rp = mac_rp;
2599 sky2->check.mac_lev = mac_lev;
2600 sky2->check.fifo_rp = fifo_rp;
2601 sky2->check.fifo_lev = fifo_lev;
2602 return 0;
2603 }
2604}
2605
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002606static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002607{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002608 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002609
Stephen Hemminger75e80682007-09-19 15:36:46 -07002610 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002611 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002612 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002613 } else {
2614 int i, active = 0;
2615
2616 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002617 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002618 if (!netif_running(dev))
2619 continue;
2620 ++active;
2621
2622 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002623 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002624 sky2_rx_hung(dev)) {
2625 pr_info(PFX "%s: receiver hang detected\n",
2626 dev->name);
2627 schedule_work(&hw->restart_work);
2628 return;
2629 }
2630 }
2631
2632 if (active == 0)
2633 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002634 }
2635
Stephen Hemminger75e80682007-09-19 15:36:46 -07002636 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002637}
2638
Stephen Hemminger40b01722007-04-11 14:47:59 -07002639/* Hardware/software error handling */
2640static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002641{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002642 if (net_ratelimit())
2643 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002644
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002645 if (status & Y2_IS_HW_ERR)
2646 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002647
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002648 if (status & Y2_IS_IRQ_MAC1)
2649 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002650
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002651 if (status & Y2_IS_IRQ_MAC2)
2652 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002653
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002654 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002655 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002656
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002657 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002658 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002659
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002660 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002661 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002662
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002663 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002664 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2665}
2666
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002667static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002668{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002669 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002670 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002671 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002672 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002673
2674 if (unlikely(status & Y2_IS_ERROR))
2675 sky2_err_intr(hw, status);
2676
2677 if (status & Y2_IS_IRQ_PHY1)
2678 sky2_phy_intr(hw, 0);
2679
2680 if (status & Y2_IS_IRQ_PHY2)
2681 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002682
Stephen Hemminger26691832007-10-11 18:31:13 -07002683 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2684 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002685
David S. Miller6f535762007-10-11 18:08:29 -07002686 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002687 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002688 }
David S. Miller6f535762007-10-11 18:08:29 -07002689
Stephen Hemminger26691832007-10-11 18:31:13 -07002690 /* Bug/Errata workaround?
2691 * Need to kick the TX irq moderation timer.
2692 */
2693 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2694 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2695 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2696 }
2697 napi_complete(napi);
2698 sky2_read32(hw, B0_Y2_SP_LISR);
2699done:
2700
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002701 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002702}
2703
David Howells7d12e782006-10-05 14:55:46 +01002704static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002705{
2706 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002707 u32 status;
2708
2709 /* Reading this mask interrupts as side effect */
2710 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2711 if (status == 0 || status == ~0)
2712 return IRQ_NONE;
2713
2714 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002715
2716 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002717
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002718 return IRQ_HANDLED;
2719}
2720
2721#ifdef CONFIG_NET_POLL_CONTROLLER
2722static void sky2_netpoll(struct net_device *dev)
2723{
2724 struct sky2_port *sky2 = netdev_priv(dev);
2725
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002726 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002727}
2728#endif
2729
2730/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002731static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002732{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002733 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002734 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002735 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002736 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002737 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002738 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002739 return 125;
2740
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002741 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002742 return 100;
2743
2744 case CHIP_ID_YUKON_FE_P:
2745 return 50;
2746
2747 case CHIP_ID_YUKON_XL:
2748 return 156;
2749
2750 default:
2751 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002752 }
2753}
2754
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002755static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2756{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002757 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002758}
2759
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002760static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2761{
2762 return clk / sky2_mhz(hw);
2763}
2764
2765
Stephen Hemmingere3173832007-02-06 10:45:39 -08002766static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002767{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002768 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002769
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002770 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002771 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002772
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002773 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002774
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002775 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002776 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2777
2778 switch(hw->chip_id) {
2779 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002780 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002781 break;
2782
2783 case CHIP_ID_YUKON_EC_U:
2784 hw->flags = SKY2_HW_GIGABIT
2785 | SKY2_HW_NEWER_PHY
2786 | SKY2_HW_ADV_POWER_CTL;
2787 break;
2788
2789 case CHIP_ID_YUKON_EX:
2790 hw->flags = SKY2_HW_GIGABIT
2791 | SKY2_HW_NEWER_PHY
2792 | SKY2_HW_NEW_LE
2793 | SKY2_HW_ADV_POWER_CTL;
2794
2795 /* New transmit checksum */
2796 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2797 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2798 break;
2799
2800 case CHIP_ID_YUKON_EC:
2801 /* This rev is really old, and requires untested workarounds */
2802 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2803 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2804 return -EOPNOTSUPP;
2805 }
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002806 hw->flags = SKY2_HW_GIGABIT;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002807 break;
2808
2809 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002810 break;
2811
Stephen Hemminger05745c42007-09-19 15:36:45 -07002812 case CHIP_ID_YUKON_FE_P:
2813 hw->flags = SKY2_HW_NEWER_PHY
2814 | SKY2_HW_NEW_LE
2815 | SKY2_HW_AUTO_TX_SUM
2816 | SKY2_HW_ADV_POWER_CTL;
2817 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002818
2819 case CHIP_ID_YUKON_SUPR:
2820 hw->flags = SKY2_HW_GIGABIT
2821 | SKY2_HW_NEWER_PHY
2822 | SKY2_HW_NEW_LE
2823 | SKY2_HW_AUTO_TX_SUM
2824 | SKY2_HW_ADV_POWER_CTL;
2825 break;
2826
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002827 case CHIP_ID_YUKON_UL_2:
2828 hw->flags = SKY2_HW_GIGABIT
2829 | SKY2_HW_ADV_POWER_CTL;
2830 break;
2831
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002832 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002833 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2834 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002835 return -EOPNOTSUPP;
2836 }
2837
Stephen Hemmingere3173832007-02-06 10:45:39 -08002838 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002839 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2840 hw->flags |= SKY2_HW_FIBRE_PHY;
2841
Stephen Hemmingere3173832007-02-06 10:45:39 -08002842 hw->ports = 1;
2843 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2844 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2845 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2846 ++hw->ports;
2847 }
2848
2849 return 0;
2850}
2851
2852static void sky2_reset(struct sky2_hw *hw)
2853{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002854 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002855 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07002856 int i, cap;
2857 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002858
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002859 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002860 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2861 status = sky2_read16(hw, HCU_CCSR);
2862 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2863 HCU_CCSR_UC_STATE_MSK);
2864 sky2_write16(hw, HCU_CCSR, status);
2865 } else
2866 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2867 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002868
2869 /* do a SW reset */
2870 sky2_write8(hw, B0_CTST, CS_RST_SET);
2871 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2872
Stephen Hemmingerac93a392007-11-05 15:52:08 -08002873 /* allow writes to PCI config */
2874 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2875
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002876 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002877 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002878 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002879 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002880
2881 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2882
Stephen Hemminger555382c2007-08-29 12:58:14 -07002883 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2884 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002885 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2886 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002887
Stephen Hemminger555382c2007-08-29 12:58:14 -07002888 /* If error bit is stuck on ignore it */
2889 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
2890 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002891 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07002892 hwe_mask |= Y2_IS_PCI_EXP;
2893 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002894
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002895 sky2_power_on(hw);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002896 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002897
2898 for (i = 0; i < hw->ports; i++) {
2899 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2900 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002901
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002902 if (hw->chip_id == CHIP_ID_YUKON_EX ||
2903 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07002904 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2905 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2906 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002907 }
2908
Stephen Hemminger793b8832005-09-14 16:06:14 -07002909 /* Clear I2C IRQ noise */
2910 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002911
2912 /* turn off hardware timer (unused) */
2913 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2914 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002915
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002916 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2917
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002918 /* Turn off descriptor polling */
2919 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002920
2921 /* Turn off receive timestamp */
2922 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002923 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002924
2925 /* enable the Tx Arbiters */
2926 for (i = 0; i < hw->ports; i++)
2927 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2928
2929 /* Initialize ram interface */
2930 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002931 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002932
2933 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2934 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2935 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2936 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
2937 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
2938 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
2939 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
2940 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
2941 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
2942 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
2943 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
2944 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2945 }
2946
Stephen Hemminger555382c2007-08-29 12:58:14 -07002947 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002948
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002949 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002950 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002951
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002952 memset(hw->st_le, 0, STATUS_LE_BYTES);
2953 hw->st_idx = 0;
2954
2955 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
2956 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
2957
2958 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002959 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002960
2961 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002962 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002963
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002964 sky2_write16(hw, STAT_TX_IDX_TH, 10);
2965 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002966
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002967 /* set Status-FIFO ISR watermark */
2968 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2969 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
2970 else
2971 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002972
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002973 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08002974 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2975 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002976
Stephen Hemminger793b8832005-09-14 16:06:14 -07002977 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002978 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
2979
2980 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2981 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
2982 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08002983}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002984
Stephen Hemminger81906792007-02-15 16:40:33 -08002985static void sky2_restart(struct work_struct *work)
2986{
2987 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
2988 struct net_device *dev;
2989 int i, err;
2990
Stephen Hemminger81906792007-02-15 16:40:33 -08002991 rtnl_lock();
Stephen Hemminger81906792007-02-15 16:40:33 -08002992 for (i = 0; i < hw->ports; i++) {
2993 dev = hw->dev[i];
2994 if (netif_running(dev))
2995 sky2_down(dev);
2996 }
2997
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08002998 napi_disable(&hw->napi);
2999 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger81906792007-02-15 16:40:33 -08003000 sky2_reset(hw);
3001 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07003002 napi_enable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003003
3004 for (i = 0; i < hw->ports; i++) {
3005 dev = hw->dev[i];
3006 if (netif_running(dev)) {
3007 err = sky2_up(dev);
3008 if (err) {
3009 printk(KERN_INFO PFX "%s: could not restart %d\n",
3010 dev->name, err);
3011 dev_close(dev);
3012 }
3013 }
3014 }
3015
Stephen Hemminger81906792007-02-15 16:40:33 -08003016 rtnl_unlock();
3017}
3018
Stephen Hemmingere3173832007-02-06 10:45:39 -08003019static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3020{
3021 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3022}
3023
3024static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3025{
3026 const struct sky2_port *sky2 = netdev_priv(dev);
3027
3028 wol->supported = sky2_wol_supported(sky2->hw);
3029 wol->wolopts = sky2->wol;
3030}
3031
3032static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3033{
3034 struct sky2_port *sky2 = netdev_priv(dev);
3035 struct sky2_hw *hw = sky2->hw;
3036
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07003037 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw))
3038 || !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003039 return -EOPNOTSUPP;
3040
3041 sky2->wol = wol->wolopts;
3042
Stephen Hemminger05745c42007-09-19 15:36:45 -07003043 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3044 hw->chip_id == CHIP_ID_YUKON_EX ||
3045 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08003046 sky2_write32(hw, B0_CTST, sky2->wol
3047 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
3048
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07003049 device_set_wakeup_enable(&hw->pdev->dev, sky2->wol);
3050
Stephen Hemmingere3173832007-02-06 10:45:39 -08003051 if (!netif_running(dev))
3052 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003053 return 0;
3054}
3055
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003056static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003057{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003058 if (sky2_is_copper(hw)) {
3059 u32 modes = SUPPORTED_10baseT_Half
3060 | SUPPORTED_10baseT_Full
3061 | SUPPORTED_100baseT_Half
3062 | SUPPORTED_100baseT_Full
3063 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003064
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003065 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003066 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003067 | SUPPORTED_1000baseT_Full;
3068 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003069 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003070 return SUPPORTED_1000baseT_Half
3071 | SUPPORTED_1000baseT_Full
3072 | SUPPORTED_Autoneg
3073 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003074}
3075
Stephen Hemminger793b8832005-09-14 16:06:14 -07003076static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003077{
3078 struct sky2_port *sky2 = netdev_priv(dev);
3079 struct sky2_hw *hw = sky2->hw;
3080
3081 ecmd->transceiver = XCVR_INTERNAL;
3082 ecmd->supported = sky2_supported_modes(hw);
3083 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003084 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003085 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003086 ecmd->speed = sky2->speed;
3087 } else {
3088 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003089 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003090 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003091
3092 ecmd->advertising = sky2->advertising;
3093 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003094 ecmd->duplex = sky2->duplex;
3095 return 0;
3096}
3097
3098static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3099{
3100 struct sky2_port *sky2 = netdev_priv(dev);
3101 const struct sky2_hw *hw = sky2->hw;
3102 u32 supported = sky2_supported_modes(hw);
3103
3104 if (ecmd->autoneg == AUTONEG_ENABLE) {
3105 ecmd->advertising = supported;
3106 sky2->duplex = -1;
3107 sky2->speed = -1;
3108 } else {
3109 u32 setting;
3110
Stephen Hemminger793b8832005-09-14 16:06:14 -07003111 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003112 case SPEED_1000:
3113 if (ecmd->duplex == DUPLEX_FULL)
3114 setting = SUPPORTED_1000baseT_Full;
3115 else if (ecmd->duplex == DUPLEX_HALF)
3116 setting = SUPPORTED_1000baseT_Half;
3117 else
3118 return -EINVAL;
3119 break;
3120 case SPEED_100:
3121 if (ecmd->duplex == DUPLEX_FULL)
3122 setting = SUPPORTED_100baseT_Full;
3123 else if (ecmd->duplex == DUPLEX_HALF)
3124 setting = SUPPORTED_100baseT_Half;
3125 else
3126 return -EINVAL;
3127 break;
3128
3129 case SPEED_10:
3130 if (ecmd->duplex == DUPLEX_FULL)
3131 setting = SUPPORTED_10baseT_Full;
3132 else if (ecmd->duplex == DUPLEX_HALF)
3133 setting = SUPPORTED_10baseT_Half;
3134 else
3135 return -EINVAL;
3136 break;
3137 default:
3138 return -EINVAL;
3139 }
3140
3141 if ((setting & supported) == 0)
3142 return -EINVAL;
3143
3144 sky2->speed = ecmd->speed;
3145 sky2->duplex = ecmd->duplex;
3146 }
3147
3148 sky2->autoneg = ecmd->autoneg;
3149 sky2->advertising = ecmd->advertising;
3150
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003151 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003152 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003153 sky2_set_multicast(dev);
3154 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003155
3156 return 0;
3157}
3158
3159static void sky2_get_drvinfo(struct net_device *dev,
3160 struct ethtool_drvinfo *info)
3161{
3162 struct sky2_port *sky2 = netdev_priv(dev);
3163
3164 strcpy(info->driver, DRV_NAME);
3165 strcpy(info->version, DRV_VERSION);
3166 strcpy(info->fw_version, "N/A");
3167 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3168}
3169
3170static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003171 char name[ETH_GSTRING_LEN];
3172 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003173} sky2_stats[] = {
3174 { "tx_bytes", GM_TXO_OK_HI },
3175 { "rx_bytes", GM_RXO_OK_HI },
3176 { "tx_broadcast", GM_TXF_BC_OK },
3177 { "rx_broadcast", GM_RXF_BC_OK },
3178 { "tx_multicast", GM_TXF_MC_OK },
3179 { "rx_multicast", GM_RXF_MC_OK },
3180 { "tx_unicast", GM_TXF_UC_OK },
3181 { "rx_unicast", GM_RXF_UC_OK },
3182 { "tx_mac_pause", GM_TXF_MPAUSE },
3183 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003184 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003185 { "late_collision",GM_TXF_LAT_COL },
3186 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003187 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003188 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003189
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003190 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003191 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003192 { "rx_64_byte_packets", GM_RXF_64B },
3193 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3194 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3195 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3196 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3197 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3198 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003199 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003200 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3201 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003202 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003203
3204 { "tx_64_byte_packets", GM_TXF_64B },
3205 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3206 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3207 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3208 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3209 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3210 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3211 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003212};
3213
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003214static u32 sky2_get_rx_csum(struct net_device *dev)
3215{
3216 struct sky2_port *sky2 = netdev_priv(dev);
3217
3218 return sky2->rx_csum;
3219}
3220
3221static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3222{
3223 struct sky2_port *sky2 = netdev_priv(dev);
3224
3225 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003226
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003227 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3228 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3229
3230 return 0;
3231}
3232
3233static u32 sky2_get_msglevel(struct net_device *netdev)
3234{
3235 struct sky2_port *sky2 = netdev_priv(netdev);
3236 return sky2->msg_enable;
3237}
3238
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003239static int sky2_nway_reset(struct net_device *dev)
3240{
3241 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003242
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003243 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003244 return -EINVAL;
3245
Stephen Hemminger1b537562005-12-20 15:08:07 -08003246 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003247 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003248
3249 return 0;
3250}
3251
Stephen Hemminger793b8832005-09-14 16:06:14 -07003252static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003253{
3254 struct sky2_hw *hw = sky2->hw;
3255 unsigned port = sky2->port;
3256 int i;
3257
3258 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003259 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003260 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003261 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003262
Stephen Hemminger793b8832005-09-14 16:06:14 -07003263 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003264 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3265}
3266
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003267static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3268{
3269 struct sky2_port *sky2 = netdev_priv(netdev);
3270 sky2->msg_enable = value;
3271}
3272
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003273static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003274{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003275 switch (sset) {
3276 case ETH_SS_STATS:
3277 return ARRAY_SIZE(sky2_stats);
3278 default:
3279 return -EOPNOTSUPP;
3280 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003281}
3282
3283static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003284 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003285{
3286 struct sky2_port *sky2 = netdev_priv(dev);
3287
Stephen Hemminger793b8832005-09-14 16:06:14 -07003288 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003289}
3290
Stephen Hemminger793b8832005-09-14 16:06:14 -07003291static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003292{
3293 int i;
3294
3295 switch (stringset) {
3296 case ETH_SS_STATS:
3297 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3298 memcpy(data + i * ETH_GSTRING_LEN,
3299 sky2_stats[i].name, ETH_GSTRING_LEN);
3300 break;
3301 }
3302}
3303
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003304static int sky2_set_mac_address(struct net_device *dev, void *p)
3305{
3306 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003307 struct sky2_hw *hw = sky2->hw;
3308 unsigned port = sky2->port;
3309 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003310
3311 if (!is_valid_ether_addr(addr->sa_data))
3312 return -EADDRNOTAVAIL;
3313
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003314 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003315 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003316 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003317 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003318 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003319
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003320 /* virtual address for data */
3321 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3322
3323 /* physical address: used for pause frames */
3324 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003325
3326 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003327}
3328
Stephen Hemmingera052b522006-10-17 10:24:23 -07003329static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3330{
3331 u32 bit;
3332
3333 bit = ether_crc(ETH_ALEN, addr) & 63;
3334 filter[bit >> 3] |= 1 << (bit & 7);
3335}
3336
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003337static void sky2_set_multicast(struct net_device *dev)
3338{
3339 struct sky2_port *sky2 = netdev_priv(dev);
3340 struct sky2_hw *hw = sky2->hw;
3341 unsigned port = sky2->port;
3342 struct dev_mc_list *list = dev->mc_list;
3343 u16 reg;
3344 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003345 int rx_pause;
3346 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003347
Stephen Hemmingera052b522006-10-17 10:24:23 -07003348 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003349 memset(filter, 0, sizeof(filter));
3350
3351 reg = gma_read16(hw, port, GM_RX_CTRL);
3352 reg |= GM_RXCR_UCF_ENA;
3353
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003354 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003355 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003356 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003357 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003358 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003359 reg &= ~GM_RXCR_MCF_ENA;
3360 else {
3361 int i;
3362 reg |= GM_RXCR_MCF_ENA;
3363
Stephen Hemmingera052b522006-10-17 10:24:23 -07003364 if (rx_pause)
3365 sky2_add_filter(filter, pause_mc_addr);
3366
3367 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3368 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003369 }
3370
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003371 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003372 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003373 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003374 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003375 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003376 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003377 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003378 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003379
3380 gma_write16(hw, port, GM_RX_CTRL, reg);
3381}
3382
3383/* Can have one global because blinking is controlled by
3384 * ethtool and that is always under RTNL mutex
3385 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003386static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003387{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003388 struct sky2_hw *hw = sky2->hw;
3389 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003391 spin_lock_bh(&sky2->phy_lock);
3392 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3393 hw->chip_id == CHIP_ID_YUKON_EX ||
3394 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3395 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003396 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3397 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003398
3399 switch (mode) {
3400 case MO_LED_OFF:
3401 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3402 PHY_M_LEDC_LOS_CTRL(8) |
3403 PHY_M_LEDC_INIT_CTRL(8) |
3404 PHY_M_LEDC_STA1_CTRL(8) |
3405 PHY_M_LEDC_STA0_CTRL(8));
3406 break;
3407 case MO_LED_ON:
3408 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3409 PHY_M_LEDC_LOS_CTRL(9) |
3410 PHY_M_LEDC_INIT_CTRL(9) |
3411 PHY_M_LEDC_STA1_CTRL(9) |
3412 PHY_M_LEDC_STA0_CTRL(9));
3413 break;
3414 case MO_LED_BLINK:
3415 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3416 PHY_M_LEDC_LOS_CTRL(0xa) |
3417 PHY_M_LEDC_INIT_CTRL(0xa) |
3418 PHY_M_LEDC_STA1_CTRL(0xa) |
3419 PHY_M_LEDC_STA0_CTRL(0xa));
3420 break;
3421 case MO_LED_NORM:
3422 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3423 PHY_M_LEDC_LOS_CTRL(1) |
3424 PHY_M_LEDC_INIT_CTRL(8) |
3425 PHY_M_LEDC_STA1_CTRL(7) |
3426 PHY_M_LEDC_STA0_CTRL(7));
3427 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003428
3429 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003430 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003431 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003432 PHY_M_LED_MO_DUP(mode) |
3433 PHY_M_LED_MO_10(mode) |
3434 PHY_M_LED_MO_100(mode) |
3435 PHY_M_LED_MO_1000(mode) |
3436 PHY_M_LED_MO_RX(mode) |
3437 PHY_M_LED_MO_TX(mode));
3438
3439 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003440}
3441
3442/* blink LED's for finding board */
3443static int sky2_phys_id(struct net_device *dev, u32 data)
3444{
3445 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003446 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003447
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003448 if (data == 0)
3449 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003450
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003451 for (i = 0; i < data; i++) {
3452 sky2_led(sky2, MO_LED_ON);
3453 if (msleep_interruptible(500))
3454 break;
3455 sky2_led(sky2, MO_LED_OFF);
3456 if (msleep_interruptible(500))
3457 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003458 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003459 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003460
3461 return 0;
3462}
3463
3464static void sky2_get_pauseparam(struct net_device *dev,
3465 struct ethtool_pauseparam *ecmd)
3466{
3467 struct sky2_port *sky2 = netdev_priv(dev);
3468
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003469 switch (sky2->flow_mode) {
3470 case FC_NONE:
3471 ecmd->tx_pause = ecmd->rx_pause = 0;
3472 break;
3473 case FC_TX:
3474 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3475 break;
3476 case FC_RX:
3477 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3478 break;
3479 case FC_BOTH:
3480 ecmd->tx_pause = ecmd->rx_pause = 1;
3481 }
3482
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003483 ecmd->autoneg = sky2->autoneg;
3484}
3485
3486static int sky2_set_pauseparam(struct net_device *dev,
3487 struct ethtool_pauseparam *ecmd)
3488{
3489 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003490
3491 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003492 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003493
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003494 if (netif_running(dev))
3495 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003496
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003497 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003498}
3499
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003500static int sky2_get_coalesce(struct net_device *dev,
3501 struct ethtool_coalesce *ecmd)
3502{
3503 struct sky2_port *sky2 = netdev_priv(dev);
3504 struct sky2_hw *hw = sky2->hw;
3505
3506 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3507 ecmd->tx_coalesce_usecs = 0;
3508 else {
3509 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3510 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3511 }
3512 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3513
3514 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3515 ecmd->rx_coalesce_usecs = 0;
3516 else {
3517 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3518 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3519 }
3520 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3521
3522 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3523 ecmd->rx_coalesce_usecs_irq = 0;
3524 else {
3525 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3526 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3527 }
3528
3529 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3530
3531 return 0;
3532}
3533
3534/* Note: this affect both ports */
3535static int sky2_set_coalesce(struct net_device *dev,
3536 struct ethtool_coalesce *ecmd)
3537{
3538 struct sky2_port *sky2 = netdev_priv(dev);
3539 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003540 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003541
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003542 if (ecmd->tx_coalesce_usecs > tmax ||
3543 ecmd->rx_coalesce_usecs > tmax ||
3544 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003545 return -EINVAL;
3546
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003547 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003548 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003549 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003550 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003551 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003552 return -EINVAL;
3553
3554 if (ecmd->tx_coalesce_usecs == 0)
3555 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3556 else {
3557 sky2_write32(hw, STAT_TX_TIMER_INI,
3558 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3559 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3560 }
3561 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3562
3563 if (ecmd->rx_coalesce_usecs == 0)
3564 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3565 else {
3566 sky2_write32(hw, STAT_LEV_TIMER_INI,
3567 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3568 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3569 }
3570 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3571
3572 if (ecmd->rx_coalesce_usecs_irq == 0)
3573 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3574 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003575 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003576 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3577 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3578 }
3579 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3580 return 0;
3581}
3582
Stephen Hemminger793b8832005-09-14 16:06:14 -07003583static void sky2_get_ringparam(struct net_device *dev,
3584 struct ethtool_ringparam *ering)
3585{
3586 struct sky2_port *sky2 = netdev_priv(dev);
3587
3588 ering->rx_max_pending = RX_MAX_PENDING;
3589 ering->rx_mini_max_pending = 0;
3590 ering->rx_jumbo_max_pending = 0;
3591 ering->tx_max_pending = TX_RING_SIZE - 1;
3592
3593 ering->rx_pending = sky2->rx_pending;
3594 ering->rx_mini_pending = 0;
3595 ering->rx_jumbo_pending = 0;
3596 ering->tx_pending = sky2->tx_pending;
3597}
3598
3599static int sky2_set_ringparam(struct net_device *dev,
3600 struct ethtool_ringparam *ering)
3601{
3602 struct sky2_port *sky2 = netdev_priv(dev);
3603 int err = 0;
3604
3605 if (ering->rx_pending > RX_MAX_PENDING ||
3606 ering->rx_pending < 8 ||
3607 ering->tx_pending < MAX_SKB_TX_LE ||
3608 ering->tx_pending > TX_RING_SIZE - 1)
3609 return -EINVAL;
3610
3611 if (netif_running(dev))
3612 sky2_down(dev);
3613
3614 sky2->rx_pending = ering->rx_pending;
3615 sky2->tx_pending = ering->tx_pending;
3616
Stephen Hemminger1b537562005-12-20 15:08:07 -08003617 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003618 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003619 if (err)
3620 dev_close(dev);
3621 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003622
3623 return err;
3624}
3625
Stephen Hemminger793b8832005-09-14 16:06:14 -07003626static int sky2_get_regs_len(struct net_device *dev)
3627{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003628 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003629}
3630
3631/*
3632 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003633 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003634 */
3635static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3636 void *p)
3637{
3638 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003639 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003640 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003641
3642 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003643
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003644 for (b = 0; b < 128; b++) {
3645 /* This complicated switch statement is to make sure and
3646 * only access regions that are unreserved.
3647 * Some blocks are only valid on dual port cards.
3648 * and block 3 has some special diagnostic registers that
3649 * are poison.
3650 */
3651 switch (b) {
3652 case 3:
3653 /* skip diagnostic ram region */
3654 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
3655 break;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003656
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003657 /* dual port cards only */
3658 case 5: /* Tx Arbiter 2 */
3659 case 9: /* RX2 */
3660 case 14 ... 15: /* TX2 */
3661 case 17: case 19: /* Ram Buffer 2 */
3662 case 22 ... 23: /* Tx Ram Buffer 2 */
3663 case 25: /* Rx MAC Fifo 1 */
3664 case 27: /* Tx MAC Fifo 2 */
3665 case 31: /* GPHY 2 */
3666 case 40 ... 47: /* Pattern Ram 2 */
3667 case 52: case 54: /* TCP Segmentation 2 */
3668 case 112 ... 116: /* GMAC 2 */
3669 if (sky2->hw->ports == 1)
3670 goto reserved;
3671 /* fall through */
3672 case 0: /* Control */
3673 case 2: /* Mac address */
3674 case 4: /* Tx Arbiter 1 */
3675 case 7: /* PCI express reg */
3676 case 8: /* RX1 */
3677 case 12 ... 13: /* TX1 */
3678 case 16: case 18:/* Rx Ram Buffer 1 */
3679 case 20 ... 21: /* Tx Ram Buffer 1 */
3680 case 24: /* Rx MAC Fifo 1 */
3681 case 26: /* Tx MAC Fifo 1 */
3682 case 28 ... 29: /* Descriptor and status unit */
3683 case 30: /* GPHY 1*/
3684 case 32 ... 39: /* Pattern Ram 1 */
3685 case 48: case 50: /* TCP Segmentation 1 */
3686 case 56 ... 60: /* PCI space */
3687 case 80 ... 84: /* GMAC 1 */
3688 memcpy_fromio(p, io, 128);
3689 break;
3690 default:
3691reserved:
3692 memset(p, 0, 128);
3693 }
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003694
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003695 p += 128;
3696 io += 128;
3697 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003698}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003699
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003700/* In order to do Jumbo packets on these chips, need to turn off the
3701 * transmit store/forward. Therefore checksum offload won't work.
3702 */
3703static int no_tx_offload(struct net_device *dev)
3704{
3705 const struct sky2_port *sky2 = netdev_priv(dev);
3706 const struct sky2_hw *hw = sky2->hw;
3707
Stephen Hemminger69161612007-06-04 17:23:26 -07003708 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003709}
3710
3711static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3712{
3713 if (data && no_tx_offload(dev))
3714 return -EINVAL;
3715
3716 return ethtool_op_set_tx_csum(dev, data);
3717}
3718
3719
3720static int sky2_set_tso(struct net_device *dev, u32 data)
3721{
3722 if (data && no_tx_offload(dev))
3723 return -EINVAL;
3724
3725 return ethtool_op_set_tso(dev, data);
3726}
3727
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003728static int sky2_get_eeprom_len(struct net_device *dev)
3729{
3730 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003731 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003732 u16 reg2;
3733
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003734 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003735 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3736}
3737
Stephen Hemminger14132352008-08-27 20:46:26 -07003738static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003739{
Stephen Hemminger14132352008-08-27 20:46:26 -07003740 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003741
Stephen Hemminger14132352008-08-27 20:46:26 -07003742 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
3743 /* Can take up to 10.6 ms for write */
3744 if (time_after(jiffies, start + HZ/4)) {
3745 dev_err(&hw->pdev->dev, PFX "VPD cycle timed out");
3746 return -ETIMEDOUT;
3747 }
3748 mdelay(1);
3749 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003750
Stephen Hemminger14132352008-08-27 20:46:26 -07003751 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003752}
3753
Stephen Hemminger14132352008-08-27 20:46:26 -07003754static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
3755 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003756{
Stephen Hemminger14132352008-08-27 20:46:26 -07003757 int rc = 0;
3758
3759 while (length > 0) {
3760 u32 val;
3761
3762 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
3763 rc = sky2_vpd_wait(hw, cap, 0);
3764 if (rc)
3765 break;
3766
3767 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
3768
3769 memcpy(data, &val, min(sizeof(val), length));
3770 offset += sizeof(u32);
3771 data += sizeof(u32);
3772 length -= sizeof(u32);
3773 }
3774
3775 return rc;
3776}
3777
3778static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
3779 u16 offset, unsigned int length)
3780{
3781 unsigned int i;
3782 int rc = 0;
3783
3784 for (i = 0; i < length; i += sizeof(u32)) {
3785 u32 val = *(u32 *)(data + i);
3786
3787 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
3788 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
3789
3790 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
3791 if (rc)
3792 break;
3793 }
3794 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003795}
3796
3797static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3798 u8 *data)
3799{
3800 struct sky2_port *sky2 = netdev_priv(dev);
3801 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003802
3803 if (!cap)
3804 return -EINVAL;
3805
3806 eeprom->magic = SKY2_EEPROM_MAGIC;
3807
Stephen Hemminger14132352008-08-27 20:46:26 -07003808 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003809}
3810
3811static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3812 u8 *data)
3813{
3814 struct sky2_port *sky2 = netdev_priv(dev);
3815 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003816
3817 if (!cap)
3818 return -EINVAL;
3819
3820 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3821 return -EINVAL;
3822
Stephen Hemminger14132352008-08-27 20:46:26 -07003823 /* Partial writes not supported */
3824 if ((eeprom->offset & 3) || (eeprom->len & 3))
3825 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003826
Stephen Hemminger14132352008-08-27 20:46:26 -07003827 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003828}
3829
3830
Jeff Garzik7282d492006-09-13 14:30:00 -04003831static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003832 .get_settings = sky2_get_settings,
3833 .set_settings = sky2_set_settings,
3834 .get_drvinfo = sky2_get_drvinfo,
3835 .get_wol = sky2_get_wol,
3836 .set_wol = sky2_set_wol,
3837 .get_msglevel = sky2_get_msglevel,
3838 .set_msglevel = sky2_set_msglevel,
3839 .nway_reset = sky2_nway_reset,
3840 .get_regs_len = sky2_get_regs_len,
3841 .get_regs = sky2_get_regs,
3842 .get_link = ethtool_op_get_link,
3843 .get_eeprom_len = sky2_get_eeprom_len,
3844 .get_eeprom = sky2_get_eeprom,
3845 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003846 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003847 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003848 .set_tso = sky2_set_tso,
3849 .get_rx_csum = sky2_get_rx_csum,
3850 .set_rx_csum = sky2_set_rx_csum,
3851 .get_strings = sky2_get_strings,
3852 .get_coalesce = sky2_get_coalesce,
3853 .set_coalesce = sky2_set_coalesce,
3854 .get_ringparam = sky2_get_ringparam,
3855 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003856 .get_pauseparam = sky2_get_pauseparam,
3857 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003858 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003859 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003860 .get_ethtool_stats = sky2_get_ethtool_stats,
3861};
3862
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003863#ifdef CONFIG_SKY2_DEBUG
3864
3865static struct dentry *sky2_debug;
3866
3867static int sky2_debug_show(struct seq_file *seq, void *v)
3868{
3869 struct net_device *dev = seq->private;
3870 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003871 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003872 unsigned port = sky2->port;
3873 unsigned idx, last;
3874 int sop;
3875
3876 if (!netif_running(dev))
3877 return -ENETDOWN;
3878
3879 seq_printf(seq, "IRQ src=%x mask=%x control=%x\n",
3880 sky2_read32(hw, B0_ISRC),
3881 sky2_read32(hw, B0_IMSK),
3882 sky2_read32(hw, B0_Y2_SP_ICR));
3883
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003884 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003885 last = sky2_read16(hw, STAT_PUT_IDX);
3886
3887 if (hw->st_idx == last)
3888 seq_puts(seq, "Status ring (empty)\n");
3889 else {
3890 seq_puts(seq, "Status ring\n");
3891 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
3892 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
3893 const struct sky2_status_le *le = hw->st_le + idx;
3894 seq_printf(seq, "[%d] %#x %d %#x\n",
3895 idx, le->opcode, le->length, le->status);
3896 }
3897 seq_puts(seq, "\n");
3898 }
3899
3900 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
3901 sky2->tx_cons, sky2->tx_prod,
3902 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
3903 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
3904
3905 /* Dump contents of tx ring */
3906 sop = 1;
3907 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
3908 idx = RING_NEXT(idx, TX_RING_SIZE)) {
3909 const struct sky2_tx_le *le = sky2->tx_le + idx;
3910 u32 a = le32_to_cpu(le->addr);
3911
3912 if (sop)
3913 seq_printf(seq, "%u:", idx);
3914 sop = 0;
3915
3916 switch(le->opcode & ~HW_OWNER) {
3917 case OP_ADDR64:
3918 seq_printf(seq, " %#x:", a);
3919 break;
3920 case OP_LRGLEN:
3921 seq_printf(seq, " mtu=%d", a);
3922 break;
3923 case OP_VLAN:
3924 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
3925 break;
3926 case OP_TCPLISW:
3927 seq_printf(seq, " csum=%#x", a);
3928 break;
3929 case OP_LARGESEND:
3930 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
3931 break;
3932 case OP_PACKET:
3933 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
3934 break;
3935 case OP_BUFFER:
3936 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
3937 break;
3938 default:
3939 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
3940 a, le16_to_cpu(le->length));
3941 }
3942
3943 if (le->ctrl & EOP) {
3944 seq_putc(seq, '\n');
3945 sop = 1;
3946 }
3947 }
3948
3949 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
3950 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
3951 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
3952 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
3953
David S. Millerd1d08d12008-01-07 20:53:33 -08003954 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003955 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003956 return 0;
3957}
3958
3959static int sky2_debug_open(struct inode *inode, struct file *file)
3960{
3961 return single_open(file, sky2_debug_show, inode->i_private);
3962}
3963
3964static const struct file_operations sky2_debug_fops = {
3965 .owner = THIS_MODULE,
3966 .open = sky2_debug_open,
3967 .read = seq_read,
3968 .llseek = seq_lseek,
3969 .release = single_release,
3970};
3971
3972/*
3973 * Use network device events to create/remove/rename
3974 * debugfs file entries
3975 */
3976static int sky2_device_event(struct notifier_block *unused,
3977 unsigned long event, void *ptr)
3978{
3979 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003980 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003981
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003982 if (dev->open != sky2_up || !sky2_debug)
3983 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003984
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003985 switch(event) {
3986 case NETDEV_CHANGENAME:
3987 if (sky2->debugfs) {
3988 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
3989 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003990 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003991 break;
3992
3993 case NETDEV_GOING_DOWN:
3994 if (sky2->debugfs) {
3995 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
3996 dev->name);
3997 debugfs_remove(sky2->debugfs);
3998 sky2->debugfs = NULL;
3999 }
4000 break;
4001
4002 case NETDEV_UP:
4003 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4004 sky2_debug, dev,
4005 &sky2_debug_fops);
4006 if (IS_ERR(sky2->debugfs))
4007 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004008 }
4009
4010 return NOTIFY_DONE;
4011}
4012
4013static struct notifier_block sky2_notifier = {
4014 .notifier_call = sky2_device_event,
4015};
4016
4017
4018static __init void sky2_debug_init(void)
4019{
4020 struct dentry *ent;
4021
4022 ent = debugfs_create_dir("sky2", NULL);
4023 if (!ent || IS_ERR(ent))
4024 return;
4025
4026 sky2_debug = ent;
4027 register_netdevice_notifier(&sky2_notifier);
4028}
4029
4030static __exit void sky2_debug_cleanup(void)
4031{
4032 if (sky2_debug) {
4033 unregister_netdevice_notifier(&sky2_notifier);
4034 debugfs_remove(sky2_debug);
4035 sky2_debug = NULL;
4036 }
4037}
4038
4039#else
4040#define sky2_debug_init()
4041#define sky2_debug_cleanup()
4042#endif
4043
4044
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004045/* Initialize network device */
4046static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004047 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004048 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004049{
4050 struct sky2_port *sky2;
4051 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4052
4053 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004054 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004055 return NULL;
4056 }
4057
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004058 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004059 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004060 dev->open = sky2_up;
4061 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004062 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004063 dev->hard_start_xmit = sky2_xmit_frame;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004064 dev->set_multicast_list = sky2_set_multicast;
4065 dev->set_mac_address = sky2_set_mac_address;
4066 dev->change_mtu = sky2_change_mtu;
4067 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
4068 dev->tx_timeout = sky2_tx_timeout;
4069 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004070#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemmingera5e68c02007-11-06 11:45:40 -08004071 if (port == 0)
4072 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004073#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004074
4075 sky2 = netdev_priv(dev);
4076 sky2->netdev = dev;
4077 sky2->hw = hw;
4078 sky2->msg_enable = netif_msg_init(debug, default_msg);
4079
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004080 /* Auto speed and flow control */
4081 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004082 sky2->flow_mode = FC_BOTH;
4083
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004084 sky2->duplex = -1;
4085 sky2->speed = -1;
4086 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemminger8b31cfb2007-11-21 14:55:26 -08004087 sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004088 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004089
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004090 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004091 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004092 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004093
4094 hw->dev[port] = dev;
4095
4096 sky2->port = port;
4097
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004098 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004099 if (highmem)
4100 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004101
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004102#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004103 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4104 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4105 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4106 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4107 dev->vlan_rx_register = sky2_vlan_rx_register;
4108 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004109#endif
4110
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004111 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004112 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004113 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004114
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004115 return dev;
4116}
4117
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004118static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004119{
4120 const struct sky2_port *sky2 = netdev_priv(dev);
Joe Perches0795af52007-10-03 17:59:30 -07004121 DECLARE_MAC_BUF(mac);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004122
4123 if (netif_msg_probe(sky2))
Joe Perches0795af52007-10-03 17:59:30 -07004124 printk(KERN_INFO PFX "%s: addr %s\n",
4125 dev->name, print_mac(mac, dev->dev_addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004126}
4127
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004128/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004129static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004130{
4131 struct sky2_hw *hw = dev_id;
4132 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4133
4134 if (status == 0)
4135 return IRQ_NONE;
4136
4137 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004138 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004139 wake_up(&hw->msi_wait);
4140 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4141 }
4142 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4143
4144 return IRQ_HANDLED;
4145}
4146
4147/* Test interrupt path by forcing a a software IRQ */
4148static int __devinit sky2_test_msi(struct sky2_hw *hw)
4149{
4150 struct pci_dev *pdev = hw->pdev;
4151 int err;
4152
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004153 init_waitqueue_head (&hw->msi_wait);
4154
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004155 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4156
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004157 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004158 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004159 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004160 return err;
4161 }
4162
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004163 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004164 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004165
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004166 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004167
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004168 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004169 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004170 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4171 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004172
4173 err = -EOPNOTSUPP;
4174 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4175 }
4176
4177 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004178 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004179
4180 free_irq(pdev->irq, hw);
4181
4182 return err;
4183}
4184
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004185/*
4186 * Read and parse the first part of Vital Product Data
4187 */
4188#define VPD_SIZE 128
4189#define VPD_MAGIC 0x82
4190
4191static void __devinit sky2_vpd_info(struct sky2_hw *hw)
4192{
4193 int cap = pci_find_capability(hw->pdev, PCI_CAP_ID_VPD);
4194 const u8 *p;
4195 u8 *vpd_buf = NULL;
4196 u16 len;
4197 static struct vpd_tag {
4198 char tag[2];
4199 char *label;
4200 } vpd_tags[] = {
4201 { "PN", "Part Number" },
4202 { "EC", "Engineering Level" },
4203 { "MN", "Manufacturer" },
4204 };
4205
4206 if (!cap)
4207 goto out;
4208
4209 vpd_buf = kmalloc(VPD_SIZE, GFP_KERNEL);
4210 if (!vpd_buf)
4211 goto out;
4212
4213 if (sky2_vpd_read(hw, cap, vpd_buf, 0, VPD_SIZE))
4214 goto out;
4215
4216 if (vpd_buf[0] != VPD_MAGIC)
4217 goto out;
4218 len = vpd_buf[1];
4219 if (len == 0 || len > VPD_SIZE - 4)
4220 goto out;
4221 p = vpd_buf + 3;
4222 dev_info(&hw->pdev->dev, "%.*s\n", len, p);
4223 p += len;
4224
4225 while (p < vpd_buf + VPD_SIZE - 4) {
4226 int i;
4227
4228 if (!memcmp("RW", p, 2)) /* end marker */
4229 break;
4230
4231 len = p[2];
4232 if (len > (p - vpd_buf) - 4)
4233 break;
4234
4235 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4236 if (!memcmp(vpd_tags[i].tag, p, 2)) {
4237 printk(KERN_DEBUG " %s: %.*s\n",
4238 vpd_tags[i].label, len, p + 3);
4239 break;
4240 }
4241 }
4242 p += len + 3;
4243 }
4244out:
4245 kfree(vpd_buf);
4246}
4247
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004248/* This driver supports yukon2 chipset only */
4249static const char *sky2_name(u8 chipid, char *buf, int sz)
4250{
4251 const char *name[] = {
4252 "XL", /* 0xb3 */
4253 "EC Ultra", /* 0xb4 */
4254 "Extreme", /* 0xb5 */
4255 "EC", /* 0xb6 */
4256 "FE", /* 0xb7 */
4257 "FE+", /* 0xb8 */
4258 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004259 "UL 2", /* 0xba */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004260 };
4261
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004262 if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004263 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4264 else
4265 snprintf(buf, sz, "(chip %#x)", chipid);
4266 return buf;
4267}
4268
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004269static int __devinit sky2_probe(struct pci_dev *pdev,
4270 const struct pci_device_id *ent)
4271{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004272 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004273 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004274 int err, using_dac = 0, wol_default;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004275 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004276
Stephen Hemminger793b8832005-09-14 16:06:14 -07004277 err = pci_enable_device(pdev);
4278 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004279 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004280 goto err_out;
4281 }
4282
Stephen Hemminger793b8832005-09-14 16:06:14 -07004283 err = pci_request_regions(pdev, DRV_NAME);
4284 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004285 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004286 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004287 }
4288
4289 pci_set_master(pdev);
4290
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004291 if (sizeof(dma_addr_t) > sizeof(u32) &&
4292 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
4293 using_dac = 1;
4294 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4295 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004296 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4297 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004298 goto err_out_free_regions;
4299 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004300 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004301 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4302 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004303 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004304 goto err_out_free_regions;
4305 }
4306 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004307
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004308 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004309
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004310 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004311 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004312 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004313 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004314 goto err_out_free_regions;
4315 }
4316
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004317 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004318
4319 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4320 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004321 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004322 goto err_out_free_hw;
4323 }
4324
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004325#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004326 /* The sk98lin vendor driver uses hardware byte swapping but
4327 * this driver uses software swapping.
4328 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004329 {
4330 u32 reg;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004331 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004332 reg &= ~PCI_REV_DESC;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004333 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004334 }
4335#endif
4336
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004337 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004338 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004339 if (!hw->st_le)
4340 goto err_out_iounmap;
4341
Stephen Hemmingere3173832007-02-06 10:45:39 -08004342 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004343 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004344 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004345
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004346 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4347 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004348
Stephen Hemmingere3173832007-02-06 10:45:39 -08004349 sky2_reset(hw);
4350
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004351 sky2_vpd_info(hw);
4352
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004353 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004354 if (!dev) {
4355 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004356 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004357 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004358
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004359 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4360 err = sky2_test_msi(hw);
4361 if (err == -EOPNOTSUPP)
4362 pci_disable_msi(pdev);
4363 else if (err)
4364 goto err_out_free_netdev;
4365 }
4366
Stephen Hemminger793b8832005-09-14 16:06:14 -07004367 err = register_netdev(dev);
4368 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004369 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004370 goto err_out_free_netdev;
4371 }
4372
Stephen Hemminger6de16232007-10-17 13:26:42 -07004373 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4374
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004375 err = request_irq(pdev->irq, sky2_intr,
4376 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004377 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004378 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004379 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004380 goto err_out_unregister;
4381 }
4382 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004383 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004384
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004385 sky2_show_addr(dev);
4386
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004387 if (hw->ports > 1) {
4388 struct net_device *dev1;
4389
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004390 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004391 if (!dev1)
4392 dev_warn(&pdev->dev, "allocation for second device failed\n");
4393 else if ((err = register_netdev(dev1))) {
4394 dev_warn(&pdev->dev,
4395 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004396 hw->dev[1] = NULL;
4397 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004398 } else
4399 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004400 }
4401
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004402 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004403 INIT_WORK(&hw->restart_work, sky2_restart);
4404
Stephen Hemminger793b8832005-09-14 16:06:14 -07004405 pci_set_drvdata(pdev, hw);
4406
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004407 return 0;
4408
Stephen Hemminger793b8832005-09-14 16:06:14 -07004409err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004410 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004411 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004412 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004413err_out_free_netdev:
4414 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004415err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004416 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004417 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004418err_out_iounmap:
4419 iounmap(hw->regs);
4420err_out_free_hw:
4421 kfree(hw);
4422err_out_free_regions:
4423 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004424err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004425 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004426err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004427 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004428 return err;
4429}
4430
4431static void __devexit sky2_remove(struct pci_dev *pdev)
4432{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004433 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004434 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004435
Stephen Hemminger793b8832005-09-14 16:06:14 -07004436 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004437 return;
4438
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004439 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004440 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004441
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004442 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004443 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004444
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004445 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004446
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004447 sky2_power_aux(hw);
4448
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004449 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004450 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004451 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004452
4453 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004454 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004455 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004456 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004457 pci_release_regions(pdev);
4458 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004459
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004460 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004461 free_netdev(hw->dev[i]);
4462
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004463 iounmap(hw->regs);
4464 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004465
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004466 pci_set_drvdata(pdev, NULL);
4467}
4468
4469#ifdef CONFIG_PM
4470static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4471{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004472 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004473 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004474
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004475 if (!hw)
4476 return 0;
4477
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004478 del_timer_sync(&hw->watchdog_timer);
4479 cancel_work_sync(&hw->restart_work);
4480
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004481 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004482 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004483 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004484
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004485 netif_device_detach(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004486 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004487 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004488
4489 if (sky2->wol)
4490 sky2_wol_init(sky2);
4491
4492 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004493 }
4494
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004495 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004496 napi_disable(&hw->napi);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004497 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004498
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004499 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004500 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004501 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004502
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004503 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004504}
4505
4506static int sky2_resume(struct pci_dev *pdev)
4507{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004508 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004509 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004510
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004511 if (!hw)
4512 return 0;
4513
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004514 err = pci_set_power_state(pdev, PCI_D0);
4515 if (err)
4516 goto out;
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004517
4518 err = pci_restore_state(pdev);
4519 if (err)
4520 goto out;
4521
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004522 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004523
4524 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004525 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4526 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4527 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004528 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004529
Stephen Hemmingere3173832007-02-06 10:45:39 -08004530 sky2_reset(hw);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004531 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004532 napi_enable(&hw->napi);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004533
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004534 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004535 struct net_device *dev = hw->dev[i];
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004536
4537 netif_device_attach(dev);
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004538 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004539 err = sky2_up(dev);
4540 if (err) {
4541 printk(KERN_ERR PFX "%s: could not up: %d\n",
4542 dev->name, err);
Ben Hutchings68c28892008-05-31 16:52:52 +01004543 rtnl_lock();
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004544 dev_close(dev);
Ben Hutchings68c28892008-05-31 16:52:52 +01004545 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004546 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004547 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004548 }
4549 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004550
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004551 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004552out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004553 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004554 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004555 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004556}
4557#endif
4558
Stephen Hemmingere3173832007-02-06 10:45:39 -08004559static void sky2_shutdown(struct pci_dev *pdev)
4560{
4561 struct sky2_hw *hw = pci_get_drvdata(pdev);
4562 int i, wol = 0;
4563
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004564 if (!hw)
4565 return;
4566
Stephen Hemminger5c0d6b32007-10-14 13:25:22 -07004567 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004568
4569 for (i = 0; i < hw->ports; i++) {
4570 struct net_device *dev = hw->dev[i];
4571 struct sky2_port *sky2 = netdev_priv(dev);
4572
4573 if (sky2->wol) {
4574 wol = 1;
4575 sky2_wol_init(sky2);
4576 }
4577 }
4578
4579 if (wol)
4580 sky2_power_aux(hw);
4581
4582 pci_enable_wake(pdev, PCI_D3hot, wol);
4583 pci_enable_wake(pdev, PCI_D3cold, wol);
4584
4585 pci_disable_device(pdev);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004586 pci_set_power_state(pdev, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004587}
4588
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004589static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004590 .name = DRV_NAME,
4591 .id_table = sky2_id_table,
4592 .probe = sky2_probe,
4593 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004594#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004595 .suspend = sky2_suspend,
4596 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004597#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004598 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004599};
4600
4601static int __init sky2_init_module(void)
4602{
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004603 pr_info(PFX "driver version " DRV_VERSION "\n");
4604
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004605 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004606 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004607}
4608
4609static void __exit sky2_cleanup_module(void)
4610{
4611 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004612 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004613}
4614
4615module_init(sky2_init_module);
4616module_exit(sky2_cleanup_module);
4617
4618MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004619MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004620MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004621MODULE_VERSION(DRV_VERSION);