Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * Driver for Solarflare Solarstorm network controllers and boards |
Ben Hutchings | 906bb26 | 2009-11-29 15:16:19 +0000 | [diff] [blame] | 3 | * Copyright 2006-2009 Solarflare Communications Inc. |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | /* |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 10 | * Driver for AMCC QT202x SFP+ and XFP adapters; see www.amcc.com for details |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <linux/timer.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include "efx.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 16 | #include "mdio_10g.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 17 | #include "phy.h" |
Ben Hutchings | 744093c | 2009-11-29 15:12:08 +0000 | [diff] [blame] | 18 | #include "nic.h" |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 19 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 20 | #define QT202X_REQUIRED_DEVS (MDIO_DEVS_PCS | \ |
| 21 | MDIO_DEVS_PMAPMD | \ |
| 22 | MDIO_DEVS_PHYXS) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 23 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 24 | #define QT202X_LOOPBACKS ((1 << LOOPBACK_PCS) | \ |
| 25 | (1 << LOOPBACK_PMAPMD) | \ |
Ben Hutchings | e58f69f | 2009-11-29 15:08:41 +0000 | [diff] [blame] | 26 | (1 << LOOPBACK_PHYXS_WS)) |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 27 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 28 | /****************************************************************************/ |
| 29 | /* Quake-specific MDIO registers */ |
| 30 | #define MDIO_QUAKE_LED0_REG (0xD006) |
| 31 | |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 32 | /* QT2025C only */ |
| 33 | #define PCS_FW_HEARTBEAT_REG 0xd7ee |
| 34 | #define PCS_FW_HEARTB_LBN 0 |
| 35 | #define PCS_FW_HEARTB_WIDTH 8 |
| 36 | #define PCS_UC8051_STATUS_REG 0xd7fd |
| 37 | #define PCS_UC_STATUS_LBN 0 |
| 38 | #define PCS_UC_STATUS_WIDTH 8 |
| 39 | #define PCS_UC_STATUS_FW_SAVE 0x20 |
| 40 | #define PMA_PMD_FTX_CTRL2_REG 0xc309 |
| 41 | #define PMA_PMD_FTX_STATIC_LBN 13 |
| 42 | #define PMA_PMD_VEND1_REG 0xc001 |
| 43 | #define PMA_PMD_VEND1_LBTXD_LBN 15 |
| 44 | #define PCS_VEND1_REG 0xc000 |
| 45 | #define PCS_VEND1_LBTXD_LBN 5 |
| 46 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 47 | void falcon_qt202x_set_led(struct efx_nic *p, int led, int mode) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 48 | { |
| 49 | int addr = MDIO_QUAKE_LED0_REG + led; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 50 | efx_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 51 | } |
| 52 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 53 | struct qt202x_phy_data { |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 54 | enum efx_phy_mode phy_mode; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 55 | }; |
| 56 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 57 | #define QT2022C2_MAX_RESET_TIME 500 |
| 58 | #define QT2022C2_RESET_WAIT 10 |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 59 | |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 60 | static int qt2025c_wait_reset(struct efx_nic *efx) |
| 61 | { |
| 62 | unsigned long timeout = jiffies + 10 * HZ; |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 63 | int reg, old_counter = 0; |
| 64 | |
| 65 | /* Wait for firmware heartbeat to start */ |
| 66 | for (;;) { |
| 67 | int counter; |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 68 | reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG); |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 69 | if (reg < 0) |
| 70 | return reg; |
| 71 | counter = ((reg >> PCS_FW_HEARTB_LBN) & |
| 72 | ((1 << PCS_FW_HEARTB_WIDTH) - 1)); |
| 73 | if (old_counter == 0) |
| 74 | old_counter = counter; |
| 75 | else if (counter != old_counter) |
| 76 | break; |
| 77 | if (time_after(jiffies, timeout)) |
| 78 | return -ETIMEDOUT; |
| 79 | msleep(10); |
| 80 | } |
| 81 | |
| 82 | /* Wait for firmware status to look good */ |
| 83 | for (;;) { |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 84 | reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG); |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 85 | if (reg < 0) |
| 86 | return reg; |
| 87 | if ((reg & |
| 88 | ((1 << PCS_UC_STATUS_WIDTH) - 1) << PCS_UC_STATUS_LBN) >= |
| 89 | PCS_UC_STATUS_FW_SAVE) |
| 90 | break; |
| 91 | if (time_after(jiffies, timeout)) |
| 92 | return -ETIMEDOUT; |
| 93 | msleep(100); |
| 94 | } |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 99 | static int qt202x_reset_phy(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 100 | { |
| 101 | int rc; |
| 102 | |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 103 | if (efx->phy_type == PHY_TYPE_QT2025C) { |
Ben Hutchings | 5afaa75 | 2009-08-26 08:17:19 +0000 | [diff] [blame] | 104 | /* Wait for the reset triggered by falcon_reset_hw() |
| 105 | * to complete */ |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 106 | rc = qt2025c_wait_reset(efx); |
| 107 | if (rc < 0) |
| 108 | goto fail; |
Ben Hutchings | 5afaa75 | 2009-08-26 08:17:19 +0000 | [diff] [blame] | 109 | } else { |
| 110 | /* Reset the PHYXS MMD. This is documented as doing |
| 111 | * a complete soft reset. */ |
| 112 | rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS, |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 113 | QT2022C2_MAX_RESET_TIME / |
| 114 | QT2022C2_RESET_WAIT, |
| 115 | QT2022C2_RESET_WAIT); |
Ben Hutchings | 5afaa75 | 2009-08-26 08:17:19 +0000 | [diff] [blame] | 116 | if (rc < 0) |
| 117 | goto fail; |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 118 | } |
| 119 | |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 120 | /* Wait 250ms for the PHY to complete bootup */ |
| 121 | msleep(250); |
| 122 | |
| 123 | /* Check that all the MMDs we expect are present and responding. We |
| 124 | * expect faults on some if the link is down, but not on the PHY XS */ |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 125 | rc = efx_mdio_check_mmds(efx, QT202X_REQUIRED_DEVS, MDIO_DEVS_PHYXS); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 126 | if (rc < 0) |
| 127 | goto fail; |
| 128 | |
Ben Hutchings | 44838a4 | 2009-11-25 16:09:41 +0000 | [diff] [blame] | 129 | falcon_board(efx)->type->init_phy(efx); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 130 | |
| 131 | return rc; |
| 132 | |
| 133 | fail: |
Ben Hutchings | f794fd4 | 2009-02-27 13:06:58 +0000 | [diff] [blame] | 134 | EFX_ERR(efx, "PHY reset timed out\n"); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 135 | return rc; |
| 136 | } |
| 137 | |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 138 | static int qt202x_phy_probe(struct efx_nic *efx) |
| 139 | { |
| 140 | efx->mdio.mmds = QT202X_REQUIRED_DEVS; |
| 141 | efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; |
| 142 | efx->loopback_modes = QT202X_LOOPBACKS | FALCON_XMAC_LOOPBACKS; |
| 143 | return 0; |
| 144 | } |
| 145 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 146 | static int qt202x_phy_init(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 147 | { |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 148 | struct qt202x_phy_data *phy_data; |
Steve Hodgson | 47c3d19 | 2009-11-28 05:34:29 +0000 | [diff] [blame] | 149 | u32 devid; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 150 | int rc; |
| 151 | |
Steve Hodgson | 47c3d19 | 2009-11-28 05:34:29 +0000 | [diff] [blame] | 152 | rc = qt202x_reset_phy(efx); |
| 153 | if (rc) { |
| 154 | EFX_ERR(efx, "PHY init failed\n"); |
| 155 | return rc; |
| 156 | } |
| 157 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 158 | phy_data = kzalloc(sizeof(struct qt202x_phy_data), GFP_KERNEL); |
Ben Hutchings | 9b7bfc4 | 2008-05-16 21:20:20 +0100 | [diff] [blame] | 159 | if (!phy_data) |
| 160 | return -ENOMEM; |
Ben Hutchings | d3208b5 | 2008-05-16 21:20:00 +0100 | [diff] [blame] | 161 | efx->phy_data = phy_data; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 162 | |
Steve Hodgson | 47c3d19 | 2009-11-28 05:34:29 +0000 | [diff] [blame] | 163 | devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS); |
Ben Hutchings | 3f39a5e | 2009-02-27 13:07:15 +0000 | [diff] [blame] | 164 | EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n", |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 165 | devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid), |
| 166 | efx_mdio_id_rev(devid)); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 167 | |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 168 | phy_data->phy_mode = efx->phy_mode; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 169 | return 0; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 170 | } |
| 171 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 172 | static int qt202x_link_ok(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 173 | { |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 174 | return efx_mdio_links_ok(efx, QT202X_REQUIRED_DEVS); |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 175 | } |
| 176 | |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 177 | static bool qt202x_phy_poll(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 178 | { |
Steve Hodgson | fdaa9ae | 2009-11-28 05:34:05 +0000 | [diff] [blame] | 179 | bool was_up = efx->link_state.up; |
| 180 | |
| 181 | efx->link_state.up = qt202x_link_ok(efx); |
| 182 | efx->link_state.speed = 10000; |
| 183 | efx->link_state.fd = true; |
| 184 | efx->link_state.fc = efx->wanted_fc; |
| 185 | |
| 186 | return efx->link_state.up != was_up; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 187 | } |
| 188 | |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 189 | static int qt202x_phy_reconfigure(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 190 | { |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 191 | struct qt202x_phy_data *phy_data = efx->phy_data; |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 192 | |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 193 | if (efx->phy_type == PHY_TYPE_QT2025C) { |
| 194 | /* There are several different register bits which can |
| 195 | * disable TX (and save power) on direct-attach cables |
| 196 | * or optical transceivers, varying somewhat between |
| 197 | * firmware versions. Only 'static mode' appears to |
| 198 | * cover everything. */ |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 199 | mdio_set_flag( |
| 200 | &efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD, |
| 201 | PMA_PMD_FTX_CTRL2_REG, 1 << PMA_PMD_FTX_STATIC_LBN, |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 202 | efx->phy_mode & PHY_MODE_TX_DISABLED || |
| 203 | efx->phy_mode & PHY_MODE_LOW_POWER || |
| 204 | efx->loopback_mode == LOOPBACK_PCS || |
| 205 | efx->loopback_mode == LOOPBACK_PMAPMD); |
| 206 | } else { |
| 207 | /* Reset the PHY when moving from tx off to tx on */ |
| 208 | if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) && |
| 209 | (phy_data->phy_mode & PHY_MODE_TX_DISABLED)) |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 210 | qt202x_reset_phy(efx); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 211 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 212 | efx_mdio_transmit_disable(efx); |
Ben Hutchings | d2d2c37 | 2009-02-27 13:07:33 +0000 | [diff] [blame] | 213 | } |
| 214 | |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 215 | efx_mdio_phy_reconfigure(efx); |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 216 | |
Ben Hutchings | f8b87c1 | 2008-09-01 12:48:17 +0100 | [diff] [blame] | 217 | phy_data->phy_mode = efx->phy_mode; |
Ben Hutchings | d3245b2 | 2009-11-29 03:42:41 +0000 | [diff] [blame] | 218 | |
| 219 | return 0; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 220 | } |
| 221 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 222 | static void qt202x_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 223 | { |
| 224 | mdio45_ethtool_gset(&efx->mdio, ecmd); |
| 225 | } |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 226 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 227 | static void qt202x_phy_fini(struct efx_nic *efx) |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 228 | { |
Ben Hutchings | 3273c2e | 2008-05-07 13:36:19 +0100 | [diff] [blame] | 229 | /* Free the context block */ |
| 230 | kfree(efx->phy_data); |
| 231 | efx->phy_data = NULL; |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 232 | } |
| 233 | |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 234 | struct efx_phy_operations falcon_qt202x_phy_ops = { |
Ben Hutchings | c1c4f45 | 2009-11-29 15:08:55 +0000 | [diff] [blame] | 235 | .probe = qt202x_phy_probe, |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 236 | .init = qt202x_phy_init, |
| 237 | .reconfigure = qt202x_phy_reconfigure, |
| 238 | .poll = qt202x_phy_poll, |
| 239 | .fini = qt202x_phy_fini, |
Ben Hutchings | b37b62f | 2009-10-23 08:33:42 +0000 | [diff] [blame] | 240 | .get_settings = qt202x_phy_get_settings, |
Ben Hutchings | 68e7f45 | 2009-04-29 08:05:08 +0000 | [diff] [blame] | 241 | .set_settings = efx_mdio_set_settings, |
Ben Hutchings | 8ceee66 | 2008-04-27 12:55:59 +0100 | [diff] [blame] | 242 | }; |