Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sata_nv.c - NVIDIA nForce SATA |
| 3 | * |
| 4 | * Copyright 2004 NVIDIA Corp. All rights reserved. |
| 5 | * Copyright 2004 Andrew Chew |
| 6 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
Jeff Garzik | aa7e16d | 2005-08-29 15:12:56 -0400 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2, or (at your option) |
| 11 | * any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; see the file COPYING. If not, write to |
| 20 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 22 | * |
| 23 | * libata documentation is available via 'make {ps|pdf}docs', |
| 24 | * as Documentation/DocBook/libata.* |
| 25 | * |
| 26 | * No hardware documentation available outside of NVIDIA. |
| 27 | * This driver programs the NVIDIA SATA controller in a similar |
| 28 | * fashion as with other PCI IDE BMDMA controllers, with a few |
| 29 | * NV-specific details such as register offsets, SATA phy location, |
| 30 | * hotplug info, etc. |
| 31 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | */ |
| 33 | |
| 34 | #include <linux/config.h> |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/module.h> |
| 37 | #include <linux/pci.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/blkdev.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/interrupt.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 42 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #include <scsi/scsi_host.h> |
| 44 | #include <linux/libata.h> |
| 45 | |
| 46 | #define DRV_NAME "sata_nv" |
Jeff Garzik | af64371 | 2006-04-02 20:41:36 -0400 | [diff] [blame] | 47 | #define DRV_VERSION "0.9" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 49 | enum { |
| 50 | NV_PORTS = 2, |
| 51 | NV_PIO_MASK = 0x1f, |
| 52 | NV_MWDMA_MASK = 0x07, |
| 53 | NV_UDMA_MASK = 0x7f, |
| 54 | NV_PORT0_SCR_REG_OFFSET = 0x00, |
| 55 | NV_PORT1_SCR_REG_OFFSET = 0x40, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | |
Tejun Heo | 27e4b27 | 2006-06-17 15:49:55 +0900 | [diff] [blame^] | 57 | /* INT_STATUS/ENABLE */ |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 58 | NV_INT_STATUS = 0x10, |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 59 | NV_INT_ENABLE = 0x11, |
Tejun Heo | 27e4b27 | 2006-06-17 15:49:55 +0900 | [diff] [blame^] | 60 | NV_INT_STATUS_CK804 = 0x440, |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 61 | NV_INT_ENABLE_CK804 = 0x441, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Tejun Heo | 27e4b27 | 2006-06-17 15:49:55 +0900 | [diff] [blame^] | 63 | /* INT_STATUS/ENABLE bits */ |
| 64 | NV_INT_DEV = 0x01, |
| 65 | NV_INT_PM = 0x02, |
| 66 | NV_INT_ADDED = 0x04, |
| 67 | NV_INT_REMOVED = 0x08, |
| 68 | |
| 69 | NV_INT_PORT_SHIFT = 4, /* each port occupies 4 bits */ |
| 70 | |
| 71 | /* INT_CONFIG */ |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 72 | NV_INT_CONFIG = 0x12, |
| 73 | NV_INT_CONFIG_METHD = 0x01, // 0 = INT, 1 = SMI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | |
Jeff Garzik | 10ad05d | 2006-03-22 23:50:50 -0500 | [diff] [blame] | 75 | // For PCI config register 20 |
| 76 | NV_MCP_SATA_CFG_20 = 0x50, |
| 77 | NV_MCP_SATA_CFG_20_SATA_SPACE_EN = 0x04, |
| 78 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | |
| 80 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
| 81 | static irqreturn_t nv_interrupt (int irq, void *dev_instance, |
| 82 | struct pt_regs *regs); |
| 83 | static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg); |
| 84 | static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | |
| 86 | enum nv_host_type |
| 87 | { |
| 88 | GENERIC, |
| 89 | NFORCE2, |
Tejun Heo | 27e4b27 | 2006-06-17 15:49:55 +0900 | [diff] [blame^] | 90 | NFORCE3 = NFORCE2, /* NF2 == NF3 as far as sata_nv is concerned */ |
Andy Currid | e710245 | 2005-10-07 08:53:39 -0700 | [diff] [blame] | 91 | CK804 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | }; |
| 93 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 94 | static const struct pci_device_id nv_pci_tbl[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, |
| 96 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 }, |
| 97 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, |
| 98 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 }, |
| 99 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, |
| 100 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 }, |
| 101 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA, |
| 102 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
| 103 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2, |
| 104 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
| 105 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA, |
| 106 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
| 107 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, |
| 108 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
Daniel Drake | 541134c | 2005-07-03 13:44:39 +0100 | [diff] [blame] | 109 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA, |
Andy Currid | e710245 | 2005-10-07 08:53:39 -0700 | [diff] [blame] | 110 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
Daniel Drake | 541134c | 2005-07-03 13:44:39 +0100 | [diff] [blame] | 111 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2, |
Andy Currid | e710245 | 2005-10-07 08:53:39 -0700 | [diff] [blame] | 112 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
Daniel Drake | 541134c | 2005-07-03 13:44:39 +0100 | [diff] [blame] | 113 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA, |
Andy Currid | e710245 | 2005-10-07 08:53:39 -0700 | [diff] [blame] | 114 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
Andy Currid | e86ee66 | 2005-09-19 06:17:52 -0700 | [diff] [blame] | 115 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2, |
Andy Currid | e710245 | 2005-10-07 08:53:39 -0700 | [diff] [blame] | 116 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
Andrew Chew | 4c5c816 | 2006-04-20 15:54:26 -0700 | [diff] [blame] | 117 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA, |
| 118 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
| 119 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2, |
| 120 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
| 121 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3, |
| 122 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, |
| 124 | PCI_ANY_ID, PCI_ANY_ID, |
| 125 | PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, |
Daniel Drake | 541134c | 2005-07-03 13:44:39 +0100 | [diff] [blame] | 126 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, |
| 127 | PCI_ANY_ID, PCI_ANY_ID, |
| 128 | PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | { 0, } /* terminate list */ |
| 130 | }; |
| 131 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | static struct pci_driver nv_pci_driver = { |
| 133 | .name = DRV_NAME, |
| 134 | .id_table = nv_pci_tbl, |
| 135 | .probe = nv_init_one, |
| 136 | .remove = ata_pci_remove_one, |
| 137 | }; |
| 138 | |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 139 | static struct scsi_host_template nv_sht = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | .module = THIS_MODULE, |
| 141 | .name = DRV_NAME, |
| 142 | .ioctl = ata_scsi_ioctl, |
| 143 | .queuecommand = ata_scsi_queuecmd, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | .can_queue = ATA_DEF_QUEUE, |
| 145 | .this_id = ATA_SHT_THIS_ID, |
| 146 | .sg_tablesize = LIBATA_MAX_PRD, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 148 | .emulated = ATA_SHT_EMULATED, |
| 149 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 150 | .proc_name = DRV_NAME, |
| 151 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 152 | .slave_configure = ata_scsi_slave_config, |
Tejun Heo | ccf68c3 | 2006-05-31 18:28:09 +0900 | [diff] [blame] | 153 | .slave_destroy = ata_scsi_slave_destroy, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | .bios_param = ata_std_bios_param, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | }; |
| 156 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 157 | static const struct ata_port_operations nv_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | .port_disable = ata_port_disable, |
| 159 | .tf_load = ata_tf_load, |
| 160 | .tf_read = ata_tf_read, |
| 161 | .exec_command = ata_exec_command, |
| 162 | .check_status = ata_check_status, |
| 163 | .dev_select = ata_std_dev_select, |
| 164 | .phy_reset = sata_phy_reset, |
| 165 | .bmdma_setup = ata_bmdma_setup, |
| 166 | .bmdma_start = ata_bmdma_start, |
| 167 | .bmdma_stop = ata_bmdma_stop, |
| 168 | .bmdma_status = ata_bmdma_status, |
| 169 | .qc_prep = ata_qc_prep, |
| 170 | .qc_issue = ata_qc_issue_prot, |
| 171 | .eng_timeout = ata_eng_timeout, |
Alan Cox | a6b2c5d | 2006-05-22 16:59:59 +0100 | [diff] [blame] | 172 | .data_xfer = ata_pio_data_xfer, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | .irq_handler = nv_interrupt, |
| 174 | .irq_clear = ata_bmdma_irq_clear, |
| 175 | .scr_read = nv_scr_read, |
| 176 | .scr_write = nv_scr_write, |
| 177 | .port_start = ata_port_start, |
| 178 | .port_stop = ata_port_stop, |
Tejun Heo | e6faf08 | 2006-06-17 15:49:55 +0900 | [diff] [blame] | 179 | .host_stop = ata_pci_host_stop, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | }; |
| 181 | |
| 182 | /* FIXME: The hardware provides the necessary SATA PHY controls |
| 183 | * to support ATA_FLAG_SATA_RESET. However, it is currently |
| 184 | * necessary to disable that flag, to solve misdetection problems. |
| 185 | * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info. |
| 186 | * |
| 187 | * This problem really needs to be investigated further. But in the |
| 188 | * meantime, we avoid ATA_FLAG_SATA_RESET to get people working. |
| 189 | */ |
| 190 | static struct ata_port_info nv_port_info = { |
| 191 | .sht = &nv_sht, |
| 192 | .host_flags = ATA_FLAG_SATA | |
| 193 | /* ATA_FLAG_SATA_RESET | */ |
| 194 | ATA_FLAG_SRST | |
| 195 | ATA_FLAG_NO_LEGACY, |
| 196 | .pio_mask = NV_PIO_MASK, |
| 197 | .mwdma_mask = NV_MWDMA_MASK, |
| 198 | .udma_mask = NV_UDMA_MASK, |
| 199 | .port_ops = &nv_ops, |
| 200 | }; |
| 201 | |
| 202 | MODULE_AUTHOR("NVIDIA"); |
| 203 | MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller"); |
| 204 | MODULE_LICENSE("GPL"); |
| 205 | MODULE_DEVICE_TABLE(pci, nv_pci_tbl); |
| 206 | MODULE_VERSION(DRV_VERSION); |
| 207 | |
| 208 | static irqreturn_t nv_interrupt (int irq, void *dev_instance, |
| 209 | struct pt_regs *regs) |
| 210 | { |
| 211 | struct ata_host_set *host_set = dev_instance; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | unsigned int i; |
| 213 | unsigned int handled = 0; |
| 214 | unsigned long flags; |
| 215 | |
| 216 | spin_lock_irqsave(&host_set->lock, flags); |
| 217 | |
| 218 | for (i = 0; i < host_set->n_ports; i++) { |
| 219 | struct ata_port *ap; |
| 220 | |
| 221 | ap = host_set->ports[i]; |
Tejun Heo | c138950 | 2005-08-22 14:59:24 +0900 | [diff] [blame] | 222 | if (ap && |
Jeff Garzik | 029f546 | 2006-04-02 10:30:40 -0400 | [diff] [blame] | 223 | !(ap->flags & ATA_FLAG_DISABLED)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | struct ata_queued_cmd *qc; |
| 225 | |
| 226 | qc = ata_qc_from_tag(ap, ap->active_tag); |
Albert Lee | e50362e | 2005-09-27 17:39:50 +0800 | [diff] [blame] | 227 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | handled += ata_host_intr(ap, qc); |
Andrew Chew | b887030 | 2006-01-04 19:13:04 -0800 | [diff] [blame] | 229 | else |
| 230 | // No request pending? Clear interrupt status |
| 231 | // anyway, in case there's one pending. |
| 232 | ap->ops->check_status(ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | } |
| 236 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | spin_unlock_irqrestore(&host_set->lock, flags); |
| 238 | |
| 239 | return IRQ_RETVAL(handled); |
| 240 | } |
| 241 | |
| 242 | static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg) |
| 243 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | if (sc_reg > SCR_CONTROL) |
| 245 | return 0xffffffffU; |
| 246 | |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 247 | return ioread32((void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) |
| 251 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | if (sc_reg > SCR_CONTROL) |
| 253 | return; |
| 254 | |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 255 | iowrite32(val, (void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | } |
| 257 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
| 259 | { |
| 260 | static int printed_version = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | struct ata_port_info *ppi; |
| 262 | struct ata_probe_ent *probe_ent; |
| 263 | int pci_dev_busy = 0; |
| 264 | int rc; |
| 265 | u32 bar; |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 266 | unsigned long base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
| 268 | // Make sure this is a SATA controller by counting the number of bars |
| 269 | // (NVIDIA SATA controllers will always have six bars). Otherwise, |
| 270 | // it's an IDE controller and we ignore it. |
| 271 | for (bar=0; bar<6; bar++) |
| 272 | if (pci_resource_start(pdev, bar) == 0) |
| 273 | return -ENODEV; |
| 274 | |
| 275 | if (!printed_version++) |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 276 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | |
| 278 | rc = pci_enable_device(pdev); |
| 279 | if (rc) |
| 280 | goto err_out; |
| 281 | |
| 282 | rc = pci_request_regions(pdev, DRV_NAME); |
| 283 | if (rc) { |
| 284 | pci_dev_busy = 1; |
| 285 | goto err_out_disable; |
| 286 | } |
| 287 | |
| 288 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 289 | if (rc) |
| 290 | goto err_out_regions; |
| 291 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 292 | if (rc) |
| 293 | goto err_out_regions; |
| 294 | |
| 295 | rc = -ENOMEM; |
| 296 | |
| 297 | ppi = &nv_port_info; |
Alan Cox | 47a8659 | 2005-10-04 08:09:19 -0400 | [diff] [blame] | 298 | probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | if (!probe_ent) |
| 300 | goto err_out_regions; |
| 301 | |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 302 | probe_ent->mmio_base = pci_iomap(pdev, 5, 0); |
| 303 | if (!probe_ent->mmio_base) { |
| 304 | rc = -EIO; |
Tejun Heo | e6faf08 | 2006-06-17 15:49:55 +0900 | [diff] [blame] | 305 | goto err_out_free_ent; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | } |
| 307 | |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 308 | base = (unsigned long)probe_ent->mmio_base; |
| 309 | |
| 310 | probe_ent->port[0].scr_addr = base + NV_PORT0_SCR_REG_OFFSET; |
| 311 | probe_ent->port[1].scr_addr = base + NV_PORT1_SCR_REG_OFFSET; |
| 312 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | pci_set_master(pdev); |
| 314 | |
| 315 | rc = ata_device_add(probe_ent); |
| 316 | if (rc != NV_PORTS) |
| 317 | goto err_out_iounmap; |
| 318 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | kfree(probe_ent); |
| 320 | |
| 321 | return 0; |
| 322 | |
| 323 | err_out_iounmap: |
Jeff Garzik | 02cbd92 | 2006-03-22 23:59:46 -0500 | [diff] [blame] | 324 | pci_iounmap(pdev, probe_ent->mmio_base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | err_out_free_ent: |
| 326 | kfree(probe_ent); |
| 327 | err_out_regions: |
| 328 | pci_release_regions(pdev); |
| 329 | err_out_disable: |
| 330 | if (!pci_dev_busy) |
| 331 | pci_disable_device(pdev); |
| 332 | err_out: |
| 333 | return rc; |
| 334 | } |
| 335 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | static int __init nv_init(void) |
| 337 | { |
| 338 | return pci_module_init(&nv_pci_driver); |
| 339 | } |
| 340 | |
| 341 | static void __exit nv_exit(void) |
| 342 | { |
| 343 | pci_unregister_driver(&nv_pci_driver); |
| 344 | } |
| 345 | |
| 346 | module_init(nv_init); |
| 347 | module_exit(nv_exit); |