blob: 0c4fa109c8ff05bf95cce21a1a68382d560d9ac5 [file] [log] [blame]
Gilad Avidov289d0fc2012-08-08 14:06:24 -06001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Chintan Pandyaf6ddea22012-09-14 19:26:03 +053014/include/ "mpq8092-iommu.dtsi"
15/include/ "msm-gdsc.dtsi"
Utsab Bose4bb94652012-09-28 15:07:35 +053016/include/ "mpq8092-ion.dtsi"
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053017
18/ {
19 model = "Qualcomm MPQ8092";
20 compatible = "qcom,mpq8092";
21 interrupt-parent = <&intc>;
22
23 intc: interrupt-controller@f9000000 {
24 compatible = "qcom,msm-qgic2";
25 interrupt-controller;
26 #interrupt-cells = <3>;
27 reg = <0xf9000000 0x1000>,
28 <0xf9002000 0x1000>;
29 };
30
Ravi Kumar V57f65f52012-09-12 14:39:23 +053031 msmgpio: gpio@fd510000 {
32 compatible = "qcom,msm-gpio";
33 gpio-controller;
34 #gpio-cells = <2>;
35 interrupt-controller;
36 #interrupt-cells = <2>;
37 reg = <0xfd510000 0x4000>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080038 ngpio = <146>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080039 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080040 qcom,direct-connect-irqs = <8>;
Ravi Kumar V57f65f52012-09-12 14:39:23 +053041 };
42
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053043 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080044 compatible = "arm,armv7-timer";
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053045 interrupts = <1 2 0>, <1 3 0>;
46 clock-frequency = <19200000>;
47 };
48
49 serial@f991f000 {
50 compatible = "qcom,msm-lsuart-v14";
51 reg = <0xf991f000 0x1000>;
52 interrupts = <0 109 0>;
53 status = "disabled";
54 };
55
56 serial@f995e000 {
57 compatible = "qcom,msm-lsuart-v14";
58 reg = <0xf995e000 0x1000>;
59 interrupts = <0 114 0>;
60 status = "disabled";
61 };
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053062
63 spmi_bus: qcom,spmi@fc4c0000 {
64 cell-index = <0>;
65 compatible = "qcom,spmi-pmic-arb";
Gilad Avidov289d0fc2012-08-08 14:06:24 -060066 reg-names = "core", "intr";
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053067 reg = <0xfc4cf000 0x1000>,
68 <0Xfc4cb000 0x1000>;
69 /* 190,ee0_krait_hlos_spmi_periph_irq */
70 /* 187,channel_0_krait_hlos_trans_done_irq */
71 interrupts = <0 190 0 0 187 0>;
Sujit Reddy Thumma397dffd2012-10-29 13:38:49 +053072 qcom,not-wakeup;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053073 qcom,pmic-arb-ee = <0>;
74 qcom,pmic-arb-channel = <0>;
75 qcom,pmic-arb-ppid-map = <0x00100000>, /* PM8644_0 */
76 <0x10100001>, /* PM8644_1 */
77 <0x00500002>, /* INTERRUPT */
78 <0x00800003>, /* PON0 */
79 <0x03000004>, /* ADC_1 */
80 <0x03100005>, /* ADC_2 */
81 <0x03200006>, /* ADC_3 */
82 <0x03300007>, /* ADC_4 */
83 <0x03400008>, /* ADC_5 */
84 <0x03500009>, /* ADC_6 */
85 <0x0360000a>, /* ADC_7 */
86 <0x0370000b>, /* ADC_8 */
87 <0x0500000c>, /* SHARED_XO */
88 <0x0510000d>, /* BB_CLK1 */
89 <0x0520000e>, /* BB_CLK2 */
90 <0x05a0000f>, /* SLEEP_CLK */
91 <0x06000010>, /* RTC_RW */
92 <0x06100011>, /* RTC_ALARM */
93 <0x07000012>, /* PBS_CORE */
94 <0x07100013>, /* PBS_CLIENT_1 */
95 <0x07200014>, /* PBS_CLIENT_2 */
96 <0x07300015>, /* PBS_CLIENT_3 */
97 <0x07400016>, /* PBS_CLIENT_4 */
98 <0x07500017>, /* PBS_CLIENT_5 */
99 <0x07600018>, /* PBS_CLIENT_6 */
100 <0x07700019>, /* PBS_CLIENT_7 */
101 <0x0780001a>, /* PBS_CLIENT_8 */
102 <0x0790001b>, /* PBS_CLIENT_9 */
103 <0x07a0001c>, /* PBS_CLIENT_10 */
104 <0x07b0001d>, /* PBS_CLIENT_11 */
105 <0x07c0001e>, /* PBS_CLIENT_12 */
106 <0x07d0001f>, /* PBS_CLIENT_13 */
107 <0x07e00020>, /* PBS_CLIENT_14 */
108 <0x07f00021>, /* PBS_CLIENT_15 */
109 <0x08000022>, /* PBS_CLIENT_16 */
110 <0x0a000023>, /* MPP_1 */
111 <0x0a100024>, /* MPP_2 */
112 <0x0a200025>, /* MPP_3 */
113 <0x0a300026>, /* MPP_4 */
114 <0x0a400027>, /* MPP_5 */
115 <0x0a500028>, /* MPP_6 */
116 <0x0c000029>, /* PM8644_GPIO_1 */
117 <0x0c10002a>, /* PM8644_GPIO_2 */
118 <0x0c20002b>, /* PM8644_GPIO_3 */
119 <0x0c30002c>, /* PM8644_GPIO_4 */
120 <0x0c40002d>, /* PM8644_GPIO_5 */
121 <0x0c50002e>, /* PM8644_GPIO_6 */
122 <0x0c60002f>, /* PM8644_GPIO_7 */
123 <0x0c700030>, /* PM8644_GPIO_8 */
124 <0x0c800031>, /* PM8644_GPIO_9 */
125 <0x0c900032>, /* PM8644_GPIO_10 */
126 <0x0ca00033>, /* PM8644_GPIO_11 */
127 <0x0cb00034>, /* PM8644_GPIO_12 */
128 <0x0cc00035>, /* PM8644_GPIO_13 */
129 <0x0cd00036>, /* PM8644_GPIO_14 */
130 <0x0ce00037>, /* PM8644_GPIO_15 */
131 <0x0cf00038>, /* PM8644_GPIO_16 */
132 <0x0d000039>, /* PM8644_GPIO_17 */
133 <0x0d10003a>, /* PM8644_GPIO_18 */
134 <0x0d20003b>, /* PM8644_GPIO_19 */
135 <0x0d30003c>, /* PM8644_GPIO_20 */
136 <0x0d40003d>, /* PM8644_GPIO_21 */
137 <0x0d50003e>, /* PM8644_GPIO_22 */
138 <0x0d60003f>, /* PM8644_GPIO_23 */
139 <0x0d700040>, /* PM8644_GPIO_24 */
140 <0x0d800041>, /* PM8644_GPIO_25 */
141 <0x0d900042>, /* PM8644_GPIO_26 */
142 <0x0da00043>, /* PM8644_GPIO_27 */
143 <0x0db00044>, /* PM8644_GPIO_28 */
144 <0x0dc00045>, /* PM8644_GPIO_29 */
145 <0x0dd00046>, /* PM8644_GPIO_30 */
146 <0x0de00047>, /* PM8644_GPIO_31 */
147 <0x0df00048>, /* PM8644_GPIO_32 */
148 <0x0e000049>, /* PM8644_GPIO_33 */
149 <0x0e10004a>, /* PM8644_GPIO_34 */
150 <0x0e20004b>, /* PM8644_GPIO_35 */
151 <0x0e30004c>, /* PM8644_GPIO_36 */
152 <0x0e40004d>, /* PM8644_GPIO_37 */
153 <0x0e50004e>, /* PM8644_GPIO_38 */
154 <0x0e60004f>, /* PM8644_GPIO_39 */
155 <0x0e700050>, /* PM8644_GPIO_40 */
156 <0x0e800051>, /* PM8644_GPIO_41 */
157 <0x0e900052>, /* PM8644_GPIO_42 */
158 <0x0ea00053>, /* PM8644_GPIO_43 */
159 <0x11000054>, /* BUCK_CMN_1 */
160 <0x11100055>, /* BUCK_CMN_2 */
161 <0x11200056>, /* BUCK_CMN_3 */
162 <0x11400057>, /* PM8644_SMPS1 */
163 <0x11500058>, /* SMPS_1_PS1 */
164 <0x11600059>, /* BUCK_FREQ_1 */
165 <0x1170005a>, /* PM8644_SMPS2 */
166 <0x1180005b>, /* SMPS_2_PS1 */
167 <0x1190005c>, /* BUCK_FREQ_2 */
168 <0x11a0005d>, /* PM8644_SMPS3 */
169 <0x11b0005e>, /* SMPS_3_PS1 */
170 <0x11c0005f>, /* BUCK_FREQ_3 */
171 <0x11d00060>, /* PM8644_SMPS4 */
172 <0x11e00061>, /* SMPS_4_PS1 */
173 <0x11f00062>, /* PM8644_BUCK_FREQ_4 */
174 <0x12000063>, /* PM8644_SMPS5 */
175 <0x12100064>, /* FTPS1_5 */
176 <0x12200065>, /* PM8644_BUCK_FREQ_5 */
177 <0x12300066>, /* PM8644_SMPS6 */
178 <0x12400067>, /* FTPS1_6 */
179 <0x12500068>, /* PM8644_BUCK_FREQ_6 */
180 <0x12600069>, /* PM8644_SMPS7 */
181 <0x1270006a>, /* FTPS1_7 */
182 <0x1280006b>, /* PM8644_BUCK_FREQ_7 */
183 <0x1290006c>, /* PM8644_SMPS8 */
184 <0x12a0006d>, /* FTPS1_8 */
185 <0x12b0006e>, /* PM8644_BUCK_FREQ_8 */
186 <0x12c0006f>, /* PM8644_SMPS9 */
187 <0x12d00070>, /* FTPS1_9 */
188 <0x12e00071>, /* PM8644_BUCK_FREQ_9 */
189 <0x12f00072>, /* PM8644_SMPS10 */
190 <0x13000073>, /* FTPS1_10 */
191 <0x13100074>, /* PM8644_BUCK_FREQ_10 */
192 <0x13200075>, /* PM8644_SMPS11 */
193 <0x13300076>, /* FTPS1_11 */
194 <0x13400077>, /* BUCK_FREQ_11 */
195 <0x14000078>, /* PM8644_LDO_1 */
196 <0x14100079>, /* PM8644_LDO_2 */
197 <0x1420007a>, /* PM8644_LDO_3 */
198 <0x1430007b>, /* PM8644_LDO_4 */
199 <0x1440007c>, /* PM8644_LDO_5 */
200 <0x1450007d>, /* PM8644_LDO_6 */
201 <0x1460007e>, /* PM8644_LDO_7 */
202 <0x1470007f>, /* PM8644_LDO_8 */
203 <0x14800080>, /* PM8644_LDO_9 */
204 <0x14900081>, /* PM8644_LDO_10 */
205 <0x14a00082>, /* PM8644_LDO_11 */
206 <0x14b00083>, /* PM8644_LDO_12 */
207 <0x14c00084>, /* PM8644_LDO_13 */
208 <0x14d00085>, /* PM8644_LDO_14 */
209 <0x14e00086>, /* PM8644_LDO_15 */
210 <0x14f00087>, /* PM8644_LDO_16 */
211 <0x15000088>, /* PM8644_LDO_17 */
212 <0x15100089>, /* PM8644_LDO_18 */
213 <0x1520008a>, /* PM8644_LDO_19 */
214 <0x1530008b>, /* PM8644_LDO_20 */
215 <0x1540008c>, /* PM8644_LDO_21 */
216 <0x1550008d>, /* PM8644_LDO_22 */
217 <0x1560008e>, /* PM8644_LDO_23 */
218 <0x1570008f>, /* PM8644_LDO_24 */
219 <0x15800090>, /* PM8644_LDO_25 */
220 <0x18000091>, /* PM8644_LVS_1 */
221 <0x18100092>, /* PM8644_LVS_2 */
222 <0x18200093>, /* PM8644_OTG */
223 <0x18300094>, /* PM8644_HDMI */
224 <0x1a800095>, /* KEYPAD */
225 <0x1b000096>, /* LPG_LUT */
226 <0x1b100097>, /* LPG_CHAN_1 */
227 <0x1b200098>, /* LPG_CHAN_2 */
228 <0x1b300099>, /* LPG_CHAN_3 */
229 <0x1b40009a>, /* LPG_CHAN_4 */
230 <0x1b50009b>, /* LPG_CHAN_5 */
231 <0x1b60009c>, /* LPG_CHAN_6 */
232 <0x1b70009d>, /* LPG_CHAN_7 */
233 <0x1b80009e>, /* LPG_CHAN_8 */
234 <0x1bc0009f>; /* LPG_PWM */
235 };
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530236
237 sdcc1: qcom,sdcc@f9824000 {
238 cell-index = <1>; /* SDC1 eMMC slot */
239 compatible = "qcom,msm-sdcc";
240 reg = <0xf9824000 0x800>;
241 reg-names = "core_mem";
242 interrupts = <0 123 0>;
243 interrupt-names = "core_irq";
244
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700245 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
246 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
247 qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
248 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530249
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700250 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
251 qcom,sup-voltages = <2950 2950>;
252 qcom,bus-width = <8>;
253 qcom,nonremovable;
254 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530255 };
256
257 sdcc2: qcom,sdcc@f98a4000 {
258 cell-index = <2>; /* SDC2 SD card slot */
259 compatible = "qcom,msm-sdcc";
260 reg = <0xf98a4000 0x800>;
261 reg-names = "core_mem";
262 interrupts = <0 125 0>;
263 interrupt-names = "core_irq";
264
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700265 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
266 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
267 qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
268 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530269
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700270 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
271 qcom,sup-voltages = <2950 2950>;
272 qcom,bus-width = <4>;
273 qcom,xpc;
274 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
275 qcom,current-limit = <800>;
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530276 };
Sujit Reddy Thumma35106382012-10-12 20:36:53 +0530277
278 sata: sata@fc580000 {
279 compatible = "qcom,msm-ahci";
280 reg = <0xfc580000 0x17c>;
281 interrupts = <0 243 0>;
282 };
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +0530283};
Ravi Kumar V605f1cd2012-09-10 20:43:17 +0530284
Patrick Dalye8977aa2012-11-06 15:25:58 -0800285&gdsc_venus {
286 status = "ok";
287};
288
289&gdsc_mdss {
290 status = "ok";
291};
292
293&gdsc_jpeg {
294 status = "ok";
295};
296
297&gdsc_vfe {
298 status = "ok";
299};
300
301&gdsc_oxili_gx {
302 status = "ok";
303};
304
305&gdsc_oxili_cx {
306 status = "ok";
307};
308
309&gdsc_usb_hsic {
310 status = "ok";
311};
312
Ravi Kumar V605f1cd2012-09-10 20:43:17 +0530313/include/ "msm-pm8644.dtsi"
Ravi Kumar Vd9e522c2012-10-03 12:52:14 +0530314/include/ "mpq8092-regulator.dtsi"