Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm / 293dc5dfdbcc16cde06e40a688394cc8ab083e48 / . / drivers / net / wireless / ath / ath9k / debug.h
blob: edda15bf2c1576bcb41b13f2ec6f79dedb48b22e [file] [log] [blame]
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]1/*
Sujithcee075a2009-03-13 09:07:23 +0530[diff] [blame]2 * Copyright (c) 2008-2009 Atheros Communications Inc.
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef DEBUG_H
18#define DEBUG_H
19
20enum ATH_DEBUG {
21 ATH_DBG_RESET = 0x00000001,
Sujithd8baa932009-03-30 15:28:25 +0530[diff] [blame]22 ATH_DBG_QUEUE = 0x00000002,
23 ATH_DBG_EEPROM = 0x00000004,
24 ATH_DBG_CALIBRATE = 0x00000008,
25 ATH_DBG_INTERRUPT = 0x00000010,
26 ATH_DBG_REGULATORY = 0x00000020,
27 ATH_DBG_ANI = 0x00000040,
28 ATH_DBG_XMIT = 0x00000080,
29 ATH_DBG_BEACON = 0x00000100,
30 ATH_DBG_CONFIG = 0x00000200,
31 ATH_DBG_FATAL = 0x00000400,
Jouni Malinencc659652009-05-14 21:28:48 +0300[diff] [blame]32 ATH_DBG_PS = 0x00000800,
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]33 ATH_DBG_ANY = 0xffffffff
34};
35
36#define DBG_DEFAULT (ATH_DBG_FATAL)
37
38#ifdef CONFIG_ATH9K_DEBUG
39
40/**
41 * struct ath_interrupt_stats - Contains statistics about interrupts
42 * @total: Total no. of interrupts generated so far
43 * @rxok: RX with no errors
44 * @rxeol: RX with no more RXDESC available
45 * @rxorn: RX FIFO overrun
46 * @txok: TX completed at the requested rate
47 * @txurn: TX FIFO underrun
48 * @mib: MIB regs reaching its threshold
49 * @rxphyerr: RX with phy errors
50 * @rx_keycache_miss: RX with key cache misses
51 * @swba: Software Beacon Alert
52 * @bmiss: Beacon Miss
53 * @bnr: Beacon Not Ready
54 * @cst: Carrier Sense TImeout
55 * @gtt: Global TX Timeout
56 * @tim: RX beacon TIM occurrence
57 * @cabend: RX End of CAB traffic
58 * @dtimsync: DTIM sync lossage
59 * @dtim: RX Beacon with DTIM
60 */
61struct ath_interrupt_stats {
62 u32 total;
63 u32 rxok;
64 u32 rxeol;
65 u32 rxorn;
66 u32 txok;
67 u32 txeol;
68 u32 txurn;
69 u32 mib;
70 u32 rxphyerr;
71 u32 rx_keycache_miss;
72 u32 swba;
73 u32 bmiss;
74 u32 bnr;
75 u32 cst;
76 u32 gtt;
77 u32 tim;
78 u32 cabend;
79 u32 dtimsync;
80 u32 dtim;
81};
82
Jeff Hansenbedf0872009-05-27 12:48:28 +0000[diff] [blame]83struct ath_rc_stats {
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]84 u32 success;
85 u32 retries;
86 u32 xretries;
Sujith9e712792009-02-20 15:13:20 +0530[diff] [blame]87 u8 per;
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]88};
89
90struct ath_stats {
91 struct ath_interrupt_stats istats;
Jeff Hansenbedf0872009-05-27 12:48:28 +0000[diff] [blame]92 struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]93};
94
95struct ath9k_debug {
96 int debug_mask;
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]97 struct dentry *debugfs_phy;
Jeff Hansen24939282009-05-27 12:48:29 +0000[diff] [blame]98 struct dentry *debugfs_debug;
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]99 struct dentry *debugfs_dma;
100 struct dentry *debugfs_interrupt;
101 struct dentry *debugfs_rcstat;
Jouni Malinen39d89cd2009-03-03 19:23:40 +0200[diff] [blame]102 struct dentry *debugfs_wiphy;
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]103 struct ath_stats stats;
104};
105
106void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...);
107int ath9k_init_debug(struct ath_softc *sc);
108void ath9k_exit_debug(struct ath_softc *sc);
Gabor Juhos19d8bc22009-03-05 16:55:18 +0100[diff] [blame]109int ath9k_debug_create_root(void);
110void ath9k_debug_remove_root(void);
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]111void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
112void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb);
113void ath_debug_stat_retries(struct ath_softc *sc, int rix,
Sujith9e712792009-02-20 15:13:20 +0530[diff] [blame]114 int xretries, int retries, u8 per);
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]115
116#else
117
118static inline void DPRINTF(struct ath_softc *sc, int dbg_mask,
119 const char *fmt, ...)
120{
121}
122
123static inline int ath9k_init_debug(struct ath_softc *sc)
124{
125 return 0;
126}
127
128static inline void ath9k_exit_debug(struct ath_softc *sc)
129{
130}
131
Gabor Juhos19d8bc22009-03-05 16:55:18 +0100[diff] [blame]132static inline int ath9k_debug_create_root(void)
133{
134 return 0;
135}
136
137static inline void ath9k_debug_remove_root(void)
138{
139}
140
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]141static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
142 enum ath9k_int status)
143{
144}
145
146static inline void ath_debug_stat_rc(struct ath_softc *sc,
147 struct sk_buff *skb)
148{
149}
150
151static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix,
Sujith9e712792009-02-20 15:13:20 +0530[diff] [blame]152 int xretries, int retries, u8 per)
Sujith394cf0a2009-02-09 13:26:54 +0530[diff] [blame]153{
154}
155
156#endif /* CONFIG_ATH9K_DEBUG */
157
158#endif /* DEBUG_H */