blob: 60319d7ad24e4bfd315136fac791d6df3b1d5d1a [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +010021#include "reg.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070022
23#define ATH_PCI_VERSION "0.1"
24
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025static char *dev_info = "ath9k";
26
27MODULE_AUTHOR("Atheros Communications");
28MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30MODULE_LICENSE("Dual BSD/GPL");
31
32static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
38 { 0 }
39};
40
Sujith9757d552008-11-04 18:25:27 +053041static void ath_detach(struct ath_softc *sc);
42
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070043static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
45{
46 int i;
47
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
50 return i;
51 }
52
53 return -1;
54}
55
56static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
58{
59 u32 chanmode = 0;
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
62
63 switch (chan->band) {
64 case IEEE80211_BAND_2GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020065 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020068 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070069 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020071 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070072 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
74 break;
75 case IEEE80211_BAND_5GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020076 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070077 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020079 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070080 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020082 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070083 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
85 break;
86 default:
87 break;
88 }
89
90 return chanmode;
91}
92
93
94static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
97 const u8 *addr)
98{
99 u8 *key_rxmic = NULL;
100 u8 *key_txmic = NULL;
101
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
104
105 if (addr == NULL) {
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
109 }
110 if (!sc->sc_splitmic) {
111 /*
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
114 */
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
118 }
119 /*
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
122 */
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
128 return 0;
129 }
130
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
134}
135
136static int ath_key_config(struct ath_softc *sc,
137 const u8 *addr,
138 struct ieee80211_key_conf *key)
139{
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
143 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200144 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700145
146 memset(&hk, 0, sizeof(hk));
147
148 switch (key->alg) {
149 case ALG_WEP:
150 hk.kv_type = ATH9K_CIPHER_WEP;
151 break;
152 case ALG_TKIP:
153 hk.kv_type = ATH9K_CIPHER_TKIP;
154 break;
155 case ALG_CCMP:
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
157 break;
158 default:
159 return -EINVAL;
160 }
161
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
164
165 if (!sc->sc_vaps[0])
166 return -EIO;
167
Sujith5640b082008-10-29 10:16:06 +0530168 vif = sc->sc_vaps[0];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700169 opmode = vif->type;
170
171 /*
172 * Strategy:
173 * For _M_STA mc tx, we will not setup a key at all since we never
174 * tx mc.
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
180 */
181 if (is_broadcast_ether_addr(addr)) {
182 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200183 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700184 /* default key: could be group WPA key
185 * or could be static WEP key */
186 mac = NULL;
187 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200188 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700189 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200190 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700191 break;
192 default:
193 ASSERT(0);
194 break;
195 }
196 } else {
197 mac = addr;
198 }
199
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 else
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
204
205 if (!ret)
206 return -EIO;
207
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700208 return 0;
209}
210
211static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
212{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700213 int freeslot;
214
Sujithff9b6622008-08-14 13:27:16 +0530215 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700217}
218
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200219static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700220{
Sujith60653672008-08-14 13:28:02 +0530221#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700223
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700229
Sujith60653672008-08-14 13:28:02 +0530230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700237}
238
239static int ath_rate2idx(struct ath_softc *sc, int rate)
240{
241 int i = 0, cur_band, n_rates;
242 struct ieee80211_hw *hw = sc->hw;
243
244 cur_band = hw->conf.channel->band;
245 n_rates = sc->sbands[cur_band].n_bitrates;
246
247 for (i = 0; i < n_rates; i++) {
248 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
249 break;
250 }
251
252 /*
253 * NB:mac80211 validates rx rate index against the supported legacy rate
254 * index only (should be done against ht rates also), return the highest
255 * legacy rate index for rx rate which does not match any one of the
256 * supported basic and extended rates to make mac80211 happy.
257 * The following hack will be cleaned up once the issue with
258 * the rx rate index validation in mac80211 is fixed.
259 */
260 if (i == n_rates)
261 return n_rates - 1;
262 return i;
263}
264
265static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct sk_buff *skb,
267 struct ath_recv_status *status,
268 struct ieee80211_rx_status *rx_status)
269{
270 struct ieee80211_hw *hw = sc->hw;
271 struct ieee80211_channel *curchan = hw->conf.channel;
272
273 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274
275 rx_status->mactime = status->tsf;
276 rx_status->band = curchan->band;
277 rx_status->freq = curchan->center_freq;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700278 rx_status->noise = sc->sc_ani.sc_noise_floor;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700279 rx_status->signal = rx_status->noise + status->rssi;
280 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
281 rx_status->antenna = status->antenna;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700282
Luis R. Rodriguezc49d1542008-10-13 14:08:09 -0700283 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
284 * scheme can be used here but it requires tables of SNR/throughput for
285 * each possible mode used. */
286 rx_status->qual = status->rssi * 100 / 45;
287
288 /* rssi can be more than 45 though, anything above that
289 * should be considered at 100% */
290 if (rx_status->qual > 100)
291 rx_status->qual = 100;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700292
293 if (status->flags & ATH_RX_MIC_ERROR)
294 rx_status->flag |= RX_FLAG_MMIC_ERROR;
295 if (status->flags & ATH_RX_FCS_ERROR)
296 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
297
298 rx_status->flag |= RX_FLAG_TSFT;
299}
300
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530301static void ath9k_ht_conf(struct ath_softc *sc,
302 struct ieee80211_bss_conf *bss_conf)
303{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530304 struct ath_ht_info *ht_info = &sc->sc_ht_info;
305
Johannes Bergae5eb022008-10-14 16:58:37 +0200306 if (sc->hw->conf.ht.enabled) {
307 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530308
Johannes Bergae5eb022008-10-14 16:58:37 +0200309 if (bss_conf->ht.width_40_ok)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530310 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
311 else
312 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
313
314 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530315 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530316}
317
318static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530319 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530320 struct ieee80211_bss_conf *bss_conf)
321{
322 struct ieee80211_hw *hw = sc->hw;
323 struct ieee80211_channel *curchan = hw->conf.channel;
Sujith5640b082008-10-29 10:16:06 +0530324 struct ath_vap *avp = (void *)vif->drv_priv;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530325 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530326
327 if (bss_conf->assoc) {
328 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
329 __func__,
330 bss_conf->aid);
331
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530332 /* New association, store aid */
333 if (avp->av_opmode == ATH9K_M_STA) {
334 sc->sc_curaid = bss_conf->aid;
335 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
336 sc->sc_curaid);
337 }
338
339 /* Configure the beacon */
340 ath_beacon_config(sc, 0);
341 sc->sc_flags |= SC_OP_BEACONS;
342
343 /* Reset rssi stats */
344 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
345 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
346 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
347 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
348
349 /* Update chainmask */
Johannes Bergae5eb022008-10-14 16:58:37 +0200350 ath_update_chainmask(sc, hw->conf.ht.enabled);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530351
352 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700353 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530354 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700355 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530356
357 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
358 __func__,
359 curchan->center_freq);
360
361 pos = ath_get_channel(sc, curchan);
362 if (pos == -1) {
363 DPRINTF(sc, ATH_DBG_FATAL,
364 "%s: Invalid channel\n", __func__);
365 return;
366 }
367
Johannes Bergae5eb022008-10-14 16:58:37 +0200368 if (hw->conf.ht.enabled)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530369 sc->sc_ah->ah_channels[pos].chanmode =
370 ath_get_extchanmode(sc, curchan);
371 else
372 sc->sc_ah->ah_channels[pos].chanmode =
373 (curchan->band == IEEE80211_BAND_2GHZ) ?
374 CHANNEL_G : CHANNEL_A;
375
376 /* set h/w channel */
377 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
378 DPRINTF(sc, ATH_DBG_FATAL,
379 "%s: Unable to set channel\n",
380 __func__);
381
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530382 /* Update ratectrl about the new state */
383 ath_rc_node_update(hw, avp->rc_node);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700384
385 /* Start ANI */
386 mod_timer(&sc->sc_ani.timer,
387 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
388
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530389 } else {
390 DPRINTF(sc, ATH_DBG_CONFIG,
391 "%s: Bss Info DISSOC\n", __func__);
392 sc->sc_curaid = 0;
393 }
394}
395
396void ath_get_beaconconfig(struct ath_softc *sc,
397 int if_id,
398 struct ath_beacon_config *conf)
399{
400 struct ieee80211_hw *hw = sc->hw;
401
402 /* fill in beacon config data */
403
404 conf->beacon_interval = hw->conf.beacon_int;
405 conf->listen_interval = 100;
406 conf->dtim_count = 1;
407 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
408}
409
410void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Sujith528f0c62008-10-29 10:14:26 +0530411 struct ath_xmit_status *tx_status)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530412{
413 struct ieee80211_hw *hw = sc->hw;
414 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
415
416 DPRINTF(sc, ATH_DBG_XMIT,
417 "%s: TX complete: skb: %p\n", __func__, skb);
418
Johannes Berge6a98542008-10-21 12:40:02 +0200419 ieee80211_tx_info_clear_status(tx_info);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530420 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
421 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
Johannes Berge6a98542008-10-21 12:40:02 +0200422 /* free driver's private data area of tx_info, XXX: HACK! */
423 if (tx_info->control.vif != NULL)
424 kfree(tx_info->control.vif);
425 tx_info->control.vif = NULL;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530426 }
427
428 if (tx_status->flags & ATH_TX_BAR) {
429 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
430 tx_status->flags &= ~ATH_TX_BAR;
431 }
432
Johannes Berge6a98542008-10-21 12:40:02 +0200433 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530434 /* Frame was ACKed */
435 tx_info->flags |= IEEE80211_TX_STAT_ACK;
436 }
437
Johannes Berge6a98542008-10-21 12:40:02 +0200438 tx_info->status.rates[0].count = tx_status->retries + 1;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530439
440 ieee80211_tx_status(hw, skb);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530441}
442
443int _ath_rx_indicate(struct ath_softc *sc,
444 struct sk_buff *skb,
445 struct ath_recv_status *status,
446 u16 keyix)
447{
448 struct ieee80211_hw *hw = sc->hw;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530449 struct ieee80211_rx_status rx_status;
450 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
451 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
452 int padsize;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530453
454 /* see if any padding is done by the hw and remove it */
455 if (hdrlen & 3) {
456 padsize = hdrlen % 4;
457 memmove(skb->data + padsize, skb->data, hdrlen);
458 skb_pull(skb, padsize);
459 }
460
461 /* Prepare rx status */
462 ath9k_rx_prepare(sc, skb, status, &rx_status);
463
464 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
465 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
466 rx_status.flag |= RX_FLAG_DECRYPTED;
467 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
468 && !(status->flags & ATH_RX_DECRYPT_ERROR)
469 && skb->len >= hdrlen + 4) {
470 keyix = skb->data[hdrlen + 3] >> 6;
471
472 if (test_bit(keyix, sc->sc_keymap))
473 rx_status.flag |= RX_FLAG_DECRYPTED;
474 }
475
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530476 __ieee80211_rx(hw, skb, &rx_status);
477
478 return 0;
479}
480
481/********************************/
482/* LED functions */
483/********************************/
484
485static void ath_led_brightness(struct led_classdev *led_cdev,
486 enum led_brightness brightness)
487{
488 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
489 struct ath_softc *sc = led->sc;
490
491 switch (brightness) {
492 case LED_OFF:
493 if (led->led_type == ATH_LED_ASSOC ||
494 led->led_type == ATH_LED_RADIO)
495 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
496 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
497 (led->led_type == ATH_LED_RADIO) ? 1 :
498 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
499 break;
500 case LED_FULL:
501 if (led->led_type == ATH_LED_ASSOC)
502 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
503 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
504 break;
505 default:
506 break;
507 }
508}
509
510static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
511 char *trigger)
512{
513 int ret;
514
515 led->sc = sc;
516 led->led_cdev.name = led->name;
517 led->led_cdev.default_trigger = trigger;
518 led->led_cdev.brightness_set = ath_led_brightness;
519
520 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
521 if (ret)
522 DPRINTF(sc, ATH_DBG_FATAL,
523 "Failed to register led:%s", led->name);
524 else
525 led->registered = 1;
526 return ret;
527}
528
529static void ath_unregister_led(struct ath_led *led)
530{
531 if (led->registered) {
532 led_classdev_unregister(&led->led_cdev);
533 led->registered = 0;
534 }
535}
536
537static void ath_deinit_leds(struct ath_softc *sc)
538{
539 ath_unregister_led(&sc->assoc_led);
540 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
541 ath_unregister_led(&sc->tx_led);
542 ath_unregister_led(&sc->rx_led);
543 ath_unregister_led(&sc->radio_led);
544 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
545}
546
547static void ath_init_leds(struct ath_softc *sc)
548{
549 char *trigger;
550 int ret;
551
552 /* Configure gpio 1 for output */
553 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
554 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
555 /* LED off, active low */
556 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
557
558 trigger = ieee80211_get_radio_led_name(sc->hw);
559 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
560 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
561 ret = ath_register_led(sc, &sc->radio_led, trigger);
562 sc->radio_led.led_type = ATH_LED_RADIO;
563 if (ret)
564 goto fail;
565
566 trigger = ieee80211_get_assoc_led_name(sc->hw);
567 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
568 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
569 ret = ath_register_led(sc, &sc->assoc_led, trigger);
570 sc->assoc_led.led_type = ATH_LED_ASSOC;
571 if (ret)
572 goto fail;
573
574 trigger = ieee80211_get_tx_led_name(sc->hw);
575 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
576 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
577 ret = ath_register_led(sc, &sc->tx_led, trigger);
578 sc->tx_led.led_type = ATH_LED_TX;
579 if (ret)
580 goto fail;
581
582 trigger = ieee80211_get_rx_led_name(sc->hw);
583 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
584 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
585 ret = ath_register_led(sc, &sc->rx_led, trigger);
586 sc->rx_led.led_type = ATH_LED_RX;
587 if (ret)
588 goto fail;
589
590 return;
591
592fail:
593 ath_deinit_leds(sc);
594}
595
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530596#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530597
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530598/*******************/
599/* Rfkill */
600/*******************/
601
602static void ath_radio_enable(struct ath_softc *sc)
603{
604 struct ath_hal *ah = sc->sc_ah;
605 int status;
606
607 spin_lock_bh(&sc->sc_resetlock);
608 if (!ath9k_hw_reset(ah, ah->ah_curchan,
609 sc->sc_ht_info.tx_chan_width,
610 sc->sc_tx_chainmask,
611 sc->sc_rx_chainmask,
612 sc->sc_ht_extprotspacing,
613 false, &status)) {
614 DPRINTF(sc, ATH_DBG_FATAL,
615 "%s: unable to reset channel %u (%uMhz) "
616 "flags 0x%x hal status %u\n", __func__,
617 ath9k_hw_mhz2ieee(ah,
618 ah->ah_curchan->channel,
619 ah->ah_curchan->channelFlags),
620 ah->ah_curchan->channel,
621 ah->ah_curchan->channelFlags, status);
622 }
623 spin_unlock_bh(&sc->sc_resetlock);
624
625 ath_update_txpow(sc);
626 if (ath_startrecv(sc) != 0) {
627 DPRINTF(sc, ATH_DBG_FATAL,
628 "%s: unable to restart recv logic\n", __func__);
629 return;
630 }
631
632 if (sc->sc_flags & SC_OP_BEACONS)
633 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
634
635 /* Re-Enable interrupts */
636 ath9k_hw_set_interrupts(ah, sc->sc_imask);
637
638 /* Enable LED */
639 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
640 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
641 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
642
643 ieee80211_wake_queues(sc->hw);
644}
645
646static void ath_radio_disable(struct ath_softc *sc)
647{
648 struct ath_hal *ah = sc->sc_ah;
649 int status;
650
651
652 ieee80211_stop_queues(sc->hw);
653
654 /* Disable LED */
655 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
656 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
657
658 /* Disable interrupts */
659 ath9k_hw_set_interrupts(ah, 0);
660
661 ath_draintxq(sc, false); /* clear pending tx frames */
662 ath_stoprecv(sc); /* turn off frame recv */
663 ath_flushrecv(sc); /* flush recv queue */
664
665 spin_lock_bh(&sc->sc_resetlock);
666 if (!ath9k_hw_reset(ah, ah->ah_curchan,
667 sc->sc_ht_info.tx_chan_width,
668 sc->sc_tx_chainmask,
669 sc->sc_rx_chainmask,
670 sc->sc_ht_extprotspacing,
671 false, &status)) {
672 DPRINTF(sc, ATH_DBG_FATAL,
673 "%s: unable to reset channel %u (%uMhz) "
674 "flags 0x%x hal status %u\n", __func__,
675 ath9k_hw_mhz2ieee(ah,
676 ah->ah_curchan->channel,
677 ah->ah_curchan->channelFlags),
678 ah->ah_curchan->channel,
679 ah->ah_curchan->channelFlags, status);
680 }
681 spin_unlock_bh(&sc->sc_resetlock);
682
683 ath9k_hw_phy_disable(ah);
684 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
685}
686
687static bool ath_is_rfkill_set(struct ath_softc *sc)
688{
689 struct ath_hal *ah = sc->sc_ah;
690
691 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
692 ah->ah_rfkill_polarity;
693}
694
695/* h/w rfkill poll function */
696static void ath_rfkill_poll(struct work_struct *work)
697{
698 struct ath_softc *sc = container_of(work, struct ath_softc,
699 rf_kill.rfkill_poll.work);
700 bool radio_on;
701
702 if (sc->sc_flags & SC_OP_INVALID)
703 return;
704
705 radio_on = !ath_is_rfkill_set(sc);
706
707 /*
708 * enable/disable radio only when there is a
709 * state change in RF switch
710 */
711 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
712 enum rfkill_state state;
713
714 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
715 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
716 : RFKILL_STATE_HARD_BLOCKED;
717 } else if (radio_on) {
718 ath_radio_enable(sc);
719 state = RFKILL_STATE_UNBLOCKED;
720 } else {
721 ath_radio_disable(sc);
722 state = RFKILL_STATE_HARD_BLOCKED;
723 }
724
725 if (state == RFKILL_STATE_HARD_BLOCKED)
726 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
727 else
728 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
729
730 rfkill_force_state(sc->rf_kill.rfkill, state);
731 }
732
733 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
734 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
735}
736
737/* s/w rfkill handler */
738static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
739{
740 struct ath_softc *sc = data;
741
742 switch (state) {
743 case RFKILL_STATE_SOFT_BLOCKED:
744 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
745 SC_OP_RFKILL_SW_BLOCKED)))
746 ath_radio_disable(sc);
747 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
748 return 0;
749 case RFKILL_STATE_UNBLOCKED:
750 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
751 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
752 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
753 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
754 "radio as it is disabled by h/w \n");
755 return -EPERM;
756 }
757 ath_radio_enable(sc);
758 }
759 return 0;
760 default:
761 return -EINVAL;
762 }
763}
764
765/* Init s/w rfkill */
766static int ath_init_sw_rfkill(struct ath_softc *sc)
767{
768 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
769 RFKILL_TYPE_WLAN);
770 if (!sc->rf_kill.rfkill) {
771 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
772 return -ENOMEM;
773 }
774
775 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
776 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
777 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
778 sc->rf_kill.rfkill->data = sc;
779 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
780 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
781 sc->rf_kill.rfkill->user_claim_unsupported = 1;
782
783 return 0;
784}
785
786/* Deinitialize rfkill */
787static void ath_deinit_rfkill(struct ath_softc *sc)
788{
789 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
790 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
791
792 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
793 rfkill_unregister(sc->rf_kill.rfkill);
794 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
795 sc->rf_kill.rfkill = NULL;
796 }
797}
Sujith9c84b792008-10-29 10:17:13 +0530798
799static int ath_start_rfkill_poll(struct ath_softc *sc)
800{
801 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
802 queue_delayed_work(sc->hw->workqueue,
803 &sc->rf_kill.rfkill_poll, 0);
804
805 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
806 if (rfkill_register(sc->rf_kill.rfkill)) {
807 DPRINTF(sc, ATH_DBG_FATAL,
808 "Unable to register rfkill\n");
809 rfkill_free(sc->rf_kill.rfkill);
810
811 /* Deinitialize the device */
Senthil Balasubramanian306efdd2008-11-13 18:00:37 +0530812 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +0530813 if (sc->pdev->irq)
814 free_irq(sc->pdev->irq, sc);
Sujith9c84b792008-10-29 10:17:13 +0530815 pci_iounmap(sc->pdev, sc->mem);
816 pci_release_region(sc->pdev, 0);
817 pci_disable_device(sc->pdev);
Sujith9757d552008-11-04 18:25:27 +0530818 ieee80211_free_hw(sc->hw);
Sujith9c84b792008-10-29 10:17:13 +0530819 return -EIO;
820 } else {
821 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
822 }
823 }
824
825 return 0;
826}
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530827#endif /* CONFIG_RFKILL */
828
Sujith9c84b792008-10-29 10:17:13 +0530829static void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530830{
831 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +0530832 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530833
834 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
835
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530836#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530837 ath_deinit_rfkill(sc);
838#endif
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +0530839 ath_deinit_leds(sc);
840
841 ieee80211_unregister_hw(hw);
842
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530843 ath_rate_control_unregister();
Sujith9c84b792008-10-29 10:17:13 +0530844 ath_rate_detach(sc->sc_rc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530845
846 ath_rx_cleanup(sc);
847 ath_tx_cleanup(sc);
848
Sujith9c84b792008-10-29 10:17:13 +0530849 tasklet_kill(&sc->intr_tq);
850 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530851
Sujith9c84b792008-10-29 10:17:13 +0530852 if (!(sc->sc_flags & SC_OP_INVALID))
853 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530854
Sujith9c84b792008-10-29 10:17:13 +0530855 /* cleanup tx queues */
856 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
857 if (ATH_TXQ_SETUP(sc, i))
858 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
859
860 ath9k_hw_detach(sc->sc_ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530861}
862
Sujith9c84b792008-10-29 10:17:13 +0530863static int ath_attach(u16 devid, struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530864{
865 struct ieee80211_hw *hw = sc->hw;
866 int error = 0;
867
868 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
869
870 error = ath_init(devid, sc);
871 if (error != 0)
872 return error;
873
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530874 /* get mac address from hardware and set in mac80211 */
875
876 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
877
Sujith9c84b792008-10-29 10:17:13 +0530878 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
879 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
880 IEEE80211_HW_SIGNAL_DBM |
881 IEEE80211_HW_AMPDU_AGGREGATION;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530882
Sujith9c84b792008-10-29 10:17:13 +0530883 hw->wiphy->interface_modes =
884 BIT(NL80211_IFTYPE_AP) |
885 BIT(NL80211_IFTYPE_STATION) |
886 BIT(NL80211_IFTYPE_ADHOC);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530887
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530888 hw->queues = 4;
Sujith528f0c62008-10-29 10:14:26 +0530889 hw->sta_data_size = sizeof(struct ath_node);
Sujith5640b082008-10-29 10:16:06 +0530890 hw->vif_data_size = sizeof(struct ath_vap);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530891
892 /* Register rate control */
893 hw->rate_control_algorithm = "ath9k_rate_control";
894 error = ath_rate_control_register();
895 if (error != 0) {
896 DPRINTF(sc, ATH_DBG_FATAL,
897 "%s: Unable to register rate control "
898 "algorithm:%d\n", __func__, error);
899 ath_rate_control_unregister();
900 goto bad;
901 }
902
Sujith9c84b792008-10-29 10:17:13 +0530903 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
904 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
905 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
906 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
907 }
908
909 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
910 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
911 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
912 &sc->sbands[IEEE80211_BAND_5GHZ];
913
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530914 /* initialize tx/rx engine */
915 error = ath_tx_init(sc, ATH_TXBUF);
916 if (error != 0)
917 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530918
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530919 error = ath_rx_init(sc, ATH_RXBUF);
920 if (error != 0)
921 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530922
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530923#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530924 /* Initialze h/w Rfkill */
925 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
926 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
927
928 /* Initialize s/w rfkill */
929 if (ath_init_sw_rfkill(sc))
930 goto detach;
931#endif
932
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530933 error = ieee80211_register_hw(hw);
934 if (error != 0) {
935 ath_rate_control_unregister();
936 goto bad;
937 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530938
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530939 /* Initialize LED control */
940 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530941
942 return 0;
943detach:
944 ath_detach(sc);
945bad:
946 return error;
947}
948
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700949static int ath9k_start(struct ieee80211_hw *hw)
950{
951 struct ath_softc *sc = hw->priv;
952 struct ieee80211_channel *curchan = hw->conf.channel;
953 int error = 0, pos;
954
955 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
956 "initial channel: %d MHz\n", __func__, curchan->center_freq);
957
Sujith7f959032008-10-29 10:18:39 +0530958 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
959
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700960 /* setup initial channel */
961
962 pos = ath_get_channel(sc, curchan);
963 if (pos == -1) {
964 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530965 error = -EINVAL;
966 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700967 }
968
969 sc->sc_ah->ah_channels[pos].chanmode =
970 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
971
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700972 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
973 if (error) {
974 DPRINTF(sc, ATH_DBG_FATAL,
975 "%s: Unable to complete ath_open\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530976 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700977 }
978
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530979#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530980 error = ath_start_rfkill_poll(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530981#endif
982
Sujith9c84b792008-10-29 10:17:13 +0530983exit:
984 return error;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700985}
986
987static int ath9k_tx(struct ieee80211_hw *hw,
988 struct sk_buff *skb)
989{
Jouni Malinen147583c2008-08-11 14:01:50 +0300990 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Sujith528f0c62008-10-29 10:14:26 +0530991 struct ath_softc *sc = hw->priv;
992 struct ath_tx_control txctl;
993 int hdrlen, padsize;
994
995 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +0300996
997 /*
998 * As a temporary workaround, assign seq# here; this will likely need
999 * to be cleaned up to work better with Beacon transmission and virtual
1000 * BSSes.
1001 */
1002 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1003 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1004 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1005 sc->seq_no += 0x10;
1006 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1007 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1008 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001009
1010 /* Add the padding after the header if this is not already done */
1011 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1012 if (hdrlen & 3) {
1013 padsize = hdrlen % 4;
1014 if (skb_headroom(skb) < padsize)
1015 return -1;
1016 skb_push(skb, padsize);
1017 memmove(skb->data, skb->data + padsize, hdrlen);
1018 }
1019
Sujith528f0c62008-10-29 10:14:26 +05301020 /* Check if a tx queue is available */
1021
1022 txctl.txq = ath_test_get_txq(sc, skb);
1023 if (!txctl.txq)
1024 goto exit;
1025
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001026 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1027 __func__,
1028 skb);
1029
Sujith528f0c62008-10-29 10:14:26 +05301030 if (ath_tx_start(sc, skb, &txctl) != 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001031 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
Sujith528f0c62008-10-29 10:14:26 +05301032 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001033 }
1034
1035 return 0;
Sujith528f0c62008-10-29 10:14:26 +05301036exit:
1037 dev_kfree_skb_any(skb);
1038 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001039}
1040
1041static void ath9k_stop(struct ieee80211_hw *hw)
1042{
1043 struct ath_softc *sc = hw->priv;
Sujith9c84b792008-10-29 10:17:13 +05301044
1045 if (sc->sc_flags & SC_OP_INVALID) {
1046 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
1047 return;
1048 }
1049
1050 ath_stop(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001051
1052 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001053}
1054
1055static int ath9k_add_interface(struct ieee80211_hw *hw,
1056 struct ieee80211_if_init_conf *conf)
1057{
1058 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301059 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1060 int ic_opmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001061
1062 /* Support only vap for now */
1063
1064 if (sc->sc_nvaps)
1065 return -ENOBUFS;
1066
1067 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001068 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001069 ic_opmode = ATH9K_M_STA;
1070 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001071 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001072 ic_opmode = ATH9K_M_IBSS;
1073 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001074 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001075 ic_opmode = ATH9K_M_HOSTAP;
1076 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001077 default:
1078 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001079 "%s: Interface type %d not yet supported\n",
1080 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001081 return -EOPNOTSUPP;
1082 }
1083
1084 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1085 __func__,
1086 ic_opmode);
1087
Sujith5640b082008-10-29 10:16:06 +05301088 /* Set the VAP opmode */
1089 avp->av_opmode = ic_opmode;
1090 avp->av_bslot = -1;
1091
1092 if (ic_opmode == ATH9K_M_HOSTAP)
1093 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1094
1095 sc->sc_vaps[0] = conf->vif;
1096 sc->sc_nvaps++;
1097
1098 /* Set the device opmode */
1099 sc->sc_ah->ah_opmode = ic_opmode;
1100
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001101 if (conf->type == NL80211_IFTYPE_AP) {
1102 /* TODO: is this a suitable place to start ANI for AP mode? */
1103 /* Start ANI */
1104 mod_timer(&sc->sc_ani.timer,
1105 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1106 }
1107
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001108 return 0;
1109}
1110
1111static void ath9k_remove_interface(struct ieee80211_hw *hw,
1112 struct ieee80211_if_init_conf *conf)
1113{
1114 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301115 struct ath_vap *avp = (void *)conf->vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001116
1117 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1118
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001119#ifdef CONFIG_SLOW_ANT_DIV
1120 ath_slow_ant_div_stop(&sc->sc_antdiv);
1121#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001122 /* Stop ANI */
1123 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001124
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001125 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301126 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1127 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001128 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1129 ath_beacon_return(sc, avp);
1130 }
1131
Sujith672840a2008-08-11 14:05:08 +05301132 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001133
Sujith5640b082008-10-29 10:16:06 +05301134 sc->sc_vaps[0] = NULL;
1135 sc->sc_nvaps--;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001136}
1137
Johannes Berge8975582008-10-09 12:18:51 +02001138static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001139{
1140 struct ath_softc *sc = hw->priv;
1141 struct ieee80211_channel *curchan = hw->conf.channel;
Johannes Berge8975582008-10-09 12:18:51 +02001142 struct ieee80211_conf *conf = &hw->conf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001143 int pos;
1144
1145 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1146 __func__,
1147 curchan->center_freq);
1148
Johannes Bergae5eb022008-10-14 16:58:37 +02001149 /* Update chainmask */
1150 ath_update_chainmask(sc, conf->ht.enabled);
1151
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001152 pos = ath_get_channel(sc, curchan);
1153 if (pos == -1) {
1154 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1155 return -EINVAL;
1156 }
1157
1158 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301159 (curchan->band == IEEE80211_BAND_2GHZ) ?
1160 CHANNEL_G : CHANNEL_A;
1161
Johannes Bergae5eb022008-10-14 16:58:37 +02001162 if (sc->sc_curaid && hw->conf.ht.enabled)
Sujith86b89ee2008-08-07 10:54:57 +05301163 sc->sc_ah->ah_channels[pos].chanmode =
1164 ath_get_extchanmode(sc, curchan);
1165
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07001166 if (changed & IEEE80211_CONF_CHANGE_POWER)
1167 sc->sc_config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001168
1169 /* set h/w channel */
1170 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1171 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1172 __func__);
1173
1174 return 0;
1175}
1176
1177static int ath9k_config_interface(struct ieee80211_hw *hw,
1178 struct ieee80211_vif *vif,
1179 struct ieee80211_if_conf *conf)
1180{
1181 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001182 struct ath_hal *ah = sc->sc_ah;
Sujith5640b082008-10-29 10:16:06 +05301183 struct ath_vap *avp = (void *)vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001184 u32 rfilt = 0;
1185 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001186
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001187 /* TODO: Need to decide which hw opmode to use for multi-interface
1188 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001189 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001190 ah->ah_opmode != ATH9K_M_HOSTAP) {
1191 ah->ah_opmode = ATH9K_M_HOSTAP;
1192 ath9k_hw_setopmode(ah);
1193 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1194 /* Request full reset to get hw opmode changed properly */
1195 sc->sc_flags |= SC_OP_FULL_RESET;
1196 }
1197
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001198 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1199 !is_zero_ether_addr(conf->bssid)) {
1200 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001201 case NL80211_IFTYPE_STATION:
1202 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001203 /* Set BSSID */
1204 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1205 sc->sc_curaid = 0;
1206 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1207 sc->sc_curaid);
1208
1209 /* Set aggregation protection mode parameters */
1210 sc->sc_config.ath_aggr_prot = 0;
1211
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001212 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001213 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001214 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001215 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001216
1217 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301218 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001219
1220 break;
1221 default:
1222 break;
1223 }
1224 }
1225
1226 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001227 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1228 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001229 /*
1230 * Allocate and setup the beacon frame.
1231 *
1232 * Stop any previous beacon DMA. This may be
1233 * necessary, for example, when an ibss merge
1234 * causes reconfiguration; we may be called
1235 * with beacon transmission active.
1236 */
1237 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1238
1239 error = ath_beacon_alloc(sc, 0);
1240 if (error != 0)
1241 return error;
1242
1243 ath_beacon_sync(sc, 0);
1244 }
1245
1246 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Sujith5640b082008-10-29 10:16:06 +05301247 if ((avp->av_opmode != ATH9K_M_STA)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001248 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1249 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1250 ath9k_hw_keysetmac(sc->sc_ah,
1251 (u16)i,
1252 sc->sc_curbssid);
1253 }
1254
1255 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001256 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001257 ath_update_chainmask(sc, 0);
1258
1259 return 0;
1260}
1261
1262#define SUPPORTED_FILTERS \
1263 (FIF_PROMISC_IN_BSS | \
1264 FIF_ALLMULTI | \
1265 FIF_CONTROL | \
1266 FIF_OTHER_BSS | \
1267 FIF_BCN_PRBRESP_PROMISC | \
1268 FIF_FCSFAIL)
1269
Sujith7dcfdcd2008-08-11 14:03:13 +05301270/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001271static void ath9k_configure_filter(struct ieee80211_hw *hw,
1272 unsigned int changed_flags,
1273 unsigned int *total_flags,
1274 int mc_count,
1275 struct dev_mc_list *mclist)
1276{
1277 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301278 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001279
1280 changed_flags &= SUPPORTED_FILTERS;
1281 *total_flags &= SUPPORTED_FILTERS;
1282
Sujith7dcfdcd2008-08-11 14:03:13 +05301283 sc->rx_filter = *total_flags;
1284 rfilt = ath_calcrxfilter(sc);
1285 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1286
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001287 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1288 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301289 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001290 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301291
1292 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1293 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001294}
1295
1296static void ath9k_sta_notify(struct ieee80211_hw *hw,
1297 struct ieee80211_vif *vif,
1298 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001299 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001300{
1301 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001302
1303 switch (cmd) {
1304 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05301305 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001306 break;
1307 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05301308 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001309 break;
1310 default:
1311 break;
1312 }
1313}
1314
1315static int ath9k_conf_tx(struct ieee80211_hw *hw,
1316 u16 queue,
1317 const struct ieee80211_tx_queue_params *params)
1318{
1319 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301320 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001321 int ret = 0, qnum;
1322
1323 if (queue >= WME_NUM_AC)
1324 return 0;
1325
1326 qi.tqi_aifs = params->aifs;
1327 qi.tqi_cwmin = params->cw_min;
1328 qi.tqi_cwmax = params->cw_max;
1329 qi.tqi_burstTime = params->txop;
1330 qnum = ath_get_hal_qnum(queue, sc);
1331
1332 DPRINTF(sc, ATH_DBG_CONFIG,
1333 "%s: Configure tx [queue/halq] [%d/%d], "
1334 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1335 __func__,
1336 queue,
1337 qnum,
1338 params->aifs,
1339 params->cw_min,
1340 params->cw_max,
1341 params->txop);
1342
1343 ret = ath_txq_update(sc, qnum, &qi);
1344 if (ret)
1345 DPRINTF(sc, ATH_DBG_FATAL,
1346 "%s: TXQ Update failed\n", __func__);
1347
1348 return ret;
1349}
1350
1351static int ath9k_set_key(struct ieee80211_hw *hw,
1352 enum set_key_cmd cmd,
1353 const u8 *local_addr,
1354 const u8 *addr,
1355 struct ieee80211_key_conf *key)
1356{
1357 struct ath_softc *sc = hw->priv;
1358 int ret = 0;
1359
1360 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1361
1362 switch (cmd) {
1363 case SET_KEY:
1364 ret = ath_key_config(sc, addr, key);
1365 if (!ret) {
1366 set_bit(key->keyidx, sc->sc_keymap);
1367 key->hw_key_idx = key->keyidx;
1368 /* push IV and Michael MIC generation to stack */
1369 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301370 if (key->alg == ALG_TKIP)
1371 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001372 }
1373 break;
1374 case DISABLE_KEY:
1375 ath_key_delete(sc, key);
1376 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001377 break;
1378 default:
1379 ret = -EINVAL;
1380 }
1381
1382 return ret;
1383}
1384
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001385static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1386 struct ieee80211_vif *vif,
1387 struct ieee80211_bss_conf *bss_conf,
1388 u32 changed)
1389{
1390 struct ath_softc *sc = hw->priv;
1391
1392 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1393 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1394 __func__,
1395 bss_conf->use_short_preamble);
1396 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301397 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001398 else
Sujith672840a2008-08-11 14:05:08 +05301399 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001400 }
1401
1402 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1403 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1404 __func__,
1405 bss_conf->use_cts_prot);
1406 if (bss_conf->use_cts_prot &&
1407 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301408 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001409 else
Sujith672840a2008-08-11 14:05:08 +05301410 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001411 }
1412
1413 if (changed & BSS_CHANGED_HT) {
Johannes Bergae5eb022008-10-14 16:58:37 +02001414 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1415 __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001416 ath9k_ht_conf(sc, bss_conf);
1417 }
1418
1419 if (changed & BSS_CHANGED_ASSOC) {
1420 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1421 __func__,
1422 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05301423 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001424 }
1425}
1426
1427static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1428{
1429 u64 tsf;
1430 struct ath_softc *sc = hw->priv;
1431 struct ath_hal *ah = sc->sc_ah;
1432
1433 tsf = ath9k_hw_gettsf64(ah);
1434
1435 return tsf;
1436}
1437
1438static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1439{
1440 struct ath_softc *sc = hw->priv;
1441 struct ath_hal *ah = sc->sc_ah;
1442
1443 ath9k_hw_reset_tsf(ah);
1444}
1445
1446static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1447 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001448 struct ieee80211_sta *sta,
1449 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001450{
1451 struct ath_softc *sc = hw->priv;
1452 int ret = 0;
1453
1454 switch (action) {
1455 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05301456 if (!(sc->sc_flags & SC_OP_RXAGGR))
1457 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001458 break;
1459 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001460 break;
1461 case IEEE80211_AMPDU_TX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301462 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001463 if (ret < 0)
1464 DPRINTF(sc, ATH_DBG_FATAL,
1465 "%s: Unable to start TX aggregation\n",
1466 __func__);
1467 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001468 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001469 break;
1470 case IEEE80211_AMPDU_TX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301471 ret = ath_tx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001472 if (ret < 0)
1473 DPRINTF(sc, ATH_DBG_FATAL,
1474 "%s: Unable to stop TX aggregation\n",
1475 __func__);
1476
Johannes Berg17741cd2008-09-11 00:02:02 +02001477 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001478 break;
Sujith8469cde2008-10-29 10:19:28 +05301479 case IEEE80211_AMPDU_TX_RESUME:
1480 ath_tx_aggr_resume(sc, sta, tid);
1481 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001482 default:
1483 DPRINTF(sc, ATH_DBG_FATAL,
1484 "%s: Unknown AMPDU action\n", __func__);
1485 }
1486
1487 return ret;
1488}
1489
Johannes Berg4233df62008-10-13 13:35:05 +02001490static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1491{
1492 return -EOPNOTSUPP;
1493}
1494
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001495static struct ieee80211_ops ath9k_ops = {
1496 .tx = ath9k_tx,
1497 .start = ath9k_start,
1498 .stop = ath9k_stop,
1499 .add_interface = ath9k_add_interface,
1500 .remove_interface = ath9k_remove_interface,
1501 .config = ath9k_config,
1502 .config_interface = ath9k_config_interface,
1503 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001504 .sta_notify = ath9k_sta_notify,
1505 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001506 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001507 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001508 .get_tsf = ath9k_get_tsf,
1509 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02001510 .ampdu_action = ath9k_ampdu_action,
1511 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001512};
1513
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001514static struct {
1515 u32 version;
1516 const char * name;
1517} ath_mac_bb_names[] = {
1518 { AR_SREV_VERSION_5416_PCI, "5416" },
1519 { AR_SREV_VERSION_5416_PCIE, "5418" },
1520 { AR_SREV_VERSION_9100, "9100" },
1521 { AR_SREV_VERSION_9160, "9160" },
1522 { AR_SREV_VERSION_9280, "9280" },
1523 { AR_SREV_VERSION_9285, "9285" }
1524};
1525
1526static struct {
1527 u16 version;
1528 const char * name;
1529} ath_rf_names[] = {
1530 { 0, "5133" },
1531 { AR_RAD5133_SREV_MAJOR, "5133" },
1532 { AR_RAD5122_SREV_MAJOR, "5122" },
1533 { AR_RAD2133_SREV_MAJOR, "2133" },
1534 { AR_RAD2122_SREV_MAJOR, "2122" }
1535};
1536
1537/*
1538 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1539 */
1540
1541static const char *
1542ath_mac_bb_name(u32 mac_bb_version)
1543{
1544 int i;
1545
1546 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1547 if (ath_mac_bb_names[i].version == mac_bb_version) {
1548 return ath_mac_bb_names[i].name;
1549 }
1550 }
1551
1552 return "????";
1553}
1554
1555/*
1556 * Return the RF name. "????" is returned if the RF is unknown.
1557 */
1558
1559static const char *
1560ath_rf_name(u16 rf_version)
1561{
1562 int i;
1563
1564 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1565 if (ath_rf_names[i].version == rf_version) {
1566 return ath_rf_names[i].name;
1567 }
1568 }
1569
1570 return "????";
1571}
1572
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001573static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1574{
1575 void __iomem *mem;
1576 struct ath_softc *sc;
1577 struct ieee80211_hw *hw;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001578 u8 csz;
1579 u32 val;
1580 int ret = 0;
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001581 struct ath_hal *ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001582
1583 if (pci_enable_device(pdev))
1584 return -EIO;
1585
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001586 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1587
1588 if (ret) {
Luis R. Rodriguez1d450cf2008-11-13 19:11:56 -08001589 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001590 goto bad;
1591 }
1592
1593 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1594
1595 if (ret) {
1596 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1597 "DMA enable faled\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001598 goto bad;
1599 }
1600
1601 /*
1602 * Cache line size is used to size and align various
1603 * structures used to communicate with the hardware.
1604 */
1605 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1606 if (csz == 0) {
1607 /*
1608 * Linux 2.4.18 (at least) writes the cache line size
1609 * register as a 16-bit wide register which is wrong.
1610 * We must have this setup properly for rx buffer
1611 * DMA to work so force a reasonable value here if it
1612 * comes up zero.
1613 */
1614 csz = L1_CACHE_BYTES / sizeof(u32);
1615 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1616 }
1617 /*
1618 * The default setting of latency timer yields poor results,
1619 * set it to the value used by other systems. It may be worth
1620 * tweaking this setting more.
1621 */
1622 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1623
1624 pci_set_master(pdev);
1625
1626 /*
1627 * Disable the RETRY_TIMEOUT register (0x41) to keep
1628 * PCI Tx retries from interfering with C3 CPU state.
1629 */
1630 pci_read_config_dword(pdev, 0x40, &val);
1631 if ((val & 0x0000ff00) != 0)
1632 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1633
1634 ret = pci_request_region(pdev, 0, "ath9k");
1635 if (ret) {
1636 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1637 ret = -ENODEV;
1638 goto bad;
1639 }
1640
1641 mem = pci_iomap(pdev, 0, 0);
1642 if (!mem) {
1643 printk(KERN_ERR "PCI memory map error\n") ;
1644 ret = -EIO;
1645 goto bad1;
1646 }
1647
1648 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1649 if (hw == NULL) {
1650 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1651 goto bad2;
1652 }
1653
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001654 SET_IEEE80211_DEV(hw, &pdev->dev);
1655 pci_set_drvdata(pdev, hw);
1656
1657 sc = hw->priv;
1658 sc->hw = hw;
1659 sc->pdev = pdev;
1660 sc->mem = mem;
1661
1662 if (ath_attach(id->device, sc) != 0) {
1663 ret = -ENODEV;
1664 goto bad3;
1665 }
1666
1667 /* setup interrupt service routine */
1668
1669 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1670 printk(KERN_ERR "%s: request_irq failed\n",
1671 wiphy_name(hw->wiphy));
1672 ret = -EIO;
1673 goto bad4;
1674 }
1675
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001676 ah = sc->sc_ah;
1677 printk(KERN_INFO
1678 "%s: Atheros AR%s MAC/BB Rev:%x "
1679 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001680 wiphy_name(hw->wiphy),
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001681 ath_mac_bb_name(ah->ah_macVersion),
1682 ah->ah_macRev,
1683 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1684 ah->ah_phyRev,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001685 (unsigned long)mem, pdev->irq);
1686
1687 return 0;
1688bad4:
1689 ath_detach(sc);
1690bad3:
1691 ieee80211_free_hw(hw);
1692bad2:
1693 pci_iounmap(pdev, mem);
1694bad1:
1695 pci_release_region(pdev, 0);
1696bad:
1697 pci_disable_device(pdev);
1698 return ret;
1699}
1700
1701static void ath_pci_remove(struct pci_dev *pdev)
1702{
1703 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1704 struct ath_softc *sc = hw->priv;
1705
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001706 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +05301707 if (pdev->irq)
1708 free_irq(pdev->irq, sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001709 pci_iounmap(pdev, sc->mem);
1710 pci_release_region(pdev, 0);
1711 pci_disable_device(pdev);
1712 ieee80211_free_hw(hw);
1713}
1714
1715#ifdef CONFIG_PM
1716
1717static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1718{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301719 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1720 struct ath_softc *sc = hw->priv;
1721
1722 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301723
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301724#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301725 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1726 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1727#endif
1728
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001729 pci_save_state(pdev);
1730 pci_disable_device(pdev);
1731 pci_set_power_state(pdev, 3);
1732
1733 return 0;
1734}
1735
1736static int ath_pci_resume(struct pci_dev *pdev)
1737{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301738 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1739 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001740 u32 val;
1741 int err;
1742
1743 err = pci_enable_device(pdev);
1744 if (err)
1745 return err;
1746 pci_restore_state(pdev);
1747 /*
1748 * Suspend/Resume resets the PCI configuration space, so we have to
1749 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1750 * PCI Tx retries from interfering with C3 CPU state
1751 */
1752 pci_read_config_dword(pdev, 0x40, &val);
1753 if ((val & 0x0000ff00) != 0)
1754 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1755
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301756 /* Enable LED */
1757 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1758 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1759 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1760
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301761#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301762 /*
1763 * check the h/w rfkill state on resume
1764 * and start the rfkill poll timer
1765 */
1766 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1767 queue_delayed_work(sc->hw->workqueue,
1768 &sc->rf_kill.rfkill_poll, 0);
1769#endif
1770
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001771 return 0;
1772}
1773
1774#endif /* CONFIG_PM */
1775
1776MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1777
1778static struct pci_driver ath_pci_driver = {
1779 .name = "ath9k",
1780 .id_table = ath_pci_id_table,
1781 .probe = ath_pci_probe,
1782 .remove = ath_pci_remove,
1783#ifdef CONFIG_PM
1784 .suspend = ath_pci_suspend,
1785 .resume = ath_pci_resume,
1786#endif /* CONFIG_PM */
1787};
1788
1789static int __init init_ath_pci(void)
1790{
1791 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1792
1793 if (pci_register_driver(&ath_pci_driver) < 0) {
1794 printk(KERN_ERR
1795 "ath_pci: No devices found, driver not installed.\n");
1796 pci_unregister_driver(&ath_pci_driver);
1797 return -ENODEV;
1798 }
1799
1800 return 0;
1801}
1802module_init(init_ath_pci);
1803
1804static void __exit exit_ath_pci(void)
1805{
1806 pci_unregister_driver(&ath_pci_driver);
1807 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1808}
1809module_exit(exit_ath_pci);