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Ivo van Doorn181d6902008-02-05 16:42:23 -05001/*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00
23 Abstract: rt2x00 queue datastructures and routines
24 */
25
26#ifndef RT2X00QUEUE_H
27#define RT2X00QUEUE_H
28
29#include <linux/prefetch.h>
30
31/**
32 * DOC: Entrie frame size
33 *
34 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
35 * for USB devices this restriction does not apply, but the value of
36 * 2432 makes sense since it is big enough to contain the maximum fragment
37 * size according to the ieee802.11 specs.
38 */
39#define DATA_FRAME_SIZE 2432
40#define MGMT_FRAME_SIZE 256
41
42/**
43 * DOC: Number of entries per queue
44 *
Ivo van Doornf5299322008-06-16 19:57:40 +020045 * Under normal load without fragmentation 12 entries are sufficient
46 * without the queue being filled up to the maximum. When using fragmentation
47 * and the queue threshold code we need to add some additional margins to
48 * make sure the queue will never (or only under extreme load) fill up
49 * completely.
50 * Since we don't use preallocated DMA having a large number of queue entries
51 * will have only minimal impact on the memory requirements for the queue.
Ivo van Doorn181d6902008-02-05 16:42:23 -050052 */
Ivo van Doornf5299322008-06-16 19:57:40 +020053#define RX_ENTRIES 24
54#define TX_ENTRIES 24
Ivo van Doorn181d6902008-02-05 16:42:23 -050055#define BEACON_ENTRIES 1
Ivo van Doornf5299322008-06-16 19:57:40 +020056#define ATIM_ENTRIES 8
Ivo van Doorn181d6902008-02-05 16:42:23 -050057
58/**
59 * enum data_queue_qid: Queue identification
Ivo van Doorne58c6ac2008-04-21 19:00:47 +020060 *
61 * @QID_AC_BE: AC BE queue
62 * @QID_AC_BK: AC BK queue
63 * @QID_AC_VI: AC VI queue
64 * @QID_AC_VO: AC VO queue
65 * @QID_HCCA: HCCA queue
66 * @QID_MGMT: MGMT queue (prio queue)
67 * @QID_RX: RX queue
68 * @QID_OTHER: None of the above (don't use, only present for completeness)
69 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
70 * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
Ivo van Doorn181d6902008-02-05 16:42:23 -050071 */
72enum data_queue_qid {
73 QID_AC_BE = 0,
74 QID_AC_BK = 1,
75 QID_AC_VI = 2,
76 QID_AC_VO = 3,
77 QID_HCCA = 4,
78 QID_MGMT = 13,
79 QID_RX = 14,
80 QID_OTHER = 15,
Ivo van Doorne58c6ac2008-04-21 19:00:47 +020081 QID_BEACON,
82 QID_ATIM,
Ivo van Doorn181d6902008-02-05 16:42:23 -050083};
84
85/**
Ivo van Doornbaf26a72008-02-17 17:32:08 +010086 * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
87 *
Ivo van Doornd74f5ba2008-06-16 19:56:54 +020088 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
89 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
Ivo van Doorn2bb057d2008-08-04 16:37:44 +020090 * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
91 * mac80211 but was stripped for processing by the driver.
Ivo van Doornbaf26a72008-02-17 17:32:08 +010092 */
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +020093enum skb_frame_desc_flags {
Ivo van Doorn2bb057d2008-08-04 16:37:44 +020094 SKBDESC_DMA_MAPPED_RX = 1 << 0,
95 SKBDESC_DMA_MAPPED_TX = 1 << 1,
96 FRAME_DESC_IV_STRIPPED = 1 << 2,
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +020097};
Ivo van Doornbaf26a72008-02-17 17:32:08 +010098
99/**
Ivo van Doorn181d6902008-02-05 16:42:23 -0500100 * struct skb_frame_desc: Descriptor information for the skb buffer
101 *
Johannes Berge039fa42008-05-15 12:55:29 +0200102 * This structure is placed over the driver_data array, this means that
103 * this structure should not exceed the size of that array (40 bytes).
Ivo van Doorn181d6902008-02-05 16:42:23 -0500104 *
Ivo van Doornbaf26a72008-02-17 17:32:08 +0100105 * @flags: Frame flags, see &enum skb_frame_desc_flags.
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +0200106 * @desc_len: Length of the frame descriptor.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500107 * @desc: Pointer to descriptor part of the frame.
108 * Note that this pointer could point to something outside
109 * of the scope of the skb->data pointer.
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200110 * @iv: IV data used during encryption/decryption.
111 * @eiv: EIV data used during encryption/decryption.
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +0200112 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500113 * @entry: The entry to which this sk buffer belongs.
114 */
115struct skb_frame_desc {
116 unsigned int flags;
117
Gertjan van Wingerded56d4532008-06-06 22:54:08 +0200118 unsigned int desc_len;
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +0200119 void *desc;
120
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200121 __le32 iv;
122 __le32 eiv;
123
Gertjan van Wingerdec4da0042008-06-16 19:56:31 +0200124 dma_addr_t skb_dma;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500125
Ivo van Doorn181d6902008-02-05 16:42:23 -0500126 struct queue_entry *entry;
127};
128
Johannes Berge039fa42008-05-15 12:55:29 +0200129/**
130 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
131 * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
132 */
Ivo van Doorn181d6902008-02-05 16:42:23 -0500133static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
134{
Johannes Berge039fa42008-05-15 12:55:29 +0200135 BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
136 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
137 return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500138}
139
140/**
Ivo van Doorn19d30e02008-03-15 21:38:07 +0100141 * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
142 *
143 * @RXDONE_SIGNAL_PLCP: Does the signal field contain the plcp value,
144 * or does it contain the bitrate itself.
145 * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
146 */
147enum rxdone_entry_desc_flags {
148 RXDONE_SIGNAL_PLCP = 1 << 0,
149 RXDONE_MY_BSS = 1 << 1,
150};
151
152/**
Ivo van Doorn181d6902008-02-05 16:42:23 -0500153 * struct rxdone_entry_desc: RX Entry descriptor
154 *
155 * Summary of information that has been read from the RX frame descriptor.
156 *
Ivo van Doornae73e582008-07-04 16:14:59 +0200157 * @timestamp: RX Timestamp
Ivo van Doorn181d6902008-02-05 16:42:23 -0500158 * @signal: Signal of the received frame.
159 * @rssi: RSSI of the received frame.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500160 * @size: Data size of the received frame.
161 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
Ivo van Doorn19d30e02008-03-15 21:38:07 +0100162 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200163 * @cipher: Cipher type used during decryption.
164 * @cipher_status: Decryption status.
165 * @iv: IV data used during decryption.
166 * @eiv: EIV data used during decryption.
167 * @icv: ICV data used during decryption.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500168 */
169struct rxdone_entry_desc {
Ivo van Doornae73e582008-07-04 16:14:59 +0200170 u64 timestamp;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500171 int signal;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500172 int rssi;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500173 int size;
174 int flags;
Ivo van Doorn19d30e02008-03-15 21:38:07 +0100175 int dev_flags;
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200176 u8 cipher;
177 u8 cipher_status;
178
179 __le32 iv;
180 __le32 eiv;
181 __le32 icv;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500182};
183
184/**
Ivo van Doornfb55f4d2008-05-10 13:42:06 +0200185 * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
186 *
187 * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
188 * @TXDONE_SUCCESS: Frame was successfully send
189 * @TXDONE_FAILURE: Frame was not successfully send
190 * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
191 * frame transmission failed due to excessive retries.
192 */
193enum txdone_entry_desc_flags {
Jochen Friedrichf126cba2008-08-15 14:47:46 +0200194 TXDONE_UNKNOWN,
195 TXDONE_SUCCESS,
196 TXDONE_FAILURE,
197 TXDONE_EXCESSIVE_RETRY,
Ivo van Doornfb55f4d2008-05-10 13:42:06 +0200198};
199
200/**
Ivo van Doorn181d6902008-02-05 16:42:23 -0500201 * struct txdone_entry_desc: TX done entry descriptor
202 *
203 * Summary of information that has been read from the TX frame descriptor
204 * after the device is done with transmission.
205 *
Ivo van Doornfb55f4d2008-05-10 13:42:06 +0200206 * @flags: TX done flags (See &enum txdone_entry_desc_flags).
Ivo van Doorn181d6902008-02-05 16:42:23 -0500207 * @retry: Retry count.
208 */
209struct txdone_entry_desc {
Ivo van Doornfb55f4d2008-05-10 13:42:06 +0200210 unsigned long flags;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500211 int retry;
212};
213
214/**
215 * enum txentry_desc_flags: Status flags for TX entry descriptor
216 *
217 * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
Ivo van Doorn7050ec82008-05-10 13:46:13 +0200218 * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500219 * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate.
Ivo van Doorn5adf6d62008-07-20 18:03:38 +0200220 * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
Ivo van Doorn61486e02008-05-10 13:42:31 +0200221 * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500222 * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
223 * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
224 * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
225 * @ENTRY_TXD_ACK: An ACK is required for this frame.
Ivo van Doorn61486e02008-05-10 13:42:31 +0200226 * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200227 * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
228 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
229 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
230 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500231 */
232enum txentry_desc_flags {
233 ENTRY_TXD_RTS_FRAME,
Ivo van Doorn7050ec82008-05-10 13:46:13 +0200234 ENTRY_TXD_CTS_FRAME,
Ivo van Doorn181d6902008-02-05 16:42:23 -0500235 ENTRY_TXD_OFDM_RATE,
Ivo van Doorn5adf6d62008-07-20 18:03:38 +0200236 ENTRY_TXD_GENERATE_SEQ,
Ivo van Doorn61486e02008-05-10 13:42:31 +0200237 ENTRY_TXD_FIRST_FRAGMENT,
Ivo van Doorn181d6902008-02-05 16:42:23 -0500238 ENTRY_TXD_MORE_FRAG,
239 ENTRY_TXD_REQ_TIMESTAMP,
240 ENTRY_TXD_BURST,
241 ENTRY_TXD_ACK,
Ivo van Doorn61486e02008-05-10 13:42:31 +0200242 ENTRY_TXD_RETRY_MODE,
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200243 ENTRY_TXD_ENCRYPT,
244 ENTRY_TXD_ENCRYPT_PAIRWISE,
245 ENTRY_TXD_ENCRYPT_IV,
246 ENTRY_TXD_ENCRYPT_MMIC,
Ivo van Doorn181d6902008-02-05 16:42:23 -0500247};
248
249/**
250 * struct txentry_desc: TX Entry descriptor
251 *
252 * Summary of information for the frame descriptor before sending a TX frame.
253 *
254 * @flags: Descriptor flags (See &enum queue_entry_flags).
255 * @queue: Queue identification (See &enum data_queue_qid).
256 * @length_high: PLCP length high word.
257 * @length_low: PLCP length low word.
258 * @signal: PLCP signal.
259 * @service: PLCP service.
Ivo van Doorn61486e02008-05-10 13:42:31 +0200260 * @retry_limit: Max number of retries.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500261 * @aifs: AIFS value.
262 * @ifs: IFS value.
263 * @cw_min: cwmin value.
264 * @cw_max: cwmax value.
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200265 * @cipher: Cipher type used for encryption.
266 * @key_idx: Key index used for encryption.
267 * @iv_offset: Position where IV should be inserted by hardware.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500268 */
269struct txentry_desc {
270 unsigned long flags;
271
272 enum data_queue_qid queue;
273
274 u16 length_high;
275 u16 length_low;
276 u16 signal;
277 u16 service;
278
Ivo van Doorn61486e02008-05-10 13:42:31 +0200279 short retry_limit;
280 short aifs;
281 short ifs;
282 short cw_min;
283 short cw_max;
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200284
285 enum cipher cipher;
286 u16 key_idx;
287 u16 iv_offset;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500288};
289
290/**
291 * enum queue_entry_flags: Status flags for queue entry
292 *
293 * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
294 * As long as this bit is set, this entry may only be touched
295 * through the interface structure.
296 * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
297 * transfer (either TX or RX depending on the queue). The entry should
298 * only be touched after the device has signaled it is done with it.
299 * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
300 * encryption or decryption. The entry should only be touched after
301 * the device has signaled it is done with it.
Ivo van Doornf019d512008-06-06 22:47:39 +0200302 * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
303 * for the signal to start sending.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500304 */
Ivo van Doorn181d6902008-02-05 16:42:23 -0500305enum queue_entry_flags {
306 ENTRY_BCN_ASSIGNED,
307 ENTRY_OWNER_DEVICE_DATA,
308 ENTRY_OWNER_DEVICE_CRYPTO,
Ivo van Doornf019d512008-06-06 22:47:39 +0200309 ENTRY_DATA_PENDING,
Ivo van Doorn181d6902008-02-05 16:42:23 -0500310};
311
312/**
313 * struct queue_entry: Entry inside the &struct data_queue
314 *
315 * @flags: Entry flags, see &enum queue_entry_flags.
316 * @queue: The data queue (&struct data_queue) to which this entry belongs.
317 * @skb: The buffer which is currently being transmitted (for TX queue),
318 * or used to directly recieve data in (for RX queue).
319 * @entry_idx: The entry index number.
320 * @priv_data: Private data belonging to this queue entry. The pointer
321 * points to data specific to a particular driver and queue type.
322 */
323struct queue_entry {
324 unsigned long flags;
325
326 struct data_queue *queue;
327
328 struct sk_buff *skb;
329
330 unsigned int entry_idx;
331
332 void *priv_data;
333};
334
335/**
336 * enum queue_index: Queue index type
337 *
338 * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
339 * owned by the hardware then the queue is considered to be full.
340 * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
341 * the hardware and for which we need to run the txdone handler. If this
342 * entry is not owned by the hardware the queue is considered to be empty.
343 * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
344 * will be completed by the hardware next.
345 * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
346 * of the index array.
347 */
348enum queue_index {
349 Q_INDEX,
350 Q_INDEX_DONE,
351 Q_INDEX_CRYPTO,
352 Q_INDEX_MAX,
353};
354
355/**
356 * struct data_queue: Data queue
357 *
358 * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
359 * @entries: Base address of the &struct queue_entry which are
360 * part of this queue.
361 * @qid: The queue identification, see &enum data_queue_qid.
362 * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
363 * @index_crypt needs to be changed this lock should be grabbed to prevent
364 * index corruption due to concurrency.
365 * @count: Number of frames handled in the queue.
366 * @limit: Maximum number of entries in the queue.
Ivo van Doornb8697672008-06-06 22:53:14 +0200367 * @threshold: Minimum number of free entries before queue is kicked by force.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500368 * @length: Number of frames in queue.
369 * @index: Index pointers to entry positions in the queue,
370 * use &enum queue_index to get a specific index field.
371 * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
372 * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
373 * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
374 * @data_size: Maximum data size for the frames in this queue.
375 * @desc_size: Hardware descriptor size for the data in this queue.
376 */
377struct data_queue {
378 struct rt2x00_dev *rt2x00dev;
379 struct queue_entry *entries;
380
381 enum data_queue_qid qid;
382
383 spinlock_t lock;
384 unsigned int count;
385 unsigned short limit;
Ivo van Doornb8697672008-06-06 22:53:14 +0200386 unsigned short threshold;
Ivo van Doorn181d6902008-02-05 16:42:23 -0500387 unsigned short length;
388 unsigned short index[Q_INDEX_MAX];
389
390 unsigned short aifs;
391 unsigned short cw_min;
392 unsigned short cw_max;
393
394 unsigned short data_size;
395 unsigned short desc_size;
396};
397
398/**
399 * struct data_queue_desc: Data queue description
400 *
401 * The information in this structure is used by drivers
402 * to inform rt2x00lib about the creation of the data queue.
403 *
404 * @entry_num: Maximum number of entries for a queue.
405 * @data_size: Maximum data size for the frames in this queue.
406 * @desc_size: Hardware descriptor size for the data in this queue.
407 * @priv_size: Size of per-queue_entry private data.
408 */
409struct data_queue_desc {
410 unsigned short entry_num;
411 unsigned short data_size;
412 unsigned short desc_size;
413 unsigned short priv_size;
414};
415
416/**
417 * queue_end - Return pointer to the last queue (HELPER MACRO).
418 * @__dev: Pointer to &struct rt2x00_dev
419 *
420 * Using the base rx pointer and the maximum number of available queues,
421 * this macro will return the address of 1 position beyond the end of the
422 * queues array.
423 */
424#define queue_end(__dev) \
425 &(__dev)->rx[(__dev)->data_queues]
426
427/**
428 * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
429 * @__dev: Pointer to &struct rt2x00_dev
430 *
431 * Using the base tx pointer and the maximum number of available TX
432 * queues, this macro will return the address of 1 position beyond
433 * the end of the TX queue array.
434 */
435#define tx_queue_end(__dev) \
Gertjan van Wingerde61448f82008-05-10 13:43:33 +0200436 &(__dev)->tx[(__dev)->ops->tx_queues]
Ivo van Doorn181d6902008-02-05 16:42:23 -0500437
438/**
439 * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
440 * @__entry: Pointer where the current queue entry will be stored in.
441 * @__start: Start queue pointer.
442 * @__end: End queue pointer.
443 *
444 * This macro will loop through all queues between &__start and &__end.
445 */
446#define queue_loop(__entry, __start, __end) \
447 for ((__entry) = (__start); \
448 prefetch(&(__entry)[1]), (__entry) != (__end); \
449 (__entry) = &(__entry)[1])
450
451/**
452 * queue_for_each - Loop through all queues
453 * @__dev: Pointer to &struct rt2x00_dev
454 * @__entry: Pointer where the current queue entry will be stored in.
455 *
456 * This macro will loop through all available queues.
457 */
458#define queue_for_each(__dev, __entry) \
459 queue_loop(__entry, (__dev)->rx, queue_end(__dev))
460
461/**
462 * tx_queue_for_each - Loop through the TX queues
463 * @__dev: Pointer to &struct rt2x00_dev
464 * @__entry: Pointer where the current queue entry will be stored in.
465 *
466 * This macro will loop through all TX related queues excluding
467 * the Beacon and Atim queues.
468 */
469#define tx_queue_for_each(__dev, __entry) \
470 queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
471
472/**
473 * txall_queue_for_each - Loop through all TX related queues
474 * @__dev: Pointer to &struct rt2x00_dev
475 * @__entry: Pointer where the current queue entry will be stored in.
476 *
477 * This macro will loop through all TX related queues including
478 * the Beacon and Atim queues.
479 */
480#define txall_queue_for_each(__dev, __entry) \
481 queue_loop(__entry, (__dev)->tx, queue_end(__dev))
482
483/**
484 * rt2x00queue_empty - Check if the queue is empty.
485 * @queue: Queue to check if empty.
486 */
487static inline int rt2x00queue_empty(struct data_queue *queue)
488{
489 return queue->length == 0;
490}
491
492/**
493 * rt2x00queue_full - Check if the queue is full.
494 * @queue: Queue to check if full.
495 */
496static inline int rt2x00queue_full(struct data_queue *queue)
497{
498 return queue->length == queue->limit;
499}
500
501/**
502 * rt2x00queue_free - Check the number of available entries in queue.
503 * @queue: Queue to check.
504 */
505static inline int rt2x00queue_available(struct data_queue *queue)
506{
507 return queue->limit - queue->length;
508}
509
510/**
Ivo van Doornb8697672008-06-06 22:53:14 +0200511 * rt2x00queue_threshold - Check if the queue is below threshold
512 * @queue: Queue to check.
513 */
514static inline int rt2x00queue_threshold(struct data_queue *queue)
515{
516 return rt2x00queue_available(queue) < queue->threshold;
517}
518
519/**
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200520 * _rt2x00_desc_read - Read a word from the hardware descriptor.
521 * @desc: Base descriptor address
522 * @word: Word index from where the descriptor should be read.
523 * @value: Address where the descriptor value should be written into.
524 */
525static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
526{
527 *value = desc[word];
528}
529
530/**
531 * rt2x00_desc_read - Read a word from the hardware descriptor, this
532 * function will take care of the byte ordering.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500533 * @desc: Base descriptor address
534 * @word: Word index from where the descriptor should be read.
535 * @value: Address where the descriptor value should be written into.
536 */
537static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
538{
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200539 __le32 tmp;
540 _rt2x00_desc_read(desc, word, &tmp);
541 *value = le32_to_cpu(tmp);
Ivo van Doorn181d6902008-02-05 16:42:23 -0500542}
543
544/**
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200545 * rt2x00_desc_write - write a word to the hardware descriptor, this
546 * function will take care of the byte ordering.
547 * @desc: Base descriptor address
548 * @word: Word index from where the descriptor should be written.
549 * @value: Value that should be written into the descriptor.
550 */
551static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
552{
553 desc[word] = value;
554}
555
556/**
557 * rt2x00_desc_write - write a word to the hardware descriptor.
Ivo van Doorn181d6902008-02-05 16:42:23 -0500558 * @desc: Base descriptor address
559 * @word: Word index from where the descriptor should be written.
560 * @value: Value that should be written into the descriptor.
561 */
562static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
563{
Ivo van Doorn2bb057d2008-08-04 16:37:44 +0200564 _rt2x00_desc_write(desc, word, cpu_to_le32(value));
Ivo van Doorn181d6902008-02-05 16:42:23 -0500565}
566
567#endif /* RT2X00QUEUE_H */