blob: a0e046c149b78c18c359826389145ab93e63f556 [file] [log] [blame]
Roland Dreier225c7b12007-05-08 18:00:38 -07001/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#ifndef MLX4_FW_H
36#define MLX4_FW_H
37
38#include "mlx4.h"
39#include "icm.h"
40
Vladimir Sokolovsky2d928652008-07-14 23:48:53 -070041struct mlx4_mod_stat_cfg {
42 u8 log_pg_sz;
43 u8 log_pg_sz_m;
44};
45
Roland Dreier225c7b12007-05-08 18:00:38 -070046struct mlx4_dev_cap {
47 int max_srq_sz;
48 int max_qp_sz;
49 int reserved_qps;
50 int max_qps;
51 int reserved_srqs;
52 int max_srqs;
53 int max_cq_sz;
54 int reserved_cqs;
55 int max_cqs;
56 int max_mpts;
57 int reserved_eqs;
58 int max_eqs;
59 int reserved_mtts;
60 int max_mrw_sz;
61 int reserved_mrws;
62 int max_mtt_seg;
63 int max_requester_per_qp;
64 int max_responder_per_qp;
65 int max_rdma_global;
66 int local_ca_ack_delay;
Roland Dreier225c7b12007-05-08 18:00:38 -070067 int num_ports;
Dotan Barak149983af2007-06-26 15:55:28 +030068 u32 max_msg_sz;
Roland Dreier5ae2a7a2007-06-18 08:15:02 -070069 int max_mtu[MLX4_MAX_PORTS + 1];
70 int max_port_width[MLX4_MAX_PORTS + 1];
71 int max_vl[MLX4_MAX_PORTS + 1];
72 int max_gids[MLX4_MAX_PORTS + 1];
73 int max_pkeys[MLX4_MAX_PORTS + 1];
Roland Dreier225c7b12007-05-08 18:00:38 -070074 u16 stat_rate_support;
Roland Dreier225c7b12007-05-08 18:00:38 -070075 u32 flags;
76 int reserved_uars;
77 int uar_size;
78 int min_page_sz;
79 int bf_reg_size;
80 int bf_regs_per_page;
81 int max_sq_sg;
82 int max_sq_desc_sz;
83 int max_rq_sg;
84 int max_rq_desc_sz;
85 int max_qp_per_mcg;
86 int reserved_mgms;
87 int max_mcgs;
88 int reserved_pds;
89 int max_pds;
90 int qpc_entry_sz;
91 int rdmarc_entry_sz;
92 int altc_entry_sz;
93 int aux_entry_sz;
94 int srq_entry_sz;
95 int cqc_entry_sz;
96 int eqc_entry_sz;
97 int dmpt_entry_sz;
98 int cmpt_entry_sz;
99 int mtt_entry_sz;
100 int resize_srq;
101 u8 bmme_flags;
102 u32 reserved_lkey;
103 u64 max_icm_sz;
Eli Cohenb832be12008-04-16 21:09:27 -0700104 int max_gso_sz;
Roland Dreier225c7b12007-05-08 18:00:38 -0700105};
106
107struct mlx4_adapter {
Roland Dreier225c7b12007-05-08 18:00:38 -0700108 char board_id[MLX4_BOARD_ID_LEN];
109 u8 inta_pin;
110};
111
112struct mlx4_init_hca_param {
113 u64 qpc_base;
114 u64 rdmarc_base;
115 u64 auxc_base;
116 u64 altc_base;
117 u64 srqc_base;
118 u64 cqc_base;
119 u64 eqc_base;
120 u64 mc_base;
121 u64 dmpt_base;
122 u64 cmpt_base;
123 u64 mtt_base;
124 u16 log_mc_entry_sz;
125 u16 log_mc_hash_sz;
126 u8 log_num_qps;
127 u8 log_num_srqs;
128 u8 log_num_cqs;
129 u8 log_num_eqs;
130 u8 log_rd_per_qp;
131 u8 log_mc_table_sz;
132 u8 log_mpt_sz;
133 u8 log_uar_sz;
134};
135
136struct mlx4_init_ib_param {
137 int port_width;
138 int vl_cap;
139 int mtu_cap;
140 u16 gid_cap;
141 u16 pkey_cap;
142 int set_guid0;
143 u64 guid0;
144 int set_node_guid;
145 u64 node_guid;
146 int set_si_guid;
147 u64 si_guid;
148};
149
150struct mlx4_set_ib_param {
151 int set_si_guid;
152 int reset_qkey_viol;
153 u64 si_guid;
154 u32 cap_mask;
155};
156
157int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
158int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm);
159int mlx4_UNMAP_FA(struct mlx4_dev *dev);
160int mlx4_RUN_FW(struct mlx4_dev *dev);
161int mlx4_QUERY_FW(struct mlx4_dev *dev);
162int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter);
163int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
164int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic);
165int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt);
166int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages);
167int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
168int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
169int mlx4_NOP(struct mlx4_dev *dev);
Vladimir Sokolovsky2d928652008-07-14 23:48:53 -0700170int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg);
Roland Dreier225c7b12007-05-08 18:00:38 -0700171
172#endif /* MLX4_FW_H */