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gerrit-public.fairphone.software / kernel / msm / 2e8ac7dc16c756b9a8cc021b4806ad1c67451100 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 23cb0828d6e5d37bda11fb00ad3fe98ebd71e229 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
52 };
53
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]54 memory {
55 secure_mem: secure_region {
56 linux,contiguous-region;
57 reg = <0 0x3800000>;
58 label = "secure_mem";
59 };
60 };
61
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]62 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]63 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 interrupts = <1 2 0 1 3 0>;
65 clock-frequency = <19200000>;
66 };
67
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]68 qcom,vidc@fdc00000 {
69 compatible = "qcom,msm-vidc";
70 reg = <0xfdc00000 0xff000>;
71 interrupts = <0 44 0>;
72 qcom,load-freq-tbl = <352800 160000000>,
73 <244800 133330000>,
74 <108000 66700000>;
75 qcom,hfi = "venus";
76 qcom,bus-ports = <1>;
77 qcom,reg-presets = <0xE0024 0x0>,
78 <0x80124 0x3>,
79 <0xE0020 0x5555556>,
80 <0x800B0 0x10101001>,
81 <0x800B4 0x00101010>,
82 <0x800C0 0x1010100f>,
83 <0x800C4 0x00101010>,
84 <0x800D0 0x00000010>,
85 <0x800D4 0x00000010>,
86 <0x800D8 0x00000707>;
87 qcom,enc-ddr-ab-ib = <0 0>,
88 <129000 142000>,
89 <384000 422000>,
90 <866000 953000>;
91 qcom,dec-ddr-ab-ib = <0 0>,
92 <103000 134000>,
93 <268000 348000>,
94 <505000 657000>;
95 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
96 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
97 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
98 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]99 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]100 };
101
102 qcom,wfd {
103 compatible = "qcom,msm-wfd";
104 };
105
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]106 serial@f991f000 {
107 compatible = "qcom,msm-lsuart-v14";
108 reg = <0xf991f000 0x1000>;
109 interrupts = <0 109 0>;
110 status = "disabled";
111 };
112
113 serial@f995e000 {
114 compatible = "qcom,msm-lsuart-v14";
115 reg = <0xf995e000 0x1000>;
116 interrupts = <0 114 0>;
117 status = "disabled";
118 };
119
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]120 qcom,msm-imem@fe805000 {
121 compatible = "qcom,msm-imem";
122 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
123 };
124
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]125 qcom,sps@f9984000 {
126 compatible = "qcom,msm_sps";
127 reg = <0xf9984000 0x15000>,
128 <0xf9999000 0xb000>;
129 interrupts = <0 94 0>;
130 };
131
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]132 qcom,usbbam@f9a44000 {
133 compatible = "qcom,usb-bam-msm";
134 reg = <0xf9a44000 0x11000>;
135 reg-names = "hsusb";
136 interrupts = <0 135 0>;
137 interrupt-names = "hsusb";
138 qcom,usb-bam-num-pipes = <16>;
139 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
140 qcom,ignore-core-reset-ack;
141 qcom,disable-clk-gating;
142
143 qcom,pipe0 {
144 label = "hsusb-qdss-in-0";
145 qcom,usb-bam-mem-type = <3>;
146 qcom,bam-type = <1>;
147 qcom,dir = <1>;
148 qcom,pipe-num = <0>;
149 qcom,peer-bam = <1>;
150 qcom,src-bam-physical-address = <0xfc37c000>;
151 qcom,src-bam-pipe-index = <0>;
152 qcom,dst-bam-physical-address = <0xf9a44000>;
153 qcom,dst-bam-pipe-index = <2>;
154 qcom,data-fifo-offset = <0x0>;
155 qcom,data-fifo-size = <0x600>;
156 qcom,descriptor-fifo-offset = <0x600>;
157 qcom,descriptor-fifo-size = <0x200>;
158 };
159 };
160
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]161 usb@f9a55000 {
162 compatible = "qcom,hsusb-otg";
163 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]164 interrupts = <0 134 0>, <0 140 0>;
165 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]166 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]167 HSUSB_1p8-supply = <&pm8226_l10>;
168 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]169 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]170
171 qcom,hsusb-otg-phy-type = <2>;
172 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]173 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]174 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]175 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]176
177 qcom,msm-bus,name = "usb2";
178 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]179 qcom,msm-bus,num-paths = <1>;
180 qcom,msm-bus,vectors-KBps =
181 <87 512 0 0>,
182 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]183 };
184
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]185 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]186 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]187 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]188 };
189
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]190 wcd9xxx_intc: wcd9xxx-irq {
191 compatible = "qcom,wcd9xxx-irq";
192 interrupt-controller;
193 #interrupt-cells = <1>;
194 interrupt-parent = <&msmgpio>;
195 interrupts = <68 0>;
196 interrupt-names = "cdc-int";
197 };
198
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]199 slim@fe12f000 {
200 cell-index = <1>;
201 compatible = "qcom,slim-ngd";
202 reg = <0xfe12f000 0x35000>,
203 <0xfe104000 0x20000>;
204 reg-names = "slimbus_physical", "slimbus_bam_physical";
205 interrupts = <0 163 0>, <0 164 0>;
206 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]207
208 tapan_codec {
209 compatible = "qcom,tapan-slim-pgd";
210 elemental-addr = [00 01 E0 00 17 02];
211
212 interrupt-parent = <&wcd9xxx_intc>;
213 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
214 17 18 19 20 21 22 23 24 25 26 27 28>;
215 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
216
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]217 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]218 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
219 qcom,cdc-vdd-buck-current = <650000>;
220
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]221 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]222 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
223 qcom,cdc-vdd-h-current = <25000>;
224
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]225 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]226 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
227 qcom,cdc-vdd-px-current = <25000>;
228
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]229 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]230 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
231 qcom,cdc-vdd-a-1p2v-current = <10000>;
232
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]233 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]234 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
235 qcom,cdc-vdd-cx-current = <10000>;
236
237 qcom,cdc-micbias-ldoh-v = <0x3>;
238 qcom,cdc-micbias-cfilt1-mv = <1800>;
239 qcom,cdc-micbias-cfilt2-mv = <1800>;
240 qcom,cdc-micbias-cfilt3-mv = <1800>;
241
242 qcom,cdc-micbias1-cfilt-sel = <0x0>;
243 qcom,cdc-micbias2-cfilt-sel = <0x1>;
244 qcom,cdc-micbias3-cfilt-sel = <0x2>;
245
246 qcom,cdc-mclk-clk-rate = <9600000>;
247 qcom,cdc-slim-ifd = "tapan-slim-ifd";
248 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
249 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]250 };
251
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]252 qcom,msm-adsp-loader {
253 compatible = "qcom,adsp-loader";
254 qcom,adsp-state = <0>;
255 };
256
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]257 sound {
258 compatible = "qcom,msm8226-audio-tapan";
259 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]260 qcom,tapan-mclk-clk-freq = <9600000>;
261 };
262
263 qcom,msm-pcm {
264 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]265 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]266 };
267
268 qcom,msm-pcm-routing {
269 compatible = "qcom,msm-pcm-routing";
270 };
271
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]272 qcom,msm-pcm-low-latency {
273 compatible = "qcom,msm-pcm-dsp";
274 qcom,msm-pcm-dsp-id = <1>;
275 qcom,msm-pcm-low-latency;
276 };
277
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]278 qcom,msm-pcm-lpa {
279 compatible = "qcom,msm-pcm-lpa";
280 };
281
282 qcom,msm-compr-dsp {
283 compatible = "qcom,msm-compr-dsp";
284 };
285
286 qcom,msm-voip-dsp {
287 compatible = "qcom,msm-voip-dsp";
288 };
289
290 qcom,msm-pcm-voice {
291 compatible = "qcom,msm-pcm-voice";
292 };
293
294 qcom,msm-stub-codec {
295 compatible = "qcom,msm-stub-codec";
296 };
297
298 qcom,msm-dai-fe {
299 compatible = "qcom,msm-dai-fe";
300 };
301
302 qcom,msm-pcm-afe {
303 compatible = "qcom,msm-pcm-afe";
304 };
305
306 qcom,msm-dai-q6-hdmi {
307 compatible = "qcom,msm-dai-q6-hdmi";
308 qcom,msm-dai-q6-dev-id = <8>;
309 };
310
311 qcom,msm-dai-q6 {
312 compatible = "qcom,msm-dai-q6";
313 qcom,msm-dai-q6-sb-0-rx {
314 compatible = "qcom,msm-dai-q6-dev";
315 qcom,msm-dai-q6-dev-id = <16384>;
316 };
317
318 qcom,msm-dai-q6-sb-0-tx {
319 compatible = "qcom,msm-dai-q6-dev";
320 qcom,msm-dai-q6-dev-id = <16385>;
321 };
322
323 qcom,msm-dai-q6-sb-1-rx {
324 compatible = "qcom,msm-dai-q6-dev";
325 qcom,msm-dai-q6-dev-id = <16386>;
326 };
327
328 qcom,msm-dai-q6-sb-1-tx {
329 compatible = "qcom,msm-dai-q6-dev";
330 qcom,msm-dai-q6-dev-id = <16387>;
331 };
332
333 qcom,msm-dai-q6-sb-3-rx {
334 compatible = "qcom,msm-dai-q6-dev";
335 qcom,msm-dai-q6-dev-id = <16390>;
336 };
337
338 qcom,msm-dai-q6-sb-3-tx {
339 compatible = "qcom,msm-dai-q6-dev";
340 qcom,msm-dai-q6-dev-id = <16391>;
341 };
342
343 qcom,msm-dai-q6-sb-4-rx {
344 compatible = "qcom,msm-dai-q6-dev";
345 qcom,msm-dai-q6-dev-id = <16392>;
346 };
347
348 qcom,msm-dai-q6-sb-4-tx {
349 compatible = "qcom,msm-dai-q6-dev";
350 qcom,msm-dai-q6-dev-id = <16393>;
351 };
352
353 qcom,msm-dai-q6-bt-sco-rx {
354 compatible = "qcom,msm-dai-q6-dev";
355 qcom,msm-dai-q6-dev-id = <12288>;
356 };
357
358 qcom,msm-dai-q6-bt-sco-tx {
359 compatible = "qcom,msm-dai-q6-dev";
360 qcom,msm-dai-q6-dev-id = <12289>;
361 };
362
363 qcom,msm-dai-q6-int-fm-rx {
364 compatible = "qcom,msm-dai-q6-dev";
365 qcom,msm-dai-q6-dev-id = <12292>;
366 };
367
368 qcom,msm-dai-q6-int-fm-tx {
369 compatible = "qcom,msm-dai-q6-dev";
370 qcom,msm-dai-q6-dev-id = <12293>;
371 };
372
373 qcom,msm-dai-q6-be-afe-pcm-rx {
374 compatible = "qcom,msm-dai-q6-dev";
375 qcom,msm-dai-q6-dev-id = <224>;
376 };
377
378 qcom,msm-dai-q6-be-afe-pcm-tx {
379 compatible = "qcom,msm-dai-q6-dev";
380 qcom,msm-dai-q6-dev-id = <225>;
381 };
382
383 qcom,msm-dai-q6-afe-proxy-rx {
384 compatible = "qcom,msm-dai-q6-dev";
385 qcom,msm-dai-q6-dev-id = <241>;
386 };
387
388 qcom,msm-dai-q6-afe-proxy-tx {
389 compatible = "qcom,msm-dai-q6-dev";
390 qcom,msm-dai-q6-dev-id = <240>;
391 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]392
393 qcom,msm-dai-q6-incall-record-rx {
394 compatible = "qcom,msm-dai-q6-dev";
395 qcom,msm-dai-q6-dev-id = <32771>;
396 };
397
398 qcom,msm-dai-q6-incall-record-tx {
399 compatible = "qcom,msm-dai-q6-dev";
400 qcom,msm-dai-q6-dev-id = <32772>;
401 };
402
403 qcom,msm-dai-q6-incall-music-rx {
404 compatible = "qcom,msm-dai-q6-dev";
405 qcom,msm-dai-q6-dev-id = <32773>;
406 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]407 };
408
409 qcom,msm-pcm-hostless {
410 compatible = "qcom,msm-pcm-hostless";
411 };
412
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]413 qcom,wcnss-wlan@fb000000 {
414 compatible = "qcom,wcnss_wlan";
415 reg = <0xfb000000 0x280000>;
416 reg-names = "wcnss_mmio";
417 interrupts = <0 145 0 0 146 0>;
418 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
419
420 qcom,pronto-vddmx-supply = <&pm8226_l3>;
421 qcom,pronto-vddcx-supply = <&pm8226_s1>;
422 qcom,pronto-vddpx-supply = <&pm8226_l6>;
423 qcom,iris-vddxo-supply = <&pm8226_l10>;
424 qcom,iris-vddrfa-supply = <&pm8226_l24>;
425 qcom,iris-vddpa-supply = <&pm8226_l16>;
426 qcom,iris-vdddig-supply = <&pm8226_l24>;
427
428 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
429 qcom,has_pronto_hw;
430 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]431
432 qcom,msm-adsp-sensors {
433 compatible = "qcom,msm-adsp-sensors";
434 qcom,src-id = <11>;
435 qcom,dst-id = <604>;
436 qcom,ab = <32505856>;
437 qcom,ib = <32505856>;
438 };
439
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]440 qcom,wdt@f9017000 {
441 compatible = "qcom,msm-watchdog";
442 reg = <0xf9017000 0x1000>;
443 interrupts = <0 3 0>, <0 4 0>;
444 qcom,bark-time = <11000>;
445 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]446 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]447 };
448
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]449 qcom,smem@fa00000 {
450 compatible = "qcom,smem";
451 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]452 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]453 <0xfc428000 0x4000>;
454 reg-names = "smem", "irq-reg-base", "aux-mem1";
455
456 qcom,smd-modem {
457 compatible = "qcom,smd";
458 qcom,smd-edge = <0>;
459 qcom,smd-irq-offset = <0x8>;
460 qcom,smd-irq-bitmask = <0x1000>;
461 qcom,pil-string = "modem";
462 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]463 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]464
465 qcom,smsm-modem {
466 compatible = "qcom,smsm";
467 qcom,smsm-edge = <0>;
468 qcom,smsm-irq-offset = <0x8>;
469 qcom,smsm-irq-bitmask = <0x2000>;
470 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]471 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]472
473 qcom,smd-adsp {
474 compatible = "qcom,smd";
475 qcom,smd-edge = <1>;
476 qcom,smd-irq-offset = <0x8>;
477 qcom,smd-irq-bitmask = <0x100>;
478 qcom,pil-string = "adsp";
479 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]480 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]481
482 qcom,smsm-adsp {
483 compatible = "qcom,smsm";
484 qcom,smsm-edge = <1>;
485 qcom,smsm-irq-offset = <0x8>;
486 qcom,smsm-irq-bitmask = <0x200>;
487 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]488 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]489
490 qcom,smd-wcnss {
491 compatible = "qcom,smd";
492 qcom,smd-edge = <6>;
493 qcom,smd-irq-offset = <0x8>;
494 qcom,smd-irq-bitmask = <0x20000>;
495 qcom,pil-string = "wcnss";
496 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]497 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]498
499 qcom,smsm-wcnss {
500 compatible = "qcom,smsm";
501 qcom,smsm-edge = <6>;
502 qcom,smsm-irq-offset = <0x8>;
503 qcom,smsm-irq-bitmask = <0x80000>;
504 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]505 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]506
507 qcom,smd-rpm {
508 compatible = "qcom,smd";
509 qcom,smd-edge = <15>;
510 qcom,smd-irq-offset = <0x8>;
511 qcom,smd-irq-bitmask = <0x1>;
512 interrupts = <0 168 1>;
513 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]514 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]515 };
516
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]517 rpm_bus: qcom,rpm-smd {
518 compatible = "qcom,rpm-smd";
519 rpm-channel-name = "rpm_requests";
520 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]521 };
522
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]523 sdcc1: qcom,sdcc@f9824000 {
524 cell-index = <1>; /* SDC1 eMMC slot */
525 compatible = "qcom,msm-sdcc";
526
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]527 reg = <0xf9824000 0x800>,
528 <0xf9824800 0x100>,
529 <0xf9804000 0x7000>;
530 reg-names = "core_mem", "dml_mem", "bam_mem";
531 interrupts = <0 123 0>, <0 137 0>;
532 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]533
534 qcom,bus-width = <8>;
535 status = "disabled";
536 };
537
538 sdcc2: qcom,sdcc@f98a4000 {
539 cell-index = <2>; /* SDC2 SD card slot */
540 compatible = "qcom,msm-sdcc";
541
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]542 reg = <0xf98a4000 0x800>,
543 <0xf98a4800 0x100>,
544 <0xf9884000 0x7000>;
545 reg-names = "core_mem", "dml_mem", "bam_mem";
546 interrupts = <0 125 0>, <0 220 0>;
547 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]548
549 qcom,bus-width = <4>;
550 status = "disabled";
551 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]552
553 spmi_bus: qcom,spmi@fc4c0000 {
554 cell-index = <0>;
555 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]556 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]557 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]558 <0Xfc4cb000 0x1000>,
559 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]560 /* 190,ee0_krait_hlos_spmi_periph_irq */
561 /* 187,channel_0_krait_hlos_trans_done_irq */
562 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]563 qcom,pmic-arb-ee = <0>;
564 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]565 };
566
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]567 i2c@f9926000 { /* BLSP-1 QUP-4 */
568 cell-index = <0>;
569 compatible = "qcom,i2c-qup";
570 reg = <0xf9926000 0x1000>;
571 #address-cells = <1>;
572 #size-cells = <0>;
573 reg-names = "qup_phys_addr";
574 interrupts = <0 98 0>;
575 interrupt-names = "qup_err_intr";
576 qcom,i2c-bus-freq = <100000>;
577 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]578
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]579 i2c@f9927000 { /* BLSP1 QUP5 */
580 cell-index = <5>;
581 compatible = "qcom,i2c-qup";
582 #address-cells = <1>;
583 #size-cells = <0>;
584 reg-names = "qup_phys_addr";
585 reg = <0xf9927000 0x1000>;
586 interrupt-names = "qup_err_intr";
587 interrupts = <0 99 0>;
588 qcom,i2c-bus-freq = <100000>;
589 qcom,i2c-src-freq = <19200000>;
590 };
591
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]592 qcom,acpuclk@f9011050 {
593 compatible = "qcom,acpuclk-a7";
594 reg = <0xf9011050 0x8>;
595 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]596 a7_cpu-supply = <&apc_vreg_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]597 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]598 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]599
600 qcom,ocmem@fdd00000 {
601 compatible = "qcom,msm-ocmem";
602 reg = <0xfdd00000 0x2000>,
603 <0xfdd02000 0x2000>,
604 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]605 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]606 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
607 interrupts = <0 76 0 0 77 0>;
608 interrupt-names = "ocmem_irq", "dm_irq";
609 qcom,ocmem-num-regions = <0x1>;
610 qcom,ocmem-num-macros = <0x2>;
611 qcom,resource-type = <0x706d636f>;
612 #address-cells = <1>;
613 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]614 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]615
616 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]617 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]618 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]619 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]620 };
621 };
622
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]623 qcom,venus@fdce0000 {
624 compatible = "qcom,pil-venus";
625 reg = <0xfdce0000 0x4000>,
626 <0xfdc80000 0x400>;
627 reg-names = "wrapper_base", "vbif_base";
628 vdd-supply = <&gdsc_venus>;
629
630 qcom,firmware-name = "venus";
631 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]632
633 qcom,pronto@fb21b000 {
634 compatible = "qcom,pil-pronto";
635 reg = <0xfb21b000 0x3000>,
636 <0xfc401700 0x4>,
637 <0xfd485300 0xc>;
638 reg-names = "pmu_base", "clk_base", "halt_base";
639 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]640 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]641
642 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]643
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]644 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]645 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]646 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]647
648 /* GPIO output to wcnss */
649 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]650 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]651
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]652 qcom,iris-fm {
653 compatible = "qcom,iris_fm";
654 };
655
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]656 qcom,lpass@fe200000 {
657 compatible = "qcom,pil-q6v5-lpass";
658 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]659 <0xfd485100 0x00010>,
660 <0xfc4016c0 0x00004>;
661 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]662 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]663 interrupts = <0 162 1>;
664
665 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame^]666
667 /* GPIO input from lpass */
668 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
669
670 /* GPIO output to lpass */
671 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]672 };
673
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]674 qcom,mss@fc880000 {
675 compatible = "qcom,pil-q6v5-mss";
676 reg = <0xfc880000 0x100>,
677 <0xfd485000 0x400>,
678 <0xfc820000 0x020>,
679 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]680 <0xfd485194 0x4>;
681 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]682 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]683
684 interrupts = <0 24 1>;
685 vdd_mss-supply = <&pm8226_s1>;
686 vdd_cx-supply = <&pm8226_s1_corner>;
687 vdd_mx-supply = <&pm8226_l3>;
688 vdd_pll-supply = <&pm8226_l8>;
689 qcom,vdd_pll = <1800000>;
690
691 qcom,is-loadable;
692 qcom,firmware-name = "mba";
693 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]694
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]695 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]696 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]697 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]698
699 /* GPIO output to mss */
700 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]701 };
702
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]703 qcom,msm-mem-hole {
704 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]705 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]706 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]707
708 tsens: tsens@fc4a8000 {
709 compatible = "qcom,msm-tsens";
710 reg = <0xfc4a8000 0x2000>,
711 <0xfc4b8000 0x1000>;
712 reg-names = "tsens_physical", "tsens_eeprom_physical";
713 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]714 qcom,sensors = <4>;
715 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]716 qcom,calib-mode = "fuse_map2";
717 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]718
719 qcom,msm-thermal {
720 compatible = "qcom,msm-thermal";
721 qcom,sensor-id = <0>;
722 qcom,poll-ms = <250>;
723 qcom,limit-temp = <60>;
724 qcom,temp-hysteresis = <10>;
725 qcom,freq-step = <2>;
726 };
727
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]728 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
729 compatible = "qcom,spi-qup-v2";
730 #address-cells = <1>;
731 #size-cells = <0>;
732 reg-names = "spi_physical", "spi_bam_physical";
733 reg = <0xf9923000 0x1000>,
734 <0xf9904000 0xF000>;
735 interrupt-names = "spi_irq", "spi_bam_irq";
736 interrupts = <0 95 0>, <0 238 0>;
737 spi-max-frequency = <19200000>;
738
739 gpios = <&msmgpio 3 0>, /* CLK */
740 <&msmgpio 1 0>, /* MISO */
741 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]742 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]743
744 qcom,infinite-mode = <0>;
745 qcom,use-bam;
746 qcom,ver-reg-exists;
747 qcom,bam-consumer-pipe-index = <12>;
748 qcom,bam-producer-pipe-index = <13>;
749 };
750
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]751 qcom,bam_dmux@fc834000 {
752 compatible = "qcom,bam_dmux";
753 reg = <0xfc834000 0x7000>;
754 interrupts = <0 29 1>;
755 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]756
757 qcom,msm-rtb {
758 compatible = "qcom,msm-rtb";
759 qcom,memory-reservation-type = "EBI1";
760 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
761 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]762
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]763 qcom,msm-rng@f9bff000 {
764 compatible = "qcom,msm-rng";
765 reg = <0xf9bff000 0x200>;
766 qcom,msm-rng-iface-clk;
767 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]768
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]769 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]770 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]771 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]772 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]773
774 jtag_mm0: jtagmm@fc33c000 {
775 compatible = "qcom,jtag-mm";
776 reg = <0xfc33c000 0x1000>,
777 <0xfc330000 0x1000>;
778 reg-names = "etm-base","debug-base";
779 };
780
781 jtag_mm1: jtagmm@fc33d000 {
782 compatible = "qcom,jtag-mm";
783 reg = <0xfc33d000 0x1000>,
784 <0xfc332000 0x1000>;
785 reg-names = "etm-base","debug-base";
786 };
787
788 jtag_mm2: jtagmm@fc33e000 {
789 compatible = "qcom,jtag-mm";
790 reg = <0xfc33e000 0x1000>,
791 <0xfc334000 0x1000>;
792 reg-names = "etm-base","debug-base";
793 };
794
795 jtag_mm3: jtagmm@fc33f000 {
796 compatible = "qcom,jtag-mm";
797 reg = <0xfc33f000 0x1000>,
798 <0xfc336000 0x1000>;
799 reg-names = "etm-base","debug-base";
800 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]801
802 qcom,ipc-spinlock@fd484000 {
803 compatible = "qcom,ipc-spinlock-sfpb";
804 reg = <0xfd484000 0x400>;
805 qcom,num-locks = <8>;
806 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]807
808 qcom,qseecom@d980000 {
809 compatible = "qcom,qseecom";
810 reg = <0xd980000 0x256000>;
811 reg-names = "secapp-region";
812 qcom,disk-encrypt-pipe-pair = <2>;
813 qcom,hlos-ce-hw-instance = <0>;
814 qcom,qsee-ce-hw-instance = <0>;
815 qcom,msm-bus,name = "qseecom-noc";
816 qcom,msm-bus,num-cases = <4>;
817 qcom,msm-bus,active-only = <0>;
818 qcom,msm-bus,num-paths = <1>;
819 qcom,msm-bus,vectors-KBps =
820 <55 512 0 0>,
821 <55 512 3936000 393600>,
822 <55 512 3936000 393600>,
823 <55 512 3936000 393600>;
824 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]825};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]826
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]827&gdsc_venus {
828 status = "ok";
829};
830
831&gdsc_mdss {
832 status = "ok";
833};
834
835&gdsc_jpeg {
836 status = "ok";
837};
838
839&gdsc_vfe {
840 status = "ok";
841};
842
843&gdsc_oxili_cx {
844 status = "ok";
845};
846
847&gdsc_usb_hsic {
848 status = "ok";
849};
850
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]851/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]852/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]853/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]854
855&pm8226_vadc {
856 chan@0 {
857 label = "usb_in";
858 reg = <0>;
859 qcom,decimation = <0>;
860 qcom,pre-div-channel-scaling = <4>;
861 qcom,calibration-type = "absolute";
862 qcom,scale-function = <0>;
863 qcom,hw-settle-time = <0>;
864 qcom,fast-avg-setup = <0>;
865 };
866
867 chan@2 {
868 label = "vchg_sns";
869 reg = <2>;
870 qcom,decimation = <0>;
871 qcom,pre-div-channel-scaling = <3>;
872 qcom,calibration-type = "absolute";
873 qcom,scale-function = <0>;
874 qcom,hw-settle-time = <0>;
875 qcom,fast-avg-setup = <0>;
876 };
877
878 chan@5 {
879 label = "vcoin";
880 reg = <5>;
881 qcom,decimation = <0>;
882 qcom,pre-div-channel-scaling = <1>;
883 qcom,calibration-type = "absolute";
884 qcom,scale-function = <0>;
885 qcom,hw-settle-time = <0>;
886 qcom,fast-avg-setup = <0>;
887 };
888
889 chan@6 {
890 label = "vbat_sns";
891 reg = <6>;
892 qcom,decimation = <0>;
893 qcom,pre-div-channel-scaling = <1>;
894 qcom,calibration-type = "absolute";
895 qcom,scale-function = <0>;
896 qcom,hw-settle-time = <0>;
897 qcom,fast-avg-setup = <0>;
898 };
899
900 chan@7 {
901 label = "vph_pwr";
902 reg = <7>;
903 qcom,decimation = <0>;
904 qcom,pre-div-channel-scaling = <1>;
905 qcom,calibration-type = "absolute";
906 qcom,scale-function = <0>;
907 qcom,hw-settle-time = <0>;
908 qcom,fast-avg-setup = <0>;
909 };
910
911 chan@30 {
912 label = "batt_therm";
913 reg = <0x30>;
914 qcom,decimation = <0>;
915 qcom,pre-div-channel-scaling = <0>;
916 qcom,calibration-type = "ratiometric";
917 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]918 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]919 qcom,fast-avg-setup = <0>;
920 };
921
922 chan@31 {
923 label = "batt_id";
924 reg = <0x31>;
925 qcom,decimation = <0>;
926 qcom,pre-div-channel-scaling = <0>;
927 qcom,calibration-type = "ratiometric";
928 qcom,scale-function = <0>;
929 qcom,hw-settle-time = <2>;
930 qcom,fast-avg-setup = <0>;
931 };
932
933 chan@b2 {
934 label = "xo_therm_pu2";
935 reg = <0xb2>;
936 qcom,decimation = <0>;
937 qcom,pre-div-channel-scaling = <0>;
938 qcom,calibration-type = "ratiometric";
939 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]940 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]941 qcom,fast-avg-setup = <0>;
942 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]943
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]944 chan@39 {
945 label = "usb_id_nopull";
946 reg = <0x39>;
947 qcom,decimation = <0>;
948 qcom,pre-div-channel-scaling = <0>;
949 qcom,calibration-type = "ratiometric";
950 qcom,scale-function = <0>;
951 qcom,hw-settle-time = <2>;
952 qcom,fast-avg-setup = <0>;
953 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]954};
955
956&pm8226_chg {
957 status = "ok";
958
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]959 qcom,chg-chgr@1000 {
960 status = "ok";
961 };
962
963 qcom,chg-buck@1100 {
964 status = "ok";
965 };
966
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]967 qcom,chg-bat-if@1200 {
968 status = "ok";
969 };
970
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]971 qcom,chg-usb-chgpth@1300 {
972 status = "ok";
973 };
974
975 qcom,chg-boost@1500 {
976 status = "ok";
977 };
978
979 qcom,chg-misc@1600 {
980 status = "ok";
981 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]982};