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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
3 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
Alan Coxccd32e22008-11-02 21:40:08 +01004 * Copyright (C) 2003 Red Hat
Sergei Shtylyov07af4272007-03-03 17:48:53 +01005 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
7 * May be copied or modified under the terms of the GNU General Public License
8 *
Bartlomiej Zolnierkiewicz2be564b2008-02-01 23:09:30 +01009 * Documentation:
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * Publically available from Intel web site. Errata documentation
12 * is also publically available. As an aide to anyone hacking on this
13 * driver the list of errata that are relevant is below.going back to
14 * PIIX4. Older device documentation is now a bit tricky to find.
15 *
16 * Errata of note:
17 *
18 * Unfixable
19 * PIIX4 errata #9 - Only on ultra obscure hw
20 * ICH3 errata #13 - Not observed to affect real hw
21 * by Intel
22 *
23 * Things we must deal with
24 * PIIX4 errata #10 - BM IDE hang with non UDMA
25 * (must stop/start dma to recover)
26 * 440MX errata #15 - As PIIX4 errata #10
27 * PIIX4 errata #15 - Must not read control registers
28 * during a PIO transfer
29 * 440MX errata #13 - As PIIX4 errata #15
30 * ICH2 errata #21 - DMA mode 0 doesn't work right
31 * ICH0/1 errata #55 - As ICH2 errata #21
32 * ICH2 spec c #9 - Extra operations needed to handle
33 * drive hotswap [NOT YET SUPPORTED]
34 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
35 * and must be dword aligned
36 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
37 *
38 * Should have been BIOS fixed:
39 * 450NX: errata #19 - DMA hangs on old 450NX
40 * 450NX: errata #20 - DMA hangs on old 450NX
41 * 450NX: errata #25 - Corruption with DMA on old 450NX
42 * ICH3 errata #15 - IDE deadlock under high load
43 * (BIOS must set dev 31 fn 0 bit 23)
44 * ICH3 errata #18 - Don't use native mode
45 */
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <linux/types.h>
48#include <linux/module.h>
49#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <linux/ide.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052#include <linux/init.h>
53
54#include <asm/io.h>
55
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +020056#define DRV_NAME "piix"
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058static int no_piix_dma;
59
60/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020061 * piix_set_pio_mode - set host controller for PIO mode
62 * @drive: drive
63 * @pio: PIO mode number
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 *
Sergei Shtylyov07af4272007-03-03 17:48:53 +010065 * Set the interface PIO mode based upon the settings done by AMI BIOS.
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 */
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020067
68static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070069{
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +010070 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +010071 struct pci_dev *dev = to_pci_dev(hwif->dev);
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010072 int is_slave = drive->dn & 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 int master_port = hwif->channel ? 0x42 : 0x40;
74 int slave_port = 0x44;
75 unsigned long flags;
76 u16 master_data;
77 u8 slave_data;
Alan Cox4fb0f762006-06-26 00:26:12 -070078 static DEFINE_SPINLOCK(tune_lock);
Alan Cox5ac24692006-10-03 01:14:23 -070079 int control = 0;
Alan Cox4fb0f762006-06-26 00:26:12 -070080
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010081 /* ISP RTC */
Alan Cox5ac24692006-10-03 01:14:23 -070082 static const u8 timings[][2]= {
83 { 0, 0 },
84 { 0, 0 },
85 { 1, 0 },
86 { 2, 1 },
87 { 2, 3 }, };
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Alan Cox4fb0f762006-06-26 00:26:12 -070089 /*
90 * Master vs slave is synchronized above us but the slave register is
91 * shared by the two hwifs so the corner case of two slave timeouts in
92 * parallel must be locked.
93 */
94 spin_lock_irqsave(&tune_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 pci_read_config_word(dev, master_port, &master_data);
Alan Cox5ac24692006-10-03 01:14:23 -070096
Sergei Shtylyov30dfd122007-02-07 18:18:28 +010097 if (pio > 1)
Alan Cox5ac24692006-10-03 01:14:23 -070098 control |= 1; /* Programmable timing on */
99 if (drive->media == ide_disk)
100 control |= 4; /* Prefetch, post write */
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100101 if (pio > 2)
Alan Cox5ac24692006-10-03 01:14:23 -0700102 control |= 2; /* IORDY */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 if (is_slave) {
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100104 master_data |= 0x4000;
105 master_data &= ~0x0070;
Alan Cox5ac24692006-10-03 01:14:23 -0700106 if (pio > 1) {
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100107 /* Set PPE, IE and TIME */
108 master_data |= control << 4;
Alan Cox5ac24692006-10-03 01:14:23 -0700109 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 pci_read_config_byte(dev, slave_port, &slave_data);
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100111 slave_data &= hwif->channel ? 0x0f : 0xf0;
112 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
113 (hwif->channel ? 4 : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 } else {
Sergei Shtylyov30dfd122007-02-07 18:18:28 +0100115 master_data &= ~0x3307;
Alan Cox5ac24692006-10-03 01:14:23 -0700116 if (pio > 1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 /* enable PPE, IE and TIME */
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100118 master_data |= control;
Alan Cox5ac24692006-10-03 01:14:23 -0700119 }
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100120 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 }
122 pci_write_config_word(dev, master_port, master_data);
123 if (is_slave)
124 pci_write_config_byte(dev, slave_port, slave_data);
Alan Cox4fb0f762006-06-26 00:26:12 -0700125 spin_unlock_irqrestore(&tune_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126}
127
128/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200129 * piix_set_dma_mode - set host controller for DMA mode
130 * @drive: drive
131 * @speed: DMA mode
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100132 *
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200133 * Set a PIIX host controller to the desired DMA mode. This involves
134 * programming the right timing data into the PCI configuration space.
Sergei Shtylyov07af4272007-03-03 17:48:53 +0100135 */
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200136
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200137static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138{
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +0100139 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100140 struct pci_dev *dev = to_pci_dev(hwif->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 u8 maslave = hwif->channel ? 0x42 : 0x40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 int a_speed = 3 << (drive->dn * 4);
143 int u_flag = 1 << drive->dn;
144 int v_flag = 0x01 << drive->dn;
145 int w_flag = 0x10 << drive->dn;
146 int u_speed = 0;
147 int sitre;
148 u16 reg4042, reg4a;
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200149 u8 reg48, reg54, reg55;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151 pci_read_config_word(dev, maslave, &reg4042);
152 sitre = (reg4042 & 0x4000) ? 1 : 0;
153 pci_read_config_byte(dev, 0x48, &reg48);
154 pci_read_config_word(dev, 0x4a, &reg4a);
155 pci_read_config_byte(dev, 0x54, &reg54);
156 pci_read_config_byte(dev, 0x55, &reg55);
157
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 if (speed >= XFER_UDMA_0) {
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100159 u8 udma = speed - XFER_UDMA_0;
160
161 u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
162
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 if (!(reg48 & u_flag))
164 pci_write_config_byte(dev, 0x48, reg48 | u_flag);
165 if (speed == XFER_UDMA_5) {
166 pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
167 } else {
168 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
169 }
170 if ((reg4a & a_speed) != u_speed)
171 pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
172 if (speed > XFER_UDMA_2) {
173 if (!(reg54 & v_flag))
174 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
175 } else
176 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
177 } else {
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200178 const u8 mwdma_to_pio[] = { 0, 3, 4 };
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200179 u8 pio;
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200180
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 if (reg48 & u_flag)
182 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
183 if (reg4a & a_speed)
184 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
185 if (reg54 & v_flag)
186 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
187 if (reg55 & w_flag)
188 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
Bartlomiej Zolnierkiewicz8c91abf2007-10-16 22:29:54 +0200189
190 if (speed >= XFER_MW_DMA_0)
191 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
192 else
193 pio = 2; /* only SWDMA2 is allowed */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
Bartlomiej Zolnierkiewicz1c54a932007-10-16 22:29:56 +0200195 piix_set_pio_mode(drive, pio);
196 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197}
198
199/**
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200200 * init_chipset_ich - set up the ICH chipset
Albert Leef0dd8712007-02-17 02:40:21 +0100201 * @dev: PCI device to set up
Albert Leef0dd8712007-02-17 02:40:21 +0100202 *
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200203 * Initialize the PCI device as required. For the ICH this turns
204 * out to be nice and simple.
Albert Leef0dd8712007-02-17 02:40:21 +0100205 */
206
Bartlomiej Zolnierkiewicz2ed0ef52009-03-24 23:22:53 +0100207static int init_chipset_ich(struct pci_dev *dev)
Albert Leef0dd8712007-02-17 02:40:21 +0100208{
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200209 u32 extra = 0;
210
211 pci_read_config_dword(dev, 0x54, &extra);
212 pci_write_config_dword(dev, 0x54, extra | 0x400);
Albert Leef0dd8712007-02-17 02:40:21 +0100213
214 return 0;
215}
216
217/**
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200218 * ich_clear_irq - clear BMDMA status
219 * @drive: IDE drive
Albert Leef0dd8712007-02-17 02:40:21 +0100220 *
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200221 * ICHx contollers set DMA INTR no matter DMA or PIO.
222 * BMDMA status might need to be cleared even for
223 * PIO interrupts to prevent spurious/lost IRQ.
Albert Leef0dd8712007-02-17 02:40:21 +0100224 */
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200225static void ich_clear_irq(ide_drive_t *drive)
Albert Leef0dd8712007-02-17 02:40:21 +0100226{
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +0100227 ide_hwif_t *hwif = drive->hwif;
Albert Leef0dd8712007-02-17 02:40:21 +0100228 u8 dma_stat;
229
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200230 /*
231 * ide_dma_end() needs BMDMA status for error checking.
232 * So, skip clearing BMDMA status here and leave it
233 * to ide_dma_end() if this is DMA interrupt.
234 */
235 if (drive->waiting_for_dma || hwif->dma_base == 0)
236 return;
237
Albert Leef0dd8712007-02-17 02:40:21 +0100238 /* clear the INTR & ERROR bits */
Bartlomiej Zolnierkiewiczcab7f8e2008-07-23 19:55:51 +0200239 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
Albert Leef0dd8712007-02-17 02:40:21 +0100240 /* Should we force the bit as well ? */
Bartlomiej Zolnierkiewiczcab7f8e2008-07-23 19:55:51 +0200241 outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
Albert Leef0dd8712007-02-17 02:40:21 +0100242}
243
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200244struct ich_laptop {
245 u16 device;
246 u16 subvendor;
247 u16 subdevice;
248};
249
250/*
251 * List of laptops that use short cables rather than 80 wire
252 */
253
254static const struct ich_laptop ich_laptop[] = {
255 /* devid, subvendor, subdev */
sebdeg@ngi.itafda5e42007-11-05 21:42:25 +0100256 { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200257 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
258 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
259 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
Bartlomiej Zolnierkiewiczdd0fd402007-11-27 21:35:56 +0100260 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
Herton Ronaldo Krzesinskia8269e52008-10-13 21:39:50 +0200261 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200262 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
Bartlomiej Zolnierkiewicz7ee98032009-01-06 17:21:01 +0100263 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
264 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
Bartlomiej Zolnierkiewicz1fa5a402008-04-28 23:44:43 +0200265 { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200266 /* end marker */
267 { 0, }
268};
269
Bartlomiej Zolnierkiewiczf454cbe2008-08-05 18:17:04 +0200270static u8 piix_cable_detect(ide_hwif_t *hwif)
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100271{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100272 struct pci_dev *pdev = to_pci_dev(hwif->dev);
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200273 const struct ich_laptop *lap = &ich_laptop[0];
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100274 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
275
Bartlomiej Zolnierkiewicz72076262007-07-09 23:17:58 +0200276 /* check for specials */
277 while (lap->device) {
278 if (lap->device == pdev->device &&
279 lap->subvendor == pdev->subsystem_vendor &&
280 lap->subdevice == pdev->subsystem_device) {
281 return ATA_CBL_PATA40_SHORT;
282 }
283 lap++;
284 }
285
286 pci_read_config_byte(pdev, 0x54, &reg54h);
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100287
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200288 return (reg54h & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100289}
290
Albert Leef0dd8712007-02-17 02:40:21 +0100291/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 * init_hwif_piix - fill in the hwif for the PIIX
293 * @hwif: IDE interface
294 *
295 * Set up the ide_hwif_t for the PIIX interface according to the
296 * capabilities of the hardware.
297 */
298
299static void __devinit init_hwif_piix(ide_hwif_t *hwif)
300{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 if (!hwif->dma_base)
302 return;
303
Bartlomiej Zolnierkiewicz74594fd2007-02-17 02:40:23 +0100304 if (no_piix_dma)
305 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306}
307
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200308static const struct ide_port_ops piix_port_ops = {
309 .set_pio_mode = piix_set_pio_mode,
310 .set_dma_mode = piix_set_dma_mode,
311 .cable_detect = piix_cable_detect,
312};
313
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200314static const struct ide_port_ops ich_port_ops = {
315 .set_pio_mode = piix_set_pio_mode,
316 .set_dma_mode = piix_set_dma_mode,
317 .clear_irq = ich_clear_irq,
318 .cable_detect = piix_cable_detect,
319};
320
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200321#define DECLARE_PIIX_DEV(udma) \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 { \
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200323 .name = DRV_NAME, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 .init_hwif = init_hwif_piix, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200326 .port_ops = &piix_port_ops, \
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200327 .pio_mask = ATA_PIO4, \
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200328 .swdma_mask = ATA_SWDMA2_ONLY, \
329 .mwdma_mask = ATA_MWDMA12_ONLY, \
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200330 .udma_mask = udma, \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 }
332
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200333#define DECLARE_ICH_DEV(udma) \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200334 { \
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200335 .name = DRV_NAME, \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200336 .init_chipset = init_chipset_ich, \
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200337 .init_hwif = init_hwif_piix, \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200338 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
Bartlomiej Zolnierkiewiczbfa7d8e2008-10-13 21:39:42 +0200339 .port_ops = &ich_port_ops, \
Bartlomiej Zolnierkiewicz40d2dd72007-10-19 00:30:10 +0200340 .pio_mask = ATA_PIO4, \
341 .swdma_mask = ATA_SWDMA2_ONLY, \
342 .mwdma_mask = ATA_MWDMA12_ONLY, \
343 .udma_mask = udma, \
344 }
345
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200346static const struct ide_port_info piix_pci_info[] __devinitdata = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200347 /* 0: MPIIX */
Sergei Shtylyovd2872232007-02-07 18:18:25 +0100348 { /*
349 * MPIIX actually has only a single IDE channel mapped to
350 * the primary or secondary ports depending on the value
351 * of the bit 14 of the IDETIM register at offset 0x6c
352 */
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200353 .name = DRV_NAME,
Sergei Shtylyovd2872232007-02-07 18:18:25 +0100354 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}},
Bartlomiej Zolnierkiewicz24679222009-03-24 23:22:52 +0100355 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200356 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz3985ee32007-10-19 00:30:11 +0200357 /* This is a painful system best to let it self tune for now */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 },
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200359 /* 1: PIIXa/PIIXb/PIIX3 */
360 DECLARE_PIIX_DEV(0x00), /* no udma */
361 /* 2: PIIX4 */
362 DECLARE_PIIX_DEV(ATA_UDMA2),
363 /* 3: ICH0 */
364 DECLARE_ICH_DEV(ATA_UDMA2),
365 /* 4: ICH */
366 DECLARE_ICH_DEV(ATA_UDMA4),
367 /* 5: PIIX4 */
368 DECLARE_PIIX_DEV(ATA_UDMA4),
369 /* 6: ICH[2-7]/ICH[2-3]M/C-ICH/ICH5-SATA/ESB2/ICH8M */
370 DECLARE_ICH_DEV(ATA_UDMA5),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371};
372
373/**
374 * piix_init_one - called when a PIIX is found
375 * @dev: the piix device
376 * @id: the matching pci id
377 *
378 * Called when the PCI registration layer (or the IDE initialization)
379 * finds a device matching our IDE device tables.
380 */
381
382static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
383{
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200384 return ide_pci_init_one(dev, &piix_pci_info[id->driver_data], NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385}
386
387/**
388 * piix_check_450nx - Check for problem 450NX setup
389 *
390 * Check for the present of 450NX errata #19 and errata #25. If
391 * they are found, disable use of DMA IDE
392 */
393
394static void __devinit piix_check_450nx(void)
395{
396 struct pci_dev *pdev = NULL;
397 u16 cfg;
Alan Cox1424e502006-09-30 23:27:28 -0700398 while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 {
400 /* Look for 450NX PXB. Check for problem configurations
401 A PCI quirk checks bit 6 already */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402 pci_read_config_word(pdev, 0x41, &cfg);
403 /* Only on the original revision: IDE DMA can hang */
Auke Kok44c10132007-06-08 15:46:36 -0700404 if (pdev->revision == 0x00)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 no_piix_dma = 1;
406 /* On all revisions below 5 PXB bus lock must be disabled for IDE */
Auke Kok44c10132007-06-08 15:46:36 -0700407 else if (cfg & (1<<14) && pdev->revision < 5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408 no_piix_dma = 2;
409 }
410 if(no_piix_dma)
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200411 printk(KERN_WARNING DRV_NAME ": 450NX errata present, disabling IDE DMA.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412 if(no_piix_dma == 2)
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200413 printk(KERN_WARNING DRV_NAME ": A BIOS update may resolve this.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414}
415
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200416static const struct pci_device_id piix_pci_tbl[] = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200417 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 1 },
418 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 },
419 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 0 },
420 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 1 },
421 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 2 },
422 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 3 },
423 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 2 },
424 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 4 },
425 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 5 },
426 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 2 },
427 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 6 },
428 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 6 },
429 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 6 },
430 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 6 },
431 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 6 },
432 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 6 },
433 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 6 },
434 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435#ifdef CONFIG_BLK_DEV_IDE_SATA
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200436 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437#endif
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200438 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 6 },
439 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 6 },
440 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 6 },
441 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 6 },
442 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 6 },
443 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 6 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 { 0, },
445};
446MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
447
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200448static struct pci_driver piix_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 .name = "PIIX_IDE",
450 .id_table = piix_pci_tbl,
451 .probe = piix_init_one,
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200452 .remove = ide_pci_remove,
Bartlomiej Zolnierkiewiczfeb22b72008-10-10 22:39:32 +0200453 .suspend = ide_pci_suspend,
454 .resume = ide_pci_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455};
456
457static int __init piix_ide_init(void)
458{
459 piix_check_450nx();
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200460 return ide_pci_register_driver(&piix_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461}
462
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200463static void __exit piix_ide_exit(void)
464{
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200465 pci_unregister_driver(&piix_pci_driver);
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200466}
467
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468module_init(piix_ide_init);
Bartlomiej Zolnierkiewiczda8c3e02008-07-24 22:53:24 +0200469module_exit(piix_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470
471MODULE_AUTHOR("Andre Hedrick, Andrzej Krzysztofowicz");
472MODULE_DESCRIPTION("PCI driver module for Intel PIIX IDE");
473MODULE_LICENSE("GPL");