Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Sonics Silicon Backplane |
| 3 | * Subsystem core |
| 4 | * |
| 5 | * Copyright 2005, Broadcom Corporation |
| 6 | * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> |
| 7 | * |
| 8 | * Licensed under the GNU/GPL. See COPYING for details. |
| 9 | */ |
| 10 | |
| 11 | #include "ssb_private.h" |
| 12 | |
| 13 | #include <linux/delay.h> |
Geert Uytterhoeven | 6faf035 | 2007-10-13 14:31:31 +0200 | [diff] [blame] | 14 | #include <linux/io.h> |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 15 | #include <linux/ssb/ssb.h> |
| 16 | #include <linux/ssb/ssb_regs.h> |
| 17 | #include <linux/dma-mapping.h> |
| 18 | #include <linux/pci.h> |
| 19 | |
| 20 | #include <pcmcia/cs_types.h> |
| 21 | #include <pcmcia/cs.h> |
| 22 | #include <pcmcia/cistpl.h> |
| 23 | #include <pcmcia/ds.h> |
| 24 | |
| 25 | |
| 26 | MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); |
| 27 | MODULE_LICENSE("GPL"); |
| 28 | |
| 29 | |
| 30 | /* Temporary list of yet-to-be-attached buses */ |
| 31 | static LIST_HEAD(attach_queue); |
| 32 | /* List if running buses */ |
| 33 | static LIST_HEAD(buses); |
| 34 | /* Software ID counter */ |
| 35 | static unsigned int next_busnumber; |
| 36 | /* buses_mutes locks the two buslists and the next_busnumber. |
| 37 | * Don't lock this directly, but use ssb_buses_[un]lock() below. */ |
| 38 | static DEFINE_MUTEX(buses_mutex); |
| 39 | |
| 40 | /* There are differences in the codeflow, if the bus is |
| 41 | * initialized from early boot, as various needed services |
| 42 | * are not available early. This is a mechanism to delay |
| 43 | * these initializations to after early boot has finished. |
| 44 | * It's also used to avoid mutex locking, as that's not |
| 45 | * available and needed early. */ |
| 46 | static bool ssb_is_early_boot = 1; |
| 47 | |
| 48 | static void ssb_buses_lock(void); |
| 49 | static void ssb_buses_unlock(void); |
| 50 | |
| 51 | |
| 52 | #ifdef CONFIG_SSB_PCIHOST |
| 53 | struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev) |
| 54 | { |
| 55 | struct ssb_bus *bus; |
| 56 | |
| 57 | ssb_buses_lock(); |
| 58 | list_for_each_entry(bus, &buses, list) { |
| 59 | if (bus->bustype == SSB_BUSTYPE_PCI && |
| 60 | bus->host_pci == pdev) |
| 61 | goto found; |
| 62 | } |
| 63 | bus = NULL; |
| 64 | found: |
| 65 | ssb_buses_unlock(); |
| 66 | |
| 67 | return bus; |
| 68 | } |
| 69 | #endif /* CONFIG_SSB_PCIHOST */ |
| 70 | |
| 71 | static struct ssb_device *ssb_device_get(struct ssb_device *dev) |
| 72 | { |
| 73 | if (dev) |
| 74 | get_device(dev->dev); |
| 75 | return dev; |
| 76 | } |
| 77 | |
| 78 | static void ssb_device_put(struct ssb_device *dev) |
| 79 | { |
| 80 | if (dev) |
| 81 | put_device(dev->dev); |
| 82 | } |
| 83 | |
| 84 | static int ssb_bus_resume(struct ssb_bus *bus) |
| 85 | { |
| 86 | int err; |
| 87 | |
| 88 | ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); |
| 89 | err = ssb_pcmcia_init(bus); |
| 90 | if (err) { |
| 91 | /* No need to disable XTAL, as we don't have one on PCMCIA. */ |
| 92 | return err; |
| 93 | } |
| 94 | ssb_chipco_resume(&bus->chipco); |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | static int ssb_device_resume(struct device *dev) |
| 100 | { |
| 101 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 102 | struct ssb_driver *ssb_drv; |
| 103 | struct ssb_bus *bus; |
| 104 | int err = 0; |
| 105 | |
| 106 | bus = ssb_dev->bus; |
| 107 | if (bus->suspend_cnt == bus->nr_devices) { |
| 108 | err = ssb_bus_resume(bus); |
| 109 | if (err) |
| 110 | return err; |
| 111 | } |
| 112 | bus->suspend_cnt--; |
| 113 | if (dev->driver) { |
| 114 | ssb_drv = drv_to_ssb_drv(dev->driver); |
| 115 | if (ssb_drv && ssb_drv->resume) |
| 116 | err = ssb_drv->resume(ssb_dev); |
| 117 | if (err) |
| 118 | goto out; |
| 119 | } |
| 120 | out: |
| 121 | return err; |
| 122 | } |
| 123 | |
| 124 | static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state) |
| 125 | { |
| 126 | ssb_chipco_suspend(&bus->chipco, state); |
| 127 | ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); |
| 128 | |
| 129 | /* Reset HW state information in memory, so that HW is |
| 130 | * completely reinitialized on resume. */ |
| 131 | bus->mapped_device = NULL; |
| 132 | #ifdef CONFIG_SSB_DRIVER_PCICORE |
| 133 | bus->pcicore.setup_done = 0; |
| 134 | #endif |
| 135 | #ifdef CONFIG_SSB_DEBUG |
| 136 | bus->powered_up = 0; |
| 137 | #endif |
| 138 | } |
| 139 | |
| 140 | static int ssb_device_suspend(struct device *dev, pm_message_t state) |
| 141 | { |
| 142 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 143 | struct ssb_driver *ssb_drv; |
| 144 | struct ssb_bus *bus; |
| 145 | int err = 0; |
| 146 | |
| 147 | if (dev->driver) { |
| 148 | ssb_drv = drv_to_ssb_drv(dev->driver); |
| 149 | if (ssb_drv && ssb_drv->suspend) |
| 150 | err = ssb_drv->suspend(ssb_dev, state); |
| 151 | if (err) |
| 152 | goto out; |
| 153 | } |
| 154 | |
| 155 | bus = ssb_dev->bus; |
| 156 | bus->suspend_cnt++; |
| 157 | if (bus->suspend_cnt == bus->nr_devices) { |
| 158 | /* All devices suspended. Shutdown the bus. */ |
| 159 | ssb_bus_suspend(bus, state); |
| 160 | } |
| 161 | |
| 162 | out: |
| 163 | return err; |
| 164 | } |
| 165 | |
| 166 | #ifdef CONFIG_SSB_PCIHOST |
| 167 | int ssb_devices_freeze(struct ssb_bus *bus) |
| 168 | { |
| 169 | struct ssb_device *dev; |
| 170 | struct ssb_driver *drv; |
| 171 | int err = 0; |
| 172 | int i; |
| 173 | pm_message_t state = PMSG_FREEZE; |
| 174 | |
| 175 | /* First check that we are capable to freeze all devices. */ |
| 176 | for (i = 0; i < bus->nr_devices; i++) { |
| 177 | dev = &(bus->devices[i]); |
| 178 | if (!dev->dev || |
| 179 | !dev->dev->driver || |
| 180 | !device_is_registered(dev->dev)) |
| 181 | continue; |
| 182 | drv = drv_to_ssb_drv(dev->dev->driver); |
| 183 | if (!drv) |
| 184 | continue; |
| 185 | if (!drv->suspend) { |
| 186 | /* Nope, can't suspend this one. */ |
| 187 | return -EOPNOTSUPP; |
| 188 | } |
| 189 | } |
| 190 | /* Now suspend all devices */ |
| 191 | for (i = 0; i < bus->nr_devices; i++) { |
| 192 | dev = &(bus->devices[i]); |
| 193 | if (!dev->dev || |
| 194 | !dev->dev->driver || |
| 195 | !device_is_registered(dev->dev)) |
| 196 | continue; |
| 197 | drv = drv_to_ssb_drv(dev->dev->driver); |
| 198 | if (!drv) |
| 199 | continue; |
| 200 | err = drv->suspend(dev, state); |
| 201 | if (err) { |
| 202 | ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n", |
| 203 | dev->dev->bus_id); |
| 204 | goto err_unwind; |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | return 0; |
| 209 | err_unwind: |
| 210 | for (i--; i >= 0; i--) { |
| 211 | dev = &(bus->devices[i]); |
| 212 | if (!dev->dev || |
| 213 | !dev->dev->driver || |
| 214 | !device_is_registered(dev->dev)) |
| 215 | continue; |
| 216 | drv = drv_to_ssb_drv(dev->dev->driver); |
| 217 | if (!drv) |
| 218 | continue; |
| 219 | if (drv->resume) |
| 220 | drv->resume(dev); |
| 221 | } |
| 222 | return err; |
| 223 | } |
| 224 | |
| 225 | int ssb_devices_thaw(struct ssb_bus *bus) |
| 226 | { |
| 227 | struct ssb_device *dev; |
| 228 | struct ssb_driver *drv; |
| 229 | int err; |
| 230 | int i; |
| 231 | |
| 232 | for (i = 0; i < bus->nr_devices; i++) { |
| 233 | dev = &(bus->devices[i]); |
| 234 | if (!dev->dev || |
| 235 | !dev->dev->driver || |
| 236 | !device_is_registered(dev->dev)) |
| 237 | continue; |
| 238 | drv = drv_to_ssb_drv(dev->dev->driver); |
| 239 | if (!drv) |
| 240 | continue; |
| 241 | if (SSB_WARN_ON(!drv->resume)) |
| 242 | continue; |
| 243 | err = drv->resume(dev); |
| 244 | if (err) { |
| 245 | ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n", |
| 246 | dev->dev->bus_id); |
| 247 | } |
| 248 | } |
| 249 | |
| 250 | return 0; |
| 251 | } |
| 252 | #endif /* CONFIG_SSB_PCIHOST */ |
| 253 | |
| 254 | static void ssb_device_shutdown(struct device *dev) |
| 255 | { |
| 256 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 257 | struct ssb_driver *ssb_drv; |
| 258 | |
| 259 | if (!dev->driver) |
| 260 | return; |
| 261 | ssb_drv = drv_to_ssb_drv(dev->driver); |
| 262 | if (ssb_drv && ssb_drv->shutdown) |
| 263 | ssb_drv->shutdown(ssb_dev); |
| 264 | } |
| 265 | |
| 266 | static int ssb_device_remove(struct device *dev) |
| 267 | { |
| 268 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 269 | struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); |
| 270 | |
| 271 | if (ssb_drv && ssb_drv->remove) |
| 272 | ssb_drv->remove(ssb_dev); |
| 273 | ssb_device_put(ssb_dev); |
| 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static int ssb_device_probe(struct device *dev) |
| 279 | { |
| 280 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 281 | struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); |
| 282 | int err = 0; |
| 283 | |
| 284 | ssb_device_get(ssb_dev); |
| 285 | if (ssb_drv && ssb_drv->probe) |
| 286 | err = ssb_drv->probe(ssb_dev, &ssb_dev->id); |
| 287 | if (err) |
| 288 | ssb_device_put(ssb_dev); |
| 289 | |
| 290 | return err; |
| 291 | } |
| 292 | |
| 293 | static int ssb_match_devid(const struct ssb_device_id *tabid, |
| 294 | const struct ssb_device_id *devid) |
| 295 | { |
| 296 | if ((tabid->vendor != devid->vendor) && |
| 297 | tabid->vendor != SSB_ANY_VENDOR) |
| 298 | return 0; |
| 299 | if ((tabid->coreid != devid->coreid) && |
| 300 | tabid->coreid != SSB_ANY_ID) |
| 301 | return 0; |
| 302 | if ((tabid->revision != devid->revision) && |
| 303 | tabid->revision != SSB_ANY_REV) |
| 304 | return 0; |
| 305 | return 1; |
| 306 | } |
| 307 | |
| 308 | static int ssb_bus_match(struct device *dev, struct device_driver *drv) |
| 309 | { |
| 310 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
| 311 | struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv); |
| 312 | const struct ssb_device_id *id; |
| 313 | |
| 314 | for (id = ssb_drv->id_table; |
| 315 | id->vendor || id->coreid || id->revision; |
| 316 | id++) { |
| 317 | if (ssb_match_devid(id, &ssb_dev->id)) |
| 318 | return 1; /* found */ |
| 319 | } |
| 320 | |
| 321 | return 0; |
| 322 | } |
| 323 | |
Al Viro | 7ac0326 | 2007-10-14 05:46:09 +0100 | [diff] [blame] | 324 | static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env) |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 325 | { |
| 326 | struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 327 | |
| 328 | if (!dev) |
| 329 | return -ENODEV; |
| 330 | |
Al Viro | 7ac0326 | 2007-10-14 05:46:09 +0100 | [diff] [blame] | 331 | return add_uevent_var(env, |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 332 | "MODALIAS=ssb:v%04Xid%04Xrev%02X", |
| 333 | ssb_dev->id.vendor, ssb_dev->id.coreid, |
| 334 | ssb_dev->id.revision); |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | static struct bus_type ssb_bustype = { |
| 338 | .name = "ssb", |
| 339 | .match = ssb_bus_match, |
| 340 | .probe = ssb_device_probe, |
| 341 | .remove = ssb_device_remove, |
| 342 | .shutdown = ssb_device_shutdown, |
| 343 | .suspend = ssb_device_suspend, |
| 344 | .resume = ssb_device_resume, |
| 345 | .uevent = ssb_device_uevent, |
| 346 | }; |
| 347 | |
| 348 | static void ssb_buses_lock(void) |
| 349 | { |
| 350 | /* See the comment at the ssb_is_early_boot definition */ |
| 351 | if (!ssb_is_early_boot) |
| 352 | mutex_lock(&buses_mutex); |
| 353 | } |
| 354 | |
| 355 | static void ssb_buses_unlock(void) |
| 356 | { |
| 357 | /* See the comment at the ssb_is_early_boot definition */ |
| 358 | if (!ssb_is_early_boot) |
| 359 | mutex_unlock(&buses_mutex); |
| 360 | } |
| 361 | |
| 362 | static void ssb_devices_unregister(struct ssb_bus *bus) |
| 363 | { |
| 364 | struct ssb_device *sdev; |
| 365 | int i; |
| 366 | |
| 367 | for (i = bus->nr_devices - 1; i >= 0; i--) { |
| 368 | sdev = &(bus->devices[i]); |
| 369 | if (sdev->dev) |
| 370 | device_unregister(sdev->dev); |
| 371 | } |
| 372 | } |
| 373 | |
| 374 | void ssb_bus_unregister(struct ssb_bus *bus) |
| 375 | { |
| 376 | ssb_buses_lock(); |
| 377 | ssb_devices_unregister(bus); |
| 378 | list_del(&bus->list); |
| 379 | ssb_buses_unlock(); |
| 380 | |
| 381 | /* ssb_pcmcia_exit(bus); */ |
| 382 | ssb_pci_exit(bus); |
| 383 | ssb_iounmap(bus); |
| 384 | } |
| 385 | EXPORT_SYMBOL(ssb_bus_unregister); |
| 386 | |
| 387 | static void ssb_release_dev(struct device *dev) |
| 388 | { |
| 389 | struct __ssb_dev_wrapper *devwrap; |
| 390 | |
| 391 | devwrap = container_of(dev, struct __ssb_dev_wrapper, dev); |
| 392 | kfree(devwrap); |
| 393 | } |
| 394 | |
| 395 | static int ssb_devices_register(struct ssb_bus *bus) |
| 396 | { |
| 397 | struct ssb_device *sdev; |
| 398 | struct device *dev; |
| 399 | struct __ssb_dev_wrapper *devwrap; |
| 400 | int i, err = 0; |
| 401 | int dev_idx = 0; |
| 402 | |
| 403 | for (i = 0; i < bus->nr_devices; i++) { |
| 404 | sdev = &(bus->devices[i]); |
| 405 | |
| 406 | /* We don't register SSB-system devices to the kernel, |
| 407 | * as the drivers for them are built into SSB. */ |
| 408 | switch (sdev->id.coreid) { |
| 409 | case SSB_DEV_CHIPCOMMON: |
| 410 | case SSB_DEV_PCI: |
| 411 | case SSB_DEV_PCIE: |
| 412 | case SSB_DEV_PCMCIA: |
| 413 | case SSB_DEV_MIPS: |
| 414 | case SSB_DEV_MIPS_3302: |
| 415 | case SSB_DEV_EXTIF: |
| 416 | continue; |
| 417 | } |
| 418 | |
| 419 | devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL); |
| 420 | if (!devwrap) { |
| 421 | ssb_printk(KERN_ERR PFX |
| 422 | "Could not allocate device\n"); |
| 423 | err = -ENOMEM; |
| 424 | goto error; |
| 425 | } |
| 426 | dev = &devwrap->dev; |
| 427 | devwrap->sdev = sdev; |
| 428 | |
| 429 | dev->release = ssb_release_dev; |
| 430 | dev->bus = &ssb_bustype; |
| 431 | snprintf(dev->bus_id, sizeof(dev->bus_id), |
| 432 | "ssb%u:%d", bus->busnumber, dev_idx); |
| 433 | |
| 434 | switch (bus->bustype) { |
| 435 | case SSB_BUSTYPE_PCI: |
| 436 | #ifdef CONFIG_SSB_PCIHOST |
| 437 | sdev->irq = bus->host_pci->irq; |
| 438 | dev->parent = &bus->host_pci->dev; |
| 439 | #endif |
| 440 | break; |
| 441 | case SSB_BUSTYPE_PCMCIA: |
| 442 | #ifdef CONFIG_SSB_PCMCIAHOST |
Michael Buesch | 60d78c4 | 2007-11-07 19:03:35 +0100 | [diff] [blame] | 443 | sdev->irq = bus->host_pcmcia->irq.AssignedIRQ; |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 444 | dev->parent = &bus->host_pcmcia->dev; |
| 445 | #endif |
| 446 | break; |
| 447 | case SSB_BUSTYPE_SSB: |
| 448 | break; |
| 449 | } |
| 450 | |
| 451 | sdev->dev = dev; |
| 452 | err = device_register(dev); |
| 453 | if (err) { |
| 454 | ssb_printk(KERN_ERR PFX |
| 455 | "Could not register %s\n", |
| 456 | dev->bus_id); |
| 457 | /* Set dev to NULL to not unregister |
| 458 | * dev on error unwinding. */ |
| 459 | sdev->dev = NULL; |
| 460 | kfree(devwrap); |
| 461 | goto error; |
| 462 | } |
| 463 | dev_idx++; |
| 464 | } |
| 465 | |
| 466 | return 0; |
| 467 | error: |
| 468 | /* Unwind the already registered devices. */ |
| 469 | ssb_devices_unregister(bus); |
| 470 | return err; |
| 471 | } |
| 472 | |
| 473 | /* Needs ssb_buses_lock() */ |
| 474 | static int ssb_attach_queued_buses(void) |
| 475 | { |
| 476 | struct ssb_bus *bus, *n; |
| 477 | int err = 0; |
| 478 | int drop_them_all = 0; |
| 479 | |
| 480 | list_for_each_entry_safe(bus, n, &attach_queue, list) { |
| 481 | if (drop_them_all) { |
| 482 | list_del(&bus->list); |
| 483 | continue; |
| 484 | } |
| 485 | /* Can't init the PCIcore in ssb_bus_register(), as that |
| 486 | * is too early in boot for embedded systems |
| 487 | * (no udelay() available). So do it here in attach stage. |
| 488 | */ |
| 489 | err = ssb_bus_powerup(bus, 0); |
| 490 | if (err) |
| 491 | goto error; |
| 492 | ssb_pcicore_init(&bus->pcicore); |
| 493 | ssb_bus_may_powerdown(bus); |
| 494 | |
| 495 | err = ssb_devices_register(bus); |
| 496 | error: |
| 497 | if (err) { |
| 498 | drop_them_all = 1; |
| 499 | list_del(&bus->list); |
| 500 | continue; |
| 501 | } |
| 502 | list_move_tail(&bus->list, &buses); |
| 503 | } |
| 504 | |
| 505 | return err; |
| 506 | } |
| 507 | |
| 508 | static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) |
| 509 | { |
| 510 | struct ssb_bus *bus = dev->bus; |
| 511 | |
| 512 | offset += dev->core_index * SSB_CORE_SIZE; |
| 513 | return readw(bus->mmio + offset); |
| 514 | } |
| 515 | |
| 516 | static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) |
| 517 | { |
| 518 | struct ssb_bus *bus = dev->bus; |
| 519 | |
| 520 | offset += dev->core_index * SSB_CORE_SIZE; |
| 521 | return readl(bus->mmio + offset); |
| 522 | } |
| 523 | |
| 524 | static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) |
| 525 | { |
| 526 | struct ssb_bus *bus = dev->bus; |
| 527 | |
| 528 | offset += dev->core_index * SSB_CORE_SIZE; |
| 529 | writew(value, bus->mmio + offset); |
| 530 | } |
| 531 | |
| 532 | static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) |
| 533 | { |
| 534 | struct ssb_bus *bus = dev->bus; |
| 535 | |
| 536 | offset += dev->core_index * SSB_CORE_SIZE; |
| 537 | writel(value, bus->mmio + offset); |
| 538 | } |
| 539 | |
| 540 | /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ |
| 541 | static const struct ssb_bus_ops ssb_ssb_ops = { |
| 542 | .read16 = ssb_ssb_read16, |
| 543 | .read32 = ssb_ssb_read32, |
| 544 | .write16 = ssb_ssb_write16, |
| 545 | .write32 = ssb_ssb_write32, |
| 546 | }; |
| 547 | |
| 548 | static int ssb_fetch_invariants(struct ssb_bus *bus, |
| 549 | ssb_invariants_func_t get_invariants) |
| 550 | { |
| 551 | struct ssb_init_invariants iv; |
| 552 | int err; |
| 553 | |
| 554 | memset(&iv, 0, sizeof(iv)); |
| 555 | err = get_invariants(bus, &iv); |
| 556 | if (err) |
| 557 | goto out; |
| 558 | memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo)); |
| 559 | memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom)); |
| 560 | out: |
| 561 | return err; |
| 562 | } |
| 563 | |
| 564 | static int ssb_bus_register(struct ssb_bus *bus, |
| 565 | ssb_invariants_func_t get_invariants, |
| 566 | unsigned long baseaddr) |
| 567 | { |
| 568 | int err; |
| 569 | |
| 570 | spin_lock_init(&bus->bar_lock); |
| 571 | INIT_LIST_HEAD(&bus->list); |
| 572 | |
| 573 | /* Powerup the bus */ |
| 574 | err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); |
| 575 | if (err) |
| 576 | goto out; |
| 577 | ssb_buses_lock(); |
| 578 | bus->busnumber = next_busnumber; |
| 579 | /* Scan for devices (cores) */ |
| 580 | err = ssb_bus_scan(bus, baseaddr); |
| 581 | if (err) |
| 582 | goto err_disable_xtal; |
| 583 | |
| 584 | /* Init PCI-host device (if any) */ |
| 585 | err = ssb_pci_init(bus); |
| 586 | if (err) |
| 587 | goto err_unmap; |
| 588 | /* Init PCMCIA-host device (if any) */ |
| 589 | err = ssb_pcmcia_init(bus); |
| 590 | if (err) |
| 591 | goto err_pci_exit; |
| 592 | |
| 593 | /* Initialize basic system devices (if available) */ |
| 594 | err = ssb_bus_powerup(bus, 0); |
| 595 | if (err) |
| 596 | goto err_pcmcia_exit; |
| 597 | ssb_chipcommon_init(&bus->chipco); |
| 598 | ssb_mipscore_init(&bus->mipscore); |
| 599 | err = ssb_fetch_invariants(bus, get_invariants); |
| 600 | if (err) { |
| 601 | ssb_bus_may_powerdown(bus); |
| 602 | goto err_pcmcia_exit; |
| 603 | } |
| 604 | ssb_bus_may_powerdown(bus); |
| 605 | |
| 606 | /* Queue it for attach. |
| 607 | * See the comment at the ssb_is_early_boot definition. */ |
| 608 | list_add_tail(&bus->list, &attach_queue); |
| 609 | if (!ssb_is_early_boot) { |
| 610 | /* This is not early boot, so we must attach the bus now */ |
| 611 | err = ssb_attach_queued_buses(); |
| 612 | if (err) |
| 613 | goto err_dequeue; |
| 614 | } |
| 615 | next_busnumber++; |
| 616 | ssb_buses_unlock(); |
| 617 | |
| 618 | out: |
| 619 | return err; |
| 620 | |
| 621 | err_dequeue: |
| 622 | list_del(&bus->list); |
| 623 | err_pcmcia_exit: |
| 624 | /* ssb_pcmcia_exit(bus); */ |
| 625 | err_pci_exit: |
| 626 | ssb_pci_exit(bus); |
| 627 | err_unmap: |
| 628 | ssb_iounmap(bus); |
| 629 | err_disable_xtal: |
| 630 | ssb_buses_unlock(); |
| 631 | ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); |
| 632 | return err; |
| 633 | } |
| 634 | |
| 635 | #ifdef CONFIG_SSB_PCIHOST |
| 636 | int ssb_bus_pcibus_register(struct ssb_bus *bus, |
| 637 | struct pci_dev *host_pci) |
| 638 | { |
| 639 | int err; |
| 640 | |
| 641 | bus->bustype = SSB_BUSTYPE_PCI; |
| 642 | bus->host_pci = host_pci; |
| 643 | bus->ops = &ssb_pci_ops; |
| 644 | |
| 645 | err = ssb_bus_register(bus, ssb_pci_get_invariants, 0); |
| 646 | if (!err) { |
| 647 | ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " |
| 648 | "PCI device %s\n", host_pci->dev.bus_id); |
| 649 | } |
| 650 | |
| 651 | return err; |
| 652 | } |
| 653 | EXPORT_SYMBOL(ssb_bus_pcibus_register); |
| 654 | #endif /* CONFIG_SSB_PCIHOST */ |
| 655 | |
| 656 | #ifdef CONFIG_SSB_PCMCIAHOST |
| 657 | int ssb_bus_pcmciabus_register(struct ssb_bus *bus, |
| 658 | struct pcmcia_device *pcmcia_dev, |
| 659 | unsigned long baseaddr) |
| 660 | { |
| 661 | int err; |
| 662 | |
| 663 | bus->bustype = SSB_BUSTYPE_PCMCIA; |
| 664 | bus->host_pcmcia = pcmcia_dev; |
| 665 | bus->ops = &ssb_pcmcia_ops; |
| 666 | |
| 667 | err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr); |
| 668 | if (!err) { |
| 669 | ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " |
| 670 | "PCMCIA device %s\n", pcmcia_dev->devname); |
| 671 | } |
| 672 | |
| 673 | return err; |
| 674 | } |
| 675 | EXPORT_SYMBOL(ssb_bus_pcmciabus_register); |
| 676 | #endif /* CONFIG_SSB_PCMCIAHOST */ |
| 677 | |
| 678 | int ssb_bus_ssbbus_register(struct ssb_bus *bus, |
| 679 | unsigned long baseaddr, |
| 680 | ssb_invariants_func_t get_invariants) |
| 681 | { |
| 682 | int err; |
| 683 | |
| 684 | bus->bustype = SSB_BUSTYPE_SSB; |
| 685 | bus->ops = &ssb_ssb_ops; |
| 686 | |
| 687 | err = ssb_bus_register(bus, get_invariants, baseaddr); |
| 688 | if (!err) { |
| 689 | ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at " |
| 690 | "address 0x%08lX\n", baseaddr); |
| 691 | } |
| 692 | |
| 693 | return err; |
| 694 | } |
| 695 | |
| 696 | int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) |
| 697 | { |
| 698 | drv->drv.name = drv->name; |
| 699 | drv->drv.bus = &ssb_bustype; |
| 700 | drv->drv.owner = owner; |
| 701 | |
| 702 | return driver_register(&drv->drv); |
| 703 | } |
| 704 | EXPORT_SYMBOL(__ssb_driver_register); |
| 705 | |
| 706 | void ssb_driver_unregister(struct ssb_driver *drv) |
| 707 | { |
| 708 | driver_unregister(&drv->drv); |
| 709 | } |
| 710 | EXPORT_SYMBOL(ssb_driver_unregister); |
| 711 | |
| 712 | void ssb_set_devtypedata(struct ssb_device *dev, void *data) |
| 713 | { |
| 714 | struct ssb_bus *bus = dev->bus; |
| 715 | struct ssb_device *ent; |
| 716 | int i; |
| 717 | |
| 718 | for (i = 0; i < bus->nr_devices; i++) { |
| 719 | ent = &(bus->devices[i]); |
| 720 | if (ent->id.vendor != dev->id.vendor) |
| 721 | continue; |
| 722 | if (ent->id.coreid != dev->id.coreid) |
| 723 | continue; |
| 724 | |
| 725 | ent->devtypedata = data; |
| 726 | } |
| 727 | } |
| 728 | EXPORT_SYMBOL(ssb_set_devtypedata); |
| 729 | |
| 730 | static u32 clkfactor_f6_resolve(u32 v) |
| 731 | { |
| 732 | /* map the magic values */ |
| 733 | switch (v) { |
| 734 | case SSB_CHIPCO_CLK_F6_2: |
| 735 | return 2; |
| 736 | case SSB_CHIPCO_CLK_F6_3: |
| 737 | return 3; |
| 738 | case SSB_CHIPCO_CLK_F6_4: |
| 739 | return 4; |
| 740 | case SSB_CHIPCO_CLK_F6_5: |
| 741 | return 5; |
| 742 | case SSB_CHIPCO_CLK_F6_6: |
| 743 | return 6; |
| 744 | case SSB_CHIPCO_CLK_F6_7: |
| 745 | return 7; |
| 746 | } |
| 747 | return 0; |
| 748 | } |
| 749 | |
| 750 | /* Calculate the speed the backplane would run at a given set of clockcontrol values */ |
| 751 | u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) |
| 752 | { |
| 753 | u32 n1, n2, clock, m1, m2, m3, mc; |
| 754 | |
| 755 | n1 = (n & SSB_CHIPCO_CLK_N1); |
| 756 | n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT); |
| 757 | |
| 758 | switch (plltype) { |
| 759 | case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ |
| 760 | if (m & SSB_CHIPCO_CLK_T6_MMASK) |
| 761 | return SSB_CHIPCO_CLK_T6_M0; |
| 762 | return SSB_CHIPCO_CLK_T6_M1; |
| 763 | case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ |
| 764 | case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ |
| 765 | case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ |
| 766 | case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ |
| 767 | n1 = clkfactor_f6_resolve(n1); |
| 768 | n2 += SSB_CHIPCO_CLK_F5_BIAS; |
| 769 | break; |
| 770 | case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */ |
| 771 | n1 += SSB_CHIPCO_CLK_T2_BIAS; |
| 772 | n2 += SSB_CHIPCO_CLK_T2_BIAS; |
| 773 | SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7))); |
| 774 | SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23))); |
| 775 | break; |
| 776 | case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */ |
| 777 | return 100000000; |
| 778 | default: |
| 779 | SSB_WARN_ON(1); |
| 780 | } |
| 781 | |
| 782 | switch (plltype) { |
| 783 | case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ |
| 784 | case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ |
| 785 | clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; |
| 786 | break; |
| 787 | default: |
| 788 | clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; |
| 789 | } |
| 790 | if (!clock) |
| 791 | return 0; |
| 792 | |
| 793 | m1 = (m & SSB_CHIPCO_CLK_M1); |
| 794 | m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); |
| 795 | m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); |
| 796 | mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT); |
| 797 | |
| 798 | switch (plltype) { |
| 799 | case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ |
| 800 | case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ |
| 801 | case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ |
| 802 | case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ |
| 803 | m1 = clkfactor_f6_resolve(m1); |
| 804 | if ((plltype == SSB_PLLTYPE_1) || |
| 805 | (plltype == SSB_PLLTYPE_3)) |
| 806 | m2 += SSB_CHIPCO_CLK_F5_BIAS; |
| 807 | else |
| 808 | m2 = clkfactor_f6_resolve(m2); |
| 809 | m3 = clkfactor_f6_resolve(m3); |
| 810 | |
| 811 | switch (mc) { |
| 812 | case SSB_CHIPCO_CLK_MC_BYPASS: |
| 813 | return clock; |
| 814 | case SSB_CHIPCO_CLK_MC_M1: |
| 815 | return (clock / m1); |
| 816 | case SSB_CHIPCO_CLK_MC_M1M2: |
| 817 | return (clock / (m1 * m2)); |
| 818 | case SSB_CHIPCO_CLK_MC_M1M2M3: |
| 819 | return (clock / (m1 * m2 * m3)); |
| 820 | case SSB_CHIPCO_CLK_MC_M1M3: |
| 821 | return (clock / (m1 * m3)); |
| 822 | } |
| 823 | return 0; |
| 824 | case SSB_PLLTYPE_2: |
| 825 | m1 += SSB_CHIPCO_CLK_T2_BIAS; |
| 826 | m2 += SSB_CHIPCO_CLK_T2M2_BIAS; |
| 827 | m3 += SSB_CHIPCO_CLK_T2_BIAS; |
| 828 | SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7))); |
| 829 | SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10))); |
| 830 | SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7))); |
| 831 | |
| 832 | if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP)) |
| 833 | clock /= m1; |
| 834 | if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP)) |
| 835 | clock /= m2; |
| 836 | if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP)) |
| 837 | clock /= m3; |
| 838 | return clock; |
| 839 | default: |
| 840 | SSB_WARN_ON(1); |
| 841 | } |
| 842 | return 0; |
| 843 | } |
| 844 | |
| 845 | /* Get the current speed the backplane is running at */ |
| 846 | u32 ssb_clockspeed(struct ssb_bus *bus) |
| 847 | { |
| 848 | u32 rate; |
| 849 | u32 plltype; |
| 850 | u32 clkctl_n, clkctl_m; |
| 851 | |
| 852 | if (ssb_extif_available(&bus->extif)) |
| 853 | ssb_extif_get_clockcontrol(&bus->extif, &plltype, |
| 854 | &clkctl_n, &clkctl_m); |
| 855 | else if (bus->chipco.dev) |
| 856 | ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, |
| 857 | &clkctl_n, &clkctl_m); |
| 858 | else |
| 859 | return 0; |
| 860 | |
| 861 | if (bus->chip_id == 0x5365) { |
| 862 | rate = 100000000; |
| 863 | } else { |
| 864 | rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); |
| 865 | if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ |
| 866 | rate /= 2; |
| 867 | } |
| 868 | |
| 869 | return rate; |
| 870 | } |
| 871 | EXPORT_SYMBOL(ssb_clockspeed); |
| 872 | |
| 873 | static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev) |
| 874 | { |
Larry Finger | c272ef4 | 2007-11-09 16:56:25 -0600 | [diff] [blame] | 875 | u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; |
| 876 | |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 877 | /* The REJECT bit changed position in TMSLOW between |
| 878 | * Backplane revisions. */ |
Larry Finger | c272ef4 | 2007-11-09 16:56:25 -0600 | [diff] [blame] | 879 | switch (rev) { |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 880 | case SSB_IDLOW_SSBREV_22: |
| 881 | return SSB_TMSLOW_REJECT_22; |
| 882 | case SSB_IDLOW_SSBREV_23: |
| 883 | return SSB_TMSLOW_REJECT_23; |
Larry Finger | c272ef4 | 2007-11-09 16:56:25 -0600 | [diff] [blame] | 884 | case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */ |
| 885 | case SSB_IDLOW_SSBREV_25: /* same here */ |
| 886 | case SSB_IDLOW_SSBREV_26: /* same here */ |
| 887 | case SSB_IDLOW_SSBREV_27: /* same here */ |
| 888 | return SSB_TMSLOW_REJECT_23; /* this is a guess */ |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 889 | default: |
Larry Finger | c272ef4 | 2007-11-09 16:56:25 -0600 | [diff] [blame] | 890 | printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 891 | WARN_ON(1); |
| 892 | } |
| 893 | return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); |
| 894 | } |
| 895 | |
| 896 | int ssb_device_is_enabled(struct ssb_device *dev) |
| 897 | { |
| 898 | u32 val; |
| 899 | u32 reject; |
| 900 | |
| 901 | reject = ssb_tmslow_reject_bitmask(dev); |
| 902 | val = ssb_read32(dev, SSB_TMSLOW); |
| 903 | val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; |
| 904 | |
| 905 | return (val == SSB_TMSLOW_CLOCK); |
| 906 | } |
| 907 | EXPORT_SYMBOL(ssb_device_is_enabled); |
| 908 | |
| 909 | static void ssb_flush_tmslow(struct ssb_device *dev) |
| 910 | { |
| 911 | /* Make _really_ sure the device has finished the TMSLOW |
| 912 | * register write transaction, as we risk running into |
| 913 | * a machine check exception otherwise. |
| 914 | * Do this by reading the register back to commit the |
| 915 | * PCI write and delay an additional usec for the device |
| 916 | * to react to the change. */ |
| 917 | ssb_read32(dev, SSB_TMSLOW); |
| 918 | udelay(1); |
| 919 | } |
| 920 | |
| 921 | void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags) |
| 922 | { |
| 923 | u32 val; |
| 924 | |
| 925 | ssb_device_disable(dev, core_specific_flags); |
| 926 | ssb_write32(dev, SSB_TMSLOW, |
| 927 | SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | |
| 928 | SSB_TMSLOW_FGC | core_specific_flags); |
| 929 | ssb_flush_tmslow(dev); |
| 930 | |
| 931 | /* Clear SERR if set. This is a hw bug workaround. */ |
| 932 | if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR) |
| 933 | ssb_write32(dev, SSB_TMSHIGH, 0); |
| 934 | |
| 935 | val = ssb_read32(dev, SSB_IMSTATE); |
| 936 | if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) { |
| 937 | val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO); |
| 938 | ssb_write32(dev, SSB_IMSTATE, val); |
| 939 | } |
| 940 | |
| 941 | ssb_write32(dev, SSB_TMSLOW, |
| 942 | SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | |
| 943 | core_specific_flags); |
| 944 | ssb_flush_tmslow(dev); |
| 945 | |
| 946 | ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | |
| 947 | core_specific_flags); |
| 948 | ssb_flush_tmslow(dev); |
| 949 | } |
| 950 | EXPORT_SYMBOL(ssb_device_enable); |
| 951 | |
| 952 | /* Wait for a bit in a register to get set or unset. |
| 953 | * timeout is in units of ten-microseconds */ |
| 954 | static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, |
| 955 | int timeout, int set) |
| 956 | { |
| 957 | int i; |
| 958 | u32 val; |
| 959 | |
| 960 | for (i = 0; i < timeout; i++) { |
| 961 | val = ssb_read32(dev, reg); |
| 962 | if (set) { |
| 963 | if (val & bitmask) |
| 964 | return 0; |
| 965 | } else { |
| 966 | if (!(val & bitmask)) |
| 967 | return 0; |
| 968 | } |
| 969 | udelay(10); |
| 970 | } |
| 971 | printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on " |
| 972 | "register %04X to %s.\n", |
| 973 | bitmask, reg, (set ? "set" : "clear")); |
| 974 | |
| 975 | return -ETIMEDOUT; |
| 976 | } |
| 977 | |
| 978 | void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) |
| 979 | { |
| 980 | u32 reject; |
| 981 | |
| 982 | if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) |
| 983 | return; |
| 984 | |
| 985 | reject = ssb_tmslow_reject_bitmask(dev); |
| 986 | ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); |
| 987 | ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); |
| 988 | ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); |
| 989 | ssb_write32(dev, SSB_TMSLOW, |
| 990 | SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | |
| 991 | reject | SSB_TMSLOW_RESET | |
| 992 | core_specific_flags); |
| 993 | ssb_flush_tmslow(dev); |
| 994 | |
| 995 | ssb_write32(dev, SSB_TMSLOW, |
| 996 | reject | SSB_TMSLOW_RESET | |
| 997 | core_specific_flags); |
| 998 | ssb_flush_tmslow(dev); |
| 999 | } |
| 1000 | EXPORT_SYMBOL(ssb_device_disable); |
| 1001 | |
| 1002 | u32 ssb_dma_translation(struct ssb_device *dev) |
| 1003 | { |
| 1004 | switch (dev->bus->bustype) { |
| 1005 | case SSB_BUSTYPE_SSB: |
| 1006 | return 0; |
| 1007 | case SSB_BUSTYPE_PCI: |
| 1008 | case SSB_BUSTYPE_PCMCIA: |
| 1009 | return SSB_PCI_DMA; |
| 1010 | } |
| 1011 | return 0; |
| 1012 | } |
| 1013 | EXPORT_SYMBOL(ssb_dma_translation); |
| 1014 | |
| 1015 | int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask) |
| 1016 | { |
| 1017 | struct device *dev = ssb_dev->dev; |
| 1018 | |
| 1019 | #ifdef CONFIG_SSB_PCIHOST |
| 1020 | if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI && |
| 1021 | !dma_supported(dev, mask)) |
| 1022 | return -EIO; |
| 1023 | #endif |
| 1024 | dev->coherent_dma_mask = mask; |
| 1025 | dev->dma_mask = &dev->coherent_dma_mask; |
| 1026 | |
| 1027 | return 0; |
| 1028 | } |
| 1029 | EXPORT_SYMBOL(ssb_dma_set_mask); |
| 1030 | |
| 1031 | int ssb_bus_may_powerdown(struct ssb_bus *bus) |
| 1032 | { |
| 1033 | struct ssb_chipcommon *cc; |
| 1034 | int err = 0; |
| 1035 | |
| 1036 | /* On buses where more than one core may be working |
| 1037 | * at a time, we must not powerdown stuff if there are |
| 1038 | * still cores that may want to run. */ |
| 1039 | if (bus->bustype == SSB_BUSTYPE_SSB) |
| 1040 | goto out; |
| 1041 | |
| 1042 | cc = &bus->chipco; |
| 1043 | ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); |
| 1044 | err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); |
| 1045 | if (err) |
| 1046 | goto error; |
| 1047 | out: |
| 1048 | #ifdef CONFIG_SSB_DEBUG |
| 1049 | bus->powered_up = 0; |
| 1050 | #endif |
| 1051 | return err; |
| 1052 | error: |
| 1053 | ssb_printk(KERN_ERR PFX "Bus powerdown failed\n"); |
| 1054 | goto out; |
| 1055 | } |
| 1056 | EXPORT_SYMBOL(ssb_bus_may_powerdown); |
| 1057 | |
| 1058 | int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) |
| 1059 | { |
| 1060 | struct ssb_chipcommon *cc; |
| 1061 | int err; |
| 1062 | enum ssb_clkmode mode; |
| 1063 | |
| 1064 | err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); |
| 1065 | if (err) |
| 1066 | goto error; |
| 1067 | cc = &bus->chipco; |
| 1068 | mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST; |
| 1069 | ssb_chipco_set_clockmode(cc, mode); |
| 1070 | |
| 1071 | #ifdef CONFIG_SSB_DEBUG |
| 1072 | bus->powered_up = 1; |
| 1073 | #endif |
| 1074 | return 0; |
| 1075 | error: |
| 1076 | ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); |
| 1077 | return err; |
| 1078 | } |
| 1079 | EXPORT_SYMBOL(ssb_bus_powerup); |
| 1080 | |
| 1081 | u32 ssb_admatch_base(u32 adm) |
| 1082 | { |
| 1083 | u32 base = 0; |
| 1084 | |
| 1085 | switch (adm & SSB_ADM_TYPE) { |
| 1086 | case SSB_ADM_TYPE0: |
| 1087 | base = (adm & SSB_ADM_BASE0); |
| 1088 | break; |
| 1089 | case SSB_ADM_TYPE1: |
| 1090 | SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
| 1091 | base = (adm & SSB_ADM_BASE1); |
| 1092 | break; |
| 1093 | case SSB_ADM_TYPE2: |
| 1094 | SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
| 1095 | base = (adm & SSB_ADM_BASE2); |
| 1096 | break; |
| 1097 | default: |
| 1098 | SSB_WARN_ON(1); |
| 1099 | } |
| 1100 | |
| 1101 | return base; |
| 1102 | } |
| 1103 | EXPORT_SYMBOL(ssb_admatch_base); |
| 1104 | |
| 1105 | u32 ssb_admatch_size(u32 adm) |
| 1106 | { |
| 1107 | u32 size = 0; |
| 1108 | |
| 1109 | switch (adm & SSB_ADM_TYPE) { |
| 1110 | case SSB_ADM_TYPE0: |
| 1111 | size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); |
| 1112 | break; |
| 1113 | case SSB_ADM_TYPE1: |
| 1114 | SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
| 1115 | size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); |
| 1116 | break; |
| 1117 | case SSB_ADM_TYPE2: |
| 1118 | SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ |
| 1119 | size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); |
| 1120 | break; |
| 1121 | default: |
| 1122 | SSB_WARN_ON(1); |
| 1123 | } |
| 1124 | size = (1 << (size + 1)); |
| 1125 | |
| 1126 | return size; |
| 1127 | } |
| 1128 | EXPORT_SYMBOL(ssb_admatch_size); |
| 1129 | |
| 1130 | static int __init ssb_modinit(void) |
| 1131 | { |
| 1132 | int err; |
| 1133 | |
| 1134 | /* See the comment at the ssb_is_early_boot definition */ |
| 1135 | ssb_is_early_boot = 0; |
| 1136 | err = bus_register(&ssb_bustype); |
| 1137 | if (err) |
| 1138 | return err; |
| 1139 | |
| 1140 | /* Maybe we already registered some buses at early boot. |
| 1141 | * Check for this and attach them |
| 1142 | */ |
| 1143 | ssb_buses_lock(); |
| 1144 | err = ssb_attach_queued_buses(); |
| 1145 | ssb_buses_unlock(); |
| 1146 | if (err) |
| 1147 | bus_unregister(&ssb_bustype); |
| 1148 | |
| 1149 | err = b43_pci_ssb_bridge_init(); |
| 1150 | if (err) { |
| 1151 | ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge " |
| 1152 | "initialization failed"); |
| 1153 | /* don't fail SSB init because of this */ |
| 1154 | err = 0; |
| 1155 | } |
| 1156 | |
| 1157 | return err; |
| 1158 | } |
Michael Buesch | 8d8c90e | 2007-10-27 15:14:39 +0200 | [diff] [blame] | 1159 | /* ssb must be initialized after PCI but before the ssb drivers. |
| 1160 | * That means we must use some initcall between subsys_initcall |
| 1161 | * and device_initcall. */ |
| 1162 | fs_initcall(ssb_modinit); |
Michael Buesch | 61e115a | 2007-09-18 15:12:50 -0400 | [diff] [blame] | 1163 | |
| 1164 | static void __exit ssb_modexit(void) |
| 1165 | { |
| 1166 | b43_pci_ssb_bridge_exit(); |
| 1167 | bus_unregister(&ssb_bustype); |
| 1168 | } |
| 1169 | module_exit(ssb_modexit) |