Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Driver for OHCI 1394 controllers |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3 | * |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 4 | * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software Foundation, |
| 18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 21 | #include <linux/bitops.h> |
Stefan Richter | 65b2742 | 2010-06-12 20:26:51 +0200 | [diff] [blame] | 22 | #include <linux/bug.h> |
Stefan Richter | e524f61 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 23 | #include <linux/compiler.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 24 | #include <linux/delay.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 25 | #include <linux/device.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 26 | #include <linux/dma-mapping.h> |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 27 | #include <linux/firewire.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 28 | #include <linux/firewire-constants.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 29 | #include <linux/init.h> |
| 30 | #include <linux/interrupt.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 31 | #include <linux/io.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 32 | #include <linux/kernel.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 33 | #include <linux/list.h> |
Al Viro | faa2fb4 | 2007-05-15 20:36:10 +0100 | [diff] [blame] | 34 | #include <linux/mm.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 35 | #include <linux/module.h> |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 36 | #include <linux/moduleparam.h> |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 37 | #include <linux/mutex.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 38 | #include <linux/pci.h> |
Stefan Richter | fc38379 | 2009-08-28 13:25:15 +0200 | [diff] [blame] | 39 | #include <linux/pci_ids.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 40 | #include <linux/slab.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 41 | #include <linux/spinlock.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 42 | #include <linux/string.h> |
Stefan Richter | e78483c | 2010-08-02 09:33:25 +0200 | [diff] [blame] | 43 | #include <linux/time.h> |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 44 | #include <linux/vmalloc.h> |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 45 | #include <linux/workqueue.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 46 | |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 47 | #include <asm/byteorder.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 48 | #include <asm/page.h> |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 49 | #include <asm/system.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 50 | |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 51 | #ifdef CONFIG_PPC_PMAC |
| 52 | #include <asm/pmac_feature.h> |
| 53 | #endif |
| 54 | |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 55 | #include "core.h" |
| 56 | #include "ohci.h" |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 57 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 58 | #define DESCRIPTOR_OUTPUT_MORE 0 |
| 59 | #define DESCRIPTOR_OUTPUT_LAST (1 << 12) |
| 60 | #define DESCRIPTOR_INPUT_MORE (2 << 12) |
| 61 | #define DESCRIPTOR_INPUT_LAST (3 << 12) |
| 62 | #define DESCRIPTOR_STATUS (1 << 11) |
| 63 | #define DESCRIPTOR_KEY_IMMEDIATE (2 << 8) |
| 64 | #define DESCRIPTOR_PING (1 << 7) |
| 65 | #define DESCRIPTOR_YY (1 << 6) |
| 66 | #define DESCRIPTOR_NO_IRQ (0 << 4) |
| 67 | #define DESCRIPTOR_IRQ_ERROR (1 << 4) |
| 68 | #define DESCRIPTOR_IRQ_ALWAYS (3 << 4) |
| 69 | #define DESCRIPTOR_BRANCH_ALWAYS (3 << 2) |
| 70 | #define DESCRIPTOR_WAIT (3 << 0) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 71 | |
| 72 | struct descriptor { |
| 73 | __le16 req_count; |
| 74 | __le16 control; |
| 75 | __le32 data_address; |
| 76 | __le32 branch_address; |
| 77 | __le16 res_count; |
| 78 | __le16 transfer_status; |
| 79 | } __attribute__((aligned(16))); |
| 80 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 81 | #define CONTROL_SET(regs) (regs) |
| 82 | #define CONTROL_CLEAR(regs) ((regs) + 4) |
| 83 | #define COMMAND_PTR(regs) ((regs) + 12) |
| 84 | #define CONTEXT_MATCH(regs) ((regs) + 16) |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 85 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 86 | #define AR_BUFFER_SIZE (32*1024) |
| 87 | #define AR_BUFFERS_MIN DIV_ROUND_UP(AR_BUFFER_SIZE, PAGE_SIZE) |
| 88 | /* we need at least two pages for proper list management */ |
| 89 | #define AR_BUFFERS (AR_BUFFERS_MIN >= 2 ? AR_BUFFERS_MIN : 2) |
| 90 | |
| 91 | #define MAX_ASYNC_PAYLOAD 4096 |
| 92 | #define MAX_AR_PACKET_SIZE (16 + MAX_ASYNC_PAYLOAD + 4) |
| 93 | #define AR_WRAPAROUND_PAGES DIV_ROUND_UP(MAX_AR_PACKET_SIZE, PAGE_SIZE) |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 94 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 95 | struct ar_context { |
| 96 | struct fw_ohci *ohci; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 97 | struct page *pages[AR_BUFFERS]; |
| 98 | void *buffer; |
| 99 | struct descriptor *descriptors; |
| 100 | dma_addr_t descriptors_bus; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 101 | void *pointer; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 102 | unsigned int last_buffer_index; |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 103 | u32 regs; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 104 | struct tasklet_struct tasklet; |
| 105 | }; |
| 106 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 107 | struct context; |
| 108 | |
| 109 | typedef int (*descriptor_callback_t)(struct context *ctx, |
| 110 | struct descriptor *d, |
| 111 | struct descriptor *last); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 112 | |
| 113 | /* |
| 114 | * A buffer that contains a block of DMA-able coherent memory used for |
| 115 | * storing a portion of a DMA descriptor program. |
| 116 | */ |
| 117 | struct descriptor_buffer { |
| 118 | struct list_head list; |
| 119 | dma_addr_t buffer_bus; |
| 120 | size_t buffer_size; |
| 121 | size_t used; |
| 122 | struct descriptor buffer[0]; |
| 123 | }; |
| 124 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 125 | struct context { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 126 | struct fw_ohci *ohci; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 127 | u32 regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 128 | int total_allocation; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 129 | u32 current_bus; |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 130 | bool running; |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 131 | bool flushing; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 132 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 133 | /* |
| 134 | * List of page-sized buffers for storing DMA descriptors. |
| 135 | * Head of list contains buffers in use and tail of list contains |
| 136 | * free buffers. |
| 137 | */ |
| 138 | struct list_head buffer_list; |
| 139 | |
| 140 | /* |
| 141 | * Pointer to a buffer inside buffer_list that contains the tail |
| 142 | * end of the current DMA program. |
| 143 | */ |
| 144 | struct descriptor_buffer *buffer_tail; |
| 145 | |
| 146 | /* |
| 147 | * The descriptor containing the branch address of the first |
| 148 | * descriptor that has not yet been filled by the device. |
| 149 | */ |
| 150 | struct descriptor *last; |
| 151 | |
| 152 | /* |
| 153 | * The last descriptor in the DMA program. It contains the branch |
| 154 | * address that must be updated upon appending a new descriptor. |
| 155 | */ |
| 156 | struct descriptor *prev; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 157 | |
| 158 | descriptor_callback_t callback; |
| 159 | |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 160 | struct tasklet_struct tasklet; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 161 | }; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 162 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 163 | #define IT_HEADER_SY(v) ((v) << 0) |
| 164 | #define IT_HEADER_TCODE(v) ((v) << 4) |
| 165 | #define IT_HEADER_CHANNEL(v) ((v) << 8) |
| 166 | #define IT_HEADER_TAG(v) ((v) << 14) |
| 167 | #define IT_HEADER_SPEED(v) ((v) << 16) |
| 168 | #define IT_HEADER_DATA_LENGTH(v) ((v) << 16) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 169 | |
| 170 | struct iso_context { |
| 171 | struct fw_iso_context base; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 172 | struct context context; |
David Moore | 0642b65 | 2007-12-19 03:09:18 -0500 | [diff] [blame] | 173 | int excess_bytes; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 174 | void *header; |
| 175 | size_t header_length; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 176 | |
| 177 | u8 sync; |
| 178 | u8 tags; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 179 | }; |
| 180 | |
| 181 | #define CONFIG_ROM_SIZE 1024 |
| 182 | |
| 183 | struct fw_ohci { |
| 184 | struct fw_card card; |
| 185 | |
| 186 | __iomem char *registers; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 187 | int node_id; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 188 | int generation; |
Stefan Richter | e09770d | 2008-03-11 02:23:29 +0100 | [diff] [blame] | 189 | int request_generation; /* for timestamping incoming requests */ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 190 | unsigned quirks; |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 191 | unsigned int pri_req_max; |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 192 | u32 bus_time; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 193 | bool is_root; |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 194 | bool csr_state_setclear_abdicate; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 195 | int n_ir; |
| 196 | int n_it; |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 197 | /* |
| 198 | * Spinlock for accessing fw_ohci data. Never call out of |
| 199 | * this driver with this lock held. |
| 200 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 201 | spinlock_t lock; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 202 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 203 | struct mutex phy_reg_mutex; |
| 204 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 205 | void *misc_buffer; |
| 206 | dma_addr_t misc_buffer_bus; |
| 207 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 208 | struct ar_context ar_request_ctx; |
| 209 | struct ar_context ar_response_ctx; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 210 | struct context at_request_ctx; |
| 211 | struct context at_response_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 212 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 213 | u32 it_context_support; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 214 | u32 it_context_mask; /* unoccupied IT contexts */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 215 | struct iso_context *it_context_list; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 216 | u64 ir_context_channels; /* unoccupied channels */ |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 217 | u32 ir_context_support; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 218 | u32 ir_context_mask; /* unoccupied IR contexts */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 219 | struct iso_context *ir_context_list; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 220 | u64 mc_channels; /* channels in use by the multichannel IR context */ |
| 221 | bool mc_allocated; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 222 | |
| 223 | __be32 *config_rom; |
| 224 | dma_addr_t config_rom_bus; |
| 225 | __be32 *next_config_rom; |
| 226 | dma_addr_t next_config_rom_bus; |
| 227 | __be32 next_header; |
| 228 | |
| 229 | __le32 *self_id_cpu; |
| 230 | dma_addr_t self_id_bus; |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 231 | struct work_struct bus_reset_work; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 232 | |
| 233 | u32 self_id_buffer[512]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 234 | }; |
| 235 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 236 | static inline struct fw_ohci *fw_ohci(struct fw_card *card) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 237 | { |
| 238 | return container_of(card, struct fw_ohci, card); |
| 239 | } |
| 240 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 241 | #define IT_CONTEXT_CYCLE_MATCH_ENABLE 0x80000000 |
| 242 | #define IR_CONTEXT_BUFFER_FILL 0x80000000 |
| 243 | #define IR_CONTEXT_ISOCH_HEADER 0x40000000 |
| 244 | #define IR_CONTEXT_CYCLE_MATCH_ENABLE 0x20000000 |
| 245 | #define IR_CONTEXT_MULTI_CHANNEL_MODE 0x10000000 |
| 246 | #define IR_CONTEXT_DUAL_BUFFER_MODE 0x08000000 |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 247 | |
| 248 | #define CONTEXT_RUN 0x8000 |
| 249 | #define CONTEXT_WAKE 0x1000 |
| 250 | #define CONTEXT_DEAD 0x0800 |
| 251 | #define CONTEXT_ACTIVE 0x0400 |
| 252 | |
Stefan Richter | 8b7b6af | 2009-01-20 19:10:58 +0100 | [diff] [blame] | 253 | #define OHCI1394_MAX_AT_REQ_RETRIES 0xf |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 254 | #define OHCI1394_MAX_AT_RESP_RETRIES 0x2 |
| 255 | #define OHCI1394_MAX_PHYS_RESP_RETRIES 0x8 |
| 256 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 257 | #define OHCI1394_REGISTER_SIZE 0x800 |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 258 | #define OHCI1394_PCI_HCI_Control 0x40 |
| 259 | #define SELF_ID_BUF_SIZE 0x800 |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 260 | #define OHCI_TCODE_PHY_PACKET 0x0e |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 261 | #define OHCI_VERSION_1_1 0x010010 |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 262 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 263 | static char ohci_driver_name[] = KBUILD_MODNAME; |
| 264 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 265 | #define PCI_DEVICE_ID_AGERE_FW643 0x5901 |
Clemens Ladisch | d1bb399 | 2012-01-26 22:05:58 +0100 | [diff] [blame] | 266 | #define PCI_DEVICE_ID_CREATIVE_SB1394 0x4001 |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 267 | #define PCI_DEVICE_ID_JMICRON_JMB38X_FW 0x2380 |
Clemens Ladisch | 8301b91 | 2010-03-17 11:07:55 +0100 | [diff] [blame] | 268 | #define PCI_DEVICE_ID_TI_TSB12LV22 0x8009 |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 269 | #define PCI_DEVICE_ID_TI_TSB12LV26 0x8020 |
| 270 | #define PCI_DEVICE_ID_TI_TSB82AA2 0x8025 |
Stefan Richter | 7f7e3711 | 2011-07-10 00:23:03 +0200 | [diff] [blame] | 271 | #define PCI_VENDOR_ID_PINNACLE_SYSTEMS 0x11bd |
Clemens Ladisch | 8301b91 | 2010-03-17 11:07:55 +0100 | [diff] [blame] | 272 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 273 | #define QUIRK_CYCLE_TIMER 1 |
| 274 | #define QUIRK_RESET_PACKET 2 |
| 275 | #define QUIRK_BE_HEADERS 4 |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 276 | #define QUIRK_NO_1394A 8 |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 277 | #define QUIRK_NO_MSI 16 |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 278 | #define QUIRK_TI_SLLZ059 32 |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 279 | |
| 280 | /* In case of multiple matches in ohci_quirks[], only the first one is used. */ |
| 281 | static const struct { |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 282 | unsigned short vendor, device, revision, flags; |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 283 | } ohci_quirks[] = { |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 284 | {PCI_VENDOR_ID_AL, PCI_ANY_ID, PCI_ANY_ID, |
| 285 | QUIRK_CYCLE_TIMER}, |
| 286 | |
| 287 | {PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_FW, PCI_ANY_ID, |
| 288 | QUIRK_BE_HEADERS}, |
| 289 | |
| 290 | {PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_AGERE_FW643, 6, |
| 291 | QUIRK_NO_MSI}, |
| 292 | |
Clemens Ladisch | d1bb399 | 2012-01-26 22:05:58 +0100 | [diff] [blame] | 293 | {PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_SB1394, PCI_ANY_ID, |
| 294 | QUIRK_RESET_PACKET}, |
| 295 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 296 | {PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_FW, PCI_ANY_ID, |
| 297 | QUIRK_NO_MSI}, |
| 298 | |
| 299 | {PCI_VENDOR_ID_NEC, PCI_ANY_ID, PCI_ANY_ID, |
| 300 | QUIRK_CYCLE_TIMER}, |
| 301 | |
Ming Lei | f39aa30 | 2011-08-31 10:45:46 +0800 | [diff] [blame] | 302 | {PCI_VENDOR_ID_O2, PCI_ANY_ID, PCI_ANY_ID, |
| 303 | QUIRK_NO_MSI}, |
| 304 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 305 | {PCI_VENDOR_ID_RICOH, PCI_ANY_ID, PCI_ANY_ID, |
Stefan Richter | 320cfa6 | 2012-01-29 12:41:15 +0100 | [diff] [blame^] | 306 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 307 | |
| 308 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB12LV22, PCI_ANY_ID, |
| 309 | QUIRK_CYCLE_TIMER | QUIRK_RESET_PACKET | QUIRK_NO_1394A}, |
| 310 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 311 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB12LV26, PCI_ANY_ID, |
| 312 | QUIRK_RESET_PACKET | QUIRK_TI_SLLZ059}, |
| 313 | |
| 314 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB82AA2, PCI_ANY_ID, |
| 315 | QUIRK_RESET_PACKET | QUIRK_TI_SLLZ059}, |
| 316 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 317 | {PCI_VENDOR_ID_TI, PCI_ANY_ID, PCI_ANY_ID, |
| 318 | QUIRK_RESET_PACKET}, |
| 319 | |
| 320 | {PCI_VENDOR_ID_VIA, PCI_ANY_ID, PCI_ANY_ID, |
| 321 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 322 | }; |
| 323 | |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 324 | /* This overrides anything that was found in ohci_quirks[]. */ |
| 325 | static int param_quirks; |
| 326 | module_param_named(quirks, param_quirks, int, 0644); |
| 327 | MODULE_PARM_DESC(quirks, "Chip quirks (default = 0" |
| 328 | ", nonatomic cycle timer = " __stringify(QUIRK_CYCLE_TIMER) |
| 329 | ", reset packet generation = " __stringify(QUIRK_RESET_PACKET) |
| 330 | ", AR/selfID endianess = " __stringify(QUIRK_BE_HEADERS) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 331 | ", no 1394a enhancements = " __stringify(QUIRK_NO_1394A) |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 332 | ", disable MSI = " __stringify(QUIRK_NO_MSI) |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 333 | ", TI SLLZ059 erratum = " __stringify(QUIRK_TI_SLLZ059) |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 334 | ")"); |
| 335 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 336 | #define OHCI_PARAM_DEBUG_AT_AR 1 |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 337 | #define OHCI_PARAM_DEBUG_SELFIDS 2 |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 338 | #define OHCI_PARAM_DEBUG_IRQS 4 |
| 339 | #define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */ |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 340 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 341 | #ifdef CONFIG_FIREWIRE_OHCI_DEBUG |
| 342 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 343 | static int param_debug; |
| 344 | module_param_named(debug, param_debug, int, 0644); |
| 345 | MODULE_PARM_DESC(debug, "Verbose logging (default = 0" |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 346 | ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR) |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 347 | ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS) |
| 348 | ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS) |
| 349 | ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 350 | ", or a combination, or all = -1)"); |
| 351 | |
| 352 | static void log_irqs(u32 evt) |
| 353 | { |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 354 | if (likely(!(param_debug & |
| 355 | (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS)))) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 356 | return; |
| 357 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 358 | if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) && |
| 359 | !(evt & OHCI1394_busReset)) |
| 360 | return; |
| 361 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 362 | fw_notify("IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 363 | evt & OHCI1394_selfIDComplete ? " selfID" : "", |
| 364 | evt & OHCI1394_RQPkt ? " AR_req" : "", |
| 365 | evt & OHCI1394_RSPkt ? " AR_resp" : "", |
| 366 | evt & OHCI1394_reqTxComplete ? " AT_req" : "", |
| 367 | evt & OHCI1394_respTxComplete ? " AT_resp" : "", |
| 368 | evt & OHCI1394_isochRx ? " IR" : "", |
| 369 | evt & OHCI1394_isochTx ? " IT" : "", |
| 370 | evt & OHCI1394_postedWriteErr ? " postedWriteErr" : "", |
| 371 | evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "", |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 372 | evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "", |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 373 | evt & OHCI1394_cycleInconsistent ? " cycleInconsistent" : "", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 374 | evt & OHCI1394_regAccessFail ? " regAccessFail" : "", |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 375 | evt & OHCI1394_unrecoverableError ? " unrecoverableError" : "", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 376 | evt & OHCI1394_busReset ? " busReset" : "", |
| 377 | evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt | |
| 378 | OHCI1394_RSPkt | OHCI1394_reqTxComplete | |
| 379 | OHCI1394_respTxComplete | OHCI1394_isochRx | |
| 380 | OHCI1394_isochTx | OHCI1394_postedWriteErr | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 381 | OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds | |
| 382 | OHCI1394_cycleInconsistent | |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 383 | OHCI1394_regAccessFail | OHCI1394_busReset) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 384 | ? " ?" : ""); |
| 385 | } |
| 386 | |
| 387 | static const char *speed[] = { |
| 388 | [0] = "S100", [1] = "S200", [2] = "S400", [3] = "beta", |
| 389 | }; |
| 390 | static const char *power[] = { |
| 391 | [0] = "+0W", [1] = "+15W", [2] = "+30W", [3] = "+45W", |
| 392 | [4] = "-3W", [5] = " ?W", [6] = "-3..-6W", [7] = "-3..-10W", |
| 393 | }; |
| 394 | static const char port[] = { '.', '-', 'p', 'c', }; |
| 395 | |
| 396 | static char _p(u32 *s, int shift) |
| 397 | { |
| 398 | return port[*s >> shift & 3]; |
| 399 | } |
| 400 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 401 | static void log_selfids(int node_id, int generation, int self_id_count, u32 *s) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 402 | { |
| 403 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_SELFIDS))) |
| 404 | return; |
| 405 | |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 406 | fw_notify("%d selfIDs, generation %d, local node ID %04x\n", |
| 407 | self_id_count, generation, node_id); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 408 | |
| 409 | for (; self_id_count--; ++s) |
| 410 | if ((*s & 1 << 23) == 0) |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 411 | fw_notify("selfID 0: %08x, phy %d [%c%c%c] " |
| 412 | "%s gc=%d %s %s%s%s\n", |
| 413 | *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2), |
| 414 | speed[*s >> 14 & 3], *s >> 16 & 63, |
| 415 | power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "", |
| 416 | *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : ""); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 417 | else |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 418 | fw_notify("selfID n: %08x, phy %d [%c%c%c%c%c%c%c%c]\n", |
| 419 | *s, *s >> 24 & 63, |
| 420 | _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10), |
| 421 | _p(s, 8), _p(s, 6), _p(s, 4), _p(s, 2)); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 422 | } |
| 423 | |
| 424 | static const char *evts[] = { |
| 425 | [0x00] = "evt_no_status", [0x01] = "-reserved-", |
| 426 | [0x02] = "evt_long_packet", [0x03] = "evt_missing_ack", |
| 427 | [0x04] = "evt_underrun", [0x05] = "evt_overrun", |
| 428 | [0x06] = "evt_descriptor_read", [0x07] = "evt_data_read", |
| 429 | [0x08] = "evt_data_write", [0x09] = "evt_bus_reset", |
| 430 | [0x0a] = "evt_timeout", [0x0b] = "evt_tcode_err", |
| 431 | [0x0c] = "-reserved-", [0x0d] = "-reserved-", |
| 432 | [0x0e] = "evt_unknown", [0x0f] = "evt_flushed", |
| 433 | [0x10] = "-reserved-", [0x11] = "ack_complete", |
| 434 | [0x12] = "ack_pending ", [0x13] = "-reserved-", |
| 435 | [0x14] = "ack_busy_X", [0x15] = "ack_busy_A", |
| 436 | [0x16] = "ack_busy_B", [0x17] = "-reserved-", |
| 437 | [0x18] = "-reserved-", [0x19] = "-reserved-", |
| 438 | [0x1a] = "-reserved-", [0x1b] = "ack_tardy", |
| 439 | [0x1c] = "-reserved-", [0x1d] = "ack_data_error", |
| 440 | [0x1e] = "ack_type_error", [0x1f] = "-reserved-", |
| 441 | [0x20] = "pending/cancelled", |
| 442 | }; |
| 443 | static const char *tcodes[] = { |
| 444 | [0x0] = "QW req", [0x1] = "BW req", |
| 445 | [0x2] = "W resp", [0x3] = "-reserved-", |
| 446 | [0x4] = "QR req", [0x5] = "BR req", |
| 447 | [0x6] = "QR resp", [0x7] = "BR resp", |
| 448 | [0x8] = "cycle start", [0x9] = "Lk req", |
| 449 | [0xa] = "async stream packet", [0xb] = "Lk resp", |
| 450 | [0xc] = "-reserved-", [0xd] = "-reserved-", |
| 451 | [0xe] = "link internal", [0xf] = "-reserved-", |
| 452 | }; |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 453 | |
| 454 | static void log_ar_at_event(char dir, int speed, u32 *header, int evt) |
| 455 | { |
| 456 | int tcode = header[0] >> 4 & 0xf; |
| 457 | char specific[12]; |
| 458 | |
| 459 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_AT_AR))) |
| 460 | return; |
| 461 | |
| 462 | if (unlikely(evt >= ARRAY_SIZE(evts))) |
| 463 | evt = 0x1f; |
| 464 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 465 | if (evt == OHCI1394_evt_bus_reset) { |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 466 | fw_notify("A%c evt_bus_reset, generation %d\n", |
| 467 | dir, (header[2] >> 16) & 0xff); |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 468 | return; |
| 469 | } |
| 470 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 471 | switch (tcode) { |
| 472 | case 0x0: case 0x6: case 0x8: |
| 473 | snprintf(specific, sizeof(specific), " = %08x", |
| 474 | be32_to_cpu((__force __be32)header[3])); |
| 475 | break; |
| 476 | case 0x1: case 0x5: case 0x7: case 0x9: case 0xb: |
| 477 | snprintf(specific, sizeof(specific), " %x,%x", |
| 478 | header[3] >> 16, header[3] & 0xffff); |
| 479 | break; |
| 480 | default: |
| 481 | specific[0] = '\0'; |
| 482 | } |
| 483 | |
| 484 | switch (tcode) { |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 485 | case 0xa: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 486 | fw_notify("A%c %s, %s\n", dir, evts[evt], tcodes[tcode]); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 487 | break; |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 488 | case 0xe: |
| 489 | fw_notify("A%c %s, PHY %08x %08x\n", |
| 490 | dir, evts[evt], header[1], header[2]); |
| 491 | break; |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 492 | case 0x0: case 0x1: case 0x4: case 0x5: case 0x9: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 493 | fw_notify("A%c spd %x tl %02x, " |
| 494 | "%04x -> %04x, %s, " |
| 495 | "%s, %04x%08x%s\n", |
| 496 | dir, speed, header[0] >> 10 & 0x3f, |
| 497 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 498 | tcodes[tcode], header[1] & 0xffff, header[2], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 499 | break; |
| 500 | default: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 501 | fw_notify("A%c spd %x tl %02x, " |
| 502 | "%04x -> %04x, %s, " |
| 503 | "%s%s\n", |
| 504 | dir, speed, header[0] >> 10 & 0x3f, |
| 505 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 506 | tcodes[tcode], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 507 | } |
| 508 | } |
| 509 | |
| 510 | #else |
| 511 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 512 | #define param_debug 0 |
| 513 | static inline void log_irqs(u32 evt) {} |
| 514 | static inline void log_selfids(int node_id, int generation, int self_id_count, u32 *s) {} |
| 515 | static inline void log_ar_at_event(char dir, int speed, u32 *header, int evt) {} |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 516 | |
| 517 | #endif /* CONFIG_FIREWIRE_OHCI_DEBUG */ |
| 518 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 519 | static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 520 | { |
| 521 | writel(data, ohci->registers + offset); |
| 522 | } |
| 523 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 524 | static inline u32 reg_read(const struct fw_ohci *ohci, int offset) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 525 | { |
| 526 | return readl(ohci->registers + offset); |
| 527 | } |
| 528 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 529 | static inline void flush_writes(const struct fw_ohci *ohci) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 530 | { |
| 531 | /* Do a dummy read to flush writes. */ |
| 532 | reg_read(ohci, OHCI1394_Version); |
| 533 | } |
| 534 | |
Stefan Richter | b14c369 | 2011-06-21 15:24:26 +0200 | [diff] [blame] | 535 | /* |
| 536 | * Beware! read_phy_reg(), write_phy_reg(), update_phy_reg(), and |
| 537 | * read_paged_phy_reg() require the caller to hold ohci->phy_reg_mutex. |
| 538 | * In other words, only use ohci_read_phy_reg() and ohci_update_phy_reg() |
| 539 | * directly. Exceptions are intrinsically serialized contexts like pci_probe. |
| 540 | */ |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 541 | static int read_phy_reg(struct fw_ohci *ohci, int addr) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 542 | { |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 543 | u32 val; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 544 | int i; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 545 | |
| 546 | reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 547 | for (i = 0; i < 3 + 100; i++) { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 548 | val = reg_read(ohci, OHCI1394_PhyControl); |
Stefan Richter | 215fa44 | 2011-06-22 21:05:08 +0200 | [diff] [blame] | 549 | if (!~val) |
| 550 | return -ENODEV; /* Card was ejected. */ |
| 551 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 552 | if (val & OHCI1394_PhyControl_ReadDone) |
| 553 | return OHCI1394_PhyControl_ReadData(val); |
| 554 | |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 555 | /* |
| 556 | * Try a few times without waiting. Sleeping is necessary |
| 557 | * only when the link/PHY interface is busy. |
| 558 | */ |
| 559 | if (i >= 3) |
| 560 | msleep(1); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 561 | } |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 562 | fw_error("failed to read phy reg\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 563 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 564 | return -EBUSY; |
| 565 | } |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 566 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 567 | static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) |
| 568 | { |
| 569 | int i; |
| 570 | |
| 571 | reg_write(ohci, OHCI1394_PhyControl, |
| 572 | OHCI1394_PhyControl_Write(addr, val)); |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 573 | for (i = 0; i < 3 + 100; i++) { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 574 | val = reg_read(ohci, OHCI1394_PhyControl); |
Stefan Richter | 215fa44 | 2011-06-22 21:05:08 +0200 | [diff] [blame] | 575 | if (!~val) |
| 576 | return -ENODEV; /* Card was ejected. */ |
| 577 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 578 | if (!(val & OHCI1394_PhyControl_WritePending)) |
| 579 | return 0; |
| 580 | |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 581 | if (i >= 3) |
| 582 | msleep(1); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 583 | } |
| 584 | fw_error("failed to write phy reg\n"); |
| 585 | |
| 586 | return -EBUSY; |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 587 | } |
| 588 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 589 | static int update_phy_reg(struct fw_ohci *ohci, int addr, |
| 590 | int clear_bits, int set_bits) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 591 | { |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 592 | int ret = read_phy_reg(ohci, addr); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 593 | if (ret < 0) |
| 594 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 595 | |
Clemens Ladisch | e7014da | 2010-04-01 16:40:18 +0200 | [diff] [blame] | 596 | /* |
| 597 | * The interrupt status bits are cleared by writing a one bit. |
| 598 | * Avoid clearing them unless explicitly requested in set_bits. |
| 599 | */ |
| 600 | if (addr == 5) |
| 601 | clear_bits |= PHY_INT_STATUS_BITS; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 602 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 603 | return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 604 | } |
| 605 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 606 | static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 607 | { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 608 | int ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 609 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 610 | ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 611 | if (ret < 0) |
| 612 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 613 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 614 | return read_phy_reg(ohci, addr); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 615 | } |
| 616 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 617 | static int ohci_read_phy_reg(struct fw_card *card, int addr) |
| 618 | { |
| 619 | struct fw_ohci *ohci = fw_ohci(card); |
| 620 | int ret; |
| 621 | |
| 622 | mutex_lock(&ohci->phy_reg_mutex); |
| 623 | ret = read_phy_reg(ohci, addr); |
| 624 | mutex_unlock(&ohci->phy_reg_mutex); |
| 625 | |
| 626 | return ret; |
| 627 | } |
| 628 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 629 | static int ohci_update_phy_reg(struct fw_card *card, int addr, |
| 630 | int clear_bits, int set_bits) |
| 631 | { |
| 632 | struct fw_ohci *ohci = fw_ohci(card); |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 633 | int ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 634 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 635 | mutex_lock(&ohci->phy_reg_mutex); |
| 636 | ret = update_phy_reg(ohci, addr, clear_bits, set_bits); |
| 637 | mutex_unlock(&ohci->phy_reg_mutex); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 638 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 639 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 640 | } |
| 641 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 642 | static inline dma_addr_t ar_buffer_bus(struct ar_context *ctx, unsigned int i) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 643 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 644 | return page_private(ctx->pages[i]); |
| 645 | } |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 646 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 647 | static void ar_context_link_page(struct ar_context *ctx, unsigned int index) |
| 648 | { |
| 649 | struct descriptor *d; |
| 650 | |
| 651 | d = &ctx->descriptors[index]; |
| 652 | d->branch_address &= cpu_to_le32(~0xf); |
| 653 | d->res_count = cpu_to_le16(PAGE_SIZE); |
| 654 | d->transfer_status = 0; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 655 | |
Stefan Richter | 071595e | 2010-07-27 13:20:33 +0200 | [diff] [blame] | 656 | wmb(); /* finish init of new descriptors before branch_address update */ |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 657 | d = &ctx->descriptors[ctx->last_buffer_index]; |
| 658 | d->branch_address |= cpu_to_le32(1); |
| 659 | |
| 660 | ctx->last_buffer_index = index; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 661 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 662 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | 837596a | 2010-10-25 11:42:42 +0200 | [diff] [blame] | 663 | } |
| 664 | |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 665 | static void ar_context_release(struct ar_context *ctx) |
| 666 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 667 | unsigned int i; |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 668 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 669 | if (ctx->buffer) |
| 670 | vm_unmap_ram(ctx->buffer, AR_BUFFERS + AR_WRAPAROUND_PAGES); |
| 671 | |
| 672 | for (i = 0; i < AR_BUFFERS; i++) |
| 673 | if (ctx->pages[i]) { |
| 674 | dma_unmap_page(ctx->ohci->card.device, |
| 675 | ar_buffer_bus(ctx, i), |
| 676 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 677 | __free_page(ctx->pages[i]); |
| 678 | } |
| 679 | } |
| 680 | |
| 681 | static void ar_context_abort(struct ar_context *ctx, const char *error_msg) |
| 682 | { |
| 683 | if (reg_read(ctx->ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { |
| 684 | reg_write(ctx->ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); |
| 685 | flush_writes(ctx->ohci); |
| 686 | |
| 687 | fw_error("AR error: %s; DMA stopped\n", error_msg); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 688 | } |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 689 | /* FIXME: restart? */ |
| 690 | } |
| 691 | |
| 692 | static inline unsigned int ar_next_buffer_index(unsigned int index) |
| 693 | { |
| 694 | return (index + 1) % AR_BUFFERS; |
| 695 | } |
| 696 | |
| 697 | static inline unsigned int ar_prev_buffer_index(unsigned int index) |
| 698 | { |
| 699 | return (index - 1 + AR_BUFFERS) % AR_BUFFERS; |
| 700 | } |
| 701 | |
| 702 | static inline unsigned int ar_first_buffer_index(struct ar_context *ctx) |
| 703 | { |
| 704 | return ar_next_buffer_index(ctx->last_buffer_index); |
| 705 | } |
| 706 | |
| 707 | /* |
| 708 | * We search for the buffer that contains the last AR packet DMA data written |
| 709 | * by the controller. |
| 710 | */ |
| 711 | static unsigned int ar_search_last_active_buffer(struct ar_context *ctx, |
| 712 | unsigned int *buffer_offset) |
| 713 | { |
| 714 | unsigned int i, next_i, last = ctx->last_buffer_index; |
| 715 | __le16 res_count, next_res_count; |
| 716 | |
| 717 | i = ar_first_buffer_index(ctx); |
| 718 | res_count = ACCESS_ONCE(ctx->descriptors[i].res_count); |
| 719 | |
| 720 | /* A buffer that is not yet completely filled must be the last one. */ |
| 721 | while (i != last && res_count == 0) { |
| 722 | |
| 723 | /* Peek at the next descriptor. */ |
| 724 | next_i = ar_next_buffer_index(i); |
| 725 | rmb(); /* read descriptors in order */ |
| 726 | next_res_count = ACCESS_ONCE( |
| 727 | ctx->descriptors[next_i].res_count); |
| 728 | /* |
| 729 | * If the next descriptor is still empty, we must stop at this |
| 730 | * descriptor. |
| 731 | */ |
| 732 | if (next_res_count == cpu_to_le16(PAGE_SIZE)) { |
| 733 | /* |
| 734 | * The exception is when the DMA data for one packet is |
| 735 | * split over three buffers; in this case, the middle |
| 736 | * buffer's descriptor might be never updated by the |
| 737 | * controller and look still empty, and we have to peek |
| 738 | * at the third one. |
| 739 | */ |
| 740 | if (MAX_AR_PACKET_SIZE > PAGE_SIZE && i != last) { |
| 741 | next_i = ar_next_buffer_index(next_i); |
| 742 | rmb(); |
| 743 | next_res_count = ACCESS_ONCE( |
| 744 | ctx->descriptors[next_i].res_count); |
| 745 | if (next_res_count != cpu_to_le16(PAGE_SIZE)) |
| 746 | goto next_buffer_is_active; |
| 747 | } |
| 748 | |
| 749 | break; |
| 750 | } |
| 751 | |
| 752 | next_buffer_is_active: |
| 753 | i = next_i; |
| 754 | res_count = next_res_count; |
| 755 | } |
| 756 | |
| 757 | rmb(); /* read res_count before the DMA data */ |
| 758 | |
| 759 | *buffer_offset = PAGE_SIZE - le16_to_cpu(res_count); |
| 760 | if (*buffer_offset > PAGE_SIZE) { |
| 761 | *buffer_offset = 0; |
| 762 | ar_context_abort(ctx, "corrupted descriptor"); |
| 763 | } |
| 764 | |
| 765 | return i; |
| 766 | } |
| 767 | |
| 768 | static void ar_sync_buffers_for_cpu(struct ar_context *ctx, |
| 769 | unsigned int end_buffer_index, |
| 770 | unsigned int end_buffer_offset) |
| 771 | { |
| 772 | unsigned int i; |
| 773 | |
| 774 | i = ar_first_buffer_index(ctx); |
| 775 | while (i != end_buffer_index) { |
| 776 | dma_sync_single_for_cpu(ctx->ohci->card.device, |
| 777 | ar_buffer_bus(ctx, i), |
| 778 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 779 | i = ar_next_buffer_index(i); |
| 780 | } |
| 781 | if (end_buffer_offset > 0) |
| 782 | dma_sync_single_for_cpu(ctx->ohci->card.device, |
| 783 | ar_buffer_bus(ctx, i), |
| 784 | end_buffer_offset, DMA_FROM_DEVICE); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 785 | } |
| 786 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 787 | #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) |
| 788 | #define cond_le32_to_cpu(v) \ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 789 | (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v)) |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 790 | #else |
| 791 | #define cond_le32_to_cpu(v) le32_to_cpu(v) |
| 792 | #endif |
| 793 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 794 | static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 795 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 796 | struct fw_ohci *ohci = ctx->ohci; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 797 | struct fw_packet p; |
| 798 | u32 status, length, tcode; |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 799 | int evt; |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 800 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 801 | p.header[0] = cond_le32_to_cpu(buffer[0]); |
| 802 | p.header[1] = cond_le32_to_cpu(buffer[1]); |
| 803 | p.header[2] = cond_le32_to_cpu(buffer[2]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 804 | |
| 805 | tcode = (p.header[0] >> 4) & 0x0f; |
| 806 | switch (tcode) { |
| 807 | case TCODE_WRITE_QUADLET_REQUEST: |
| 808 | case TCODE_READ_QUADLET_RESPONSE: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 809 | p.header[3] = (__force __u32) buffer[3]; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 810 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 811 | p.payload_length = 0; |
| 812 | break; |
| 813 | |
| 814 | case TCODE_READ_BLOCK_REQUEST : |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 815 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 816 | p.header_length = 16; |
| 817 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 818 | break; |
| 819 | |
| 820 | case TCODE_WRITE_BLOCK_REQUEST: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 821 | case TCODE_READ_BLOCK_RESPONSE: |
| 822 | case TCODE_LOCK_REQUEST: |
| 823 | case TCODE_LOCK_RESPONSE: |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 824 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 825 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 826 | p.payload_length = p.header[3] >> 16; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 827 | if (p.payload_length > MAX_ASYNC_PAYLOAD) { |
| 828 | ar_context_abort(ctx, "invalid packet length"); |
| 829 | return NULL; |
| 830 | } |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 831 | break; |
| 832 | |
| 833 | case TCODE_WRITE_RESPONSE: |
| 834 | case TCODE_READ_QUADLET_REQUEST: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 835 | case OHCI_TCODE_PHY_PACKET: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 836 | p.header_length = 12; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 837 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 838 | break; |
Stefan Richter | ccff962 | 2008-05-31 19:36:06 +0200 | [diff] [blame] | 839 | |
| 840 | default: |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 841 | ar_context_abort(ctx, "invalid tcode"); |
| 842 | return NULL; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 843 | } |
| 844 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 845 | p.payload = (void *) buffer + p.header_length; |
| 846 | |
| 847 | /* FIXME: What to do about evt_* errors? */ |
| 848 | length = (p.header_length + p.payload_length + 3) / 4; |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 849 | status = cond_le32_to_cpu(buffer[length]); |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 850 | evt = (status >> 16) & 0x1f; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 851 | |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 852 | p.ack = evt - 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 853 | p.speed = (status >> 21) & 0x7; |
| 854 | p.timestamp = status & 0xffff; |
| 855 | p.generation = ohci->request_generation; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 856 | |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 857 | log_ar_at_event('R', p.speed, p.header, evt); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 858 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 859 | /* |
Stefan Richter | a4dc090 | 2010-08-28 14:21:26 +0200 | [diff] [blame] | 860 | * Several controllers, notably from NEC and VIA, forget to |
| 861 | * write ack_complete status at PHY packet reception. |
| 862 | */ |
| 863 | if (evt == OHCI1394_evt_no_status && |
| 864 | (p.header[0] & 0xff) == (OHCI1394_phy_tcode << 4)) |
| 865 | p.ack = ACK_COMPLETE; |
| 866 | |
| 867 | /* |
| 868 | * The OHCI bus reset handler synthesizes a PHY packet with |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 869 | * the new generation number when a bus reset happens (see |
| 870 | * section 8.4.2.3). This helps us determine when a request |
| 871 | * was received and make sure we send the response in the same |
| 872 | * generation. We only need this for requests; for responses |
| 873 | * we use the unique tlabel for finding the matching |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 874 | * request. |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 875 | * |
| 876 | * Alas some chips sometimes emit bus reset packets with a |
| 877 | * wrong generation. We set the correct generation for these |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 878 | * at a slightly incorrect time (in bus_reset_work). |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 879 | */ |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 880 | if (evt == OHCI1394_evt_bus_reset) { |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 881 | if (!(ohci->quirks & QUIRK_RESET_PACKET)) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 882 | ohci->request_generation = (p.header[2] >> 16) & 0xff; |
| 883 | } else if (ctx == &ohci->ar_request_ctx) { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 884 | fw_core_handle_request(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 885 | } else { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 886 | fw_core_handle_response(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 887 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 888 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 889 | return buffer + length + 1; |
| 890 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 891 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 892 | static void *handle_ar_packets(struct ar_context *ctx, void *p, void *end) |
| 893 | { |
| 894 | void *next; |
| 895 | |
| 896 | while (p < end) { |
| 897 | next = handle_ar_packet(ctx, p); |
| 898 | if (!next) |
| 899 | return p; |
| 900 | p = next; |
| 901 | } |
| 902 | |
| 903 | return p; |
| 904 | } |
| 905 | |
| 906 | static void ar_recycle_buffers(struct ar_context *ctx, unsigned int end_buffer) |
| 907 | { |
| 908 | unsigned int i; |
| 909 | |
| 910 | i = ar_first_buffer_index(ctx); |
| 911 | while (i != end_buffer) { |
| 912 | dma_sync_single_for_device(ctx->ohci->card.device, |
| 913 | ar_buffer_bus(ctx, i), |
| 914 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 915 | ar_context_link_page(ctx, i); |
| 916 | i = ar_next_buffer_index(i); |
| 917 | } |
| 918 | } |
| 919 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 920 | static void ar_context_tasklet(unsigned long data) |
| 921 | { |
| 922 | struct ar_context *ctx = (struct ar_context *)data; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 923 | unsigned int end_buffer_index, end_buffer_offset; |
| 924 | void *p, *end; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 925 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 926 | p = ctx->pointer; |
| 927 | if (!p) |
| 928 | return; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 929 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 930 | end_buffer_index = ar_search_last_active_buffer(ctx, |
| 931 | &end_buffer_offset); |
| 932 | ar_sync_buffers_for_cpu(ctx, end_buffer_index, end_buffer_offset); |
| 933 | end = ctx->buffer + end_buffer_index * PAGE_SIZE + end_buffer_offset; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 934 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 935 | if (end_buffer_index < ar_first_buffer_index(ctx)) { |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 936 | /* |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 937 | * The filled part of the overall buffer wraps around; handle |
| 938 | * all packets up to the buffer end here. If the last packet |
| 939 | * wraps around, its tail will be visible after the buffer end |
| 940 | * because the buffer start pages are mapped there again. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 941 | */ |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 942 | void *buffer_end = ctx->buffer + AR_BUFFERS * PAGE_SIZE; |
| 943 | p = handle_ar_packets(ctx, p, buffer_end); |
| 944 | if (p < buffer_end) |
| 945 | goto error; |
| 946 | /* adjust p to point back into the actual buffer */ |
| 947 | p -= AR_BUFFERS * PAGE_SIZE; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 948 | } |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 949 | |
| 950 | p = handle_ar_packets(ctx, p, end); |
| 951 | if (p != end) { |
| 952 | if (p > end) |
| 953 | ar_context_abort(ctx, "inconsistent descriptor"); |
| 954 | goto error; |
| 955 | } |
| 956 | |
| 957 | ctx->pointer = p; |
| 958 | ar_recycle_buffers(ctx, end_buffer_index); |
| 959 | |
| 960 | return; |
| 961 | |
| 962 | error: |
| 963 | ctx->pointer = NULL; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 964 | } |
| 965 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 966 | static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, |
| 967 | unsigned int descriptors_offset, u32 regs) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 968 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 969 | unsigned int i; |
| 970 | dma_addr_t dma_addr; |
| 971 | struct page *pages[AR_BUFFERS + AR_WRAPAROUND_PAGES]; |
| 972 | struct descriptor *d; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 973 | |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 974 | ctx->regs = regs; |
| 975 | ctx->ohci = ohci; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 976 | tasklet_init(&ctx->tasklet, ar_context_tasklet, (unsigned long)ctx); |
| 977 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 978 | for (i = 0; i < AR_BUFFERS; i++) { |
| 979 | ctx->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32); |
| 980 | if (!ctx->pages[i]) |
| 981 | goto out_of_memory; |
| 982 | dma_addr = dma_map_page(ohci->card.device, ctx->pages[i], |
| 983 | 0, PAGE_SIZE, DMA_FROM_DEVICE); |
| 984 | if (dma_mapping_error(ohci->card.device, dma_addr)) { |
| 985 | __free_page(ctx->pages[i]); |
| 986 | ctx->pages[i] = NULL; |
| 987 | goto out_of_memory; |
| 988 | } |
| 989 | set_page_private(ctx->pages[i], dma_addr); |
| 990 | } |
| 991 | |
| 992 | for (i = 0; i < AR_BUFFERS; i++) |
| 993 | pages[i] = ctx->pages[i]; |
| 994 | for (i = 0; i < AR_WRAPAROUND_PAGES; i++) |
| 995 | pages[AR_BUFFERS + i] = ctx->pages[i]; |
| 996 | ctx->buffer = vm_map_ram(pages, AR_BUFFERS + AR_WRAPAROUND_PAGES, |
Clemens Ladisch | 1427130 | 2011-01-13 10:12:17 +0100 | [diff] [blame] | 997 | -1, PAGE_KERNEL); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 998 | if (!ctx->buffer) |
| 999 | goto out_of_memory; |
| 1000 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 1001 | ctx->descriptors = ohci->misc_buffer + descriptors_offset; |
| 1002 | ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1003 | |
| 1004 | for (i = 0; i < AR_BUFFERS; i++) { |
| 1005 | d = &ctx->descriptors[i]; |
| 1006 | d->req_count = cpu_to_le16(PAGE_SIZE); |
| 1007 | d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | |
| 1008 | DESCRIPTOR_STATUS | |
| 1009 | DESCRIPTOR_BRANCH_ALWAYS); |
| 1010 | d->data_address = cpu_to_le32(ar_buffer_bus(ctx, i)); |
| 1011 | d->branch_address = cpu_to_le32(ctx->descriptors_bus + |
| 1012 | ar_next_buffer_index(i) * sizeof(struct descriptor)); |
| 1013 | } |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 1014 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1015 | return 0; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1016 | |
| 1017 | out_of_memory: |
| 1018 | ar_context_release(ctx); |
| 1019 | |
| 1020 | return -ENOMEM; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1021 | } |
| 1022 | |
| 1023 | static void ar_context_run(struct ar_context *ctx) |
| 1024 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1025 | unsigned int i; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1026 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1027 | for (i = 0; i < AR_BUFFERS; i++) |
| 1028 | ar_context_link_page(ctx, i); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1029 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1030 | ctx->pointer = ctx->buffer; |
| 1031 | |
| 1032 | reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1033 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1034 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1035 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1036 | static struct descriptor *find_branch_descriptor(struct descriptor *d, int z) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1037 | { |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1038 | __le16 branch; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1039 | |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1040 | branch = d->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1041 | |
| 1042 | /* figure out which descriptor the branch address goes in */ |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1043 | if (z == 2 && branch == cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1044 | return d; |
| 1045 | else |
| 1046 | return d + z - 1; |
| 1047 | } |
| 1048 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1049 | static void context_tasklet(unsigned long data) |
| 1050 | { |
| 1051 | struct context *ctx = (struct context *) data; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1052 | struct descriptor *d, *last; |
| 1053 | u32 address; |
| 1054 | int z; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1055 | struct descriptor_buffer *desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1056 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1057 | desc = list_entry(ctx->buffer_list.next, |
| 1058 | struct descriptor_buffer, list); |
| 1059 | last = ctx->last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1060 | while (last->branch_address != 0) { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1061 | struct descriptor_buffer *old_desc = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1062 | address = le32_to_cpu(last->branch_address); |
| 1063 | z = address & 0xf; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1064 | address &= ~0xf; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 1065 | ctx->current_bus = address; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1066 | |
| 1067 | /* If the branch address points to a buffer outside of the |
| 1068 | * current buffer, advance to the next buffer. */ |
| 1069 | if (address < desc->buffer_bus || |
| 1070 | address >= desc->buffer_bus + desc->used) |
| 1071 | desc = list_entry(desc->list.next, |
| 1072 | struct descriptor_buffer, list); |
| 1073 | d = desc->buffer + (address - desc->buffer_bus) / sizeof(*d); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1074 | last = find_branch_descriptor(d, z); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1075 | |
| 1076 | if (!ctx->callback(ctx, d, last)) |
| 1077 | break; |
| 1078 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1079 | if (old_desc != desc) { |
| 1080 | /* If we've advanced to the next buffer, move the |
| 1081 | * previous buffer to the free list. */ |
| 1082 | unsigned long flags; |
| 1083 | old_desc->used = 0; |
| 1084 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 1085 | list_move_tail(&old_desc->list, &ctx->buffer_list); |
| 1086 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1087 | } |
| 1088 | ctx->last = last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1089 | } |
| 1090 | } |
| 1091 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1092 | /* |
| 1093 | * Allocate a new buffer and add it to the list of free buffers for this |
| 1094 | * context. Must be called with ohci->lock held. |
| 1095 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1096 | static int context_add_buffer(struct context *ctx) |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1097 | { |
| 1098 | struct descriptor_buffer *desc; |
Stefan Richter | f5101d5 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 1099 | dma_addr_t uninitialized_var(bus_addr); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1100 | int offset; |
| 1101 | |
| 1102 | /* |
| 1103 | * 16MB of descriptors should be far more than enough for any DMA |
| 1104 | * program. This will catch run-away userspace or DoS attacks. |
| 1105 | */ |
| 1106 | if (ctx->total_allocation >= 16*1024*1024) |
| 1107 | return -ENOMEM; |
| 1108 | |
| 1109 | desc = dma_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, |
| 1110 | &bus_addr, GFP_ATOMIC); |
| 1111 | if (!desc) |
| 1112 | return -ENOMEM; |
| 1113 | |
| 1114 | offset = (void *)&desc->buffer - (void *)desc; |
| 1115 | desc->buffer_size = PAGE_SIZE - offset; |
| 1116 | desc->buffer_bus = bus_addr + offset; |
| 1117 | desc->used = 0; |
| 1118 | |
| 1119 | list_add_tail(&desc->list, &ctx->buffer_list); |
| 1120 | ctx->total_allocation += PAGE_SIZE; |
| 1121 | |
| 1122 | return 0; |
| 1123 | } |
| 1124 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1125 | static int context_init(struct context *ctx, struct fw_ohci *ohci, |
| 1126 | u32 regs, descriptor_callback_t callback) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1127 | { |
| 1128 | ctx->ohci = ohci; |
| 1129 | ctx->regs = regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1130 | ctx->total_allocation = 0; |
| 1131 | |
| 1132 | INIT_LIST_HEAD(&ctx->buffer_list); |
| 1133 | if (context_add_buffer(ctx) < 0) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1134 | return -ENOMEM; |
| 1135 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1136 | ctx->buffer_tail = list_entry(ctx->buffer_list.next, |
| 1137 | struct descriptor_buffer, list); |
| 1138 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1139 | tasklet_init(&ctx->tasklet, context_tasklet, (unsigned long)ctx); |
| 1140 | ctx->callback = callback; |
| 1141 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1142 | /* |
| 1143 | * We put a dummy descriptor in the buffer that has a NULL |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1144 | * branch address and looks like it's been sent. That way we |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1145 | * have a descriptor to append DMA programs to. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1146 | */ |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1147 | memset(ctx->buffer_tail->buffer, 0, sizeof(*ctx->buffer_tail->buffer)); |
| 1148 | ctx->buffer_tail->buffer->control = cpu_to_le16(DESCRIPTOR_OUTPUT_LAST); |
| 1149 | ctx->buffer_tail->buffer->transfer_status = cpu_to_le16(0x8011); |
| 1150 | ctx->buffer_tail->used += sizeof(*ctx->buffer_tail->buffer); |
| 1151 | ctx->last = ctx->buffer_tail->buffer; |
| 1152 | ctx->prev = ctx->buffer_tail->buffer; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1153 | |
| 1154 | return 0; |
| 1155 | } |
| 1156 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1157 | static void context_release(struct context *ctx) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1158 | { |
| 1159 | struct fw_card *card = &ctx->ohci->card; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1160 | struct descriptor_buffer *desc, *tmp; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1161 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1162 | list_for_each_entry_safe(desc, tmp, &ctx->buffer_list, list) |
| 1163 | dma_free_coherent(card->device, PAGE_SIZE, desc, |
| 1164 | desc->buffer_bus - |
| 1165 | ((void *)&desc->buffer - (void *)desc)); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1166 | } |
| 1167 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1168 | /* Must be called with ohci->lock held */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1169 | static struct descriptor *context_get_descriptors(struct context *ctx, |
| 1170 | int z, dma_addr_t *d_bus) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1171 | { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1172 | struct descriptor *d = NULL; |
| 1173 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1174 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1175 | if (z * sizeof(*d) > desc->buffer_size) |
| 1176 | return NULL; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1177 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1178 | if (z * sizeof(*d) > desc->buffer_size - desc->used) { |
| 1179 | /* No room for the descriptor in this buffer, so advance to the |
| 1180 | * next one. */ |
| 1181 | |
| 1182 | if (desc->list.next == &ctx->buffer_list) { |
| 1183 | /* If there is no free buffer next in the list, |
| 1184 | * allocate one. */ |
| 1185 | if (context_add_buffer(ctx) < 0) |
| 1186 | return NULL; |
| 1187 | } |
| 1188 | desc = list_entry(desc->list.next, |
| 1189 | struct descriptor_buffer, list); |
| 1190 | ctx->buffer_tail = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1191 | } |
| 1192 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1193 | d = desc->buffer + desc->used / sizeof(*d); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 1194 | memset(d, 0, z * sizeof(*d)); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1195 | *d_bus = desc->buffer_bus + desc->used; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1196 | |
| 1197 | return d; |
| 1198 | } |
| 1199 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 1200 | static void context_run(struct context *ctx, u32 extra) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1201 | { |
| 1202 | struct fw_ohci *ohci = ctx->ohci; |
| 1203 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1204 | reg_write(ohci, COMMAND_PTR(ctx->regs), |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1205 | le32_to_cpu(ctx->last->branch_address)); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1206 | reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); |
| 1207 | reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 1208 | ctx->running = true; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1209 | flush_writes(ohci); |
| 1210 | } |
| 1211 | |
| 1212 | static void context_append(struct context *ctx, |
| 1213 | struct descriptor *d, int z, int extra) |
| 1214 | { |
| 1215 | dma_addr_t d_bus; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1216 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1217 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1218 | d_bus = desc->buffer_bus + (d - desc->buffer) * sizeof(*d); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1219 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1220 | desc->used += (z + extra) * sizeof(*d); |
Stefan Richter | 071595e | 2010-07-27 13:20:33 +0200 | [diff] [blame] | 1221 | |
| 1222 | wmb(); /* finish init of new descriptors before branch_address update */ |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1223 | ctx->prev->branch_address = cpu_to_le32(d_bus | z); |
| 1224 | ctx->prev = find_branch_descriptor(d, z); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1225 | } |
| 1226 | |
| 1227 | static void context_stop(struct context *ctx) |
| 1228 | { |
| 1229 | u32 reg; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1230 | int i; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1231 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1232 | reg_write(ctx->ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 1233 | ctx->running = false; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1234 | |
Stefan Richter | 9ef28cc | 2011-06-12 14:30:57 +0200 | [diff] [blame] | 1235 | for (i = 0; i < 1000; i++) { |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1236 | reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs)); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1237 | if ((reg & CONTEXT_ACTIVE) == 0) |
Stefan Richter | b006854 | 2009-01-05 20:43:23 +0100 | [diff] [blame] | 1238 | return; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1239 | |
Stefan Richter | 9ef28cc | 2011-06-12 14:30:57 +0200 | [diff] [blame] | 1240 | if (i) |
| 1241 | udelay(10); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1242 | } |
Stefan Richter | b006854 | 2009-01-05 20:43:23 +0100 | [diff] [blame] | 1243 | fw_error("Error: DMA context still active (0x%08x)\n", reg); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1244 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1245 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1246 | struct driver_data { |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1247 | u8 inline_data[8]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1248 | struct fw_packet *packet; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1249 | }; |
| 1250 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1251 | /* |
| 1252 | * This function apppends a packet to the DMA queue for transmission. |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1253 | * Must always be called with the ochi->lock held to ensure proper |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1254 | * generation handling and locking around packet queue manipulation. |
| 1255 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1256 | static int at_context_queue_packet(struct context *ctx, |
| 1257 | struct fw_packet *packet) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1258 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1259 | struct fw_ohci *ohci = ctx->ohci; |
Stefan Richter | 4b6d51e | 2007-10-21 11:20:07 +0200 | [diff] [blame] | 1260 | dma_addr_t d_bus, uninitialized_var(payload_bus); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1261 | struct driver_data *driver_data; |
| 1262 | struct descriptor *d, *last; |
| 1263 | __le32 *header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1264 | int z, tcode; |
| 1265 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1266 | d = context_get_descriptors(ctx, 4, &d_bus); |
| 1267 | if (d == NULL) { |
| 1268 | packet->ack = RCODE_SEND_ERROR; |
| 1269 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1270 | } |
| 1271 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1272 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1273 | d[0].res_count = cpu_to_le16(packet->timestamp); |
| 1274 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1275 | /* |
| 1276 | * The DMA format for asyncronous link packets is different |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1277 | * from the IEEE1394 layout, so shift the fields around |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1278 | * accordingly. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1279 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1280 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1281 | tcode = (packet->header[0] >> 4) & 0x0f; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1282 | header = (__le32 *) &d[1]; |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1283 | switch (tcode) { |
| 1284 | case TCODE_WRITE_QUADLET_REQUEST: |
| 1285 | case TCODE_WRITE_BLOCK_REQUEST: |
| 1286 | case TCODE_WRITE_RESPONSE: |
| 1287 | case TCODE_READ_QUADLET_REQUEST: |
| 1288 | case TCODE_READ_BLOCK_REQUEST: |
| 1289 | case TCODE_READ_QUADLET_RESPONSE: |
| 1290 | case TCODE_READ_BLOCK_RESPONSE: |
| 1291 | case TCODE_LOCK_REQUEST: |
| 1292 | case TCODE_LOCK_RESPONSE: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1293 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 1294 | (packet->speed << 16)); |
| 1295 | header[1] = cpu_to_le32((packet->header[1] & 0xffff) | |
| 1296 | (packet->header[0] & 0xffff0000)); |
| 1297 | header[2] = cpu_to_le32(packet->header[2]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1298 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1299 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1300 | header[3] = cpu_to_le32(packet->header[3]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1301 | else |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1302 | header[3] = (__force __le32) packet->header[3]; |
| 1303 | |
| 1304 | d[0].req_count = cpu_to_le16(packet->header_length); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1305 | break; |
| 1306 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1307 | case TCODE_LINK_INTERNAL: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1308 | header[0] = cpu_to_le32((OHCI1394_phy_tcode << 4) | |
| 1309 | (packet->speed << 16)); |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1310 | header[1] = cpu_to_le32(packet->header[1]); |
| 1311 | header[2] = cpu_to_le32(packet->header[2]); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1312 | d[0].req_count = cpu_to_le16(12); |
Stefan Richter | cc55021 | 2010-07-18 13:00:50 +0200 | [diff] [blame] | 1313 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1314 | if (is_ping_packet(&packet->header[1])) |
Stefan Richter | cc55021 | 2010-07-18 13:00:50 +0200 | [diff] [blame] | 1315 | d[0].control |= cpu_to_le16(DESCRIPTOR_PING); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1316 | break; |
| 1317 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1318 | case TCODE_STREAM_DATA: |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1319 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 1320 | (packet->speed << 16)); |
| 1321 | header[1] = cpu_to_le32(packet->header[0] & 0xffff0000); |
| 1322 | d[0].req_count = cpu_to_le16(8); |
| 1323 | break; |
| 1324 | |
| 1325 | default: |
| 1326 | /* BUG(); */ |
| 1327 | packet->ack = RCODE_SEND_ERROR; |
| 1328 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1329 | } |
| 1330 | |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1331 | BUILD_BUG_ON(sizeof(struct driver_data) > sizeof(struct descriptor)); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1332 | driver_data = (struct driver_data *) &d[3]; |
| 1333 | driver_data->packet = packet; |
Kristian Høgsberg | 20d1167 | 2007-03-26 19:18:19 -0400 | [diff] [blame] | 1334 | packet->driver_data = driver_data; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1335 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1336 | if (packet->payload_length > 0) { |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1337 | if (packet->payload_length > sizeof(driver_data->inline_data)) { |
| 1338 | payload_bus = dma_map_single(ohci->card.device, |
| 1339 | packet->payload, |
| 1340 | packet->payload_length, |
| 1341 | DMA_TO_DEVICE); |
| 1342 | if (dma_mapping_error(ohci->card.device, payload_bus)) { |
| 1343 | packet->ack = RCODE_SEND_ERROR; |
| 1344 | return -1; |
| 1345 | } |
| 1346 | packet->payload_bus = payload_bus; |
| 1347 | packet->payload_mapped = true; |
| 1348 | } else { |
| 1349 | memcpy(driver_data->inline_data, packet->payload, |
| 1350 | packet->payload_length); |
| 1351 | payload_bus = d_bus + 3 * sizeof(*d); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1352 | } |
| 1353 | |
| 1354 | d[2].req_count = cpu_to_le16(packet->payload_length); |
| 1355 | d[2].data_address = cpu_to_le32(payload_bus); |
| 1356 | last = &d[2]; |
| 1357 | z = 3; |
| 1358 | } else { |
| 1359 | last = &d[0]; |
| 1360 | z = 2; |
| 1361 | } |
| 1362 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1363 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 1364 | DESCRIPTOR_IRQ_ALWAYS | |
| 1365 | DESCRIPTOR_BRANCH_ALWAYS); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1366 | |
Stefan Richter | b6258fc | 2011-02-26 15:08:35 +0100 | [diff] [blame] | 1367 | /* FIXME: Document how the locking works. */ |
| 1368 | if (ohci->generation != packet->generation) { |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1369 | if (packet->payload_mapped) |
Stefan Richter | ab88ca4 | 2007-08-29 19:40:28 +0200 | [diff] [blame] | 1370 | dma_unmap_single(ohci->card.device, payload_bus, |
| 1371 | packet->payload_length, DMA_TO_DEVICE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1372 | packet->ack = RCODE_GENERATION; |
| 1373 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1374 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1375 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1376 | context_append(ctx, d, z, 4 - z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1377 | |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 1378 | if (ctx->running) |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 1379 | reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 1380 | else |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1381 | context_run(ctx, 0); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1382 | |
| 1383 | return 0; |
| 1384 | } |
| 1385 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1386 | static void at_context_flush(struct context *ctx) |
| 1387 | { |
| 1388 | tasklet_disable(&ctx->tasklet); |
| 1389 | |
| 1390 | ctx->flushing = true; |
| 1391 | context_tasklet((unsigned long)ctx); |
| 1392 | ctx->flushing = false; |
| 1393 | |
| 1394 | tasklet_enable(&ctx->tasklet); |
| 1395 | } |
| 1396 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1397 | static int handle_at_packet(struct context *context, |
| 1398 | struct descriptor *d, |
| 1399 | struct descriptor *last) |
| 1400 | { |
| 1401 | struct driver_data *driver_data; |
| 1402 | struct fw_packet *packet; |
| 1403 | struct fw_ohci *ohci = context->ohci; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1404 | int evt; |
| 1405 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1406 | if (last->transfer_status == 0 && !context->flushing) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1407 | /* This descriptor isn't done yet, stop iteration. */ |
| 1408 | return 0; |
| 1409 | |
| 1410 | driver_data = (struct driver_data *) &d[3]; |
| 1411 | packet = driver_data->packet; |
| 1412 | if (packet == NULL) |
| 1413 | /* This packet was cancelled, just continue. */ |
| 1414 | return 1; |
| 1415 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1416 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 1417 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1418 | packet->payload_length, DMA_TO_DEVICE); |
| 1419 | |
| 1420 | evt = le16_to_cpu(last->transfer_status) & 0x1f; |
| 1421 | packet->timestamp = le16_to_cpu(last->res_count); |
| 1422 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1423 | log_ar_at_event('T', packet->speed, packet->header, evt); |
| 1424 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1425 | switch (evt) { |
| 1426 | case OHCI1394_evt_timeout: |
| 1427 | /* Async response transmit timed out. */ |
| 1428 | packet->ack = RCODE_CANCELLED; |
| 1429 | break; |
| 1430 | |
| 1431 | case OHCI1394_evt_flushed: |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1432 | /* |
| 1433 | * The packet was flushed should give same error as |
| 1434 | * when we try to use a stale generation count. |
| 1435 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1436 | packet->ack = RCODE_GENERATION; |
| 1437 | break; |
| 1438 | |
| 1439 | case OHCI1394_evt_missing_ack: |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1440 | if (context->flushing) |
| 1441 | packet->ack = RCODE_GENERATION; |
| 1442 | else { |
| 1443 | /* |
| 1444 | * Using a valid (current) generation count, but the |
| 1445 | * node is not on the bus or not sending acks. |
| 1446 | */ |
| 1447 | packet->ack = RCODE_NO_ACK; |
| 1448 | } |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1449 | break; |
| 1450 | |
| 1451 | case ACK_COMPLETE + 0x10: |
| 1452 | case ACK_PENDING + 0x10: |
| 1453 | case ACK_BUSY_X + 0x10: |
| 1454 | case ACK_BUSY_A + 0x10: |
| 1455 | case ACK_BUSY_B + 0x10: |
| 1456 | case ACK_DATA_ERROR + 0x10: |
| 1457 | case ACK_TYPE_ERROR + 0x10: |
| 1458 | packet->ack = evt - 0x10; |
| 1459 | break; |
| 1460 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1461 | case OHCI1394_evt_no_status: |
| 1462 | if (context->flushing) { |
| 1463 | packet->ack = RCODE_GENERATION; |
| 1464 | break; |
| 1465 | } |
| 1466 | /* fall through */ |
| 1467 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1468 | default: |
| 1469 | packet->ack = RCODE_SEND_ERROR; |
| 1470 | break; |
| 1471 | } |
| 1472 | |
| 1473 | packet->callback(packet, &ohci->card, packet->ack); |
| 1474 | |
| 1475 | return 1; |
| 1476 | } |
| 1477 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1478 | #define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff) |
| 1479 | #define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f) |
| 1480 | #define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff) |
| 1481 | #define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff) |
| 1482 | #define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1483 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1484 | static void handle_local_rom(struct fw_ohci *ohci, |
| 1485 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1486 | { |
| 1487 | struct fw_packet response; |
| 1488 | int tcode, length, i; |
| 1489 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1490 | tcode = HEADER_GET_TCODE(packet->header[0]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1491 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1492 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1493 | else |
| 1494 | length = 4; |
| 1495 | |
| 1496 | i = csr - CSR_CONFIG_ROM; |
| 1497 | if (i + length > CONFIG_ROM_SIZE) { |
| 1498 | fw_fill_response(&response, packet->header, |
| 1499 | RCODE_ADDRESS_ERROR, NULL, 0); |
| 1500 | } else if (!TCODE_IS_READ_REQUEST(tcode)) { |
| 1501 | fw_fill_response(&response, packet->header, |
| 1502 | RCODE_TYPE_ERROR, NULL, 0); |
| 1503 | } else { |
| 1504 | fw_fill_response(&response, packet->header, RCODE_COMPLETE, |
| 1505 | (void *) ohci->config_rom + i, length); |
| 1506 | } |
| 1507 | |
| 1508 | fw_core_handle_response(&ohci->card, &response); |
| 1509 | } |
| 1510 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1511 | static void handle_local_lock(struct fw_ohci *ohci, |
| 1512 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1513 | { |
| 1514 | struct fw_packet response; |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1515 | int tcode, length, ext_tcode, sel, try; |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1516 | __be32 *payload, lock_old; |
| 1517 | u32 lock_arg, lock_data; |
| 1518 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1519 | tcode = HEADER_GET_TCODE(packet->header[0]); |
| 1520 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1521 | payload = packet->payload; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1522 | ext_tcode = HEADER_GET_EXTENDED_TCODE(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1523 | |
| 1524 | if (tcode == TCODE_LOCK_REQUEST && |
| 1525 | ext_tcode == EXTCODE_COMPARE_SWAP && length == 8) { |
| 1526 | lock_arg = be32_to_cpu(payload[0]); |
| 1527 | lock_data = be32_to_cpu(payload[1]); |
| 1528 | } else if (tcode == TCODE_READ_QUADLET_REQUEST) { |
| 1529 | lock_arg = 0; |
| 1530 | lock_data = 0; |
| 1531 | } else { |
| 1532 | fw_fill_response(&response, packet->header, |
| 1533 | RCODE_TYPE_ERROR, NULL, 0); |
| 1534 | goto out; |
| 1535 | } |
| 1536 | |
| 1537 | sel = (csr - CSR_BUS_MANAGER_ID) / 4; |
| 1538 | reg_write(ohci, OHCI1394_CSRData, lock_data); |
| 1539 | reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); |
| 1540 | reg_write(ohci, OHCI1394_CSRControl, sel); |
| 1541 | |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1542 | for (try = 0; try < 20; try++) |
| 1543 | if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { |
| 1544 | lock_old = cpu_to_be32(reg_read(ohci, |
| 1545 | OHCI1394_CSRData)); |
| 1546 | fw_fill_response(&response, packet->header, |
| 1547 | RCODE_COMPLETE, |
| 1548 | &lock_old, sizeof(lock_old)); |
| 1549 | goto out; |
| 1550 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1551 | |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1552 | fw_error("swap not done (CSR lock timeout)\n"); |
| 1553 | fw_fill_response(&response, packet->header, RCODE_BUSY, NULL, 0); |
| 1554 | |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1555 | out: |
| 1556 | fw_core_handle_response(&ohci->card, &response); |
| 1557 | } |
| 1558 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1559 | static void handle_local_request(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1560 | { |
Clemens Ladisch | 2608203 | 2010-04-12 10:35:30 +0200 | [diff] [blame] | 1561 | u64 offset, csr; |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1562 | |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1563 | if (ctx == &ctx->ohci->at_request_ctx) { |
| 1564 | packet->ack = ACK_PENDING; |
| 1565 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1566 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1567 | |
| 1568 | offset = |
| 1569 | ((unsigned long long) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1570 | HEADER_GET_OFFSET_HIGH(packet->header[1]) << 32) | |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1571 | packet->header[2]; |
| 1572 | csr = offset - CSR_REGISTER_BASE; |
| 1573 | |
| 1574 | /* Handle config rom reads. */ |
| 1575 | if (csr >= CSR_CONFIG_ROM && csr < CSR_CONFIG_ROM_END) |
| 1576 | handle_local_rom(ctx->ohci, packet, csr); |
| 1577 | else switch (csr) { |
| 1578 | case CSR_BUS_MANAGER_ID: |
| 1579 | case CSR_BANDWIDTH_AVAILABLE: |
| 1580 | case CSR_CHANNELS_AVAILABLE_HI: |
| 1581 | case CSR_CHANNELS_AVAILABLE_LO: |
| 1582 | handle_local_lock(ctx->ohci, packet, csr); |
| 1583 | break; |
| 1584 | default: |
| 1585 | if (ctx == &ctx->ohci->at_request_ctx) |
| 1586 | fw_core_handle_request(&ctx->ohci->card, packet); |
| 1587 | else |
| 1588 | fw_core_handle_response(&ctx->ohci->card, packet); |
| 1589 | break; |
| 1590 | } |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1591 | |
| 1592 | if (ctx == &ctx->ohci->at_response_ctx) { |
| 1593 | packet->ack = ACK_COMPLETE; |
| 1594 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1595 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1596 | } |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1597 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1598 | static void at_context_transmit(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1599 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1600 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1601 | int ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1602 | |
| 1603 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 1604 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1605 | if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1606 | ctx->ohci->generation == packet->generation) { |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1607 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1608 | handle_local_request(ctx, packet); |
| 1609 | return; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1610 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1611 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1612 | ret = at_context_queue_packet(ctx, packet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1613 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1614 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1615 | if (ret < 0) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1616 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1617 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1618 | } |
| 1619 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 1620 | static void detect_dead_context(struct fw_ohci *ohci, |
| 1621 | const char *name, unsigned int regs) |
| 1622 | { |
| 1623 | u32 ctl; |
| 1624 | |
| 1625 | ctl = reg_read(ohci, CONTROL_SET(regs)); |
| 1626 | if (ctl & CONTEXT_DEAD) { |
| 1627 | #ifdef CONFIG_FIREWIRE_OHCI_DEBUG |
| 1628 | fw_error("DMA context %s has stopped, error code: %s\n", |
| 1629 | name, evts[ctl & 0x1f]); |
| 1630 | #else |
| 1631 | fw_error("DMA context %s has stopped, error code: %#x\n", |
| 1632 | name, ctl & 0x1f); |
| 1633 | #endif |
| 1634 | } |
| 1635 | } |
| 1636 | |
| 1637 | static void handle_dead_contexts(struct fw_ohci *ohci) |
| 1638 | { |
| 1639 | unsigned int i; |
| 1640 | char name[8]; |
| 1641 | |
| 1642 | detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); |
| 1643 | detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); |
| 1644 | detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); |
| 1645 | detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); |
| 1646 | for (i = 0; i < 32; ++i) { |
| 1647 | if (!(ohci->it_context_support & (1 << i))) |
| 1648 | continue; |
| 1649 | sprintf(name, "IT%u", i); |
| 1650 | detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); |
| 1651 | } |
| 1652 | for (i = 0; i < 32; ++i) { |
| 1653 | if (!(ohci->ir_context_support & (1 << i))) |
| 1654 | continue; |
| 1655 | sprintf(name, "IR%u", i); |
| 1656 | detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); |
| 1657 | } |
| 1658 | /* TODO: maybe try to flush and restart the dead contexts */ |
| 1659 | } |
| 1660 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 1661 | static u32 cycle_timer_ticks(u32 cycle_timer) |
| 1662 | { |
| 1663 | u32 ticks; |
| 1664 | |
| 1665 | ticks = cycle_timer & 0xfff; |
| 1666 | ticks += 3072 * ((cycle_timer >> 12) & 0x1fff); |
| 1667 | ticks += (3072 * 8000) * (cycle_timer >> 25); |
| 1668 | |
| 1669 | return ticks; |
| 1670 | } |
| 1671 | |
| 1672 | /* |
| 1673 | * Some controllers exhibit one or more of the following bugs when updating the |
| 1674 | * iso cycle timer register: |
| 1675 | * - When the lowest six bits are wrapping around to zero, a read that happens |
| 1676 | * at the same time will return garbage in the lowest ten bits. |
| 1677 | * - When the cycleOffset field wraps around to zero, the cycleCount field is |
| 1678 | * not incremented for about 60 ns. |
| 1679 | * - Occasionally, the entire register reads zero. |
| 1680 | * |
| 1681 | * To catch these, we read the register three times and ensure that the |
| 1682 | * difference between each two consecutive reads is approximately the same, i.e. |
| 1683 | * less than twice the other. Furthermore, any negative difference indicates an |
| 1684 | * error. (A PCI read should take at least 20 ticks of the 24.576 MHz timer to |
| 1685 | * execute, so we have enough precision to compute the ratio of the differences.) |
| 1686 | */ |
| 1687 | static u32 get_cycle_time(struct fw_ohci *ohci) |
| 1688 | { |
| 1689 | u32 c0, c1, c2; |
| 1690 | u32 t0, t1, t2; |
| 1691 | s32 diff01, diff12; |
| 1692 | int i; |
| 1693 | |
| 1694 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1695 | |
| 1696 | if (ohci->quirks & QUIRK_CYCLE_TIMER) { |
| 1697 | i = 0; |
| 1698 | c1 = c2; |
| 1699 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1700 | do { |
| 1701 | c0 = c1; |
| 1702 | c1 = c2; |
| 1703 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1704 | t0 = cycle_timer_ticks(c0); |
| 1705 | t1 = cycle_timer_ticks(c1); |
| 1706 | t2 = cycle_timer_ticks(c2); |
| 1707 | diff01 = t1 - t0; |
| 1708 | diff12 = t2 - t1; |
| 1709 | } while ((diff01 <= 0 || diff12 <= 0 || |
| 1710 | diff01 / diff12 >= 2 || diff12 / diff01 >= 2) |
| 1711 | && i++ < 20); |
| 1712 | } |
| 1713 | |
| 1714 | return c2; |
| 1715 | } |
| 1716 | |
| 1717 | /* |
| 1718 | * This function has to be called at least every 64 seconds. The bus_time |
| 1719 | * field stores not only the upper 25 bits of the BUS_TIME register but also |
| 1720 | * the most significant bit of the cycle timer in bit 6 so that we can detect |
| 1721 | * changes in this bit. |
| 1722 | */ |
| 1723 | static u32 update_bus_time(struct fw_ohci *ohci) |
| 1724 | { |
| 1725 | u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; |
| 1726 | |
| 1727 | if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) |
| 1728 | ohci->bus_time += 0x40; |
| 1729 | |
| 1730 | return ohci->bus_time | cycle_time_seconds; |
| 1731 | } |
| 1732 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1733 | static int get_status_for_port(struct fw_ohci *ohci, int port_index) |
| 1734 | { |
| 1735 | int reg; |
| 1736 | |
| 1737 | mutex_lock(&ohci->phy_reg_mutex); |
| 1738 | reg = write_phy_reg(ohci, 7, port_index); |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1739 | if (reg >= 0) |
| 1740 | reg = read_phy_reg(ohci, 8); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1741 | mutex_unlock(&ohci->phy_reg_mutex); |
| 1742 | if (reg < 0) |
| 1743 | return reg; |
| 1744 | |
| 1745 | switch (reg & 0x0f) { |
| 1746 | case 0x06: |
| 1747 | return 2; /* is child node (connected to parent node) */ |
| 1748 | case 0x0e: |
| 1749 | return 3; /* is parent node (connected to child node) */ |
| 1750 | } |
| 1751 | return 1; /* not connected */ |
| 1752 | } |
| 1753 | |
| 1754 | static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, |
| 1755 | int self_id_count) |
| 1756 | { |
| 1757 | int i; |
| 1758 | u32 entry; |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1759 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1760 | for (i = 0; i < self_id_count; i++) { |
| 1761 | entry = ohci->self_id_buffer[i]; |
| 1762 | if ((self_id & 0xff000000) == (entry & 0xff000000)) |
| 1763 | return -1; |
| 1764 | if ((self_id & 0xff000000) < (entry & 0xff000000)) |
| 1765 | return i; |
| 1766 | } |
| 1767 | return i; |
| 1768 | } |
| 1769 | |
| 1770 | /* |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1771 | * TI TSB82AA2B and TSB12LV26 do not receive the selfID of a locally |
| 1772 | * attached TSB41BA3D phy; see http://www.ti.com/litv/pdf/sllz059. |
| 1773 | * Construct the selfID from phy register contents. |
| 1774 | * FIXME: How to determine the selfID.i flag? |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1775 | */ |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1776 | static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) |
| 1777 | { |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1778 | int reg, i, pos, status; |
| 1779 | /* link active 1, speed 3, bridge 0, contender 1, more packets 0 */ |
| 1780 | u32 self_id = 0x8040c800; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1781 | |
| 1782 | reg = reg_read(ohci, OHCI1394_NodeID); |
| 1783 | if (!(reg & OHCI1394_NodeID_idValid)) { |
| 1784 | fw_notify("node ID not valid, new bus reset in progress\n"); |
| 1785 | return -EBUSY; |
| 1786 | } |
| 1787 | self_id |= ((reg & 0x3f) << 24); /* phy ID */ |
| 1788 | |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1789 | reg = ohci_read_phy_reg(&ohci->card, 4); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1790 | if (reg < 0) |
| 1791 | return reg; |
| 1792 | self_id |= ((reg & 0x07) << 8); /* power class */ |
| 1793 | |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1794 | reg = ohci_read_phy_reg(&ohci->card, 1); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1795 | if (reg < 0) |
| 1796 | return reg; |
| 1797 | self_id |= ((reg & 0x3f) << 16); /* gap count */ |
| 1798 | |
| 1799 | for (i = 0; i < 3; i++) { |
| 1800 | status = get_status_for_port(ohci, i); |
| 1801 | if (status < 0) |
| 1802 | return status; |
| 1803 | self_id |= ((status & 0x3) << (6 - (i * 2))); |
| 1804 | } |
| 1805 | |
| 1806 | pos = get_self_id_pos(ohci, self_id, self_id_count); |
| 1807 | if (pos >= 0) { |
| 1808 | memmove(&(ohci->self_id_buffer[pos+1]), |
| 1809 | &(ohci->self_id_buffer[pos]), |
| 1810 | (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); |
| 1811 | ohci->self_id_buffer[pos] = self_id; |
| 1812 | self_id_count++; |
| 1813 | } |
| 1814 | return self_id_count; |
| 1815 | } |
| 1816 | |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 1817 | static void bus_reset_work(struct work_struct *work) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1818 | { |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 1819 | struct fw_ohci *ohci = |
| 1820 | container_of(work, struct fw_ohci, bus_reset_work); |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1821 | int self_id_count, i, j, reg; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1822 | int generation, new_generation; |
| 1823 | unsigned long flags; |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1824 | void *free_rom = NULL; |
| 1825 | dma_addr_t free_rom_bus = 0; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 1826 | bool is_new_root; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1827 | |
| 1828 | reg = reg_read(ohci, OHCI1394_NodeID); |
| 1829 | if (!(reg & OHCI1394_NodeID_idValid)) { |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1830 | fw_notify("node ID not valid, new bus reset in progress\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1831 | return; |
| 1832 | } |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1833 | if ((reg & OHCI1394_NodeID_nodeNumber) == 63) { |
| 1834 | fw_notify("malconfigured bus\n"); |
| 1835 | return; |
| 1836 | } |
| 1837 | ohci->node_id = reg & (OHCI1394_NodeID_busNumber | |
| 1838 | OHCI1394_NodeID_nodeNumber); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1839 | |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 1840 | is_new_root = (reg & OHCI1394_NodeID_root) != 0; |
| 1841 | if (!(ohci->is_root && is_new_root)) |
| 1842 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 1843 | OHCI1394_LinkControl_cycleMaster); |
| 1844 | ohci->is_root = is_new_root; |
| 1845 | |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1846 | reg = reg_read(ohci, OHCI1394_SelfIDCount); |
| 1847 | if (reg & OHCI1394_SelfIDCount_selfIDError) { |
| 1848 | fw_notify("inconsistent self IDs\n"); |
| 1849 | return; |
| 1850 | } |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1851 | /* |
| 1852 | * The count in the SelfIDCount register is the number of |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1853 | * bytes in the self ID receive buffer. Since we also receive |
| 1854 | * the inverted quadlets and a header quadlet, we shift one |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1855 | * bit extra to get the actual number of self IDs. |
| 1856 | */ |
Stefan Richter | 928ec5f | 2009-09-06 18:49:17 +0200 | [diff] [blame] | 1857 | self_id_count = (reg >> 3) & 0xff; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1858 | |
| 1859 | if (self_id_count > 252) { |
Stefan Richter | 016bf3d | 2008-03-19 22:05:02 +0100 | [diff] [blame] | 1860 | fw_notify("inconsistent self IDs\n"); |
| 1861 | return; |
| 1862 | } |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1863 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 1864 | generation = (cond_le32_to_cpu(ohci->self_id_cpu[0]) >> 16) & 0xff; |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1865 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1866 | |
| 1867 | for (i = 1, j = 0; j < self_id_count; i += 2, j++) { |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1868 | if (ohci->self_id_cpu[i] != ~ohci->self_id_cpu[i + 1]) { |
Clemens Ladisch | 32eaeae | 2011-10-15 18:14:39 +0200 | [diff] [blame] | 1869 | /* |
| 1870 | * If the invalid data looks like a cycle start packet, |
| 1871 | * it's likely to be the result of the cycle master |
| 1872 | * having a wrong gap count. In this case, the self IDs |
| 1873 | * so far are valid and should be processed so that the |
| 1874 | * bus manager can then correct the gap count. |
| 1875 | */ |
| 1876 | if (cond_le32_to_cpu(ohci->self_id_cpu[i]) |
| 1877 | == 0xffff008f) { |
| 1878 | fw_notify("ignoring spurious self IDs\n"); |
| 1879 | self_id_count = j; |
| 1880 | break; |
| 1881 | } else { |
| 1882 | fw_notify("inconsistent self IDs\n"); |
| 1883 | return; |
| 1884 | } |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1885 | } |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 1886 | ohci->self_id_buffer[j] = |
| 1887 | cond_le32_to_cpu(ohci->self_id_cpu[i]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1888 | } |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1889 | |
| 1890 | if (ohci->quirks & QUIRK_TI_SLLZ059) { |
| 1891 | self_id_count = find_and_insert_self_id(ohci, self_id_count); |
| 1892 | if (self_id_count < 0) { |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1893 | fw_notify("could not construct local self ID\n"); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1894 | return; |
| 1895 | } |
| 1896 | } |
| 1897 | |
| 1898 | if (self_id_count == 0) { |
| 1899 | fw_notify("inconsistent self IDs\n"); |
| 1900 | return; |
| 1901 | } |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1902 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1903 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1904 | /* |
| 1905 | * Check the consistency of the self IDs we just read. The |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1906 | * problem we face is that a new bus reset can start while we |
| 1907 | * read out the self IDs from the DMA buffer. If this happens, |
| 1908 | * the DMA buffer will be overwritten with new self IDs and we |
| 1909 | * will read out inconsistent data. The OHCI specification |
| 1910 | * (section 11.2) recommends a technique similar to |
| 1911 | * linux/seqlock.h, where we remember the generation of the |
| 1912 | * self IDs in the buffer before reading them out and compare |
| 1913 | * it to the current generation after reading them out. If |
| 1914 | * the two generations match we know we have a consistent set |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1915 | * of self IDs. |
| 1916 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1917 | |
| 1918 | new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; |
| 1919 | if (new_generation != generation) { |
| 1920 | fw_notify("recursive bus reset detected, " |
| 1921 | "discarding self ids\n"); |
| 1922 | return; |
| 1923 | } |
| 1924 | |
| 1925 | /* FIXME: Document how the locking works. */ |
| 1926 | spin_lock_irqsave(&ohci->lock, flags); |
| 1927 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1928 | ohci->generation = -1; /* prevent AT packet queueing */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1929 | context_stop(&ohci->at_request_ctx); |
| 1930 | context_stop(&ohci->at_response_ctx); |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1931 | |
| 1932 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1933 | |
Stefan Richter | 78dec56 | 2011-01-01 15:15:40 +0100 | [diff] [blame] | 1934 | /* |
| 1935 | * Per OHCI 1.2 draft, clause 7.2.3.3, hardware may leave unsent |
| 1936 | * packets in the AT queues and software needs to drain them. |
| 1937 | * Some OHCI 1.1 controllers (JMicron) apparently require this too. |
| 1938 | */ |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1939 | at_context_flush(&ohci->at_request_ctx); |
| 1940 | at_context_flush(&ohci->at_response_ctx); |
| 1941 | |
| 1942 | spin_lock_irqsave(&ohci->lock, flags); |
| 1943 | |
| 1944 | ohci->generation = generation; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1945 | reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); |
| 1946 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 1947 | if (ohci->quirks & QUIRK_RESET_PACKET) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 1948 | ohci->request_generation = generation; |
| 1949 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1950 | /* |
| 1951 | * This next bit is unrelated to the AT context stuff but we |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1952 | * have to do it under the spinlock also. If a new config rom |
| 1953 | * was set up before this reset, the old one is now no longer |
| 1954 | * in use and we can free it. Update the config rom pointers |
| 1955 | * to point to the current config rom and clear the |
Thomas Weber | 8839316 | 2010-03-16 11:47:56 +0100 | [diff] [blame] | 1956 | * next_config_rom pointer so a new update can take place. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1957 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1958 | |
| 1959 | if (ohci->next_config_rom != NULL) { |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 1960 | if (ohci->next_config_rom != ohci->config_rom) { |
| 1961 | free_rom = ohci->config_rom; |
| 1962 | free_rom_bus = ohci->config_rom_bus; |
| 1963 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1964 | ohci->config_rom = ohci->next_config_rom; |
| 1965 | ohci->config_rom_bus = ohci->next_config_rom_bus; |
| 1966 | ohci->next_config_rom = NULL; |
| 1967 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1968 | /* |
| 1969 | * Restore config_rom image and manually update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1970 | * config_rom registers. Writing the header quadlet |
| 1971 | * will indicate that the config rom is ready, so we |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1972 | * do that last. |
| 1973 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1974 | reg_write(ohci, OHCI1394_BusOptions, |
| 1975 | be32_to_cpu(ohci->config_rom[2])); |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1976 | ohci->config_rom[0] = ohci->next_header; |
| 1977 | reg_write(ohci, OHCI1394_ConfigROMhdr, |
| 1978 | be32_to_cpu(ohci->next_header)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1979 | } |
| 1980 | |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 1981 | #ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA |
| 1982 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); |
| 1983 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); |
| 1984 | #endif |
| 1985 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1986 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1987 | |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1988 | if (free_rom) |
| 1989 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1990 | free_rom, free_rom_bus); |
| 1991 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 1992 | log_selfids(ohci->node_id, generation, |
| 1993 | self_id_count, ohci->self_id_buffer); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1994 | |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1995 | fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 1996 | self_id_count, ohci->self_id_buffer, |
| 1997 | ohci->csr_state_setclear_abdicate); |
| 1998 | ohci->csr_state_setclear_abdicate = false; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1999 | } |
| 2000 | |
| 2001 | static irqreturn_t irq_handler(int irq, void *data) |
| 2002 | { |
| 2003 | struct fw_ohci *ohci = data; |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 2004 | u32 event, iso_event; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2005 | int i; |
| 2006 | |
| 2007 | event = reg_read(ohci, OHCI1394_IntEventClear); |
| 2008 | |
Stefan Richter | a515958 | 2007-06-09 19:31:14 +0200 | [diff] [blame] | 2009 | if (!event || !~event) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2010 | return IRQ_NONE; |
| 2011 | |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2012 | /* |
| 2013 | * busReset and postedWriteErr must not be cleared yet |
| 2014 | * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1) |
| 2015 | */ |
| 2016 | reg_write(ohci, OHCI1394_IntEventClear, |
| 2017 | event & ~(OHCI1394_busReset | OHCI1394_postedWriteErr)); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 2018 | log_irqs(event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2019 | |
| 2020 | if (event & OHCI1394_selfIDComplete) |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 2021 | queue_work(fw_workqueue, &ohci->bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2022 | |
| 2023 | if (event & OHCI1394_RQPkt) |
| 2024 | tasklet_schedule(&ohci->ar_request_ctx.tasklet); |
| 2025 | |
| 2026 | if (event & OHCI1394_RSPkt) |
| 2027 | tasklet_schedule(&ohci->ar_response_ctx.tasklet); |
| 2028 | |
| 2029 | if (event & OHCI1394_reqTxComplete) |
| 2030 | tasklet_schedule(&ohci->at_request_ctx.tasklet); |
| 2031 | |
| 2032 | if (event & OHCI1394_respTxComplete) |
| 2033 | tasklet_schedule(&ohci->at_response_ctx.tasklet); |
| 2034 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2035 | if (event & OHCI1394_isochRx) { |
| 2036 | iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); |
| 2037 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2038 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2039 | while (iso_event) { |
| 2040 | i = ffs(iso_event) - 1; |
| 2041 | tasklet_schedule( |
| 2042 | &ohci->ir_context_list[i].context.tasklet); |
| 2043 | iso_event &= ~(1 << i); |
| 2044 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2045 | } |
| 2046 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2047 | if (event & OHCI1394_isochTx) { |
| 2048 | iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); |
| 2049 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2050 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2051 | while (iso_event) { |
| 2052 | i = ffs(iso_event) - 1; |
| 2053 | tasklet_schedule( |
| 2054 | &ohci->it_context_list[i].context.tasklet); |
| 2055 | iso_event &= ~(1 << i); |
| 2056 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2057 | } |
| 2058 | |
Jarod Wilson | 75f7832 | 2008-04-03 17:18:23 -0400 | [diff] [blame] | 2059 | if (unlikely(event & OHCI1394_regAccessFail)) |
| 2060 | fw_error("Register access failure - " |
| 2061 | "please notify linux1394-devel@lists.sf.net\n"); |
| 2062 | |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2063 | if (unlikely(event & OHCI1394_postedWriteErr)) { |
| 2064 | reg_read(ohci, OHCI1394_PostedWriteAddressHi); |
| 2065 | reg_read(ohci, OHCI1394_PostedWriteAddressLo); |
| 2066 | reg_write(ohci, OHCI1394_IntEventClear, |
| 2067 | OHCI1394_postedWriteErr); |
Stephan Gatzka | a74477d | 2011-09-26 21:44:30 +0200 | [diff] [blame] | 2068 | if (printk_ratelimit()) |
| 2069 | fw_error("PCI posted write error\n"); |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2070 | } |
Stefan Richter | e524f61 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 2071 | |
Stefan Richter | bb9f220 | 2007-12-22 22:14:52 +0100 | [diff] [blame] | 2072 | if (unlikely(event & OHCI1394_cycleTooLong)) { |
| 2073 | if (printk_ratelimit()) |
| 2074 | fw_notify("isochronous cycle too long\n"); |
| 2075 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2076 | OHCI1394_LinkControl_cycleMaster); |
| 2077 | } |
| 2078 | |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 2079 | if (unlikely(event & OHCI1394_cycleInconsistent)) { |
| 2080 | /* |
| 2081 | * We need to clear this event bit in order to make |
| 2082 | * cycleMatch isochronous I/O work. In theory we should |
| 2083 | * stop active cycleMatch iso contexts now and restart |
| 2084 | * them at least two cycles later. (FIXME?) |
| 2085 | */ |
| 2086 | if (printk_ratelimit()) |
| 2087 | fw_notify("isochronous cycle inconsistent\n"); |
| 2088 | } |
| 2089 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 2090 | if (unlikely(event & OHCI1394_unrecoverableError)) |
| 2091 | handle_dead_contexts(ohci); |
| 2092 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2093 | if (event & OHCI1394_cycle64Seconds) { |
| 2094 | spin_lock(&ohci->lock); |
| 2095 | update_bus_time(ohci); |
| 2096 | spin_unlock(&ohci->lock); |
Clemens Ladisch | e597e98 | 2010-11-30 08:24:19 +0100 | [diff] [blame] | 2097 | } else |
| 2098 | flush_writes(ohci); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2099 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2100 | return IRQ_HANDLED; |
| 2101 | } |
| 2102 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2103 | static int software_reset(struct fw_ohci *ohci) |
| 2104 | { |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2105 | u32 val; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2106 | int i; |
| 2107 | |
| 2108 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2109 | for (i = 0; i < 500; i++) { |
| 2110 | val = reg_read(ohci, OHCI1394_HCControlSet); |
| 2111 | if (!~val) |
| 2112 | return -ENODEV; /* Card was ejected. */ |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2113 | |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2114 | if (!(val & OHCI1394_HCControl_softReset)) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2115 | return 0; |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2116 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2117 | msleep(1); |
| 2118 | } |
| 2119 | |
| 2120 | return -EBUSY; |
| 2121 | } |
| 2122 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2123 | static void copy_config_rom(__be32 *dest, const __be32 *src, size_t length) |
| 2124 | { |
| 2125 | size_t size = length * 4; |
| 2126 | |
| 2127 | memcpy(dest, src, size); |
| 2128 | if (size < CONFIG_ROM_SIZE) |
| 2129 | memset(&dest[length], 0, CONFIG_ROM_SIZE - size); |
| 2130 | } |
| 2131 | |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2132 | static int configure_1394a_enhancements(struct fw_ohci *ohci) |
| 2133 | { |
| 2134 | bool enable_1394a; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2135 | int ret, clear, set, offset; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2136 | |
| 2137 | /* Check if the driver should configure link and PHY. */ |
| 2138 | if (!(reg_read(ohci, OHCI1394_HCControlSet) & |
| 2139 | OHCI1394_HCControl_programPhyEnable)) |
| 2140 | return 0; |
| 2141 | |
| 2142 | /* Paranoia: check whether the PHY supports 1394a, too. */ |
| 2143 | enable_1394a = false; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2144 | ret = read_phy_reg(ohci, 2); |
| 2145 | if (ret < 0) |
| 2146 | return ret; |
| 2147 | if ((ret & PHY_EXTENDED_REGISTERS) == PHY_EXTENDED_REGISTERS) { |
| 2148 | ret = read_paged_phy_reg(ohci, 1, 8); |
| 2149 | if (ret < 0) |
| 2150 | return ret; |
| 2151 | if (ret >= 1) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2152 | enable_1394a = true; |
| 2153 | } |
| 2154 | |
| 2155 | if (ohci->quirks & QUIRK_NO_1394A) |
| 2156 | enable_1394a = false; |
| 2157 | |
| 2158 | /* Configure PHY and link consistently. */ |
| 2159 | if (enable_1394a) { |
| 2160 | clear = 0; |
| 2161 | set = PHY_ENABLE_ACCEL | PHY_ENABLE_MULTI; |
| 2162 | } else { |
| 2163 | clear = PHY_ENABLE_ACCEL | PHY_ENABLE_MULTI; |
| 2164 | set = 0; |
| 2165 | } |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 2166 | ret = update_phy_reg(ohci, 5, clear, set); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2167 | if (ret < 0) |
| 2168 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2169 | |
| 2170 | if (enable_1394a) |
| 2171 | offset = OHCI1394_HCControlSet; |
| 2172 | else |
| 2173 | offset = OHCI1394_HCControlClear; |
| 2174 | reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); |
| 2175 | |
| 2176 | /* Clean up: configuration has been taken care of. */ |
| 2177 | reg_write(ohci, OHCI1394_HCControlClear, |
| 2178 | OHCI1394_HCControl_programPhyEnable); |
| 2179 | |
| 2180 | return 0; |
| 2181 | } |
| 2182 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2183 | static int probe_tsb41ba3d(struct fw_ohci *ohci) |
| 2184 | { |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2185 | /* TI vendor ID = 0x080028, TSB41BA3D product ID = 0x833005 (sic) */ |
| 2186 | static const u8 id[] = { 0x08, 0x00, 0x28, 0x83, 0x30, 0x05, }; |
| 2187 | int reg, i; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2188 | |
| 2189 | reg = read_phy_reg(ohci, 2); |
| 2190 | if (reg < 0) |
| 2191 | return reg; |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2192 | if ((reg & PHY_EXTENDED_REGISTERS) != PHY_EXTENDED_REGISTERS) |
| 2193 | return 0; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2194 | |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2195 | for (i = ARRAY_SIZE(id) - 1; i >= 0; i--) { |
| 2196 | reg = read_paged_phy_reg(ohci, 1, i + 10); |
| 2197 | if (reg < 0) |
| 2198 | return reg; |
| 2199 | if (reg != id[i]) |
| 2200 | return 0; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2201 | } |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2202 | return 1; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2203 | } |
| 2204 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2205 | static int ohci_enable(struct fw_card *card, |
| 2206 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2207 | { |
| 2208 | struct fw_ohci *ohci = fw_ohci(card); |
| 2209 | struct pci_dev *dev = to_pci_dev(card->device); |
Clemens Ladisch | e91b278 | 2010-06-10 08:40:49 +0200 | [diff] [blame] | 2210 | u32 lps, seconds, version, irqs; |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 2211 | int i, ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2212 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2213 | if (software_reset(ohci)) { |
| 2214 | fw_error("Failed to reset ohci card.\n"); |
| 2215 | return -EBUSY; |
| 2216 | } |
| 2217 | |
| 2218 | /* |
| 2219 | * Now enable LPS, which we need in order to start accessing |
| 2220 | * most of the registers. In fact, on some cards (ALI M5251), |
| 2221 | * accessing registers in the SClk domain without LPS enabled |
| 2222 | * will lock up the machine. Wait 50msec to make sure we have |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2223 | * full link enabled. However, with some cards (well, at least |
| 2224 | * a JMicron PCIe card), we have to try again sometimes. |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2225 | */ |
| 2226 | reg_write(ohci, OHCI1394_HCControlSet, |
| 2227 | OHCI1394_HCControl_LPS | |
| 2228 | OHCI1394_HCControl_postedWriteEnable); |
| 2229 | flush_writes(ohci); |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2230 | |
| 2231 | for (lps = 0, i = 0; !lps && i < 3; i++) { |
| 2232 | msleep(50); |
| 2233 | lps = reg_read(ohci, OHCI1394_HCControlSet) & |
| 2234 | OHCI1394_HCControl_LPS; |
| 2235 | } |
| 2236 | |
| 2237 | if (!lps) { |
| 2238 | fw_error("Failed to set Link Power Status\n"); |
| 2239 | return -EIO; |
| 2240 | } |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2241 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2242 | if (ohci->quirks & QUIRK_TI_SLLZ059) { |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 2243 | ret = probe_tsb41ba3d(ohci); |
| 2244 | if (ret < 0) |
| 2245 | return ret; |
| 2246 | if (ret) |
| 2247 | fw_notify("local TSB41BA3D phy\n"); |
| 2248 | else |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2249 | ohci->quirks &= ~QUIRK_TI_SLLZ059; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2250 | } |
| 2251 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2252 | reg_write(ohci, OHCI1394_HCControlClear, |
| 2253 | OHCI1394_HCControl_noByteSwapData); |
| 2254 | |
Stefan Richter | affc9c2 | 2008-06-05 20:50:53 +0200 | [diff] [blame] | 2255 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2256 | reg_write(ohci, OHCI1394_LinkControlSet, |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2257 | OHCI1394_LinkControl_cycleTimerEnable | |
| 2258 | OHCI1394_LinkControl_cycleMaster); |
| 2259 | |
| 2260 | reg_write(ohci, OHCI1394_ATRetries, |
| 2261 | OHCI1394_MAX_AT_REQ_RETRIES | |
| 2262 | (OHCI1394_MAX_AT_RESP_RETRIES << 4) | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2263 | (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) | |
| 2264 | (200 << 16)); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2265 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2266 | seconds = lower_32_bits(get_seconds()); |
| 2267 | reg_write(ohci, OHCI1394_IsochronousCycleTimer, seconds << 25); |
| 2268 | ohci->bus_time = seconds & ~0x3f; |
| 2269 | |
Clemens Ladisch | e91b278 | 2010-06-10 08:40:49 +0200 | [diff] [blame] | 2270 | version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; |
| 2271 | if (version >= OHCI_VERSION_1_1) { |
| 2272 | reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, |
| 2273 | 0xfffffffe); |
Stefan Richter | db3c9cc | 2010-06-12 20:30:21 +0200 | [diff] [blame] | 2274 | card->broadcast_channel_auto_allocated = true; |
Clemens Ladisch | e91b278 | 2010-06-10 08:40:49 +0200 | [diff] [blame] | 2275 | } |
| 2276 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2277 | /* Get implemented bits of the priority arbitration request counter. */ |
| 2278 | reg_write(ohci, OHCI1394_FairnessControl, 0x3f); |
| 2279 | ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; |
| 2280 | reg_write(ohci, OHCI1394_FairnessControl, 0); |
Stefan Richter | db3c9cc | 2010-06-12 20:30:21 +0200 | [diff] [blame] | 2281 | card->priority_budget_implemented = ohci->pri_req_max != 0; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2282 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2283 | reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000); |
| 2284 | reg_write(ohci, OHCI1394_IntEventClear, ~0); |
| 2285 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2286 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2287 | ret = configure_1394a_enhancements(ohci); |
| 2288 | if (ret < 0) |
| 2289 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2290 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2291 | /* Activate link_on bit and contender bit in our self ID packets.*/ |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2292 | ret = ohci_update_phy_reg(card, 4, 0, PHY_LINK_ACTIVE | PHY_CONTENDER); |
| 2293 | if (ret < 0) |
| 2294 | return ret; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2295 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2296 | /* |
| 2297 | * When the link is not yet enabled, the atomic config rom |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2298 | * update mechanism described below in ohci_set_config_rom() |
| 2299 | * is not active. We have to update ConfigRomHeader and |
| 2300 | * BusOptions manually, and the write to ConfigROMmap takes |
| 2301 | * effect immediately. We tie this to the enabling of the |
| 2302 | * link, so we have a valid config rom before enabling - the |
| 2303 | * OHCI requires that ConfigROMhdr and BusOptions have valid |
| 2304 | * values before enabling. |
| 2305 | * |
| 2306 | * However, when the ConfigROMmap is written, some controllers |
| 2307 | * always read back quadlets 0 and 2 from the config rom to |
| 2308 | * the ConfigRomHeader and BusOptions registers on bus reset. |
| 2309 | * They shouldn't do that in this initial case where the link |
| 2310 | * isn't enabled. This means we have to use the same |
| 2311 | * workaround here, setting the bus header to 0 and then write |
| 2312 | * the right values in the bus reset tasklet. |
| 2313 | */ |
| 2314 | |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2315 | if (config_rom) { |
| 2316 | ohci->next_config_rom = |
| 2317 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2318 | &ohci->next_config_rom_bus, |
| 2319 | GFP_KERNEL); |
| 2320 | if (ohci->next_config_rom == NULL) |
| 2321 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2322 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2323 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2324 | } else { |
| 2325 | /* |
| 2326 | * In the suspend case, config_rom is NULL, which |
| 2327 | * means that we just reuse the old config rom. |
| 2328 | */ |
| 2329 | ohci->next_config_rom = ohci->config_rom; |
| 2330 | ohci->next_config_rom_bus = ohci->config_rom_bus; |
| 2331 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2332 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2333 | ohci->next_header = ohci->next_config_rom[0]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2334 | ohci->next_config_rom[0] = 0; |
| 2335 | reg_write(ohci, OHCI1394_ConfigROMhdr, 0); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2336 | reg_write(ohci, OHCI1394_BusOptions, |
| 2337 | be32_to_cpu(ohci->next_config_rom[2])); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2338 | reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); |
| 2339 | |
| 2340 | reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); |
| 2341 | |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 2342 | if (!(ohci->quirks & QUIRK_NO_MSI)) |
| 2343 | pci_enable_msi(dev); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2344 | if (request_irq(dev->irq, irq_handler, |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 2345 | pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, |
| 2346 | ohci_driver_name, ohci)) { |
| 2347 | fw_error("Failed to allocate interrupt %d.\n", dev->irq); |
| 2348 | pci_disable_msi(dev); |
Stefan Richter | a01e836 | 2011-08-11 20:40:42 +0200 | [diff] [blame] | 2349 | |
| 2350 | if (config_rom) { |
| 2351 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2352 | ohci->next_config_rom, |
| 2353 | ohci->next_config_rom_bus); |
| 2354 | ohci->next_config_rom = NULL; |
| 2355 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2356 | return -EIO; |
| 2357 | } |
| 2358 | |
Stefan Richter | 148c786 | 2010-06-05 11:46:49 +0200 | [diff] [blame] | 2359 | irqs = OHCI1394_reqTxComplete | OHCI1394_respTxComplete | |
| 2360 | OHCI1394_RQPkt | OHCI1394_RSPkt | |
| 2361 | OHCI1394_isochTx | OHCI1394_isochRx | |
| 2362 | OHCI1394_postedWriteErr | |
| 2363 | OHCI1394_selfIDComplete | |
| 2364 | OHCI1394_regAccessFail | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2365 | OHCI1394_cycle64Seconds | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 2366 | OHCI1394_cycleInconsistent | |
| 2367 | OHCI1394_unrecoverableError | |
| 2368 | OHCI1394_cycleTooLong | |
Stefan Richter | 148c786 | 2010-06-05 11:46:49 +0200 | [diff] [blame] | 2369 | OHCI1394_masterIntEnable; |
| 2370 | if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS) |
| 2371 | irqs |= OHCI1394_busReset; |
| 2372 | reg_write(ohci, OHCI1394_IntMaskSet, irqs); |
| 2373 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2374 | reg_write(ohci, OHCI1394_HCControlSet, |
| 2375 | OHCI1394_HCControl_linkEnable | |
| 2376 | OHCI1394_HCControl_BIBimageValid); |
Clemens Ladisch | ecf8328 | 2011-04-11 09:56:12 +0200 | [diff] [blame] | 2377 | |
| 2378 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2379 | OHCI1394_LinkControl_rcvSelfID | |
| 2380 | OHCI1394_LinkControl_rcvPhyPkt); |
| 2381 | |
| 2382 | ar_context_run(&ohci->ar_request_ctx); |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 2383 | ar_context_run(&ohci->ar_response_ctx); |
| 2384 | |
| 2385 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2386 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 2387 | /* We are ready to go, reset bus to finish initialization. */ |
| 2388 | fw_schedule_bus_reset(&ohci->card, false, true); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2389 | |
| 2390 | return 0; |
| 2391 | } |
| 2392 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2393 | static int ohci_set_config_rom(struct fw_card *card, |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2394 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2395 | { |
| 2396 | struct fw_ohci *ohci; |
| 2397 | unsigned long flags; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2398 | __be32 *next_config_rom; |
Stefan Richter | f5101d5 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 2399 | dma_addr_t uninitialized_var(next_config_rom_bus); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2400 | |
| 2401 | ohci = fw_ohci(card); |
| 2402 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2403 | /* |
| 2404 | * When the OHCI controller is enabled, the config rom update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2405 | * mechanism is a bit tricky, but easy enough to use. See |
| 2406 | * section 5.5.6 in the OHCI specification. |
| 2407 | * |
| 2408 | * The OHCI controller caches the new config rom address in a |
| 2409 | * shadow register (ConfigROMmapNext) and needs a bus reset |
| 2410 | * for the changes to take place. When the bus reset is |
| 2411 | * detected, the controller loads the new values for the |
| 2412 | * ConfigRomHeader and BusOptions registers from the specified |
| 2413 | * config rom and loads ConfigROMmap from the ConfigROMmapNext |
| 2414 | * shadow register. All automatically and atomically. |
| 2415 | * |
| 2416 | * Now, there's a twist to this story. The automatic load of |
| 2417 | * ConfigRomHeader and BusOptions doesn't honor the |
| 2418 | * noByteSwapData bit, so with a be32 config rom, the |
| 2419 | * controller will load be32 values in to these registers |
| 2420 | * during the atomic update, even on litte endian |
| 2421 | * architectures. The workaround we use is to put a 0 in the |
| 2422 | * header quadlet; 0 is endian agnostic and means that the |
| 2423 | * config rom isn't ready yet. In the bus reset tasklet we |
| 2424 | * then set up the real values for the two registers. |
| 2425 | * |
| 2426 | * We use ohci->lock to avoid racing with the code that sets |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 2427 | * ohci->next_config_rom to NULL (see bus_reset_work). |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2428 | */ |
| 2429 | |
| 2430 | next_config_rom = |
| 2431 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2432 | &next_config_rom_bus, GFP_KERNEL); |
| 2433 | if (next_config_rom == NULL) |
| 2434 | return -ENOMEM; |
| 2435 | |
| 2436 | spin_lock_irqsave(&ohci->lock, flags); |
| 2437 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2438 | /* |
| 2439 | * If there is not an already pending config_rom update, |
| 2440 | * push our new allocation into the ohci->next_config_rom |
| 2441 | * and then mark the local variable as null so that we |
| 2442 | * won't deallocate the new buffer. |
| 2443 | * |
| 2444 | * OTOH, if there is a pending config_rom update, just |
| 2445 | * use that buffer with the new config_rom data, and |
| 2446 | * let this routine free the unused DMA allocation. |
| 2447 | */ |
| 2448 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2449 | if (ohci->next_config_rom == NULL) { |
| 2450 | ohci->next_config_rom = next_config_rom; |
| 2451 | ohci->next_config_rom_bus = next_config_rom_bus; |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2452 | next_config_rom = NULL; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2453 | } |
| 2454 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2455 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
| 2456 | |
| 2457 | ohci->next_header = config_rom[0]; |
| 2458 | ohci->next_config_rom[0] = 0; |
| 2459 | |
| 2460 | reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); |
| 2461 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2462 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2463 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2464 | /* If we didn't use the DMA allocation, delete it. */ |
| 2465 | if (next_config_rom != NULL) |
| 2466 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2467 | next_config_rom, next_config_rom_bus); |
| 2468 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2469 | /* |
| 2470 | * Now initiate a bus reset to have the changes take |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2471 | * effect. We clean up the old config rom memory and DMA |
| 2472 | * mappings in the bus reset tasklet, since the OHCI |
| 2473 | * controller could need to access it before the bus reset |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2474 | * takes effect. |
| 2475 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2476 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2477 | fw_schedule_bus_reset(&ohci->card, true, true); |
| 2478 | |
| 2479 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2480 | } |
| 2481 | |
| 2482 | static void ohci_send_request(struct fw_card *card, struct fw_packet *packet) |
| 2483 | { |
| 2484 | struct fw_ohci *ohci = fw_ohci(card); |
| 2485 | |
| 2486 | at_context_transmit(&ohci->at_request_ctx, packet); |
| 2487 | } |
| 2488 | |
| 2489 | static void ohci_send_response(struct fw_card *card, struct fw_packet *packet) |
| 2490 | { |
| 2491 | struct fw_ohci *ohci = fw_ohci(card); |
| 2492 | |
| 2493 | at_context_transmit(&ohci->at_response_ctx, packet); |
| 2494 | } |
| 2495 | |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2496 | static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet) |
| 2497 | { |
| 2498 | struct fw_ohci *ohci = fw_ohci(card); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2499 | struct context *ctx = &ohci->at_request_ctx; |
| 2500 | struct driver_data *driver_data = packet->driver_data; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2501 | int ret = -ENOENT; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2502 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2503 | tasklet_disable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2504 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2505 | if (packet->ack != 0) |
| 2506 | goto out; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2507 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 2508 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 2509 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
| 2510 | packet->payload_length, DMA_TO_DEVICE); |
| 2511 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 2512 | log_ar_at_event('T', packet->speed, packet->header, 0x20); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2513 | driver_data->packet = NULL; |
| 2514 | packet->ack = RCODE_CANCELLED; |
| 2515 | packet->callback(packet, &ohci->card, packet->ack); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2516 | ret = 0; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2517 | out: |
| 2518 | tasklet_enable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2519 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2520 | return ret; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2521 | } |
| 2522 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2523 | static int ohci_enable_phys_dma(struct fw_card *card, |
| 2524 | int node_id, int generation) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2525 | { |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 2526 | #ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA |
| 2527 | return 0; |
| 2528 | #else |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2529 | struct fw_ohci *ohci = fw_ohci(card); |
| 2530 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2531 | int n, ret = 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2532 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2533 | /* |
| 2534 | * FIXME: Make sure this bitmask is cleared when we clear the busReset |
| 2535 | * interrupt bit. Clear physReqResourceAllBuses on bus reset. |
| 2536 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2537 | |
| 2538 | spin_lock_irqsave(&ohci->lock, flags); |
| 2539 | |
| 2540 | if (ohci->generation != generation) { |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2541 | ret = -ESTALE; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2542 | goto out; |
| 2543 | } |
| 2544 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2545 | /* |
| 2546 | * Note, if the node ID contains a non-local bus ID, physical DMA is |
| 2547 | * enabled for _all_ nodes on remote buses. |
| 2548 | */ |
Stefan Richter | 907293d | 2007-01-23 21:11:43 +0100 | [diff] [blame] | 2549 | |
| 2550 | n = (node_id & 0xffc0) == LOCAL_BUS ? node_id & 0x3f : 63; |
| 2551 | if (n < 32) |
| 2552 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); |
| 2553 | else |
| 2554 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); |
| 2555 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2556 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2557 | out: |
Stefan Richter | 6cad95f | 2007-01-21 20:46:45 +0100 | [diff] [blame] | 2558 | spin_unlock_irqrestore(&ohci->lock, flags); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2559 | |
| 2560 | return ret; |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 2561 | #endif /* CONFIG_FIREWIRE_OHCI_REMOTE_DMA */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2562 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2563 | |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 2564 | static u32 ohci_read_csr(struct fw_card *card, int csr_offset) |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2565 | { |
| 2566 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2567 | unsigned long flags; |
| 2568 | u32 value; |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2569 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2570 | switch (csr_offset) { |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2571 | case CSR_STATE_CLEAR: |
| 2572 | case CSR_STATE_SET: |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2573 | if (ohci->is_root && |
| 2574 | (reg_read(ohci, OHCI1394_LinkControlSet) & |
| 2575 | OHCI1394_LinkControl_cycleMaster)) |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2576 | value = CSR_STATE_BIT_CMSTR; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2577 | else |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2578 | value = 0; |
| 2579 | if (ohci->csr_state_setclear_abdicate) |
| 2580 | value |= CSR_STATE_BIT_ABDICATE; |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 2581 | |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2582 | return value; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2583 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2584 | case CSR_NODE_IDS: |
| 2585 | return reg_read(ohci, OHCI1394_NodeID) << 16; |
| 2586 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2587 | case CSR_CYCLE_TIME: |
| 2588 | return get_cycle_time(ohci); |
| 2589 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2590 | case CSR_BUS_TIME: |
| 2591 | /* |
| 2592 | * We might be called just after the cycle timer has wrapped |
| 2593 | * around but just before the cycle64Seconds handler, so we |
| 2594 | * better check here, too, if the bus time needs to be updated. |
| 2595 | */ |
| 2596 | spin_lock_irqsave(&ohci->lock, flags); |
| 2597 | value = update_bus_time(ohci); |
| 2598 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2599 | return value; |
| 2600 | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2601 | case CSR_BUSY_TIMEOUT: |
| 2602 | value = reg_read(ohci, OHCI1394_ATRetries); |
| 2603 | return (value >> 4) & 0x0ffff00f; |
| 2604 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2605 | case CSR_PRIORITY_BUDGET: |
| 2606 | return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | |
| 2607 | (ohci->pri_req_max << 8); |
| 2608 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2609 | default: |
| 2610 | WARN_ON(1); |
| 2611 | return 0; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 2612 | } |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2613 | } |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2614 | |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 2615 | static void ohci_write_csr(struct fw_card *card, int csr_offset, u32 value) |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2616 | { |
| 2617 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2618 | unsigned long flags; |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2619 | |
| 2620 | switch (csr_offset) { |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2621 | case CSR_STATE_CLEAR: |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2622 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { |
| 2623 | reg_write(ohci, OHCI1394_LinkControlClear, |
| 2624 | OHCI1394_LinkControl_cycleMaster); |
| 2625 | flush_writes(ohci); |
| 2626 | } |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2627 | if (value & CSR_STATE_BIT_ABDICATE) |
| 2628 | ohci->csr_state_setclear_abdicate = false; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2629 | break; |
| 2630 | |
| 2631 | case CSR_STATE_SET: |
| 2632 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { |
| 2633 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2634 | OHCI1394_LinkControl_cycleMaster); |
| 2635 | flush_writes(ohci); |
| 2636 | } |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2637 | if (value & CSR_STATE_BIT_ABDICATE) |
| 2638 | ohci->csr_state_setclear_abdicate = true; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2639 | break; |
| 2640 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2641 | case CSR_NODE_IDS: |
| 2642 | reg_write(ohci, OHCI1394_NodeID, value >> 16); |
| 2643 | flush_writes(ohci); |
| 2644 | break; |
| 2645 | |
Clemens Ladisch | 9ab5071 | 2010-06-10 08:26:48 +0200 | [diff] [blame] | 2646 | case CSR_CYCLE_TIME: |
| 2647 | reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); |
| 2648 | reg_write(ohci, OHCI1394_IntEventSet, |
| 2649 | OHCI1394_cycleInconsistent); |
| 2650 | flush_writes(ohci); |
| 2651 | break; |
| 2652 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2653 | case CSR_BUS_TIME: |
| 2654 | spin_lock_irqsave(&ohci->lock, flags); |
| 2655 | ohci->bus_time = (ohci->bus_time & 0x7f) | (value & ~0x7f); |
| 2656 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2657 | break; |
| 2658 | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2659 | case CSR_BUSY_TIMEOUT: |
| 2660 | value = (value & 0xf) | ((value & 0xf) << 4) | |
| 2661 | ((value & 0xf) << 8) | ((value & 0x0ffff000) << 4); |
| 2662 | reg_write(ohci, OHCI1394_ATRetries, value); |
| 2663 | flush_writes(ohci); |
| 2664 | break; |
| 2665 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2666 | case CSR_PRIORITY_BUDGET: |
| 2667 | reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); |
| 2668 | flush_writes(ohci); |
| 2669 | break; |
| 2670 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2671 | default: |
| 2672 | WARN_ON(1); |
| 2673 | break; |
| 2674 | } |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2675 | } |
| 2676 | |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2677 | static void copy_iso_headers(struct iso_context *ctx, void *p) |
| 2678 | { |
| 2679 | int i = ctx->header_length; |
| 2680 | |
| 2681 | if (i + ctx->base.header_size > PAGE_SIZE) |
| 2682 | return; |
| 2683 | |
| 2684 | /* |
| 2685 | * The iso header is byteswapped to little endian by |
| 2686 | * the controller, but the remaining header quadlets |
| 2687 | * are big endian. We want to present all the headers |
| 2688 | * as big endian, so we have to swap the first quadlet. |
| 2689 | */ |
| 2690 | if (ctx->base.header_size > 0) |
| 2691 | *(u32 *) (ctx->header + i) = __swab32(*(u32 *) (p + 4)); |
| 2692 | if (ctx->base.header_size > 4) |
| 2693 | *(u32 *) (ctx->header + i + 4) = __swab32(*(u32 *) p); |
| 2694 | if (ctx->base.header_size > 8) |
| 2695 | memcpy(ctx->header + i + 8, p + 8, ctx->base.header_size - 8); |
| 2696 | ctx->header_length += ctx->base.header_size; |
| 2697 | } |
| 2698 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2699 | static int handle_ir_packet_per_buffer(struct context *context, |
| 2700 | struct descriptor *d, |
| 2701 | struct descriptor *last) |
| 2702 | { |
| 2703 | struct iso_context *ctx = |
| 2704 | container_of(context, struct iso_context, context); |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2705 | struct descriptor *pd; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2706 | u32 buffer_dma; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2707 | __le32 *ir_header; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2708 | void *p; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2709 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2710 | for (pd = d; pd <= last; pd++) |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2711 | if (pd->transfer_status) |
| 2712 | break; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2713 | if (pd > last) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2714 | /* Descriptor(s) not done yet, stop iteration */ |
| 2715 | return 0; |
| 2716 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2717 | while (!(d->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS))) { |
| 2718 | d++; |
| 2719 | buffer_dma = le32_to_cpu(d->data_address); |
| 2720 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2721 | buffer_dma & PAGE_MASK, |
| 2722 | buffer_dma & ~PAGE_MASK, |
| 2723 | le16_to_cpu(d->req_count), |
| 2724 | DMA_FROM_DEVICE); |
| 2725 | } |
| 2726 | |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2727 | p = last + 1; |
| 2728 | copy_iso_headers(ctx, p); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2729 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2730 | if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) { |
| 2731 | ir_header = (__le32 *) p; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2732 | ctx->base.callback.sc(&ctx->base, |
| 2733 | le32_to_cpu(ir_header[0]) & 0xffff, |
| 2734 | ctx->header_length, ctx->header, |
| 2735 | ctx->base.callback_data); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2736 | ctx->header_length = 0; |
| 2737 | } |
| 2738 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2739 | return 1; |
| 2740 | } |
| 2741 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2742 | /* d == last because each descriptor block is only a single descriptor. */ |
| 2743 | static int handle_ir_buffer_fill(struct context *context, |
| 2744 | struct descriptor *d, |
| 2745 | struct descriptor *last) |
| 2746 | { |
| 2747 | struct iso_context *ctx = |
| 2748 | container_of(context, struct iso_context, context); |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2749 | u32 buffer_dma; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2750 | |
| 2751 | if (!last->transfer_status) |
| 2752 | /* Descriptor(s) not done yet, stop iteration */ |
| 2753 | return 0; |
| 2754 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2755 | buffer_dma = le32_to_cpu(last->data_address); |
| 2756 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2757 | buffer_dma & PAGE_MASK, |
| 2758 | buffer_dma & ~PAGE_MASK, |
| 2759 | le16_to_cpu(last->req_count), |
| 2760 | DMA_FROM_DEVICE); |
| 2761 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2762 | if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) |
| 2763 | ctx->base.callback.mc(&ctx->base, |
| 2764 | le32_to_cpu(last->data_address) + |
| 2765 | le16_to_cpu(last->req_count) - |
| 2766 | le16_to_cpu(last->res_count), |
| 2767 | ctx->base.callback_data); |
| 2768 | |
| 2769 | return 1; |
| 2770 | } |
| 2771 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2772 | static inline void sync_it_packet_for_cpu(struct context *context, |
| 2773 | struct descriptor *pd) |
| 2774 | { |
| 2775 | __le16 control; |
| 2776 | u32 buffer_dma; |
| 2777 | |
| 2778 | /* only packets beginning with OUTPUT_MORE* have data buffers */ |
| 2779 | if (pd->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
| 2780 | return; |
| 2781 | |
| 2782 | /* skip over the OUTPUT_MORE_IMMEDIATE descriptor */ |
| 2783 | pd += 2; |
| 2784 | |
| 2785 | /* |
| 2786 | * If the packet has a header, the first OUTPUT_MORE/LAST descriptor's |
| 2787 | * data buffer is in the context program's coherent page and must not |
| 2788 | * be synced. |
| 2789 | */ |
| 2790 | if ((le32_to_cpu(pd->data_address) & PAGE_MASK) == |
| 2791 | (context->current_bus & PAGE_MASK)) { |
| 2792 | if (pd->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
| 2793 | return; |
| 2794 | pd++; |
| 2795 | } |
| 2796 | |
| 2797 | do { |
| 2798 | buffer_dma = le32_to_cpu(pd->data_address); |
| 2799 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2800 | buffer_dma & PAGE_MASK, |
| 2801 | buffer_dma & ~PAGE_MASK, |
| 2802 | le16_to_cpu(pd->req_count), |
| 2803 | DMA_TO_DEVICE); |
| 2804 | control = pd->control; |
| 2805 | pd++; |
| 2806 | } while (!(control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS))); |
| 2807 | } |
| 2808 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2809 | static int handle_it_packet(struct context *context, |
| 2810 | struct descriptor *d, |
| 2811 | struct descriptor *last) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2812 | { |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2813 | struct iso_context *ctx = |
| 2814 | container_of(context, struct iso_context, context); |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2815 | int i; |
| 2816 | struct descriptor *pd; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2817 | |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2818 | for (pd = d; pd <= last; pd++) |
| 2819 | if (pd->transfer_status) |
| 2820 | break; |
| 2821 | if (pd > last) |
| 2822 | /* Descriptor(s) not done yet, stop iteration */ |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2823 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2824 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2825 | sync_it_packet_for_cpu(context, d); |
| 2826 | |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2827 | i = ctx->header_length; |
| 2828 | if (i + 4 < PAGE_SIZE) { |
| 2829 | /* Present this value as big-endian to match the receive code */ |
| 2830 | *(__be32 *)(ctx->header + i) = cpu_to_be32( |
| 2831 | ((u32)le16_to_cpu(pd->transfer_status) << 16) | |
| 2832 | le16_to_cpu(pd->res_count)); |
| 2833 | ctx->header_length += 4; |
| 2834 | } |
| 2835 | if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) { |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2836 | ctx->base.callback.sc(&ctx->base, le16_to_cpu(last->res_count), |
| 2837 | ctx->header_length, ctx->header, |
| 2838 | ctx->base.callback_data); |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2839 | ctx->header_length = 0; |
| 2840 | } |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2841 | return 1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2842 | } |
| 2843 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2844 | static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) |
| 2845 | { |
| 2846 | u32 hi = channels >> 32, lo = channels; |
| 2847 | |
| 2848 | reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); |
| 2849 | reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); |
| 2850 | reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); |
| 2851 | reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); |
| 2852 | mmiowb(); |
| 2853 | ohci->mc_channels = channels; |
| 2854 | } |
| 2855 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2856 | static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card, |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2857 | int type, int channel, size_t header_size) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2858 | { |
| 2859 | struct fw_ohci *ohci = fw_ohci(card); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2860 | struct iso_context *uninitialized_var(ctx); |
| 2861 | descriptor_callback_t uninitialized_var(callback); |
| 2862 | u64 *uninitialized_var(channels); |
| 2863 | u32 *uninitialized_var(mask), uninitialized_var(regs); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2864 | unsigned long flags; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2865 | int index, ret = -EBUSY; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2866 | |
| 2867 | spin_lock_irqsave(&ohci->lock, flags); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2868 | |
| 2869 | switch (type) { |
| 2870 | case FW_ISO_CONTEXT_TRANSMIT: |
| 2871 | mask = &ohci->it_context_mask; |
| 2872 | callback = handle_it_packet; |
| 2873 | index = ffs(*mask) - 1; |
| 2874 | if (index >= 0) { |
| 2875 | *mask &= ~(1 << index); |
| 2876 | regs = OHCI1394_IsoXmitContextBase(index); |
| 2877 | ctx = &ohci->it_context_list[index]; |
| 2878 | } |
| 2879 | break; |
| 2880 | |
| 2881 | case FW_ISO_CONTEXT_RECEIVE: |
| 2882 | channels = &ohci->ir_context_channels; |
| 2883 | mask = &ohci->ir_context_mask; |
| 2884 | callback = handle_ir_packet_per_buffer; |
| 2885 | index = *channels & 1ULL << channel ? ffs(*mask) - 1 : -1; |
| 2886 | if (index >= 0) { |
| 2887 | *channels &= ~(1ULL << channel); |
| 2888 | *mask &= ~(1 << index); |
| 2889 | regs = OHCI1394_IsoRcvContextBase(index); |
| 2890 | ctx = &ohci->ir_context_list[index]; |
| 2891 | } |
| 2892 | break; |
| 2893 | |
| 2894 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 2895 | mask = &ohci->ir_context_mask; |
| 2896 | callback = handle_ir_buffer_fill; |
| 2897 | index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; |
| 2898 | if (index >= 0) { |
| 2899 | ohci->mc_allocated = true; |
| 2900 | *mask &= ~(1 << index); |
| 2901 | regs = OHCI1394_IsoRcvContextBase(index); |
| 2902 | ctx = &ohci->ir_context_list[index]; |
| 2903 | } |
| 2904 | break; |
| 2905 | |
| 2906 | default: |
| 2907 | index = -1; |
| 2908 | ret = -ENOSYS; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2909 | } |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2910 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2911 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2912 | |
| 2913 | if (index < 0) |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2914 | return ERR_PTR(ret); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2915 | |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 2916 | memset(ctx, 0, sizeof(*ctx)); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2917 | ctx->header_length = 0; |
| 2918 | ctx->header = (void *) __get_free_page(GFP_KERNEL); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2919 | if (ctx->header == NULL) { |
| 2920 | ret = -ENOMEM; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2921 | goto out; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2922 | } |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2923 | ret = context_init(&ctx->context, ohci, regs, callback); |
| 2924 | if (ret < 0) |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2925 | goto out_with_header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2926 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2927 | if (type == FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) |
| 2928 | set_multichannel_mask(ohci, 0); |
| 2929 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2930 | return &ctx->base; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2931 | |
| 2932 | out_with_header: |
| 2933 | free_page((unsigned long)ctx->header); |
| 2934 | out: |
| 2935 | spin_lock_irqsave(&ohci->lock, flags); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2936 | |
| 2937 | switch (type) { |
| 2938 | case FW_ISO_CONTEXT_RECEIVE: |
| 2939 | *channels |= 1ULL << channel; |
| 2940 | break; |
| 2941 | |
| 2942 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 2943 | ohci->mc_allocated = false; |
| 2944 | break; |
| 2945 | } |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2946 | *mask |= 1 << index; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2947 | |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2948 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2949 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2950 | return ERR_PTR(ret); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2951 | } |
| 2952 | |
Kristian Høgsberg | eb0306e | 2007-03-14 17:34:54 -0400 | [diff] [blame] | 2953 | static int ohci_start_iso(struct fw_iso_context *base, |
| 2954 | s32 cycle, u32 sync, u32 tags) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2955 | { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2956 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2957 | struct fw_ohci *ohci = ctx->context.ohci; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2958 | u32 control = IR_CONTEXT_ISOCH_HEADER, match; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2959 | int index; |
| 2960 | |
Clemens Ladisch | 44b74d9 | 2011-02-23 09:27:40 +0100 | [diff] [blame] | 2961 | /* the controller cannot start without any queued packets */ |
| 2962 | if (ctx->context.last->branch_address == 0) |
| 2963 | return -ENODATA; |
| 2964 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2965 | switch (ctx->base.type) { |
| 2966 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2967 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2968 | match = 0; |
| 2969 | if (cycle >= 0) |
| 2970 | match = IT_CONTEXT_CYCLE_MATCH_ENABLE | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2971 | (cycle & 0x7fff) << 16; |
Kristian Høgsberg | 21efb3c | 2007-02-16 17:34:50 -0500 | [diff] [blame] | 2972 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2973 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); |
| 2974 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2975 | context_run(&ctx->context, match); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2976 | break; |
| 2977 | |
| 2978 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 2979 | control |= IR_CONTEXT_BUFFER_FILL|IR_CONTEXT_MULTI_CHANNEL_MODE; |
| 2980 | /* fall through */ |
| 2981 | case FW_ISO_CONTEXT_RECEIVE: |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2982 | index = ctx - ohci->ir_context_list; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2983 | match = (tags << 28) | (sync << 8) | ctx->base.channel; |
| 2984 | if (cycle >= 0) { |
| 2985 | match |= (cycle & 0x07fff) << 12; |
| 2986 | control |= IR_CONTEXT_CYCLE_MATCH_ENABLE; |
| 2987 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2988 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2989 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); |
| 2990 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2991 | reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2992 | context_run(&ctx->context, control); |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 2993 | |
| 2994 | ctx->sync = sync; |
| 2995 | ctx->tags = tags; |
| 2996 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2997 | break; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2998 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2999 | |
| 3000 | return 0; |
| 3001 | } |
| 3002 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3003 | static int ohci_stop_iso(struct fw_iso_context *base) |
| 3004 | { |
| 3005 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3006 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3007 | int index; |
| 3008 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3009 | switch (ctx->base.type) { |
| 3010 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3011 | index = ctx - ohci->it_context_list; |
| 3012 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3013 | break; |
| 3014 | |
| 3015 | case FW_ISO_CONTEXT_RECEIVE: |
| 3016 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3017 | index = ctx - ohci->ir_context_list; |
| 3018 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3019 | break; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3020 | } |
| 3021 | flush_writes(ohci); |
| 3022 | context_stop(&ctx->context); |
Clemens Ladisch | e81cbeb | 2011-02-16 10:32:11 +0100 | [diff] [blame] | 3023 | tasklet_kill(&ctx->context.tasklet); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3024 | |
| 3025 | return 0; |
| 3026 | } |
| 3027 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3028 | static void ohci_free_iso_context(struct fw_iso_context *base) |
| 3029 | { |
| 3030 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3031 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3032 | unsigned long flags; |
| 3033 | int index; |
| 3034 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3035 | ohci_stop_iso(base); |
| 3036 | context_release(&ctx->context); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3037 | free_page((unsigned long)ctx->header); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3038 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3039 | spin_lock_irqsave(&ohci->lock, flags); |
| 3040 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3041 | switch (base->type) { |
| 3042 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3043 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3044 | ohci->it_context_mask |= 1 << index; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3045 | break; |
| 3046 | |
| 3047 | case FW_ISO_CONTEXT_RECEIVE: |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3048 | index = ctx - ohci->ir_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3049 | ohci->ir_context_mask |= 1 << index; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 3050 | ohci->ir_context_channels |= 1ULL << base->channel; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3051 | break; |
| 3052 | |
| 3053 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3054 | index = ctx - ohci->ir_context_list; |
| 3055 | ohci->ir_context_mask |= 1 << index; |
| 3056 | ohci->ir_context_channels |= ohci->mc_channels; |
| 3057 | ohci->mc_channels = 0; |
| 3058 | ohci->mc_allocated = false; |
| 3059 | break; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3060 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3061 | |
| 3062 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 3063 | } |
| 3064 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3065 | static int ohci_set_iso_channels(struct fw_iso_context *base, u64 *channels) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3066 | { |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3067 | struct fw_ohci *ohci = fw_ohci(base->card); |
| 3068 | unsigned long flags; |
| 3069 | int ret; |
| 3070 | |
| 3071 | switch (base->type) { |
| 3072 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3073 | |
| 3074 | spin_lock_irqsave(&ohci->lock, flags); |
| 3075 | |
| 3076 | /* Don't allow multichannel to grab other contexts' channels. */ |
| 3077 | if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { |
| 3078 | *channels = ohci->ir_context_channels; |
| 3079 | ret = -EBUSY; |
| 3080 | } else { |
| 3081 | set_multichannel_mask(ohci, *channels); |
| 3082 | ret = 0; |
| 3083 | } |
| 3084 | |
| 3085 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 3086 | |
| 3087 | break; |
| 3088 | default: |
| 3089 | ret = -EINVAL; |
| 3090 | } |
| 3091 | |
| 3092 | return ret; |
| 3093 | } |
| 3094 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3095 | #ifdef CONFIG_PM |
| 3096 | static void ohci_resume_iso_dma(struct fw_ohci *ohci) |
| 3097 | { |
| 3098 | int i; |
| 3099 | struct iso_context *ctx; |
| 3100 | |
| 3101 | for (i = 0 ; i < ohci->n_ir ; i++) { |
| 3102 | ctx = &ohci->ir_context_list[i]; |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3103 | if (ctx->context.running) |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3104 | ohci_start_iso(&ctx->base, 0, ctx->sync, ctx->tags); |
| 3105 | } |
| 3106 | |
| 3107 | for (i = 0 ; i < ohci->n_it ; i++) { |
| 3108 | ctx = &ohci->it_context_list[i]; |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3109 | if (ctx->context.running) |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3110 | ohci_start_iso(&ctx->base, 0, ctx->sync, ctx->tags); |
| 3111 | } |
| 3112 | } |
| 3113 | #endif |
| 3114 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3115 | static int queue_iso_transmit(struct iso_context *ctx, |
| 3116 | struct fw_iso_packet *packet, |
| 3117 | struct fw_iso_buffer *buffer, |
| 3118 | unsigned long payload) |
| 3119 | { |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3120 | struct descriptor *d, *last, *pd; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3121 | struct fw_iso_packet *p; |
| 3122 | __le32 *header; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3123 | dma_addr_t d_bus, page_bus; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3124 | u32 z, header_z, payload_z, irq; |
| 3125 | u32 payload_index, payload_end_index, next_page_index; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3126 | int page, end_page, i, length, offset; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3127 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3128 | p = packet; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3129 | payload_index = payload; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3130 | |
| 3131 | if (p->skip) |
| 3132 | z = 1; |
| 3133 | else |
| 3134 | z = 2; |
| 3135 | if (p->header_length > 0) |
| 3136 | z++; |
| 3137 | |
| 3138 | /* Determine the first page the payload isn't contained in. */ |
| 3139 | end_page = PAGE_ALIGN(payload_index + p->payload_length) >> PAGE_SHIFT; |
| 3140 | if (p->payload_length > 0) |
| 3141 | payload_z = end_page - (payload_index >> PAGE_SHIFT); |
| 3142 | else |
| 3143 | payload_z = 0; |
| 3144 | |
| 3145 | z += payload_z; |
| 3146 | |
| 3147 | /* Get header size in number of descriptors. */ |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3148 | header_z = DIV_ROUND_UP(p->header_length, sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3149 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3150 | d = context_get_descriptors(&ctx->context, z + header_z, &d_bus); |
| 3151 | if (d == NULL) |
| 3152 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3153 | |
| 3154 | if (!p->skip) { |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3155 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3156 | d[0].req_count = cpu_to_le16(8); |
Clemens Ladisch | 7f51a10 | 2010-02-08 08:30:03 +0100 | [diff] [blame] | 3157 | /* |
| 3158 | * Link the skip address to this descriptor itself. This causes |
| 3159 | * a context to skip a cycle whenever lost cycles or FIFO |
| 3160 | * overruns occur, without dropping the data. The application |
| 3161 | * should then decide whether this is an error condition or not. |
| 3162 | * FIXME: Make the context's cycle-lost behaviour configurable? |
| 3163 | */ |
| 3164 | d[0].branch_address = cpu_to_le32(d_bus | z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3165 | |
| 3166 | header = (__le32 *) &d[1]; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3167 | header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) | |
| 3168 | IT_HEADER_TAG(p->tag) | |
| 3169 | IT_HEADER_TCODE(TCODE_STREAM_DATA) | |
| 3170 | IT_HEADER_CHANNEL(ctx->base.channel) | |
| 3171 | IT_HEADER_SPEED(ctx->base.speed)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3172 | header[1] = |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3173 | cpu_to_le32(IT_HEADER_DATA_LENGTH(p->header_length + |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3174 | p->payload_length)); |
| 3175 | } |
| 3176 | |
| 3177 | if (p->header_length > 0) { |
| 3178 | d[2].req_count = cpu_to_le16(p->header_length); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3179 | d[2].data_address = cpu_to_le32(d_bus + z * sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3180 | memcpy(&d[z], p->header, p->header_length); |
| 3181 | } |
| 3182 | |
| 3183 | pd = d + z - payload_z; |
| 3184 | payload_end_index = payload_index + p->payload_length; |
| 3185 | for (i = 0; i < payload_z; i++) { |
| 3186 | page = payload_index >> PAGE_SHIFT; |
| 3187 | offset = payload_index & ~PAGE_MASK; |
| 3188 | next_page_index = (page + 1) << PAGE_SHIFT; |
| 3189 | length = |
| 3190 | min(next_page_index, payload_end_index) - payload_index; |
| 3191 | pd[i].req_count = cpu_to_le16(length); |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3192 | |
| 3193 | page_bus = page_private(buffer->pages[page]); |
| 3194 | pd[i].data_address = cpu_to_le32(page_bus + offset); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3195 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3196 | dma_sync_single_range_for_device(ctx->context.ohci->card.device, |
| 3197 | page_bus, offset, length, |
| 3198 | DMA_TO_DEVICE); |
| 3199 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3200 | payload_index += length; |
| 3201 | } |
| 3202 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3203 | if (p->interrupt) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3204 | irq = DESCRIPTOR_IRQ_ALWAYS; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3205 | else |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3206 | irq = DESCRIPTOR_NO_IRQ; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3207 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3208 | last = z == 2 ? d : d + z - 1; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3209 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 3210 | DESCRIPTOR_STATUS | |
| 3211 | DESCRIPTOR_BRANCH_ALWAYS | |
Kristian Høgsberg | cbb59da | 2007-02-16 17:34:35 -0500 | [diff] [blame] | 3212 | irq); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3213 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3214 | context_append(&ctx->context, d, z, header_z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3215 | |
| 3216 | return 0; |
| 3217 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3218 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3219 | static int queue_iso_packet_per_buffer(struct iso_context *ctx, |
| 3220 | struct fw_iso_packet *packet, |
| 3221 | struct fw_iso_buffer *buffer, |
| 3222 | unsigned long payload) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3223 | { |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3224 | struct device *device = ctx->context.ohci->card.device; |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3225 | struct descriptor *d, *pd; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3226 | dma_addr_t d_bus, page_bus; |
| 3227 | u32 z, header_z, rest; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3228 | int i, j, length; |
| 3229 | int page, offset, packet_count, header_size, payload_per_buffer; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3230 | |
| 3231 | /* |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 3232 | * The OHCI controller puts the isochronous header and trailer in the |
| 3233 | * buffer, so we need at least 8 bytes. |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3234 | */ |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3235 | packet_count = packet->header_length / ctx->base.header_size; |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 3236 | header_size = max(ctx->base.header_size, (size_t)8); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3237 | |
| 3238 | /* Get header size in number of descriptors. */ |
| 3239 | header_z = DIV_ROUND_UP(header_size, sizeof(*d)); |
| 3240 | page = payload >> PAGE_SHIFT; |
| 3241 | offset = payload & ~PAGE_MASK; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3242 | payload_per_buffer = packet->payload_length / packet_count; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3243 | |
| 3244 | for (i = 0; i < packet_count; i++) { |
| 3245 | /* d points to the header descriptor */ |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3246 | z = DIV_ROUND_UP(payload_per_buffer + offset, PAGE_SIZE) + 1; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3247 | d = context_get_descriptors(&ctx->context, |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3248 | z + header_z, &d_bus); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3249 | if (d == NULL) |
| 3250 | return -ENOMEM; |
| 3251 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3252 | d->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3253 | DESCRIPTOR_INPUT_MORE); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3254 | if (packet->skip && i == 0) |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3255 | d->control |= cpu_to_le16(DESCRIPTOR_WAIT); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3256 | d->req_count = cpu_to_le16(header_size); |
| 3257 | d->res_count = d->req_count; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3258 | d->transfer_status = 0; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3259 | d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d))); |
| 3260 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3261 | rest = payload_per_buffer; |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3262 | pd = d; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3263 | for (j = 1; j < z; j++) { |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3264 | pd++; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3265 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3266 | DESCRIPTOR_INPUT_MORE); |
| 3267 | |
| 3268 | if (offset + rest < PAGE_SIZE) |
| 3269 | length = rest; |
| 3270 | else |
| 3271 | length = PAGE_SIZE - offset; |
| 3272 | pd->req_count = cpu_to_le16(length); |
| 3273 | pd->res_count = pd->req_count; |
| 3274 | pd->transfer_status = 0; |
| 3275 | |
| 3276 | page_bus = page_private(buffer->pages[page]); |
| 3277 | pd->data_address = cpu_to_le32(page_bus + offset); |
| 3278 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3279 | dma_sync_single_range_for_device(device, page_bus, |
| 3280 | offset, length, |
| 3281 | DMA_FROM_DEVICE); |
| 3282 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3283 | offset = (offset + length) & ~PAGE_MASK; |
| 3284 | rest -= length; |
| 3285 | if (offset == 0) |
| 3286 | page++; |
| 3287 | } |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3288 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3289 | DESCRIPTOR_INPUT_LAST | |
| 3290 | DESCRIPTOR_BRANCH_ALWAYS); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3291 | if (packet->interrupt && i == packet_count - 1) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3292 | pd->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS); |
| 3293 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3294 | context_append(&ctx->context, d, z, header_z); |
| 3295 | } |
| 3296 | |
| 3297 | return 0; |
| 3298 | } |
| 3299 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3300 | static int queue_iso_buffer_fill(struct iso_context *ctx, |
| 3301 | struct fw_iso_packet *packet, |
| 3302 | struct fw_iso_buffer *buffer, |
| 3303 | unsigned long payload) |
| 3304 | { |
| 3305 | struct descriptor *d; |
| 3306 | dma_addr_t d_bus, page_bus; |
| 3307 | int page, offset, rest, z, i, length; |
| 3308 | |
| 3309 | page = payload >> PAGE_SHIFT; |
| 3310 | offset = payload & ~PAGE_MASK; |
| 3311 | rest = packet->payload_length; |
| 3312 | |
| 3313 | /* We need one descriptor for each page in the buffer. */ |
| 3314 | z = DIV_ROUND_UP(offset + rest, PAGE_SIZE); |
| 3315 | |
| 3316 | if (WARN_ON(offset & 3 || rest & 3 || page + z > buffer->page_count)) |
| 3317 | return -EFAULT; |
| 3318 | |
| 3319 | for (i = 0; i < z; i++) { |
| 3320 | d = context_get_descriptors(&ctx->context, 1, &d_bus); |
| 3321 | if (d == NULL) |
| 3322 | return -ENOMEM; |
| 3323 | |
| 3324 | d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | |
| 3325 | DESCRIPTOR_BRANCH_ALWAYS); |
| 3326 | if (packet->skip && i == 0) |
| 3327 | d->control |= cpu_to_le16(DESCRIPTOR_WAIT); |
| 3328 | if (packet->interrupt && i == z - 1) |
| 3329 | d->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS); |
| 3330 | |
| 3331 | if (offset + rest < PAGE_SIZE) |
| 3332 | length = rest; |
| 3333 | else |
| 3334 | length = PAGE_SIZE - offset; |
| 3335 | d->req_count = cpu_to_le16(length); |
| 3336 | d->res_count = d->req_count; |
| 3337 | d->transfer_status = 0; |
| 3338 | |
| 3339 | page_bus = page_private(buffer->pages[page]); |
| 3340 | d->data_address = cpu_to_le32(page_bus + offset); |
| 3341 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3342 | dma_sync_single_range_for_device(ctx->context.ohci->card.device, |
| 3343 | page_bus, offset, length, |
| 3344 | DMA_FROM_DEVICE); |
| 3345 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3346 | rest -= length; |
| 3347 | offset = 0; |
| 3348 | page++; |
| 3349 | |
| 3350 | context_append(&ctx->context, d, 1, 0); |
| 3351 | } |
| 3352 | |
| 3353 | return 0; |
| 3354 | } |
| 3355 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 3356 | static int ohci_queue_iso(struct fw_iso_context *base, |
| 3357 | struct fw_iso_packet *packet, |
| 3358 | struct fw_iso_buffer *buffer, |
| 3359 | unsigned long payload) |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3360 | { |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 3361 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3362 | unsigned long flags; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3363 | int ret = -ENOSYS; |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 3364 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3365 | spin_lock_irqsave(&ctx->context.ohci->lock, flags); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3366 | switch (base->type) { |
| 3367 | case FW_ISO_CONTEXT_TRANSMIT: |
| 3368 | ret = queue_iso_transmit(ctx, packet, buffer, payload); |
| 3369 | break; |
| 3370 | case FW_ISO_CONTEXT_RECEIVE: |
| 3371 | ret = queue_iso_packet_per_buffer(ctx, packet, buffer, payload); |
| 3372 | break; |
| 3373 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3374 | ret = queue_iso_buffer_fill(ctx, packet, buffer, payload); |
| 3375 | break; |
| 3376 | } |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3377 | spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); |
| 3378 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 3379 | return ret; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3380 | } |
| 3381 | |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3382 | static void ohci_flush_queue_iso(struct fw_iso_context *base) |
| 3383 | { |
| 3384 | struct context *ctx = |
| 3385 | &container_of(base, struct iso_context, base)->context; |
| 3386 | |
| 3387 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3388 | } |
| 3389 | |
Stefan Richter | 21ebcd1 | 2007-01-14 15:29:07 +0100 | [diff] [blame] | 3390 | static const struct fw_card_driver ohci_driver = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3391 | .enable = ohci_enable, |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 3392 | .read_phy_reg = ohci_read_phy_reg, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3393 | .update_phy_reg = ohci_update_phy_reg, |
| 3394 | .set_config_rom = ohci_set_config_rom, |
| 3395 | .send_request = ohci_send_request, |
| 3396 | .send_response = ohci_send_response, |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 3397 | .cancel_packet = ohci_cancel_packet, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3398 | .enable_phys_dma = ohci_enable_phys_dma, |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 3399 | .read_csr = ohci_read_csr, |
| 3400 | .write_csr = ohci_write_csr, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3401 | |
| 3402 | .allocate_iso_context = ohci_allocate_iso_context, |
| 3403 | .free_iso_context = ohci_free_iso_context, |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3404 | .set_iso_channels = ohci_set_iso_channels, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3405 | .queue_iso = ohci_queue_iso, |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3406 | .flush_queue_iso = ohci_flush_queue_iso, |
Kristian Høgsberg | 69cdb72 | 2007-02-16 17:34:41 -0500 | [diff] [blame] | 3407 | .start_iso = ohci_start_iso, |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3408 | .stop_iso = ohci_stop_iso, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3409 | }; |
| 3410 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3411 | #ifdef CONFIG_PPC_PMAC |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3412 | static void pmac_ohci_on(struct pci_dev *dev) |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3413 | { |
| 3414 | if (machine_is(powermac)) { |
| 3415 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 3416 | |
| 3417 | if (ofn) { |
| 3418 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 1); |
| 3419 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1); |
| 3420 | } |
| 3421 | } |
| 3422 | } |
| 3423 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3424 | static void pmac_ohci_off(struct pci_dev *dev) |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3425 | { |
| 3426 | if (machine_is(powermac)) { |
| 3427 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 3428 | |
| 3429 | if (ofn) { |
| 3430 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0); |
| 3431 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 0); |
| 3432 | } |
| 3433 | } |
| 3434 | } |
| 3435 | #else |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3436 | static inline void pmac_ohci_on(struct pci_dev *dev) {} |
| 3437 | static inline void pmac_ohci_off(struct pci_dev *dev) {} |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3438 | #endif /* CONFIG_PPC_PMAC */ |
| 3439 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 3440 | static int __devinit pci_probe(struct pci_dev *dev, |
| 3441 | const struct pci_device_id *ent) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3442 | { |
| 3443 | struct fw_ohci *ohci; |
Stefan Richter | aa0170f | 2010-10-17 14:09:12 +0200 | [diff] [blame] | 3444 | u32 bus_options, max_receive, link_speed, version; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3445 | u64 guid; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3446 | int i, err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3447 | size_t size; |
| 3448 | |
Stefan Richter | 7f7e3711 | 2011-07-10 00:23:03 +0200 | [diff] [blame] | 3449 | if (dev->vendor == PCI_VENDOR_ID_PINNACLE_SYSTEMS) { |
| 3450 | dev_err(&dev->dev, "Pinnacle MovieBoard is not yet supported\n"); |
| 3451 | return -ENOSYS; |
| 3452 | } |
| 3453 | |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3454 | ohci = kzalloc(sizeof(*ohci), GFP_KERNEL); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3455 | if (ohci == NULL) { |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3456 | err = -ENOMEM; |
| 3457 | goto fail; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3458 | } |
| 3459 | |
| 3460 | fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); |
| 3461 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3462 | pmac_ohci_on(dev); |
Stefan Richter | 130d549 | 2008-03-24 20:55:28 +0100 | [diff] [blame] | 3463 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3464 | err = pci_enable_device(dev); |
| 3465 | if (err) { |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3466 | fw_error("Failed to enable OHCI hardware\n"); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 3467 | goto fail_free; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3468 | } |
| 3469 | |
| 3470 | pci_set_master(dev); |
| 3471 | pci_write_config_dword(dev, OHCI1394_PCI_HCI_Control, 0); |
| 3472 | pci_set_drvdata(dev, ohci); |
| 3473 | |
| 3474 | spin_lock_init(&ohci->lock); |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 3475 | mutex_init(&ohci->phy_reg_mutex); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3476 | |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 3477 | INIT_WORK(&ohci->bus_reset_work, bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3478 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3479 | err = pci_request_region(dev, 0, ohci_driver_name); |
| 3480 | if (err) { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3481 | fw_error("MMIO resource unavailable\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3482 | goto fail_disable; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3483 | } |
| 3484 | |
| 3485 | ohci->registers = pci_iomap(dev, 0, OHCI1394_REGISTER_SIZE); |
| 3486 | if (ohci->registers == NULL) { |
| 3487 | fw_error("Failed to remap registers\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3488 | err = -ENXIO; |
| 3489 | goto fail_iomem; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3490 | } |
| 3491 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 3492 | for (i = 0; i < ARRAY_SIZE(ohci_quirks); i++) |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 3493 | if ((ohci_quirks[i].vendor == dev->vendor) && |
| 3494 | (ohci_quirks[i].device == (unsigned short)PCI_ANY_ID || |
| 3495 | ohci_quirks[i].device == dev->device) && |
| 3496 | (ohci_quirks[i].revision == (unsigned short)PCI_ANY_ID || |
| 3497 | ohci_quirks[i].revision >= dev->revision)) { |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 3498 | ohci->quirks = ohci_quirks[i].flags; |
| 3499 | break; |
| 3500 | } |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 3501 | if (param_quirks) |
| 3502 | ohci->quirks = param_quirks; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 3503 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3504 | /* |
| 3505 | * Because dma_alloc_coherent() allocates at least one page, |
| 3506 | * we save space by using a common buffer for the AR request/ |
| 3507 | * response descriptors and the self IDs buffer. |
| 3508 | */ |
| 3509 | BUILD_BUG_ON(AR_BUFFERS * sizeof(struct descriptor) > PAGE_SIZE/4); |
| 3510 | BUILD_BUG_ON(SELF_ID_BUF_SIZE > PAGE_SIZE/2); |
| 3511 | ohci->misc_buffer = dma_alloc_coherent(ohci->card.device, |
| 3512 | PAGE_SIZE, |
| 3513 | &ohci->misc_buffer_bus, |
| 3514 | GFP_KERNEL); |
| 3515 | if (!ohci->misc_buffer) { |
| 3516 | err = -ENOMEM; |
| 3517 | goto fail_iounmap; |
| 3518 | } |
| 3519 | |
| 3520 | err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3521 | OHCI1394_AsReqRcvContextControlSet); |
| 3522 | if (err < 0) |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3523 | goto fail_misc_buf; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3524 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3525 | err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3526 | OHCI1394_AsRspRcvContextControlSet); |
| 3527 | if (err < 0) |
| 3528 | goto fail_arreq_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3529 | |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3530 | err = context_init(&ohci->at_request_ctx, ohci, |
| 3531 | OHCI1394_AsReqTrContextControlSet, handle_at_packet); |
| 3532 | if (err < 0) |
| 3533 | goto fail_arrsp_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3534 | |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3535 | err = context_init(&ohci->at_response_ctx, ohci, |
| 3536 | OHCI1394_AsRspTrContextControlSet, handle_at_packet); |
| 3537 | if (err < 0) |
| 3538 | goto fail_atreq_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3539 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3540 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 3541 | ohci->ir_context_channels = ~0ULL; |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3542 | ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3543 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3544 | ohci->ir_context_mask = ohci->ir_context_support; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3545 | ohci->n_ir = hweight32(ohci->ir_context_mask); |
| 3546 | size = sizeof(struct iso_context) * ohci->n_ir; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3547 | ohci->ir_context_list = kzalloc(size, GFP_KERNEL); |
| 3548 | |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3549 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3550 | ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3551 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3552 | ohci->it_context_mask = ohci->it_context_support; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3553 | ohci->n_it = hweight32(ohci->it_context_mask); |
| 3554 | size = sizeof(struct iso_context) * ohci->n_it; |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3555 | ohci->it_context_list = kzalloc(size, GFP_KERNEL); |
| 3556 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3557 | if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3558 | err = -ENOMEM; |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3559 | goto fail_contexts; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3560 | } |
| 3561 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3562 | ohci->self_id_cpu = ohci->misc_buffer + PAGE_SIZE/2; |
| 3563 | ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3564 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3565 | bus_options = reg_read(ohci, OHCI1394_BusOptions); |
| 3566 | max_receive = (bus_options >> 12) & 0xf; |
| 3567 | link_speed = bus_options & 0x7; |
| 3568 | guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | |
| 3569 | reg_read(ohci, OHCI1394_GUIDLo); |
| 3570 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3571 | err = fw_card_add(&ohci->card, max_receive, link_speed, guid); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 3572 | if (err) |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3573 | goto fail_contexts; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3574 | |
Stefan Richter | 6fdb2ee | 2010-02-21 17:59:14 +0100 | [diff] [blame] | 3575 | version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; |
| 3576 | fw_notify("Added fw-ohci device %s, OHCI v%x.%x, " |
| 3577 | "%d IR + %d IT contexts, quirks 0x%x\n", |
| 3578 | dev_name(&dev->dev), version >> 16, version & 0xff, |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3579 | ohci->n_ir, ohci->n_it, ohci->quirks); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 3580 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3581 | return 0; |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3582 | |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3583 | fail_contexts: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3584 | kfree(ohci->ir_context_list); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3585 | kfree(ohci->it_context_list); |
| 3586 | context_release(&ohci->at_response_ctx); |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3587 | fail_atreq_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3588 | context_release(&ohci->at_request_ctx); |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3589 | fail_arrsp_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3590 | ar_context_release(&ohci->ar_response_ctx); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3591 | fail_arreq_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3592 | ar_context_release(&ohci->ar_request_ctx); |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3593 | fail_misc_buf: |
| 3594 | dma_free_coherent(ohci->card.device, PAGE_SIZE, |
| 3595 | ohci->misc_buffer, ohci->misc_buffer_bus); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3596 | fail_iounmap: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3597 | pci_iounmap(dev, ohci->registers); |
| 3598 | fail_iomem: |
| 3599 | pci_release_region(dev, 0); |
| 3600 | fail_disable: |
| 3601 | pci_disable_device(dev); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 3602 | fail_free: |
Oleg Drokin | d838d2c0 | 2011-03-11 04:17:27 +0300 | [diff] [blame] | 3603 | kfree(ohci); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3604 | pmac_ohci_off(dev); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3605 | fail: |
| 3606 | if (err == -ENOMEM) |
| 3607 | fw_error("Out of memory\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3608 | |
| 3609 | return err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3610 | } |
| 3611 | |
| 3612 | static void pci_remove(struct pci_dev *dev) |
| 3613 | { |
| 3614 | struct fw_ohci *ohci; |
| 3615 | |
| 3616 | ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | e254a4b | 2007-03-07 12:12:38 -0500 | [diff] [blame] | 3617 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
| 3618 | flush_writes(ohci); |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 3619 | cancel_work_sync(&ohci->bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3620 | fw_core_remove_card(&ohci->card); |
| 3621 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 3622 | /* |
| 3623 | * FIXME: Fail all pending packets here, now that the upper |
| 3624 | * layers can't queue any more. |
| 3625 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3626 | |
| 3627 | software_reset(ohci); |
| 3628 | free_irq(dev->irq, ohci); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3629 | |
| 3630 | if (ohci->next_config_rom && ohci->next_config_rom != ohci->config_rom) |
| 3631 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 3632 | ohci->next_config_rom, ohci->next_config_rom_bus); |
| 3633 | if (ohci->config_rom) |
| 3634 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 3635 | ohci->config_rom, ohci->config_rom_bus); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3636 | ar_context_release(&ohci->ar_request_ctx); |
| 3637 | ar_context_release(&ohci->ar_response_ctx); |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3638 | dma_free_coherent(ohci->card.device, PAGE_SIZE, |
| 3639 | ohci->misc_buffer, ohci->misc_buffer_bus); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3640 | context_release(&ohci->at_request_ctx); |
| 3641 | context_release(&ohci->at_response_ctx); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3642 | kfree(ohci->it_context_list); |
| 3643 | kfree(ohci->ir_context_list); |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 3644 | pci_disable_msi(dev); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3645 | pci_iounmap(dev, ohci->registers); |
| 3646 | pci_release_region(dev, 0); |
| 3647 | pci_disable_device(dev); |
Oleg Drokin | d838d2c0 | 2011-03-11 04:17:27 +0300 | [diff] [blame] | 3648 | kfree(ohci); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3649 | pmac_ohci_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 3650 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3651 | fw_notify("Removed fw-ohci device.\n"); |
| 3652 | } |
| 3653 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3654 | #ifdef CONFIG_PM |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3655 | static int pci_suspend(struct pci_dev *dev, pm_message_t state) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3656 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3657 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3658 | int err; |
| 3659 | |
| 3660 | software_reset(ohci); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3661 | free_irq(dev->irq, ohci); |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 3662 | pci_disable_msi(dev); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3663 | err = pci_save_state(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3664 | if (err) { |
Stefan Richter | 8a8cea2 | 2007-06-09 19:26:22 +0200 | [diff] [blame] | 3665 | fw_error("pci_save_state failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3666 | return err; |
| 3667 | } |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3668 | err = pci_set_power_state(dev, pci_choose_state(dev, state)); |
Stefan Richter | 5511142 | 2007-09-06 09:50:30 +0200 | [diff] [blame] | 3669 | if (err) |
| 3670 | fw_error("pci_set_power_state failed with %d\n", err); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3671 | pmac_ohci_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 3672 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3673 | return 0; |
| 3674 | } |
| 3675 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3676 | static int pci_resume(struct pci_dev *dev) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3677 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3678 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3679 | int err; |
| 3680 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3681 | pmac_ohci_on(dev); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3682 | pci_set_power_state(dev, PCI_D0); |
| 3683 | pci_restore_state(dev); |
| 3684 | err = pci_enable_device(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3685 | if (err) { |
Stefan Richter | 8a8cea2 | 2007-06-09 19:26:22 +0200 | [diff] [blame] | 3686 | fw_error("pci_enable_device failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3687 | return err; |
| 3688 | } |
| 3689 | |
Maxim Levitsky | 8662b6b | 2010-11-29 04:09:49 +0200 | [diff] [blame] | 3690 | /* Some systems don't setup GUID register on resume from ram */ |
| 3691 | if (!reg_read(ohci, OHCI1394_GUIDLo) && |
| 3692 | !reg_read(ohci, OHCI1394_GUIDHi)) { |
| 3693 | reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); |
| 3694 | reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); |
| 3695 | } |
| 3696 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3697 | err = ohci_enable(&ohci->card, NULL, 0); |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3698 | if (err) |
| 3699 | return err; |
| 3700 | |
| 3701 | ohci_resume_iso_dma(ohci); |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3702 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3703 | return 0; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3704 | } |
| 3705 | #endif |
| 3706 | |
Németh Márton | a67483d | 2010-01-10 13:14:26 +0100 | [diff] [blame] | 3707 | static const struct pci_device_id pci_table[] = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3708 | { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_FIREWIRE_OHCI, ~0) }, |
| 3709 | { } |
| 3710 | }; |
| 3711 | |
| 3712 | MODULE_DEVICE_TABLE(pci, pci_table); |
| 3713 | |
| 3714 | static struct pci_driver fw_ohci_pci_driver = { |
| 3715 | .name = ohci_driver_name, |
| 3716 | .id_table = pci_table, |
| 3717 | .probe = pci_probe, |
| 3718 | .remove = pci_remove, |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3719 | #ifdef CONFIG_PM |
| 3720 | .resume = pci_resume, |
| 3721 | .suspend = pci_suspend, |
| 3722 | #endif |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3723 | }; |
| 3724 | |
| 3725 | MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>"); |
| 3726 | MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers"); |
| 3727 | MODULE_LICENSE("GPL"); |
| 3728 | |
Olaf Hering | 1e4c7b0 | 2007-05-05 23:17:13 +0200 | [diff] [blame] | 3729 | /* Provide a module alias so root-on-sbp2 initrds don't break. */ |
| 3730 | #ifndef CONFIG_IEEE1394_OHCI1394_MODULE |
| 3731 | MODULE_ALIAS("ohci1394"); |
| 3732 | #endif |
| 3733 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3734 | static int __init fw_ohci_init(void) |
| 3735 | { |
| 3736 | return pci_register_driver(&fw_ohci_pci_driver); |
| 3737 | } |
| 3738 | |
| 3739 | static void __exit fw_ohci_cleanup(void) |
| 3740 | { |
| 3741 | pci_unregister_driver(&fw_ohci_pci_driver); |
| 3742 | } |
| 3743 | |
| 3744 | module_init(fw_ohci_init); |
| 3745 | module_exit(fw_ohci_cleanup); |