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Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08001menu "Host processor type and features"
2
Al Viro7a78a172007-10-29 04:34:31 +00003source "arch/x86/Kconfig.cpu"
Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08004
5endmenu
6
Paolo 'Blaisorblade' Giarrussoc45166b2005-05-01 08:58:54 -07007config UML_X86
8 bool
9 default y
10
Jeff Dike54d67ee2007-12-01 12:16:28 -080011config X86_32
12 bool
13 default y
14
15config RWSEM_XCHGADD_ALGORITHM
16 def_bool y
17
Paolo 'Blaisorblade' Giarrussoc45166b2005-05-01 08:58:54 -070018config 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 bool
20 default n
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022config 3_LEVEL_PGTABLES
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080023 bool "Three-level pagetables (EXPERIMENTAL)"
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 default n
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080025 depends on EXPERIMENTAL
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 help
27 Three-level pagetables will let UML have more than 4G of physical
28 memory. All the memory that can't be mapped directly will be treated
29 as high memory.
30
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080031 However, this it experimental on 32-bit architectures, so if unsure say
32 N (on x86-64 it's automatically enabled, instead, as it's safe there).
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034config ARCH_HAS_SC_SIGNALS
35 bool
36 default y
37
38config ARCH_REUSE_HOST_VSYSCALL_AREA
39 bool
40 default y
Akinobu Mitaf214ef32006-03-26 01:38:59 -080041
42config GENERIC_HWEIGHT
43 bool
44 default y
45
David Howellsb0b933c2008-02-08 04:19:27 -080046config ARCH_SUPPORTS_AOUT
47 def_bool y