blob: b47e3cf165164ea04aa08265f668a5a199235088 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * Copyright (C) 2002, 2003 Maciej W. Rozycki
9 *
10 * additional sources:
11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 * Revision 1.2
13 *
14 * History:
15 *
16 * v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 * v0.003: Enhanced base address calculation from proposals by
21 * Harald Koerfgen and Thomas Riemer.
22 *
23 * v0.004: lance-regs is pointing at the right addresses, added prom
24 * check. First start of address mapping and DMA.
25 *
26 * v0.005: started to play around with LANCE-DMA. This driver will not
27 * work for non IOASIC lances. HK
28 *
29 * v0.006: added pointer arrays to lance_private and setup routine for
30 * them in dec_lance_init. HK
31 *
32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 * access the init block. This looks like one (short) word at a
34 * time, but the smallest amount the IOASIC can transfer is a
35 * (long) word. So we have a 2-2 padding here. Changed
36 * lance_init_block accordingly. The 16-16 padding for the buffers
37 * seems to be correct. HK
38 *
39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 * v0.009: Module support fixes, multiple interfaces support, various
42 * bits. macro
43 */
44
45#include <linux/config.h>
46#include <linux/crc32.h>
47#include <linux/delay.h>
48#include <linux/errno.h>
49#include <linux/if_ether.h>
50#include <linux/init.h>
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/spinlock.h>
56#include <linux/stddef.h>
57#include <linux/string.h>
58
59#include <asm/addrspace.h>
60#include <asm/dec/interrupts.h>
61#include <asm/dec/ioasic.h>
62#include <asm/dec/ioasic_addrs.h>
63#include <asm/dec/kn01.h>
64#include <asm/dec/machtype.h>
65#include <asm/dec/tc.h>
66#include <asm/system.h>
67
68static char version[] __devinitdata =
69"declance.c: v0.009 by Linux MIPS DECstation task force\n";
70
71MODULE_AUTHOR("Linux MIPS DECstation task force");
72MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
73MODULE_LICENSE("GPL");
74
75/*
76 * card types
77 */
78#define ASIC_LANCE 1
79#define PMAD_LANCE 2
80#define PMAX_LANCE 3
81
82#ifndef CONFIG_TC
83unsigned long system_base;
84unsigned long dmaptr;
85#endif
86
87#define LE_CSR0 0
88#define LE_CSR1 1
89#define LE_CSR2 2
90#define LE_CSR3 3
91
92#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
93
94#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
95#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
96#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
97#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
98#define LE_C0_MERR 0x0800 /* ME: Memory error */
99#define LE_C0_RINT 0x0400 /* Received interrupt */
100#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
101#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
102#define LE_C0_INTR 0x0080 /* Interrupt or error */
103#define LE_C0_INEA 0x0040 /* Interrupt enable */
104#define LE_C0_RXON 0x0020 /* Receiver on */
105#define LE_C0_TXON 0x0010 /* Transmitter on */
106#define LE_C0_TDMD 0x0008 /* Transmitter demand */
107#define LE_C0_STOP 0x0004 /* Stop the card */
108#define LE_C0_STRT 0x0002 /* Start the card */
109#define LE_C0_INIT 0x0001 /* Init the card */
110
111#define LE_C3_BSWP 0x4 /* SWAP */
112#define LE_C3_ACON 0x2 /* ALE Control */
113#define LE_C3_BCON 0x1 /* Byte control */
114
115/* Receive message descriptor 1 */
116#define LE_R1_OWN 0x80 /* Who owns the entry */
117#define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
118#define LE_R1_FRA 0x20 /* FRA: Frame error */
119#define LE_R1_OFL 0x10 /* OFL: Frame overflow */
120#define LE_R1_CRC 0x08 /* CRC error */
121#define LE_R1_BUF 0x04 /* BUF: Buffer error */
122#define LE_R1_SOP 0x02 /* Start of packet */
123#define LE_R1_EOP 0x01 /* End of packet */
124#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
125
126#define LE_T1_OWN 0x80 /* Lance owns the packet */
127#define LE_T1_ERR 0x40 /* Error summary */
128#define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
129#define LE_T1_EONE 0x08 /* Error: one retry needed */
130#define LE_T1_EDEF 0x04 /* Error: deferred */
131#define LE_T1_SOP 0x02 /* Start of packet */
132#define LE_T1_EOP 0x01 /* End of packet */
133#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
134
135#define LE_T3_BUF 0x8000 /* Buffer error */
136#define LE_T3_UFL 0x4000 /* Error underflow */
137#define LE_T3_LCOL 0x1000 /* Error late collision */
138#define LE_T3_CLOS 0x0800 /* Error carrier loss */
139#define LE_T3_RTY 0x0400 /* Error retry */
140#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
141
142/* Define: 2^4 Tx buffers and 2^4 Rx buffers */
143
144#ifndef LANCE_LOG_TX_BUFFERS
145#define LANCE_LOG_TX_BUFFERS 4
146#define LANCE_LOG_RX_BUFFERS 4
147#endif
148
149#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
150#define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
151
152#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
153#define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
154
155#define PKT_BUF_SZ 1536
156#define RX_BUFF_SIZE PKT_BUF_SZ
157#define TX_BUFF_SIZE PKT_BUF_SZ
158
159#undef TEST_HITS
160#define ZERO 0
161
162/* The DS2000/3000 have a linear 64 KB buffer.
163
164 * The PMAD-AA has 128 kb buffer on-board.
165 *
166 * The IOASIC LANCE devices use a shared memory region. This region as seen
167 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
168 * The LANCE sees this as a 64 KB long continuous memory region.
169 *
170 * The LANCE's DMA address is used as an index in this buffer and DMA takes
171 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
172 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
173 * by a 16 byte gap :-(.
174 */
175
176struct lance_rx_desc {
177 unsigned short rmd0; /* low address of packet */
178 short gap0;
179 unsigned char rmd1_hadr; /* high address of packet */
180 unsigned char rmd1_bits; /* descriptor bits */
181 short gap1;
182 short length; /* 2s complement (negative!)
183 of buffer length */
184 short gap2;
185 unsigned short mblength; /* actual number of bytes received */
186 short gap3;
187};
188
189struct lance_tx_desc {
190 unsigned short tmd0; /* low address of packet */
191 short gap0;
192 unsigned char tmd1_hadr; /* high address of packet */
193 unsigned char tmd1_bits; /* descriptor bits */
194 short gap1;
195 short length; /* 2s complement (negative!)
196 of buffer length */
197 short gap2;
198 unsigned short misc;
199 short gap3;
200};
201
202
203/* First part of the LANCE initialization block, described in databook. */
204struct lance_init_block {
205 unsigned short mode; /* pre-set mode (reg. 15) */
206 short gap0;
207
208 unsigned char phys_addr[12]; /* physical ethernet address
209 only 0, 1, 4, 5, 8, 9 are valid
210 2, 3, 6, 7, 10, 11 are gaps */
211 unsigned short filter[8]; /* multicast filter
212 only 0, 2, 4, 6 are valid
213 1, 3, 5, 7 are gaps */
214
215 /* Receive and transmit ring base, along with extra bits. */
216 unsigned short rx_ptr; /* receive descriptor addr */
217 short gap1;
218 unsigned short rx_len; /* receive len and high addr */
219 short gap2;
220 unsigned short tx_ptr; /* transmit descriptor addr */
221 short gap3;
222 unsigned short tx_len; /* transmit len and high addr */
223 short gap4;
224 short gap5[8];
225
226 /* The buffer descriptors */
227 struct lance_rx_desc brx_ring[RX_RING_SIZE];
228 struct lance_tx_desc btx_ring[TX_RING_SIZE];
229};
230
231#define BUF_OFFSET_CPU sizeof(struct lance_init_block)
232#define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
233
234#define libdesc_offset(rt, elem) \
235((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
236
237/*
238 * This works *only* for the ring descriptors
239 */
Ralf Baechle6684b4e2005-10-10 14:51:06 +0100240#define LANCE_ADDR(x) (CPHYSADDR(x) >> 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241
242struct lance_private {
243 struct net_device *next;
244 int type;
245 int slot;
246 int dma_irq;
247 volatile struct lance_regs *ll;
248 volatile struct lance_init_block *init_block;
249
250 spinlock_t lock;
251
252 int rx_new, tx_new;
253 int rx_old, tx_old;
254
255 struct net_device_stats stats;
256
257 unsigned short busmaster_regval;
258
259 struct timer_list multicast_timer;
260
261 /* Pointers to the ring buffers as seen from the CPU */
262 char *rx_buf_ptr_cpu[RX_RING_SIZE];
263 char *tx_buf_ptr_cpu[TX_RING_SIZE];
264
265 /* Pointers to the ring buffers as seen from the LANCE */
266 char *rx_buf_ptr_lnc[RX_RING_SIZE];
267 char *tx_buf_ptr_lnc[TX_RING_SIZE];
268};
269
270#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
271 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
272 lp->tx_old - lp->tx_new-1)
273
274/* The lance control ports are at an absolute address, machine and tc-slot
275 * dependent.
276 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
277 * so we have to give the structure an extra member making rap pointing
278 * at the right address
279 */
280struct lance_regs {
281 volatile unsigned short rdp; /* register data port */
282 unsigned short pad;
283 volatile unsigned short rap; /* register address port */
284};
285
286int dec_lance_debug = 2;
287
288static struct net_device *root_lance_dev;
289
290static inline void writereg(volatile unsigned short *regptr, short value)
291{
292 *regptr = value;
293 iob();
294}
295
296/* Load the CSR registers */
297static void load_csrs(struct lance_private *lp)
298{
299 volatile struct lance_regs *ll = lp->ll;
300 int leptr;
301
302 /* The address space as seen from the LANCE
303 * begins at address 0. HK
304 */
305 leptr = 0;
306
307 writereg(&ll->rap, LE_CSR1);
308 writereg(&ll->rdp, (leptr & 0xFFFF));
309 writereg(&ll->rap, LE_CSR2);
310 writereg(&ll->rdp, leptr >> 16);
311 writereg(&ll->rap, LE_CSR3);
312 writereg(&ll->rdp, lp->busmaster_regval);
313
314 /* Point back to csr0 */
315 writereg(&ll->rap, LE_CSR0);
316}
317
318/*
319 * Our specialized copy routines
320 *
321 */
322void cp_to_buf(const int type, void *to, const void *from, int len)
323{
324 unsigned short *tp, *fp, clen;
325 unsigned char *rtp, *rfp;
326
327 if (type == PMAX_LANCE) {
328 clen = len >> 1;
329 tp = (unsigned short *) to;
330 fp = (unsigned short *) from;
331
332 while (clen--) {
333 *tp++ = *fp++;
334 tp++;
335 }
336
337 clen = len & 1;
338 rtp = (unsigned char *) tp;
339 rfp = (unsigned char *) fp;
340 while (clen--) {
341 *rtp++ = *rfp++;
342 }
343 } else {
344 /*
345 * copy 16 Byte chunks
346 */
347 clen = len >> 4;
348 tp = (unsigned short *) to;
349 fp = (unsigned short *) from;
350 while (clen--) {
351 *tp++ = *fp++;
352 *tp++ = *fp++;
353 *tp++ = *fp++;
354 *tp++ = *fp++;
355 *tp++ = *fp++;
356 *tp++ = *fp++;
357 *tp++ = *fp++;
358 *tp++ = *fp++;
359 tp += 8;
360 }
361
362 /*
363 * do the rest, if any.
364 */
365 clen = len & 15;
366 rtp = (unsigned char *) tp;
367 rfp = (unsigned char *) fp;
368 while (clen--) {
369 *rtp++ = *rfp++;
370 }
371 }
372
373 iob();
374}
375
376void cp_from_buf(const int type, void *to, const void *from, int len)
377{
378 unsigned short *tp, *fp, clen;
379 unsigned char *rtp, *rfp;
380
381 if (type == PMAX_LANCE) {
382 clen = len >> 1;
383 tp = (unsigned short *) to;
384 fp = (unsigned short *) from;
385 while (clen--) {
386 *tp++ = *fp++;
387 fp++;
388 }
389
390 clen = len & 1;
391
392 rtp = (unsigned char *) tp;
393 rfp = (unsigned char *) fp;
394
395 while (clen--) {
396 *rtp++ = *rfp++;
397 }
398 } else {
399
400 /*
401 * copy 16 Byte chunks
402 */
403 clen = len >> 4;
404 tp = (unsigned short *) to;
405 fp = (unsigned short *) from;
406 while (clen--) {
407 *tp++ = *fp++;
408 *tp++ = *fp++;
409 *tp++ = *fp++;
410 *tp++ = *fp++;
411 *tp++ = *fp++;
412 *tp++ = *fp++;
413 *tp++ = *fp++;
414 *tp++ = *fp++;
415 fp += 8;
416 }
417
418 /*
419 * do the rest, if any.
420 */
421 clen = len & 15;
422 rtp = (unsigned char *) tp;
423 rfp = (unsigned char *) fp;
424 while (clen--) {
425 *rtp++ = *rfp++;
426 }
427
428
429 }
430
431}
432
433/* Setup the Lance Rx and Tx rings */
434static void lance_init_ring(struct net_device *dev)
435{
436 struct lance_private *lp = netdev_priv(dev);
437 volatile struct lance_init_block *ib;
438 int leptr;
439 int i;
440
441 ib = (struct lance_init_block *) (dev->mem_start);
442
443 /* Lock out other processes while setting up hardware */
444 netif_stop_queue(dev);
445 lp->rx_new = lp->tx_new = 0;
446 lp->rx_old = lp->tx_old = 0;
447
448 /* Copy the ethernet address to the lance init block.
449 * XXX bit 0 of the physical address registers has to be zero
450 */
451 ib->phys_addr[0] = dev->dev_addr[0];
452 ib->phys_addr[1] = dev->dev_addr[1];
453 ib->phys_addr[4] = dev->dev_addr[2];
454 ib->phys_addr[5] = dev->dev_addr[3];
455 ib->phys_addr[8] = dev->dev_addr[4];
456 ib->phys_addr[9] = dev->dev_addr[5];
457 /* Setup the initialization block */
458
459 /* Setup rx descriptor pointer */
460 leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
461 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
462 ib->rx_ptr = leptr;
463 if (ZERO)
464 printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
465
466 /* Setup tx descriptor pointer */
467 leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
468 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
469 ib->tx_ptr = leptr;
470 if (ZERO)
471 printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
472
473 if (ZERO)
474 printk("TX rings:\n");
475
476 /* Setup the Tx ring entries */
477 for (i = 0; i < TX_RING_SIZE; i++) {
478 leptr = (int) lp->tx_buf_ptr_lnc[i];
479 ib->btx_ring[i].tmd0 = leptr;
480 ib->btx_ring[i].tmd1_hadr = leptr >> 16;
481 ib->btx_ring[i].tmd1_bits = 0;
482 ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
483 ib->btx_ring[i].misc = 0;
484 if (i < 3 && ZERO)
485 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
486 }
487
488 /* Setup the Rx ring entries */
489 if (ZERO)
490 printk("RX rings:\n");
491 for (i = 0; i < RX_RING_SIZE; i++) {
492 leptr = (int) lp->rx_buf_ptr_lnc[i];
493 ib->brx_ring[i].rmd0 = leptr;
494 ib->brx_ring[i].rmd1_hadr = leptr >> 16;
495 ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
496 ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
497 ib->brx_ring[i].mblength = 0;
498 if (i < 3 && ZERO)
499 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
500 }
501 iob();
502}
503
504static int init_restart_lance(struct lance_private *lp)
505{
506 volatile struct lance_regs *ll = lp->ll;
507 int i;
508
509 writereg(&ll->rap, LE_CSR0);
510 writereg(&ll->rdp, LE_C0_INIT);
511
512 /* Wait for the lance to complete initialization */
513 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
514 udelay(10);
515 }
516 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
517 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
518 return -1;
519 }
520 if ((ll->rdp & LE_C0_ERR)) {
521 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
522 return -1;
523 }
524 writereg(&ll->rdp, LE_C0_IDON);
525 writereg(&ll->rdp, LE_C0_STRT);
526 writereg(&ll->rdp, LE_C0_INEA);
527
528 return 0;
529}
530
531static int lance_rx(struct net_device *dev)
532{
533 struct lance_private *lp = netdev_priv(dev);
534 volatile struct lance_init_block *ib;
535 volatile struct lance_rx_desc *rd = 0;
536 unsigned char bits;
537 int len = 0;
538 struct sk_buff *skb = 0;
539 ib = (struct lance_init_block *) (dev->mem_start);
540
541#ifdef TEST_HITS
542 {
543 int i;
544
545 printk("[");
546 for (i = 0; i < RX_RING_SIZE; i++) {
547 if (i == lp->rx_new)
548 printk("%s", ib->brx_ring[i].rmd1_bits &
549 LE_R1_OWN ? "_" : "X");
550 else
551 printk("%s", ib->brx_ring[i].rmd1_bits &
552 LE_R1_OWN ? "." : "1");
553 }
554 printk("]");
555 }
556#endif
557
558 for (rd = &ib->brx_ring[lp->rx_new];
559 !((bits = rd->rmd1_bits) & LE_R1_OWN);
560 rd = &ib->brx_ring[lp->rx_new]) {
561
562 /* We got an incomplete frame? */
563 if ((bits & LE_R1_POK) != LE_R1_POK) {
564 lp->stats.rx_over_errors++;
565 lp->stats.rx_errors++;
566 } else if (bits & LE_R1_ERR) {
567 /* Count only the end frame as a rx error,
568 * not the beginning
569 */
570 if (bits & LE_R1_BUF)
571 lp->stats.rx_fifo_errors++;
572 if (bits & LE_R1_CRC)
573 lp->stats.rx_crc_errors++;
574 if (bits & LE_R1_OFL)
575 lp->stats.rx_over_errors++;
576 if (bits & LE_R1_FRA)
577 lp->stats.rx_frame_errors++;
578 if (bits & LE_R1_EOP)
579 lp->stats.rx_errors++;
580 } else {
581 len = (rd->mblength & 0xfff) - 4;
582 skb = dev_alloc_skb(len + 2);
583
584 if (skb == 0) {
585 printk("%s: Memory squeeze, deferring packet.\n",
586 dev->name);
587 lp->stats.rx_dropped++;
588 rd->mblength = 0;
589 rd->rmd1_bits = LE_R1_OWN;
590 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
591 return 0;
592 }
593 lp->stats.rx_bytes += len;
594
595 skb->dev = dev;
596 skb_reserve(skb, 2); /* 16 byte align */
597 skb_put(skb, len); /* make room */
598
599 cp_from_buf(lp->type, skb->data,
600 (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
601 len);
602
603 skb->protocol = eth_type_trans(skb, dev);
604 netif_rx(skb);
605 dev->last_rx = jiffies;
606 lp->stats.rx_packets++;
607 }
608
609 /* Return the packet to the pool */
610 rd->mblength = 0;
611 rd->length = -RX_BUFF_SIZE | 0xf000;
612 rd->rmd1_bits = LE_R1_OWN;
613 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
614 }
615 return 0;
616}
617
618static void lance_tx(struct net_device *dev)
619{
620 struct lance_private *lp = netdev_priv(dev);
621 volatile struct lance_init_block *ib;
622 volatile struct lance_regs *ll = lp->ll;
623 volatile struct lance_tx_desc *td;
624 int i, j;
625 int status;
626 ib = (struct lance_init_block *) (dev->mem_start);
627 j = lp->tx_old;
628
629 spin_lock(&lp->lock);
630
631 for (i = j; i != lp->tx_new; i = j) {
632 td = &ib->btx_ring[i];
633 /* If we hit a packet not owned by us, stop */
634 if (td->tmd1_bits & LE_T1_OWN)
635 break;
636
637 if (td->tmd1_bits & LE_T1_ERR) {
638 status = td->misc;
639
640 lp->stats.tx_errors++;
641 if (status & LE_T3_RTY)
642 lp->stats.tx_aborted_errors++;
643 if (status & LE_T3_LCOL)
644 lp->stats.tx_window_errors++;
645
646 if (status & LE_T3_CLOS) {
647 lp->stats.tx_carrier_errors++;
648 printk("%s: Carrier Lost\n", dev->name);
649 /* Stop the lance */
650 writereg(&ll->rap, LE_CSR0);
651 writereg(&ll->rdp, LE_C0_STOP);
652 lance_init_ring(dev);
653 load_csrs(lp);
654 init_restart_lance(lp);
655 goto out;
656 }
657 /* Buffer errors and underflows turn off the
658 * transmitter, restart the adapter.
659 */
660 if (status & (LE_T3_BUF | LE_T3_UFL)) {
661 lp->stats.tx_fifo_errors++;
662
663 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
664 dev->name);
665 /* Stop the lance */
666 writereg(&ll->rap, LE_CSR0);
667 writereg(&ll->rdp, LE_C0_STOP);
668 lance_init_ring(dev);
669 load_csrs(lp);
670 init_restart_lance(lp);
671 goto out;
672 }
673 } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
674 /*
675 * So we don't count the packet more than once.
676 */
677 td->tmd1_bits &= ~(LE_T1_POK);
678
679 /* One collision before packet was sent. */
680 if (td->tmd1_bits & LE_T1_EONE)
681 lp->stats.collisions++;
682
683 /* More than one collision, be optimistic. */
684 if (td->tmd1_bits & LE_T1_EMORE)
685 lp->stats.collisions += 2;
686
687 lp->stats.tx_packets++;
688 }
689 j = (j + 1) & TX_RING_MOD_MASK;
690 }
691 lp->tx_old = j;
692out:
693 if (netif_queue_stopped(dev) &&
694 TX_BUFFS_AVAIL > 0)
695 netif_wake_queue(dev);
696
697 spin_unlock(&lp->lock);
698}
699
Ralf Baechleda848ec2005-10-10 14:51:01 +0100700static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id,
701 struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702{
703 struct net_device *dev = (struct net_device *) dev_id;
704
705 printk("%s: DMA error\n", dev->name);
Ralf Baechleda848ec2005-10-10 14:51:01 +0100706 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707}
708
709static irqreturn_t
710lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
711{
712 struct net_device *dev = (struct net_device *) dev_id;
713 struct lance_private *lp = netdev_priv(dev);
714 volatile struct lance_regs *ll = lp->ll;
715 int csr0;
716
717 writereg(&ll->rap, LE_CSR0);
718 csr0 = ll->rdp;
719
720 /* Acknowledge all the interrupt sources ASAP */
721 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
722
723 if ((csr0 & LE_C0_ERR)) {
724 /* Clear the error condition */
725 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
726 LE_C0_CERR | LE_C0_MERR);
727 }
728 if (csr0 & LE_C0_RINT)
729 lance_rx(dev);
730
731 if (csr0 & LE_C0_TINT)
732 lance_tx(dev);
733
734 if (csr0 & LE_C0_BABL)
735 lp->stats.tx_errors++;
736
737 if (csr0 & LE_C0_MISS)
738 lp->stats.rx_errors++;
739
740 if (csr0 & LE_C0_MERR) {
741 printk("%s: Memory error, status %04x\n", dev->name, csr0);
742
743 writereg(&ll->rdp, LE_C0_STOP);
744
745 lance_init_ring(dev);
746 load_csrs(lp);
747 init_restart_lance(lp);
748 netif_wake_queue(dev);
749 }
750
751 writereg(&ll->rdp, LE_C0_INEA);
752 writereg(&ll->rdp, LE_C0_INEA);
753 return IRQ_HANDLED;
754}
755
756struct net_device *last_dev = 0;
757
758static int lance_open(struct net_device *dev)
759{
760 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
761 struct lance_private *lp = netdev_priv(dev);
762 volatile struct lance_regs *ll = lp->ll;
763 int status = 0;
764
765 last_dev = dev;
766
767 /* Stop the Lance */
768 writereg(&ll->rap, LE_CSR0);
769 writereg(&ll->rdp, LE_C0_STOP);
770
771 /* Set mode and clear multicast filter only at device open,
772 * so that lance_init_ring() called at any error will not
773 * forget multicast filters.
774 *
775 * BTW it is common bug in all lance drivers! --ANK
776 */
777 ib->mode = 0;
778 ib->filter [0] = 0;
779 ib->filter [2] = 0;
780 ib->filter [4] = 0;
781 ib->filter [6] = 0;
782
783 lance_init_ring(dev);
784 load_csrs(lp);
785
786 netif_start_queue(dev);
787
788 /* Associate IRQ with lance_interrupt */
789 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
790 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
791 return -EAGAIN;
792 }
793 if (lp->dma_irq >= 0) {
794 unsigned long flags;
795
796 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
797 "lance error", dev)) {
798 free_irq(dev->irq, dev);
799 printk("%s: Can't get DMA IRQ %d\n", dev->name,
800 lp->dma_irq);
801 return -EAGAIN;
802 }
803
804 spin_lock_irqsave(&ioasic_ssr_lock, flags);
805
806 fast_mb();
807 /* Enable I/O ASIC LANCE DMA. */
808 ioasic_write(IO_REG_SSR,
809 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
810
811 fast_mb();
812 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
813 }
814
815 status = init_restart_lance(lp);
816 return status;
817}
818
819static int lance_close(struct net_device *dev)
820{
821 struct lance_private *lp = netdev_priv(dev);
822 volatile struct lance_regs *ll = lp->ll;
823
824 netif_stop_queue(dev);
825 del_timer_sync(&lp->multicast_timer);
826
827 /* Stop the card */
828 writereg(&ll->rap, LE_CSR0);
829 writereg(&ll->rdp, LE_C0_STOP);
830
831 if (lp->dma_irq >= 0) {
832 unsigned long flags;
833
834 spin_lock_irqsave(&ioasic_ssr_lock, flags);
835
836 fast_mb();
837 /* Disable I/O ASIC LANCE DMA. */
838 ioasic_write(IO_REG_SSR,
839 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
840
841 fast_iob();
842 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
843
844 free_irq(lp->dma_irq, dev);
845 }
846 free_irq(dev->irq, dev);
847 return 0;
848}
849
850static inline int lance_reset(struct net_device *dev)
851{
852 struct lance_private *lp = netdev_priv(dev);
853 volatile struct lance_regs *ll = lp->ll;
854 int status;
855
856 /* Stop the lance */
857 writereg(&ll->rap, LE_CSR0);
858 writereg(&ll->rdp, LE_C0_STOP);
859
860 lance_init_ring(dev);
861 load_csrs(lp);
862 dev->trans_start = jiffies;
863 status = init_restart_lance(lp);
864 return status;
865}
866
867static void lance_tx_timeout(struct net_device *dev)
868{
869 struct lance_private *lp = netdev_priv(dev);
870 volatile struct lance_regs *ll = lp->ll;
871
872 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
873 dev->name, ll->rdp);
874 lance_reset(dev);
875 netif_wake_queue(dev);
876}
877
878static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
879{
880 struct lance_private *lp = netdev_priv(dev);
881 volatile struct lance_regs *ll = lp->ll;
882 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
883 int entry, skblen, len;
884
885 skblen = skb->len;
886
887 len = skblen;
888
889 if (len < ETH_ZLEN) {
890 skb = skb_padto(skb, ETH_ZLEN);
891 if (skb == NULL)
892 return 0;
893 len = ETH_ZLEN;
894 }
895
896 lp->stats.tx_bytes += len;
897
898 entry = lp->tx_new & TX_RING_MOD_MASK;
899 ib->btx_ring[entry].length = (-len);
900 ib->btx_ring[entry].misc = 0;
901
902 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
903 skblen);
904
905 /* Clear the slack of the packet, do I need this? */
906 /* For a firewall it's a good idea - AC */
907/*
908 if (len != skblen)
909 memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
910 */
911
912 /* Now, give the packet to the lance */
913 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
914 lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
915
916 if (TX_BUFFS_AVAIL <= 0)
917 netif_stop_queue(dev);
918
919 /* Kick the lance: transmit now */
920 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
921
922 spin_unlock_irq(&lp->lock);
923
924 dev->trans_start = jiffies;
925 dev_kfree_skb(skb);
926
927 return 0;
928}
929
930static struct net_device_stats *lance_get_stats(struct net_device *dev)
931{
932 struct lance_private *lp = netdev_priv(dev);
933
934 return &lp->stats;
935}
936
937static void lance_load_multicast(struct net_device *dev)
938{
939 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
940 volatile u16 *mcast_table = (u16 *) & ib->filter;
941 struct dev_mc_list *dmi = dev->mc_list;
942 char *addrs;
943 int i;
944 u32 crc;
945
946 /* set all multicast bits */
947 if (dev->flags & IFF_ALLMULTI) {
948 ib->filter[0] = 0xffff;
949 ib->filter[2] = 0xffff;
950 ib->filter[4] = 0xffff;
951 ib->filter[6] = 0xffff;
952 return;
953 }
954 /* clear the multicast filter */
955 ib->filter[0] = 0;
956 ib->filter[2] = 0;
957 ib->filter[4] = 0;
958 ib->filter[6] = 0;
959
960 /* Add addresses */
961 for (i = 0; i < dev->mc_count; i++) {
962 addrs = dmi->dmi_addr;
963 dmi = dmi->next;
964
965 /* multicast address? */
966 if (!(*addrs & 1))
967 continue;
968
969 crc = ether_crc_le(ETH_ALEN, addrs);
970 crc = crc >> 26;
971 mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
972 }
973 return;
974}
975
976static void lance_set_multicast(struct net_device *dev)
977{
978 struct lance_private *lp = netdev_priv(dev);
979 volatile struct lance_init_block *ib;
980 volatile struct lance_regs *ll = lp->ll;
981
982 ib = (struct lance_init_block *) (dev->mem_start);
983
984 if (!netif_running(dev))
985 return;
986
987 if (lp->tx_old != lp->tx_new) {
988 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
989 netif_wake_queue(dev);
990 return;
991 }
992
993 netif_stop_queue(dev);
994
995 writereg(&ll->rap, LE_CSR0);
996 writereg(&ll->rdp, LE_C0_STOP);
997
998 lance_init_ring(dev);
999
1000 if (dev->flags & IFF_PROMISC) {
1001 ib->mode |= LE_MO_PROM;
1002 } else {
1003 ib->mode &= ~LE_MO_PROM;
1004 lance_load_multicast(dev);
1005 }
1006 load_csrs(lp);
1007 init_restart_lance(lp);
1008 netif_wake_queue(dev);
1009}
1010
1011static void lance_set_multicast_retry(unsigned long _opaque)
1012{
1013 struct net_device *dev = (struct net_device *) _opaque;
1014
1015 lance_set_multicast(dev);
1016}
1017
1018static int __init dec_lance_init(const int type, const int slot)
1019{
1020 static unsigned version_printed;
1021 static const char fmt[] = "declance%d";
1022 char name[10];
1023 struct net_device *dev;
1024 struct lance_private *lp;
1025 volatile struct lance_regs *ll;
1026 int i, ret;
1027 unsigned long esar_base;
1028 unsigned char *esar;
1029
1030#ifndef CONFIG_TC
1031 system_base = KN01_LANCE_BASE;
1032#endif
1033
1034 if (dec_lance_debug && version_printed++ == 0)
1035 printk(version);
1036
1037 i = 0;
1038 dev = root_lance_dev;
1039 while (dev) {
1040 i++;
1041 lp = (struct lance_private *)dev->priv;
1042 dev = lp->next;
1043 }
1044 snprintf(name, sizeof(name), fmt, i);
1045
1046 dev = alloc_etherdev(sizeof(struct lance_private));
1047 if (!dev) {
1048 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
1049 name);
1050 ret = -ENOMEM;
1051 goto err_out;
1052 }
1053
1054 /*
1055 * alloc_etherdev ensures the data structures used by the LANCE
1056 * are aligned.
1057 */
1058 lp = netdev_priv(dev);
1059 spin_lock_init(&lp->lock);
1060
1061 lp->type = type;
1062 lp->slot = slot;
1063 switch (type) {
1064#ifdef CONFIG_TC
1065 case ASIC_LANCE:
1066 dev->base_addr = system_base + IOASIC_LANCE;
1067
1068 /* buffer space for the on-board LANCE shared memory */
1069 /*
1070 * FIXME: ugly hack!
1071 */
Ralf Baechle45695042005-10-10 14:51:11 +01001072 dev->mem_start = CKSEG1ADDR(0x00020000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001073 dev->mem_end = dev->mem_start + 0x00020000;
1074 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1075 esar_base = system_base + IOASIC_ESAR;
1076
1077 /* Workaround crash with booting KN04 2.1k from Disk */
1078 memset((void *)dev->mem_start, 0,
1079 dev->mem_end - dev->mem_start);
1080
1081 /*
1082 * setup the pointer arrays, this sucks [tm] :-(
1083 */
1084 for (i = 0; i < RX_RING_SIZE; i++) {
1085 lp->rx_buf_ptr_cpu[i] =
1086 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1087 2 * i * RX_BUFF_SIZE);
1088 lp->rx_buf_ptr_lnc[i] =
1089 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1090 }
1091 for (i = 0; i < TX_RING_SIZE; i++) {
1092 lp->tx_buf_ptr_cpu[i] =
1093 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1094 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1095 2 * i * TX_BUFF_SIZE);
1096 lp->tx_buf_ptr_lnc[i] =
1097 (char *)(BUF_OFFSET_LNC +
1098 RX_RING_SIZE * RX_BUFF_SIZE +
1099 i * TX_BUFF_SIZE);
1100 }
1101
1102 /* Setup I/O ASIC LANCE DMA. */
1103 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1104 ioasic_write(IO_REG_LANCE_DMA_P,
Ralf Baechle6684b4e2005-10-10 14:51:06 +01001105 CPHYSADDR(dev->mem_start) << 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001106
1107 break;
1108
1109 case PMAD_LANCE:
1110 claim_tc_card(slot);
1111
1112 dev->mem_start = get_tc_base_addr(slot);
1113 dev->base_addr = dev->mem_start + 0x100000;
1114 dev->irq = get_tc_irq_nr(slot);
1115 esar_base = dev->mem_start + 0x1c0002;
1116 lp->dma_irq = -1;
1117
1118 for (i = 0; i < RX_RING_SIZE; i++) {
1119 lp->rx_buf_ptr_cpu[i] =
1120 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1121 i * RX_BUFF_SIZE);
1122 lp->rx_buf_ptr_lnc[i] =
1123 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1124 }
1125 for (i = 0; i < TX_RING_SIZE; i++) {
1126 lp->tx_buf_ptr_cpu[i] =
1127 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1128 RX_RING_SIZE * RX_BUFF_SIZE +
1129 i * TX_BUFF_SIZE);
1130 lp->tx_buf_ptr_lnc[i] =
1131 (char *)(BUF_OFFSET_LNC +
1132 RX_RING_SIZE * RX_BUFF_SIZE +
1133 i * TX_BUFF_SIZE);
1134 }
1135
1136 break;
1137#endif
1138
1139 case PMAX_LANCE:
1140 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1141 dev->base_addr = KN01_LANCE_BASE;
1142 dev->mem_start = KN01_LANCE_BASE + 0x01000000;
1143 esar_base = KN01_RTC_BASE + 1;
1144 lp->dma_irq = -1;
1145
1146 /*
1147 * setup the pointer arrays, this sucks [tm] :-(
1148 */
1149 for (i = 0; i < RX_RING_SIZE; i++) {
1150 lp->rx_buf_ptr_cpu[i] =
1151 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1152 2 * i * RX_BUFF_SIZE);
1153 lp->rx_buf_ptr_lnc[i] =
1154 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1155 }
1156 for (i = 0; i < TX_RING_SIZE; i++) {
1157 lp->tx_buf_ptr_cpu[i] =
1158 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1159 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1160 2 * i * TX_BUFF_SIZE);
1161 lp->tx_buf_ptr_lnc[i] =
1162 (char *)(BUF_OFFSET_LNC +
1163 RX_RING_SIZE * RX_BUFF_SIZE +
1164 i * TX_BUFF_SIZE);
1165 }
1166
1167 break;
1168
1169 default:
1170 printk(KERN_ERR "%s: declance_init called with unknown type\n",
1171 name);
1172 ret = -ENODEV;
1173 goto err_out_free_dev;
1174 }
1175
1176 ll = (struct lance_regs *) dev->base_addr;
1177 esar = (unsigned char *) esar_base;
1178
1179 /* prom checks */
1180 /* First, check for test pattern */
1181 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1182 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1183 printk(KERN_ERR
1184 "%s: Ethernet station address prom not found!\n",
1185 name);
1186 ret = -ENODEV;
1187 goto err_out_free_dev;
1188 }
1189 /* Check the prom contents */
1190 for (i = 0; i < 8; i++) {
1191 if (esar[i * 4] != esar[0x3c - i * 4] &&
1192 esar[i * 4] != esar[0x40 + i * 4] &&
1193 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1194 printk(KERN_ERR "%s: Something is wrong with the "
1195 "ethernet station address prom!\n", name);
1196 ret = -ENODEV;
1197 goto err_out_free_dev;
1198 }
1199 }
1200
1201 /* Copy the ethernet address to the device structure, later to the
1202 * lance initialization block so the lance gets it every time it's
1203 * (re)initialized.
1204 */
1205 switch (type) {
1206 case ASIC_LANCE:
1207 printk("%s: IOASIC onboard LANCE, addr = ", name);
1208 break;
1209 case PMAD_LANCE:
1210 printk("%s: PMAD-AA, addr = ", name);
1211 break;
1212 case PMAX_LANCE:
1213 printk("%s: PMAX onboard LANCE, addr = ", name);
1214 break;
1215 }
1216 for (i = 0; i < 6; i++) {
1217 dev->dev_addr[i] = esar[i * 4];
1218 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1219 }
1220
1221 printk(" irq = %d\n", dev->irq);
1222
1223 dev->open = &lance_open;
1224 dev->stop = &lance_close;
1225 dev->hard_start_xmit = &lance_start_xmit;
1226 dev->tx_timeout = &lance_tx_timeout;
1227 dev->watchdog_timeo = 5*HZ;
1228 dev->get_stats = &lance_get_stats;
1229 dev->set_multicast_list = &lance_set_multicast;
1230
1231 /* lp->ll is the location of the registers for lance card */
1232 lp->ll = ll;
1233
1234 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1235 * specification.
1236 */
1237 lp->busmaster_regval = 0;
1238
1239 dev->dma = 0;
1240
1241 /* We cannot sleep if the chip is busy during a
1242 * multicast list update event, because such events
1243 * can occur from interrupts (ex. IPv6). So we
1244 * use a timer to try again later when necessary. -DaveM
1245 */
1246 init_timer(&lp->multicast_timer);
1247 lp->multicast_timer.data = (unsigned long) dev;
1248 lp->multicast_timer.function = &lance_set_multicast_retry;
1249
1250 ret = register_netdev(dev);
1251 if (ret) {
1252 printk(KERN_ERR
1253 "%s: Unable to register netdev, aborting.\n", name);
1254 goto err_out_free_dev;
1255 }
1256
1257 lp->next = root_lance_dev;
1258 root_lance_dev = dev;
1259
1260 printk("%s: registered as %s.\n", name, dev->name);
1261 return 0;
1262
1263err_out_free_dev:
1264 kfree(dev);
1265
1266err_out:
1267 return ret;
1268}
1269
1270
1271/* Find all the lance cards on the system and initialize them */
1272static int __init dec_lance_probe(void)
1273{
1274 int count = 0;
1275
1276 /* Scan slots for PMAD-AA cards first. */
1277#ifdef CONFIG_TC
1278 if (TURBOCHANNEL) {
1279 int slot;
1280
1281 while ((slot = search_tc_card("PMAD-AA")) >= 0) {
1282 if (dec_lance_init(PMAD_LANCE, slot) < 0)
1283 break;
1284 count++;
1285 }
1286 }
1287#endif
1288
1289 /* Then handle onboard devices. */
1290 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1291 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1292#ifdef CONFIG_TC
1293 if (dec_lance_init(ASIC_LANCE, -1) >= 0)
1294 count++;
1295#endif
1296 } else if (!TURBOCHANNEL) {
1297 if (dec_lance_init(PMAX_LANCE, -1) >= 0)
1298 count++;
1299 }
1300 }
1301
1302 return (count > 0) ? 0 : -ENODEV;
1303}
1304
1305static void __exit dec_lance_cleanup(void)
1306{
1307 while (root_lance_dev) {
1308 struct net_device *dev = root_lance_dev;
1309 struct lance_private *lp = netdev_priv(dev);
1310 unregister_netdev(dev);
1311#ifdef CONFIG_TC
1312 if (lp->slot >= 0)
1313 release_tc_card(lp->slot);
1314#endif
1315 root_lance_dev = lp->next;
1316 free_netdev(dev);
1317 }
1318}
1319
1320module_init(dec_lance_probe);
1321module_exit(dec_lance_cleanup);