Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1 | /* |
| 2 | * driver/mfd/asic3.c |
| 3 | * |
| 4 | * Compaq ASIC3 support. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Copyright 2001 Compaq Computer Corporation. |
| 11 | * Copyright 2004-2005 Phil Blundell |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 12 | * Copyright 2007-2008 OpenedHand Ltd. |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 13 | * |
| 14 | * Authors: Phil Blundell <pb@handhelds.org>, |
| 15 | * Samuel Ortiz <sameo@openedhand.com> |
| 16 | * |
| 17 | */ |
| 18 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 19 | #include <linux/kernel.h> |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 20 | #include <linux/delay.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 21 | #include <linux/irq.h> |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 22 | #include <linux/gpio.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 23 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 25 | #include <linux/spinlock.h> |
| 26 | #include <linux/platform_device.h> |
| 27 | |
| 28 | #include <linux/mfd/asic3.h> |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 29 | #include <linux/mfd/core.h> |
| 30 | #include <linux/mfd/ds1wm.h> |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 31 | #include <linux/mfd/tmio.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 32 | |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 33 | enum { |
| 34 | ASIC3_CLOCK_SPI, |
| 35 | ASIC3_CLOCK_OWM, |
| 36 | ASIC3_CLOCK_PWM0, |
| 37 | ASIC3_CLOCK_PWM1, |
| 38 | ASIC3_CLOCK_LED0, |
| 39 | ASIC3_CLOCK_LED1, |
| 40 | ASIC3_CLOCK_LED2, |
| 41 | ASIC3_CLOCK_SD_HOST, |
| 42 | ASIC3_CLOCK_SD_BUS, |
| 43 | ASIC3_CLOCK_SMBUS, |
| 44 | ASIC3_CLOCK_EX0, |
| 45 | ASIC3_CLOCK_EX1, |
| 46 | }; |
| 47 | |
| 48 | struct asic3_clk { |
| 49 | int enabled; |
| 50 | unsigned int cdex; |
| 51 | unsigned long rate; |
| 52 | }; |
| 53 | |
| 54 | #define INIT_CDEX(_name, _rate) \ |
| 55 | [ASIC3_CLOCK_##_name] = { \ |
| 56 | .cdex = CLOCK_CDEX_##_name, \ |
| 57 | .rate = _rate, \ |
| 58 | } |
| 59 | |
Mark Brown | 59f2ad2 | 2010-12-11 12:59:35 +0000 | [diff] [blame] | 60 | static struct asic3_clk asic3_clk_init[] __initdata = { |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 61 | INIT_CDEX(SPI, 0), |
| 62 | INIT_CDEX(OWM, 5000000), |
| 63 | INIT_CDEX(PWM0, 0), |
| 64 | INIT_CDEX(PWM1, 0), |
| 65 | INIT_CDEX(LED0, 0), |
| 66 | INIT_CDEX(LED1, 0), |
| 67 | INIT_CDEX(LED2, 0), |
| 68 | INIT_CDEX(SD_HOST, 24576000), |
| 69 | INIT_CDEX(SD_BUS, 12288000), |
| 70 | INIT_CDEX(SMBUS, 0), |
| 71 | INIT_CDEX(EX0, 32768), |
| 72 | INIT_CDEX(EX1, 24576000), |
| 73 | }; |
| 74 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 75 | struct asic3 { |
| 76 | void __iomem *mapping; |
| 77 | unsigned int bus_shift; |
| 78 | unsigned int irq_nr; |
| 79 | unsigned int irq_base; |
| 80 | spinlock_t lock; |
| 81 | u16 irq_bothedge[4]; |
| 82 | struct gpio_chip gpio; |
| 83 | struct device *dev; |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 84 | void __iomem *tmio_cnf; |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 85 | |
| 86 | struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)]; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 87 | }; |
| 88 | |
| 89 | static int asic3_gpio_get(struct gpio_chip *chip, unsigned offset); |
| 90 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 91 | void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 value) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 92 | { |
Al Viro | b32661e | 2008-03-29 03:10:58 +0000 | [diff] [blame] | 93 | iowrite16(value, asic->mapping + |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 94 | (reg >> asic->bus_shift)); |
| 95 | } |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 96 | EXPORT_SYMBOL_GPL(asic3_write_register); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 97 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 98 | u32 asic3_read_register(struct asic3 *asic, unsigned int reg) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 99 | { |
Al Viro | b32661e | 2008-03-29 03:10:58 +0000 | [diff] [blame] | 100 | return ioread16(asic->mapping + |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 101 | (reg >> asic->bus_shift)); |
| 102 | } |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 103 | EXPORT_SYMBOL_GPL(asic3_read_register); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 104 | |
Mark Brown | 59f2ad2 | 2010-12-11 12:59:35 +0000 | [diff] [blame] | 105 | static void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set) |
Philipp Zabel | 6483c1b | 2009-06-05 18:31:01 +0200 | [diff] [blame] | 106 | { |
| 107 | unsigned long flags; |
| 108 | u32 val; |
| 109 | |
| 110 | spin_lock_irqsave(&asic->lock, flags); |
| 111 | val = asic3_read_register(asic, reg); |
| 112 | if (set) |
| 113 | val |= bits; |
| 114 | else |
| 115 | val &= ~bits; |
| 116 | asic3_write_register(asic, reg, val); |
| 117 | spin_unlock_irqrestore(&asic->lock, flags); |
| 118 | } |
| 119 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 120 | /* IRQs */ |
| 121 | #define MAX_ASIC_ISR_LOOPS 20 |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 122 | #define ASIC3_GPIO_BASE_INCR \ |
| 123 | (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 124 | |
| 125 | static void asic3_irq_flip_edge(struct asic3 *asic, |
| 126 | u32 base, int bit) |
| 127 | { |
| 128 | u16 edge; |
| 129 | unsigned long flags; |
| 130 | |
| 131 | spin_lock_irqsave(&asic->lock, flags); |
| 132 | edge = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 133 | base + ASIC3_GPIO_EDGE_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 134 | edge ^= bit; |
| 135 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 136 | base + ASIC3_GPIO_EDGE_TRIGGER, edge); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 137 | spin_unlock_irqrestore(&asic->lock, flags); |
| 138 | } |
| 139 | |
| 140 | static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc) |
| 141 | { |
Thomas Gleixner | 52a7d60 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 142 | struct asic3 *asic = irq_desc_get_handler_data(desc); |
| 143 | struct irq_data *data = irq_desc_get_irq_data(desc); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 144 | int iter, i; |
| 145 | unsigned long flags; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 146 | |
Axel Lin | a09aee8 | 2011-04-14 22:43:47 +0800 | [diff] [blame] | 147 | data->chip->irq_ack(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 148 | |
| 149 | for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { |
| 150 | u32 status; |
| 151 | int bank; |
| 152 | |
| 153 | spin_lock_irqsave(&asic->lock, flags); |
| 154 | status = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 155 | ASIC3_OFFSET(INTR, P_INT_STAT)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 156 | spin_unlock_irqrestore(&asic->lock, flags); |
| 157 | |
| 158 | /* Check all ten register bits */ |
| 159 | if ((status & 0x3ff) == 0) |
| 160 | break; |
| 161 | |
| 162 | /* Handle GPIO IRQs */ |
| 163 | for (bank = 0; bank < ASIC3_NUM_GPIO_BANKS; bank++) { |
| 164 | if (status & (1 << bank)) { |
| 165 | unsigned long base, istat; |
| 166 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 167 | base = ASIC3_GPIO_A_BASE |
| 168 | + bank * ASIC3_GPIO_BASE_INCR; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 169 | |
| 170 | spin_lock_irqsave(&asic->lock, flags); |
| 171 | istat = asic3_read_register(asic, |
| 172 | base + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 173 | ASIC3_GPIO_INT_STATUS); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 174 | /* Clearing IntStatus */ |
| 175 | asic3_write_register(asic, |
| 176 | base + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 177 | ASIC3_GPIO_INT_STATUS, 0); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 178 | spin_unlock_irqrestore(&asic->lock, flags); |
| 179 | |
| 180 | for (i = 0; i < ASIC3_GPIOS_PER_BANK; i++) { |
| 181 | int bit = (1 << i); |
| 182 | unsigned int irqnr; |
| 183 | |
| 184 | if (!(istat & bit)) |
| 185 | continue; |
| 186 | |
| 187 | irqnr = asic->irq_base + |
| 188 | (ASIC3_GPIOS_PER_BANK * bank) |
| 189 | + i; |
Thomas Gleixner | 52a7d60 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 190 | generic_handle_irq(irqnr); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 191 | if (asic->irq_bothedge[bank] & bit) |
| 192 | asic3_irq_flip_edge(asic, base, |
| 193 | bit); |
| 194 | } |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | /* Handle remaining IRQs in the status register */ |
| 199 | for (i = ASIC3_NUM_GPIOS; i < ASIC3_NR_IRQS; i++) { |
| 200 | /* They start at bit 4 and go up */ |
Thomas Gleixner | 52a7d60 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 201 | if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) |
| 202 | generic_handle_irq(asic->irq_base + i); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 203 | } |
| 204 | } |
| 205 | |
| 206 | if (iter >= MAX_ASIC_ISR_LOOPS) |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 207 | dev_err(asic->dev, "interrupt processing overrun\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | static inline int asic3_irq_to_bank(struct asic3 *asic, int irq) |
| 211 | { |
| 212 | int n; |
| 213 | |
| 214 | n = (irq - asic->irq_base) >> 4; |
| 215 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 216 | return (n * (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | static inline int asic3_irq_to_index(struct asic3 *asic, int irq) |
| 220 | { |
| 221 | return (irq - asic->irq_base) & 0xf; |
| 222 | } |
| 223 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 224 | static void asic3_mask_gpio_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 225 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 226 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 227 | u32 val, bank, index; |
| 228 | unsigned long flags; |
| 229 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 230 | bank = asic3_irq_to_bank(asic, data->irq); |
| 231 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 232 | |
| 233 | spin_lock_irqsave(&asic->lock, flags); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 234 | val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 235 | val |= 1 << index; |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 236 | asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 237 | spin_unlock_irqrestore(&asic->lock, flags); |
| 238 | } |
| 239 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 240 | static void asic3_mask_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 241 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 242 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 243 | int regval; |
| 244 | unsigned long flags; |
| 245 | |
| 246 | spin_lock_irqsave(&asic->lock, flags); |
| 247 | regval = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 248 | ASIC3_INTR_BASE + |
| 249 | ASIC3_INTR_INT_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 250 | |
| 251 | regval &= ~(ASIC3_INTMASK_MASK0 << |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 252 | (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 253 | |
| 254 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 255 | ASIC3_INTR_BASE + |
| 256 | ASIC3_INTR_INT_MASK, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 257 | regval); |
| 258 | spin_unlock_irqrestore(&asic->lock, flags); |
| 259 | } |
| 260 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 261 | static void asic3_unmask_gpio_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 262 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 263 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 264 | u32 val, bank, index; |
| 265 | unsigned long flags; |
| 266 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 267 | bank = asic3_irq_to_bank(asic, data->irq); |
| 268 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 269 | |
| 270 | spin_lock_irqsave(&asic->lock, flags); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 271 | val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 272 | val &= ~(1 << index); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 273 | asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 274 | spin_unlock_irqrestore(&asic->lock, flags); |
| 275 | } |
| 276 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 277 | static void asic3_unmask_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 278 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 279 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 280 | int regval; |
| 281 | unsigned long flags; |
| 282 | |
| 283 | spin_lock_irqsave(&asic->lock, flags); |
| 284 | regval = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 285 | ASIC3_INTR_BASE + |
| 286 | ASIC3_INTR_INT_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 287 | |
| 288 | regval |= (ASIC3_INTMASK_MASK0 << |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 289 | (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 290 | |
| 291 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 292 | ASIC3_INTR_BASE + |
| 293 | ASIC3_INTR_INT_MASK, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 294 | regval); |
| 295 | spin_unlock_irqrestore(&asic->lock, flags); |
| 296 | } |
| 297 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 298 | static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 299 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 300 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 301 | u32 bank, index; |
| 302 | u16 trigger, level, edge, bit; |
| 303 | unsigned long flags; |
| 304 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 305 | bank = asic3_irq_to_bank(asic, data->irq); |
| 306 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 307 | bit = 1<<index; |
| 308 | |
| 309 | spin_lock_irqsave(&asic->lock, flags); |
| 310 | level = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 311 | bank + ASIC3_GPIO_LEVEL_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 312 | edge = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 313 | bank + ASIC3_GPIO_EDGE_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 314 | trigger = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 315 | bank + ASIC3_GPIO_TRIGGER_TYPE); |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 316 | asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 317 | |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 318 | if (type == IRQ_TYPE_EDGE_RISING) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 319 | trigger |= bit; |
| 320 | edge |= bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 321 | } else if (type == IRQ_TYPE_EDGE_FALLING) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 322 | trigger |= bit; |
| 323 | edge &= ~bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 324 | } else if (type == IRQ_TYPE_EDGE_BOTH) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 325 | trigger |= bit; |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 326 | if (asic3_gpio_get(&asic->gpio, data->irq - asic->irq_base)) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 327 | edge &= ~bit; |
| 328 | else |
| 329 | edge |= bit; |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 330 | asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] |= bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 331 | } else if (type == IRQ_TYPE_LEVEL_LOW) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 332 | trigger &= ~bit; |
| 333 | level &= ~bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 334 | } else if (type == IRQ_TYPE_LEVEL_HIGH) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 335 | trigger &= ~bit; |
| 336 | level |= bit; |
| 337 | } else { |
| 338 | /* |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 339 | * if type == IRQ_TYPE_NONE, we should mask interrupts, but |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 340 | * be careful to not unmask them if mask was also called. |
| 341 | * Probably need internal state for mask. |
| 342 | */ |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 343 | dev_notice(asic->dev, "irq type not changed\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 344 | } |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 345 | asic3_write_register(asic, bank + ASIC3_GPIO_LEVEL_TRIGGER, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 346 | level); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 347 | asic3_write_register(asic, bank + ASIC3_GPIO_EDGE_TRIGGER, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 348 | edge); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 349 | asic3_write_register(asic, bank + ASIC3_GPIO_TRIGGER_TYPE, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 350 | trigger); |
| 351 | spin_unlock_irqrestore(&asic->lock, flags); |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | static struct irq_chip asic3_gpio_irq_chip = { |
| 356 | .name = "ASIC3-GPIO", |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 357 | .irq_ack = asic3_mask_gpio_irq, |
| 358 | .irq_mask = asic3_mask_gpio_irq, |
| 359 | .irq_unmask = asic3_unmask_gpio_irq, |
| 360 | .irq_set_type = asic3_gpio_irq_type, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 361 | }; |
| 362 | |
| 363 | static struct irq_chip asic3_irq_chip = { |
| 364 | .name = "ASIC3", |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 365 | .irq_ack = asic3_mask_irq, |
| 366 | .irq_mask = asic3_mask_irq, |
| 367 | .irq_unmask = asic3_unmask_irq, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 368 | }; |
| 369 | |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 370 | static int __init asic3_irq_probe(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 371 | { |
| 372 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 373 | unsigned long clksel = 0; |
| 374 | unsigned int irq, irq_base; |
Roel Kluin | c491b2f | 2008-07-25 19:44:41 -0700 | [diff] [blame] | 375 | int ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 376 | |
Roel Kluin | c491b2f | 2008-07-25 19:44:41 -0700 | [diff] [blame] | 377 | ret = platform_get_irq(pdev, 0); |
| 378 | if (ret < 0) |
| 379 | return ret; |
| 380 | asic->irq_nr = ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 381 | |
| 382 | /* turn on clock to IRQ controller */ |
| 383 | clksel |= CLOCK_SEL_CX; |
| 384 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), |
| 385 | clksel); |
| 386 | |
| 387 | irq_base = asic->irq_base; |
| 388 | |
| 389 | for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { |
| 390 | if (irq < asic->irq_base + ASIC3_NUM_GPIOS) |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 391 | irq_set_chip(irq, &asic3_gpio_irq_chip); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 392 | else |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 393 | irq_set_chip(irq, &asic3_irq_chip); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 394 | |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 395 | irq_set_chip_data(irq, asic); |
| 396 | irq_set_handler(irq, handle_level_irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 397 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
| 398 | } |
| 399 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 400 | asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 401 | ASIC3_INTMASK_GINTMASK); |
| 402 | |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 403 | irq_set_chained_handler(asic->irq_nr, asic3_irq_demux); |
| 404 | irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); |
| 405 | irq_set_handler_data(asic->irq_nr, asic); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 406 | |
| 407 | return 0; |
| 408 | } |
| 409 | |
| 410 | static void asic3_irq_remove(struct platform_device *pdev) |
| 411 | { |
| 412 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 413 | unsigned int irq, irq_base; |
| 414 | |
| 415 | irq_base = asic->irq_base; |
| 416 | |
| 417 | for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { |
| 418 | set_irq_flags(irq, 0); |
Thomas Gleixner | d6f7ce9f | 2011-03-25 11:12:35 +0000 | [diff] [blame] | 419 | irq_set_chip_and_handler(irq, NULL, NULL); |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 420 | irq_set_chip_data(irq, NULL); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 421 | } |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 422 | irq_set_chained_handler(asic->irq_nr, NULL); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 423 | } |
| 424 | |
| 425 | /* GPIOs */ |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 426 | static int asic3_gpio_direction(struct gpio_chip *chip, |
| 427 | unsigned offset, int out) |
| 428 | { |
| 429 | u32 mask = ASIC3_GPIO_TO_MASK(offset), out_reg; |
| 430 | unsigned int gpio_base; |
| 431 | unsigned long flags; |
| 432 | struct asic3 *asic; |
| 433 | |
| 434 | asic = container_of(chip, struct asic3, gpio); |
| 435 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 436 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 437 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 438 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 439 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 440 | return -EINVAL; |
| 441 | } |
| 442 | |
| 443 | spin_lock_irqsave(&asic->lock, flags); |
| 444 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 445 | out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_DIRECTION); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 446 | |
| 447 | /* Input is 0, Output is 1 */ |
| 448 | if (out) |
| 449 | out_reg |= mask; |
| 450 | else |
| 451 | out_reg &= ~mask; |
| 452 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 453 | asic3_write_register(asic, gpio_base + ASIC3_GPIO_DIRECTION, out_reg); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 454 | |
| 455 | spin_unlock_irqrestore(&asic->lock, flags); |
| 456 | |
| 457 | return 0; |
| 458 | |
| 459 | } |
| 460 | |
| 461 | static int asic3_gpio_direction_input(struct gpio_chip *chip, |
| 462 | unsigned offset) |
| 463 | { |
| 464 | return asic3_gpio_direction(chip, offset, 0); |
| 465 | } |
| 466 | |
| 467 | static int asic3_gpio_direction_output(struct gpio_chip *chip, |
| 468 | unsigned offset, int value) |
| 469 | { |
| 470 | return asic3_gpio_direction(chip, offset, 1); |
| 471 | } |
| 472 | |
| 473 | static int asic3_gpio_get(struct gpio_chip *chip, |
| 474 | unsigned offset) |
| 475 | { |
| 476 | unsigned int gpio_base; |
| 477 | u32 mask = ASIC3_GPIO_TO_MASK(offset); |
| 478 | struct asic3 *asic; |
| 479 | |
| 480 | asic = container_of(chip, struct asic3, gpio); |
| 481 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 482 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 483 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 484 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 485 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 486 | return -EINVAL; |
| 487 | } |
| 488 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 489 | return asic3_read_register(asic, gpio_base + ASIC3_GPIO_STATUS) & mask; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 490 | } |
| 491 | |
| 492 | static void asic3_gpio_set(struct gpio_chip *chip, |
| 493 | unsigned offset, int value) |
| 494 | { |
| 495 | u32 mask, out_reg; |
| 496 | unsigned int gpio_base; |
| 497 | unsigned long flags; |
| 498 | struct asic3 *asic; |
| 499 | |
| 500 | asic = container_of(chip, struct asic3, gpio); |
| 501 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 502 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 503 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 504 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 505 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 506 | return; |
| 507 | } |
| 508 | |
| 509 | mask = ASIC3_GPIO_TO_MASK(offset); |
| 510 | |
| 511 | spin_lock_irqsave(&asic->lock, flags); |
| 512 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 513 | out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_OUT); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 514 | |
| 515 | if (value) |
| 516 | out_reg |= mask; |
| 517 | else |
| 518 | out_reg &= ~mask; |
| 519 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 520 | asic3_write_register(asic, gpio_base + ASIC3_GPIO_OUT, out_reg); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 521 | |
| 522 | spin_unlock_irqrestore(&asic->lock, flags); |
| 523 | |
| 524 | return; |
| 525 | } |
| 526 | |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 527 | static __init int asic3_gpio_probe(struct platform_device *pdev, |
| 528 | u16 *gpio_config, int num) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 529 | { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 530 | struct asic3 *asic = platform_get_drvdata(pdev); |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 531 | u16 alt_reg[ASIC3_NUM_GPIO_BANKS]; |
| 532 | u16 out_reg[ASIC3_NUM_GPIO_BANKS]; |
| 533 | u16 dir_reg[ASIC3_NUM_GPIO_BANKS]; |
| 534 | int i; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 535 | |
Russell King | 59f0cb0 | 2008-10-27 11:24:09 +0000 | [diff] [blame] | 536 | memset(alt_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
| 537 | memset(out_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
| 538 | memset(dir_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 539 | |
| 540 | /* Enable all GPIOs */ |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 541 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); |
| 542 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(B, MASK), 0xffff); |
| 543 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(C, MASK), 0xffff); |
| 544 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(D, MASK), 0xffff); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 545 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 546 | for (i = 0; i < num; i++) { |
| 547 | u8 alt, pin, dir, init, bank_num, bit_num; |
| 548 | u16 config = gpio_config[i]; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 549 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 550 | pin = ASIC3_CONFIG_GPIO_PIN(config); |
| 551 | alt = ASIC3_CONFIG_GPIO_ALT(config); |
| 552 | dir = ASIC3_CONFIG_GPIO_DIR(config); |
| 553 | init = ASIC3_CONFIG_GPIO_INIT(config); |
| 554 | |
| 555 | bank_num = ASIC3_GPIO_TO_BANK(pin); |
| 556 | bit_num = ASIC3_GPIO_TO_BIT(pin); |
| 557 | |
| 558 | alt_reg[bank_num] |= (alt << bit_num); |
| 559 | out_reg[bank_num] |= (init << bit_num); |
| 560 | dir_reg[bank_num] |= (dir << bit_num); |
| 561 | } |
| 562 | |
| 563 | for (i = 0; i < ASIC3_NUM_GPIO_BANKS; i++) { |
| 564 | asic3_write_register(asic, |
| 565 | ASIC3_BANK_TO_BASE(i) + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 566 | ASIC3_GPIO_DIRECTION, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 567 | dir_reg[i]); |
| 568 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 569 | ASIC3_BANK_TO_BASE(i) + ASIC3_GPIO_OUT, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 570 | out_reg[i]); |
| 571 | asic3_write_register(asic, |
| 572 | ASIC3_BANK_TO_BASE(i) + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 573 | ASIC3_GPIO_ALT_FUNCTION, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 574 | alt_reg[i]); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 575 | } |
| 576 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 577 | return gpiochip_add(&asic->gpio); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 578 | } |
| 579 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 580 | static int asic3_gpio_remove(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 581 | { |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 582 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 583 | |
| 584 | return gpiochip_remove(&asic->gpio); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 585 | } |
| 586 | |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 587 | static int asic3_clk_enable(struct asic3 *asic, struct asic3_clk *clk) |
| 588 | { |
| 589 | unsigned long flags; |
| 590 | u32 cdex; |
| 591 | |
| 592 | spin_lock_irqsave(&asic->lock, flags); |
| 593 | if (clk->enabled++ == 0) { |
| 594 | cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); |
| 595 | cdex |= clk->cdex; |
| 596 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); |
| 597 | } |
| 598 | spin_unlock_irqrestore(&asic->lock, flags); |
| 599 | |
| 600 | return 0; |
| 601 | } |
| 602 | |
| 603 | static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk) |
| 604 | { |
| 605 | unsigned long flags; |
| 606 | u32 cdex; |
| 607 | |
| 608 | WARN_ON(clk->enabled == 0); |
| 609 | |
| 610 | spin_lock_irqsave(&asic->lock, flags); |
| 611 | if (--clk->enabled == 0) { |
| 612 | cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); |
| 613 | cdex &= ~clk->cdex; |
| 614 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); |
| 615 | } |
| 616 | spin_unlock_irqrestore(&asic->lock, flags); |
| 617 | } |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 618 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 619 | /* MFD cells (SPI, PWM, LED, DS1WM, MMC) */ |
| 620 | static struct ds1wm_driver_data ds1wm_pdata = { |
| 621 | .active_high = 1, |
Jean-François Dagenais | f607e7f | 2011-07-08 15:39:44 -0700 | [diff] [blame] | 622 | .reset_recover_delay = 1, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 623 | }; |
| 624 | |
| 625 | static struct resource ds1wm_resources[] = { |
| 626 | { |
| 627 | .start = ASIC3_OWM_BASE, |
| 628 | .end = ASIC3_OWM_BASE + 0x13, |
| 629 | .flags = IORESOURCE_MEM, |
| 630 | }, |
| 631 | { |
| 632 | .start = ASIC3_IRQ_OWM, |
Mark Brown | fe42142 | 2010-12-11 13:00:34 +0000 | [diff] [blame] | 633 | .end = ASIC3_IRQ_OWM, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 634 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 635 | }, |
| 636 | }; |
| 637 | |
| 638 | static int ds1wm_enable(struct platform_device *pdev) |
| 639 | { |
| 640 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 641 | |
| 642 | /* Turn on external clocks and the OWM clock */ |
| 643 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 644 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 645 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); |
| 646 | msleep(1); |
| 647 | |
| 648 | /* Reset and enable DS1WM */ |
| 649 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), |
| 650 | ASIC3_EXTCF_OWM_RESET, 1); |
| 651 | msleep(1); |
| 652 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), |
| 653 | ASIC3_EXTCF_OWM_RESET, 0); |
| 654 | msleep(1); |
| 655 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 656 | ASIC3_EXTCF_OWM_EN, 1); |
| 657 | msleep(1); |
| 658 | |
| 659 | return 0; |
| 660 | } |
| 661 | |
| 662 | static int ds1wm_disable(struct platform_device *pdev) |
| 663 | { |
| 664 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 665 | |
| 666 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 667 | ASIC3_EXTCF_OWM_EN, 0); |
| 668 | |
| 669 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); |
| 670 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 671 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 672 | |
| 673 | return 0; |
| 674 | } |
| 675 | |
| 676 | static struct mfd_cell asic3_cell_ds1wm = { |
| 677 | .name = "ds1wm", |
| 678 | .enable = ds1wm_enable, |
| 679 | .disable = ds1wm_disable, |
Samuel Ortiz | 121ea57 | 2011-04-06 11:41:03 +0200 | [diff] [blame] | 680 | .platform_data = &ds1wm_pdata, |
| 681 | .pdata_size = sizeof(ds1wm_pdata), |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 682 | .num_resources = ARRAY_SIZE(ds1wm_resources), |
| 683 | .resources = ds1wm_resources, |
| 684 | }; |
| 685 | |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 686 | static void asic3_mmc_pwr(struct platform_device *pdev, int state) |
| 687 | { |
| 688 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 689 | |
| 690 | tmio_core_mmc_pwr(asic->tmio_cnf, 1 - asic->bus_shift, state); |
| 691 | } |
| 692 | |
| 693 | static void asic3_mmc_clk_div(struct platform_device *pdev, int state) |
| 694 | { |
| 695 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 696 | |
| 697 | tmio_core_mmc_clk_div(asic->tmio_cnf, 1 - asic->bus_shift, state); |
| 698 | } |
| 699 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 700 | static struct tmio_mmc_data asic3_mmc_data = { |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 701 | .hclk = 24576000, |
| 702 | .set_pwr = asic3_mmc_pwr, |
| 703 | .set_clk_div = asic3_mmc_clk_div, |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 704 | }; |
| 705 | |
| 706 | static struct resource asic3_mmc_resources[] = { |
| 707 | { |
| 708 | .start = ASIC3_SD_CTRL_BASE, |
| 709 | .end = ASIC3_SD_CTRL_BASE + 0x3ff, |
| 710 | .flags = IORESOURCE_MEM, |
| 711 | }, |
| 712 | { |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 713 | .start = 0, |
| 714 | .end = 0, |
| 715 | .flags = IORESOURCE_IRQ, |
| 716 | }, |
| 717 | }; |
| 718 | |
| 719 | static int asic3_mmc_enable(struct platform_device *pdev) |
| 720 | { |
| 721 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 722 | |
| 723 | /* Not sure if it must be done bit by bit, but leaving as-is */ |
| 724 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 725 | ASIC3_SDHWCTRL_LEVCD, 1); |
| 726 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 727 | ASIC3_SDHWCTRL_LEVWP, 1); |
| 728 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 729 | ASIC3_SDHWCTRL_SUSPEND, 0); |
| 730 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 731 | ASIC3_SDHWCTRL_PCLR, 0); |
| 732 | |
| 733 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 734 | /* CLK32 used for card detection and for interruption detection |
| 735 | * when HCLK is stopped. |
| 736 | */ |
| 737 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 738 | msleep(1); |
| 739 | |
| 740 | /* HCLK 24.576 MHz, BCLK 12.288 MHz: */ |
| 741 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), |
| 742 | CLOCK_SEL_CX | CLOCK_SEL_SD_HCLK_SEL); |
| 743 | |
| 744 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); |
| 745 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); |
| 746 | msleep(1); |
| 747 | |
| 748 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 749 | ASIC3_EXTCF_SD_MEM_ENABLE, 1); |
| 750 | |
| 751 | /* Enable SD card slot 3.3V power supply */ |
| 752 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 753 | ASIC3_SDHWCTRL_SDPWR, 1); |
| 754 | |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 755 | /* ASIC3_SD_CTRL_BASE assumes 32-bit addressing, TMIO is 16-bit */ |
| 756 | tmio_core_mmc_enable(asic->tmio_cnf, 1 - asic->bus_shift, |
| 757 | ASIC3_SD_CTRL_BASE >> 1); |
| 758 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 759 | return 0; |
| 760 | } |
| 761 | |
| 762 | static int asic3_mmc_disable(struct platform_device *pdev) |
| 763 | { |
| 764 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 765 | |
| 766 | /* Put in suspend mode */ |
| 767 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 768 | ASIC3_SDHWCTRL_SUSPEND, 1); |
| 769 | |
| 770 | /* Disable clocks */ |
| 771 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); |
| 772 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); |
| 773 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 774 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 775 | return 0; |
| 776 | } |
| 777 | |
| 778 | static struct mfd_cell asic3_cell_mmc = { |
| 779 | .name = "tmio-mmc", |
| 780 | .enable = asic3_mmc_enable, |
| 781 | .disable = asic3_mmc_disable, |
Paul Parsons | 3c6e365 | 2011-08-09 16:27:24 +0000 | [diff] [blame^] | 782 | .suspend = asic3_mmc_disable, |
| 783 | .resume = asic3_mmc_enable, |
Samuel Ortiz | ec71974 | 2011-04-06 11:38:14 +0200 | [diff] [blame] | 784 | .platform_data = &asic3_mmc_data, |
| 785 | .pdata_size = sizeof(asic3_mmc_data), |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 786 | .num_resources = ARRAY_SIZE(asic3_mmc_resources), |
| 787 | .resources = asic3_mmc_resources, |
| 788 | }; |
| 789 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 790 | static const int clock_ledn[ASIC3_NUM_LEDS] = { |
| 791 | [0] = ASIC3_CLOCK_LED0, |
| 792 | [1] = ASIC3_CLOCK_LED1, |
| 793 | [2] = ASIC3_CLOCK_LED2, |
| 794 | }; |
| 795 | |
| 796 | static int asic3_leds_enable(struct platform_device *pdev) |
| 797 | { |
| 798 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
| 799 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 800 | |
| 801 | asic3_clk_enable(asic, &asic->clocks[clock_ledn[cell->id]]); |
| 802 | |
| 803 | return 0; |
| 804 | } |
| 805 | |
| 806 | static int asic3_leds_disable(struct platform_device *pdev) |
| 807 | { |
| 808 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
| 809 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 810 | |
| 811 | asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); |
| 812 | |
| 813 | return 0; |
| 814 | } |
| 815 | |
| 816 | static struct mfd_cell asic3_cell_leds[ASIC3_NUM_LEDS] = { |
| 817 | [0] = { |
| 818 | .name = "leds-asic3", |
| 819 | .id = 0, |
| 820 | .enable = asic3_leds_enable, |
| 821 | .disable = asic3_leds_disable, |
| 822 | }, |
| 823 | [1] = { |
| 824 | .name = "leds-asic3", |
| 825 | .id = 1, |
| 826 | .enable = asic3_leds_enable, |
| 827 | .disable = asic3_leds_disable, |
| 828 | }, |
| 829 | [2] = { |
| 830 | .name = "leds-asic3", |
| 831 | .id = 2, |
| 832 | .enable = asic3_leds_enable, |
| 833 | .disable = asic3_leds_disable, |
| 834 | }, |
| 835 | }; |
| 836 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 837 | static int __init asic3_mfd_probe(struct platform_device *pdev, |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 838 | struct asic3_platform_data *pdata, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 839 | struct resource *mem) |
| 840 | { |
| 841 | struct asic3 *asic = platform_get_drvdata(pdev); |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 842 | struct resource *mem_sdio; |
| 843 | int irq, ret; |
| 844 | |
| 845 | mem_sdio = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 846 | if (!mem_sdio) |
| 847 | dev_dbg(asic->dev, "no SDIO MEM resource\n"); |
| 848 | |
| 849 | irq = platform_get_irq(pdev, 1); |
| 850 | if (irq < 0) |
| 851 | dev_dbg(asic->dev, "no SDIO IRQ resource\n"); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 852 | |
| 853 | /* DS1WM */ |
| 854 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 855 | ASIC3_EXTCF_OWM_SMB, 0); |
| 856 | |
| 857 | ds1wm_resources[0].start >>= asic->bus_shift; |
| 858 | ds1wm_resources[0].end >>= asic->bus_shift; |
| 859 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 860 | /* MMC */ |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 861 | asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> asic->bus_shift) + |
Paul Parsons | 74e32d1 | 2011-05-15 14:13:11 +0000 | [diff] [blame] | 862 | mem_sdio->start, |
| 863 | ASIC3_SD_CONFIG_SIZE >> asic->bus_shift); |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 864 | if (!asic->tmio_cnf) { |
| 865 | ret = -ENOMEM; |
| 866 | dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n"); |
| 867 | goto out; |
| 868 | } |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 869 | asic3_mmc_resources[0].start >>= asic->bus_shift; |
| 870 | asic3_mmc_resources[0].end >>= asic->bus_shift; |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 871 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 872 | ret = mfd_add_devices(&pdev->dev, pdev->id, |
| 873 | &asic3_cell_ds1wm, 1, mem, asic->irq_base); |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 874 | if (ret < 0) |
| 875 | goto out; |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 876 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 877 | if (mem_sdio && (irq >= 0)) { |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 878 | ret = mfd_add_devices(&pdev->dev, pdev->id, |
| 879 | &asic3_cell_mmc, 1, mem_sdio, irq); |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 880 | if (ret < 0) |
| 881 | goto out; |
| 882 | } |
| 883 | |
| 884 | if (pdata->leds) { |
| 885 | int i; |
| 886 | |
| 887 | for (i = 0; i < ASIC3_NUM_LEDS; ++i) { |
| 888 | asic3_cell_leds[i].platform_data = &pdata->leds[i]; |
| 889 | asic3_cell_leds[i].pdata_size = sizeof(pdata->leds[i]); |
| 890 | } |
| 891 | ret = mfd_add_devices(&pdev->dev, 0, |
| 892 | asic3_cell_leds, ASIC3_NUM_LEDS, NULL, 0); |
| 893 | } |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 894 | |
| 895 | out: |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 896 | return ret; |
| 897 | } |
| 898 | |
| 899 | static void asic3_mfd_remove(struct platform_device *pdev) |
| 900 | { |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 901 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 902 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 903 | mfd_remove_devices(&pdev->dev); |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 904 | iounmap(asic->tmio_cnf); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 905 | } |
| 906 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 907 | /* Core */ |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 908 | static int __init asic3_probe(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 909 | { |
| 910 | struct asic3_platform_data *pdata = pdev->dev.platform_data; |
| 911 | struct asic3 *asic; |
| 912 | struct resource *mem; |
| 913 | unsigned long clksel; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 914 | int ret = 0; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 915 | |
| 916 | asic = kzalloc(sizeof(struct asic3), GFP_KERNEL); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 917 | if (asic == NULL) { |
| 918 | printk(KERN_ERR "kzalloc failed\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 919 | return -ENOMEM; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 920 | } |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 921 | |
| 922 | spin_lock_init(&asic->lock); |
| 923 | platform_set_drvdata(pdev, asic); |
| 924 | asic->dev = &pdev->dev; |
| 925 | |
| 926 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 927 | if (!mem) { |
| 928 | ret = -ENOMEM; |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 929 | dev_err(asic->dev, "no MEM resource\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 930 | goto out_free; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 931 | } |
| 932 | |
Philipp Zabel | be584bd | 2009-06-05 18:31:04 +0200 | [diff] [blame] | 933 | asic->mapping = ioremap(mem->start, resource_size(mem)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 934 | if (!asic->mapping) { |
| 935 | ret = -ENOMEM; |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 936 | dev_err(asic->dev, "Couldn't ioremap\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 937 | goto out_free; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 938 | } |
| 939 | |
| 940 | asic->irq_base = pdata->irq_base; |
| 941 | |
Philipp Zabel | 99cdb0c | 2008-07-10 02:17:02 +0200 | [diff] [blame] | 942 | /* calculate bus shift from mem resource */ |
Philipp Zabel | be584bd | 2009-06-05 18:31:04 +0200 | [diff] [blame] | 943 | asic->bus_shift = 2 - (resource_size(mem) >> 12); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 944 | |
| 945 | clksel = 0; |
| 946 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); |
| 947 | |
| 948 | ret = asic3_irq_probe(pdev); |
| 949 | if (ret < 0) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 950 | dev_err(asic->dev, "Couldn't probe IRQs\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 951 | goto out_unmap; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 952 | } |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 953 | |
| 954 | asic->gpio.base = pdata->gpio_base; |
| 955 | asic->gpio.ngpio = ASIC3_NUM_GPIOS; |
| 956 | asic->gpio.get = asic3_gpio_get; |
| 957 | asic->gpio.set = asic3_gpio_set; |
| 958 | asic->gpio.direction_input = asic3_gpio_direction_input; |
| 959 | asic->gpio.direction_output = asic3_gpio_direction_output; |
| 960 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 961 | ret = asic3_gpio_probe(pdev, |
| 962 | pdata->gpio_config, |
| 963 | pdata->gpio_config_num); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 964 | if (ret < 0) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 965 | dev_err(asic->dev, "GPIO probe failed\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 966 | goto out_irq; |
| 967 | } |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 968 | |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 969 | /* Making a per-device copy is only needed for the |
| 970 | * theoretical case of multiple ASIC3s on one board: |
| 971 | */ |
| 972 | memcpy(asic->clocks, asic3_clk_init, sizeof(asic3_clk_init)); |
| 973 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 974 | asic3_mfd_probe(pdev, pdata, mem); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 975 | |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 976 | dev_info(asic->dev, "ASIC3 Core driver\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 977 | |
| 978 | return 0; |
| 979 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 980 | out_irq: |
| 981 | asic3_irq_remove(pdev); |
| 982 | |
| 983 | out_unmap: |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 984 | iounmap(asic->mapping); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 985 | |
| 986 | out_free: |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 987 | kfree(asic); |
| 988 | |
| 989 | return ret; |
| 990 | } |
| 991 | |
Uwe Kleine-König | 1e3edaf | 2009-10-01 10:28:05 +0200 | [diff] [blame] | 992 | static int __devexit asic3_remove(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 993 | { |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 994 | int ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 995 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 996 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 997 | asic3_mfd_remove(pdev); |
| 998 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 999 | ret = asic3_gpio_remove(pdev); |
| 1000 | if (ret < 0) |
| 1001 | return ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1002 | asic3_irq_remove(pdev); |
| 1003 | |
| 1004 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), 0); |
| 1005 | |
| 1006 | iounmap(asic->mapping); |
| 1007 | |
| 1008 | kfree(asic); |
| 1009 | |
| 1010 | return 0; |
| 1011 | } |
| 1012 | |
| 1013 | static void asic3_shutdown(struct platform_device *pdev) |
| 1014 | { |
| 1015 | } |
| 1016 | |
| 1017 | static struct platform_driver asic3_device_driver = { |
| 1018 | .driver = { |
| 1019 | .name = "asic3", |
| 1020 | }, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1021 | .remove = __devexit_p(asic3_remove), |
| 1022 | .shutdown = asic3_shutdown, |
| 1023 | }; |
| 1024 | |
| 1025 | static int __init asic3_init(void) |
| 1026 | { |
| 1027 | int retval = 0; |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 1028 | retval = platform_driver_probe(&asic3_device_driver, asic3_probe); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1029 | return retval; |
| 1030 | } |
| 1031 | |
| 1032 | subsys_initcall(asic3_init); |