blob: b9e577a9e705a348f25e1656fee803150ef62a54 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/err.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/platform_device.h>
19#include <linux/regulator/driver.h>
20#include <linux/mfd/pmic8901.h>
21#include <mach/rpm.h>
22#include <mach/rpm-regulator.h>
23
24#include "rpm_resources.h"
25
26/* Debug Definitions */
27
28enum {
29 MSM_RPM_VREG_DEBUG_REQUEST = BIT(0),
30 MSM_RPM_VREG_DEBUG_VOTE = BIT(1),
31 MSM_RPM_VREG_DEBUG_DUPLICATE = BIT(2),
32 MSM_RPM_VREG_DEBUG_IGNORE_8058_S0_S1 = BIT(3),
33};
34
35static int msm_rpm_vreg_debug_mask;
36module_param_named(
37 debug_mask, msm_rpm_vreg_debug_mask, int, S_IRUSR | S_IWUSR
38);
39
40#define MICRO_TO_MILLI(uV) ((uV) / 1000)
41#define MILLI_TO_MICRO(mV) ((mV) * 1000)
42
43/* LDO register word 1 */
44#define LDO_VOLTAGE 0x00000FFF
45#define LDO_VOLTAGE_SHIFT 0
46#define LDO_PEAK_CURRENT 0x00FFF000
47#define LDO_PEAK_CURRENT_SHIFT 12
48#define LDO_MODE 0x03000000
49#define LDO_MODE_SHIFT 24
50#define LDO_PIN_CTRL 0x3C000000
51#define LDO_PIN_CTRL_SHIFT 26
52#define LDO_PIN_FN 0xC0000000
53#define LDO_PIN_FN_SHIFT 30
54
55/* LDO register word 2 */
56#define LDO_PULL_DOWN_ENABLE 0x00000001
57#define LDO_PULL_DOWN_ENABLE_SHIFT 0
58#define LDO_AVG_CURRENT 0x00001FFE
59#define LDO_AVG_CURRENT_SHIFT 1
60
61/* SMPS register word 1 */
62#define SMPS_VOLTAGE 0x00000FFF
63#define SMPS_VOLTAGE_SHIFT 0
64#define SMPS_PEAK_CURRENT 0x00FFF000
65#define SMPS_PEAK_CURRENT_SHIFT 12
66#define SMPS_MODE 0x03000000
67#define SMPS_MODE_SHIFT 24
68#define SMPS_PIN_CTRL 0x3C000000
69#define SMPS_PIN_CTRL_SHIFT 26
70#define SMPS_PIN_FN 0xC0000000
71#define SMPS_PIN_FN_SHIFT 30
72
73/* SMPS register word 2 */
74#define SMPS_PULL_DOWN_ENABLE 0x00000001
75#define SMPS_PULL_DOWN_ENABLE_SHIFT 0
76#define SMPS_AVG_CURRENT 0x00001FFE
77#define SMPS_AVG_CURRENT_SHIFT 1
78#define SMPS_FREQ 0x001FE000
79#define SMPS_FREQ_SHIFT 13
80#define SMPS_CLK_SRC 0x00600000
81#define SMPS_CLK_SRC_SHIFT 21
82
83/* SWITCH register word 1 */
84#define SWITCH_STATE 0x0001
85#define SWITCH_STATE_SHIFT 0
86#define SWITCH_PULL_DOWN_ENABLE 0x0002
87#define SWITCH_PULL_DOWN_ENABLE_SHIFT 1
88#define SWITCH_PIN_CTRL 0x003C
89#define SWITCH_PIN_CTRL_SHIFT 2
90#define SWITCH_PIN_FN 0x00C0
91#define SWITCH_PIN_FN_SHIFT 6
92
93/* NCP register word 1 */
94#define NCP_VOLTAGE 0x0FFF
95#define NCP_VOLTAGE_SHIFT 0
96#define NCP_STATE 0x1000
97#define NCP_STATE_SHIFT 12
98
99/*
100 * This is used when voting for LPM or HPM by subtracting or adding to the
101 * hpm_min_load of a regulator. It has units of uA.
102 */
103#define LOAD_THRESHOLD_STEP 1000
104
105/* This is the maximum uA load that can be passed to the RPM. */
106#define MAX_POSSIBLE_LOAD (MILLI_TO_MICRO(0xFFF))
107
108/* Voltage regulator types */
109#define IS_LDO(id) ((id >= RPM_VREG_ID_PM8058_L0 && \
110 id <= RPM_VREG_ID_PM8058_L25) || \
111 (id >= RPM_VREG_ID_PM8901_L0 && \
112 id <= RPM_VREG_ID_PM8901_L6))
113#define IS_SMPS(id) ((id >= RPM_VREG_ID_PM8058_S0 && \
114 id <= RPM_VREG_ID_PM8058_S4) || \
115 (id >= RPM_VREG_ID_PM8901_S0 && \
116 id <= RPM_VREG_ID_PM8901_S4))
117#define IS_SWITCH(id) ((id >= RPM_VREG_ID_PM8058_LVS0 && \
118 id <= RPM_VREG_ID_PM8058_LVS1) || \
119 (id >= RPM_VREG_ID_PM8901_LVS0 && \
120 id <= RPM_VREG_ID_PM8901_LVS3) || \
121 (id == RPM_VREG_ID_PM8901_MVS0))
122#define IS_NCP(id) (id == RPM_VREG_ID_PM8058_NCP)
123
124#define IS_8901_SMPS(id) ((id >= RPM_VREG_ID_PM8901_S0 && \
125 id <= RPM_VREG_ID_PM8901_S4))
126
127struct vreg {
128 struct msm_rpm_iv_pair req[2];
129 struct msm_rpm_iv_pair prev_active_req[2];
130 struct msm_rpm_iv_pair prev_sleep_req[2];
131 struct rpm_vreg_pdata *pdata;
132 int save_uV;
133 const int hpm_min_load;
134 unsigned pc_vote;
135 unsigned optimum;
136 unsigned mode_initialized;
137 int active_min_mV_vote[RPM_VREG_VOTER_COUNT];
138 int sleep_min_mV_vote[RPM_VREG_VOTER_COUNT];
139 enum rpm_vreg_id id;
140};
141
142#define RPM_VREG_NCP_HPM_MIN_LOAD 0
143
144#define VREG_2(_vreg_id, _rpm_id, _hpm_min_load) \
145 [RPM_VREG_ID_##_vreg_id] = { \
146 .req = { \
147 [0] = { .id = MSM_RPM_ID_##_rpm_id##_0, }, \
148 [1] = { .id = MSM_RPM_ID_##_rpm_id##_1, }, \
149 }, \
150 .hpm_min_load = RPM_VREG_##_hpm_min_load, \
151 }
152
153#define VREG_1(_vreg_id, _rpm_id) \
154 [RPM_VREG_ID_##_vreg_id] = { \
155 .req = { \
156 [0] = { .id = MSM_RPM_ID_##_rpm_id, }, \
157 [1] = { .id = -1, }, \
158 }, \
159 }
160
161static struct vreg vregs[RPM_VREG_ID_MAX] = {
162 VREG_2(PM8058_L0, LDO0, LDO_150_HPM_MIN_LOAD),
163 VREG_2(PM8058_L1, LDO1, LDO_300_HPM_MIN_LOAD),
164 VREG_2(PM8058_L2, LDO2, LDO_300_HPM_MIN_LOAD),
165 VREG_2(PM8058_L3, LDO3, LDO_150_HPM_MIN_LOAD),
166 VREG_2(PM8058_L4, LDO4, LDO_50_HPM_MIN_LOAD),
167 VREG_2(PM8058_L5, LDO5, LDO_300_HPM_MIN_LOAD),
168 VREG_2(PM8058_L6, LDO6, LDO_50_HPM_MIN_LOAD),
169 VREG_2(PM8058_L7, LDO7, LDO_50_HPM_MIN_LOAD),
170 VREG_2(PM8058_L8, LDO8, LDO_300_HPM_MIN_LOAD),
171 VREG_2(PM8058_L9, LDO9, LDO_300_HPM_MIN_LOAD),
172 VREG_2(PM8058_L10, LDO10, LDO_300_HPM_MIN_LOAD),
173 VREG_2(PM8058_L11, LDO11, LDO_150_HPM_MIN_LOAD),
174 VREG_2(PM8058_L12, LDO12, LDO_150_HPM_MIN_LOAD),
175 VREG_2(PM8058_L13, LDO13, LDO_300_HPM_MIN_LOAD),
176 VREG_2(PM8058_L14, LDO14, LDO_300_HPM_MIN_LOAD),
177 VREG_2(PM8058_L15, LDO15, LDO_300_HPM_MIN_LOAD),
178 VREG_2(PM8058_L16, LDO16, LDO_300_HPM_MIN_LOAD),
179 VREG_2(PM8058_L17, LDO17, LDO_150_HPM_MIN_LOAD),
180 VREG_2(PM8058_L18, LDO18, LDO_150_HPM_MIN_LOAD),
181 VREG_2(PM8058_L19, LDO19, LDO_150_HPM_MIN_LOAD),
182 VREG_2(PM8058_L20, LDO20, LDO_150_HPM_MIN_LOAD),
183 VREG_2(PM8058_L21, LDO21, LDO_150_HPM_MIN_LOAD),
184 VREG_2(PM8058_L22, LDO22, LDO_300_HPM_MIN_LOAD),
185 VREG_2(PM8058_L23, LDO23, LDO_300_HPM_MIN_LOAD),
186 VREG_2(PM8058_L24, LDO24, LDO_150_HPM_MIN_LOAD),
187 VREG_2(PM8058_L25, LDO25, LDO_150_HPM_MIN_LOAD),
188
189 VREG_2(PM8058_S0, SMPS0, SMPS_HPM_MIN_LOAD),
190 VREG_2(PM8058_S1, SMPS1, SMPS_HPM_MIN_LOAD),
191 VREG_2(PM8058_S2, SMPS2, SMPS_HPM_MIN_LOAD),
192 VREG_2(PM8058_S3, SMPS3, SMPS_HPM_MIN_LOAD),
193 VREG_2(PM8058_S4, SMPS4, SMPS_HPM_MIN_LOAD),
194
195 VREG_1(PM8058_LVS0, LVS0),
196 VREG_1(PM8058_LVS1, LVS1),
197
198 VREG_2(PM8058_NCP, NCP, NCP_HPM_MIN_LOAD),
199
200 VREG_2(PM8901_L0, LDO0B, LDO_300_HPM_MIN_LOAD),
201 VREG_2(PM8901_L1, LDO1B, LDO_300_HPM_MIN_LOAD),
202 VREG_2(PM8901_L2, LDO2B, LDO_300_HPM_MIN_LOAD),
203 VREG_2(PM8901_L3, LDO3B, LDO_300_HPM_MIN_LOAD),
204 VREG_2(PM8901_L4, LDO4B, LDO_300_HPM_MIN_LOAD),
205 VREG_2(PM8901_L5, LDO5B, LDO_300_HPM_MIN_LOAD),
206 VREG_2(PM8901_L6, LDO6B, LDO_300_HPM_MIN_LOAD),
207
208 VREG_2(PM8901_S0, SMPS0B, FTSMPS_HPM_MIN_LOAD),
209 VREG_2(PM8901_S1, SMPS1B, FTSMPS_HPM_MIN_LOAD),
210 VREG_2(PM8901_S2, SMPS2B, FTSMPS_HPM_MIN_LOAD),
211 VREG_2(PM8901_S3, SMPS3B, FTSMPS_HPM_MIN_LOAD),
212 VREG_2(PM8901_S4, SMPS4B, FTSMPS_HPM_MIN_LOAD),
213
214 VREG_1(PM8901_LVS0, LVS0B),
215 VREG_1(PM8901_LVS1, LVS1B),
216 VREG_1(PM8901_LVS2, LVS2B),
217 VREG_1(PM8901_LVS3, LVS3B),
218
219 VREG_1(PM8901_MVS0, MVS),
220};
221
222static void print_rpm_request(struct vreg *vreg, int set);
223static void print_rpm_vote(struct vreg *vreg, enum rpm_vreg_voter voter,
224 int set, int voter_mV, int aggregate_mV);
225static void print_rpm_duplicate(struct vreg *vreg, int set, int cnt);
226
227static unsigned int smps_get_mode(struct regulator_dev *dev);
228static unsigned int ldo_get_mode(struct regulator_dev *dev);
229static unsigned int switch_get_mode(struct regulator_dev *dev);
230
231/* Spin lock needed for sleep-selectable regulators. */
232static DEFINE_SPINLOCK(pm8058_noirq_lock);
233
234static int voltage_from_req(struct vreg *vreg)
235{
236 int shift = 0;
237 uint32_t value = 0, mask = 0;
238
239 value = vreg->req[0].value;
240
241 if (IS_SMPS(vreg->id)) {
242 mask = SMPS_VOLTAGE;
243 shift = SMPS_VOLTAGE_SHIFT;
244 } else if (IS_LDO(vreg->id)) {
245 mask = LDO_VOLTAGE;
246 shift = LDO_VOLTAGE_SHIFT;
247 } else if (IS_NCP(vreg->id)) {
248 mask = NCP_VOLTAGE;
249 shift = NCP_VOLTAGE_SHIFT;
250 }
251
252 return (value & mask) >> shift;
253}
254
255static void voltage_to_req(int voltage, struct vreg *vreg)
256{
257 int shift = 0;
258 uint32_t *value = NULL, mask = 0;
259
260 value = &(vreg->req[0].value);
261
262 if (IS_SMPS(vreg->id)) {
263 mask = SMPS_VOLTAGE;
264 shift = SMPS_VOLTAGE_SHIFT;
265 } else if (IS_LDO(vreg->id)) {
266 mask = LDO_VOLTAGE;
267 shift = LDO_VOLTAGE_SHIFT;
268 } else if (IS_NCP(vreg->id)) {
269 mask = NCP_VOLTAGE;
270 shift = NCP_VOLTAGE_SHIFT;
271 }
272
273 *value &= ~mask;
274 *value |= (voltage << shift) & mask;
275}
276
277static int vreg_send_request(struct vreg *vreg, enum rpm_vreg_voter voter,
278 int set, unsigned mask0, unsigned val0,
279 unsigned mask1, unsigned val1, unsigned cnt,
280 int update_voltage)
281{
282 struct msm_rpm_iv_pair *prev_req;
283 int rc = 0, max_mV_vote = 0, i;
284 unsigned prev0, prev1;
285 int *min_mV_vote;
286
287 if (set == MSM_RPM_CTX_SET_0) {
288 min_mV_vote = vreg->active_min_mV_vote;
289 prev_req = vreg->prev_active_req;
290 } else {
291 min_mV_vote = vreg->sleep_min_mV_vote;
292 prev_req = vreg->prev_sleep_req;
293 }
294
295 prev0 = vreg->req[0].value;
296 vreg->req[0].value &= ~mask0;
297 vreg->req[0].value |= val0 & mask0;
298
299 prev1 = vreg->req[1].value;
300 vreg->req[1].value &= ~mask1;
301 vreg->req[1].value |= val1 & mask1;
302
303 if (update_voltage)
304 min_mV_vote[voter] = voltage_from_req(vreg);
305
306 /* Find the highest voltage voted for and use it. */
307 for (i = 0; i < RPM_VREG_VOTER_COUNT; i++)
308 max_mV_vote = max(max_mV_vote, min_mV_vote[i]);
309 voltage_to_req(max_mV_vote, vreg);
310
311 if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_VOTE)
312 print_rpm_vote(vreg, voter, set, min_mV_vote[voter],
313 max_mV_vote);
314
315 /* Ignore duplicate requests */
316 if (vreg->req[0].value != prev_req[0].value ||
317 vreg->req[1].value != prev_req[1].value) {
318
319 rc = msm_rpmrs_set_noirq(set, vreg->req, cnt);
320 if (rc) {
321 vreg->req[0].value = prev0;
322 vreg->req[1].value = prev1;
323
324 pr_err("%s: msm_rpmrs_set_noirq failed - "
325 "set=%s, id=%d, rc=%d\n", __func__,
326 (set == MSM_RPM_CTX_SET_0 ? "active" : "sleep"),
327 vreg->req[0].id, rc);
328 } else {
329 /* Only save if nonzero and active set. */
330 if (max_mV_vote && (set == MSM_RPM_CTX_SET_0))
331 vreg->save_uV = MILLI_TO_MICRO(max_mV_vote);
332 if (msm_rpm_vreg_debug_mask
333 & MSM_RPM_VREG_DEBUG_REQUEST)
334 print_rpm_request(vreg, set);
335 prev_req[0].value = vreg->req[0].value;
336 prev_req[1].value = vreg->req[1].value;
337 }
338 } else if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_DUPLICATE) {
339 print_rpm_duplicate(vreg, set, cnt);
340 }
341
342 return rc;
343}
344
345static int vreg_set_noirq(struct vreg *vreg, enum rpm_vreg_voter voter,
346 int sleep, unsigned mask0, unsigned val0,
347 unsigned mask1, unsigned val1, unsigned cnt,
348 int update_voltage)
349{
350 unsigned long flags;
351 int rc;
352 unsigned val0_sleep, mask0_sleep;
353
354 if (voter < 0 || voter >= RPM_VREG_VOTER_COUNT)
355 return -EINVAL;
356
357 spin_lock_irqsave(&pm8058_noirq_lock, flags);
358
359 /*
360 * Send sleep set request first so that subsequent set_mode, etc calls
361 * use the voltage from the active set.
362 */
363 if (sleep)
364 rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_SLEEP,
365 mask0, val0, mask1, val1, cnt, update_voltage);
366 else {
367 /*
368 * Vote for 0 V in the sleep set when active set-only is
369 * specified. This ensures that a disable vote will be issued
370 * at some point for the sleep set of the regulator.
371 */
372 val0_sleep = val0;
373 mask0_sleep = mask0;
374 if (IS_SMPS(vreg->id)) {
375 val0_sleep &= ~SMPS_VOLTAGE;
376 mask0_sleep |= SMPS_VOLTAGE;
377 } else if (IS_LDO(vreg->id)) {
378 val0_sleep &= ~LDO_VOLTAGE;
379 mask0_sleep |= LDO_VOLTAGE;
380 } else if (IS_NCP(vreg->id)) {
381 val0_sleep &= ~NCP_VOLTAGE;
382 mask0_sleep |= NCP_VOLTAGE;
383 }
384
385 rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_SLEEP,
386 mask0_sleep, val0_sleep,
387 mask1, val1, cnt, update_voltage);
388 }
389
390 rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_0, mask0, val0,
391 mask1, val1, cnt, update_voltage);
392
393 spin_unlock_irqrestore(&pm8058_noirq_lock, flags);
394
395 return rc;
396}
397
398/**
399 * rpm_vreg_set_voltage - vote for a min_uV value of specified regualtor
400 * @vreg: ID for regulator
401 * @voter: ID for the voter
402 * @min_uV: minimum acceptable voltage (in uV) that is voted for
403 * @max_uV: maximum acceptable voltage (in uV) that is voted for
404 * @sleep_also: 0 for active set only, non-0 for active set and sleep set
405 *
406 * Returns 0 on success or errno.
407 *
408 * This function is used to vote for the voltage of a regulator without
409 * using the regulator framework. It is needed by consumers which hold spin
410 * locks or have interrupts disabled because the regulator framework can sleep.
411 * It is also needed by consumers which wish to only vote for active set
412 * regulator voltage.
413 *
414 * If sleep_also == 0, then a sleep-set value of 0V will be voted for.
415 *
416 * This function may only be called for regulators which have the sleep flag
417 * specified in their private data.
418 */
419int rpm_vreg_set_voltage(enum rpm_vreg_id vreg_id, enum rpm_vreg_voter voter,
420 int min_uV, int max_uV, int sleep_also)
421{
422 int rc;
423 unsigned val0 = 0, val1 = 0, mask0 = 0, mask1 = 0, cnt = 2;
424
425 if (vreg_id < 0 || vreg_id >= RPM_VREG_ID_MAX)
426 return -EINVAL;
427
428 if (!vregs[vreg_id].pdata->sleep_selectable)
429 return -EINVAL;
430
431 if (min_uV < vregs[vreg_id].pdata->init_data.constraints.min_uV ||
432 min_uV > vregs[vreg_id].pdata->init_data.constraints.max_uV)
433 return -EINVAL;
434
435 if (IS_SMPS(vreg_id)) {
436 mask0 = SMPS_VOLTAGE;
437 val0 = MICRO_TO_MILLI(min_uV) << SMPS_VOLTAGE_SHIFT;
438 } else if (IS_LDO(vreg_id)) {
439 mask0 = LDO_VOLTAGE;
440 val0 = MICRO_TO_MILLI(min_uV) << LDO_VOLTAGE_SHIFT;
441 } else if (IS_NCP(vreg_id)) {
442 mask0 = NCP_VOLTAGE;
443 val0 = MICRO_TO_MILLI(min_uV) << NCP_VOLTAGE_SHIFT;
444 cnt = 1;
445 } else {
446 cnt = 1;
447 }
448
449 rc = vreg_set_noirq(&vregs[vreg_id], voter, sleep_also, mask0, val0,
450 mask1, val1, cnt, 1);
451
452 return rc;
453}
454EXPORT_SYMBOL_GPL(rpm_vreg_set_voltage);
455
456/**
457 * rpm_vreg_set_frequency - sets the frequency of a switching regulator
458 * @vreg: ID for regulator
459 * @min_uV: minimum acceptable frequency of operation
460 *
461 * Returns 0 on success or errno.
462 */
463int rpm_vreg_set_frequency(enum rpm_vreg_id vreg_id, enum rpm_vreg_freq freq)
464{
465 unsigned val0 = 0, val1 = 0, mask0 = 0, mask1 = 0, cnt = 2;
466 int rc;
467
468 if (vreg_id < 0 || vreg_id >= RPM_VREG_ID_MAX) {
469 pr_err("%s: invalid regulator id=%d\n", __func__, vreg_id);
470 return -EINVAL;
471 }
472
473 if (freq < 0 || freq > RPM_VREG_FREQ_1p20) {
474 pr_err("%s: invalid frequency=%d\n", __func__, freq);
475 return -EINVAL;
476 }
477
478 if (!IS_SMPS(vreg_id)) {
479 pr_err("%s: regulator id=%d does not support frequency\n",
480 __func__, vreg_id);
481 return -EINVAL;
482 }
483
484 if (!vregs[vreg_id].pdata->sleep_selectable) {
485 pr_err("%s: regulator id=%d is not marked sleep selectable\n",
486 __func__, vreg_id);
487 return -EINVAL;
488 }
489
490 mask1 = SMPS_FREQ;
491 val1 = freq << SMPS_FREQ_SHIFT;
492
493 rc = vreg_set_noirq(&vregs[vreg_id], RPM_VREG_VOTER_REG_FRAMEWORK,
494 1, mask0, val0, mask1, val1, cnt, 0);
495
496 return rc;
497}
498EXPORT_SYMBOL_GPL(rpm_vreg_set_frequency);
499
500#define IS_PMIC_8901_V1(rev) ((rev) == PM_8901_REV_1p0 || \
501 (rev) == PM_8901_REV_1p1)
502
503#define PMIC_8901_V1_SCALE(uV) ((((uV) - 62100) * 23) / 25)
504
505static inline int vreg_hpm_min_uA(struct vreg *vreg)
506{
507 return vreg->hpm_min_load;
508}
509
510static inline int vreg_lpm_max_uA(struct vreg *vreg)
511{
512 return vreg->hpm_min_load - LOAD_THRESHOLD_STEP;
513}
514
515static inline unsigned saturate_load(unsigned load_uA)
516{
517 return (load_uA > MAX_POSSIBLE_LOAD ? MAX_POSSIBLE_LOAD : load_uA);
518}
519
520/* Change vreg->req, but do not send it to the RPM. */
521static int vreg_store(struct vreg *vreg, unsigned mask0, unsigned val0,
522 unsigned mask1, unsigned val1)
523{
524 unsigned long flags = 0;
525
526 if (vreg->pdata->sleep_selectable)
527 spin_lock_irqsave(&pm8058_noirq_lock, flags);
528
529 vreg->req[0].value &= ~mask0;
530 vreg->req[0].value |= val0 & mask0;
531
532 vreg->req[1].value &= ~mask1;
533 vreg->req[1].value |= val1 & mask1;
534
535 if (vreg->pdata->sleep_selectable)
536 spin_unlock_irqrestore(&pm8058_noirq_lock, flags);
537
538 return 0;
539}
540
541static int vreg_set(struct vreg *vreg, unsigned mask0, unsigned val0,
542 unsigned mask1, unsigned val1, unsigned cnt)
543{
544 unsigned prev0 = 0, prev1 = 0;
545 int rc;
546
547 /*
548 * Bypass the normal route for regulators that can be called to change
549 * just the active set values.
550 */
551 if (vreg->pdata->sleep_selectable)
552 return vreg_set_noirq(vreg, RPM_VREG_VOTER_REG_FRAMEWORK, 1,
553 mask0, val0, mask1, val1, cnt, 1);
554
555 prev0 = vreg->req[0].value;
556 vreg->req[0].value &= ~mask0;
557 vreg->req[0].value |= val0 & mask0;
558
559 prev1 = vreg->req[1].value;
560 vreg->req[1].value &= ~mask1;
561 vreg->req[1].value |= val1 & mask1;
562
563 /* Ignore duplicate requests */
564 if (vreg->req[0].value == vreg->prev_active_req[0].value &&
565 vreg->req[1].value == vreg->prev_active_req[1].value) {
566 if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_DUPLICATE)
567 print_rpm_duplicate(vreg, MSM_RPM_CTX_SET_0, cnt);
568 return 0;
569 }
570
571 rc = msm_rpm_set(MSM_RPM_CTX_SET_0, vreg->req, cnt);
572 if (rc) {
573 vreg->req[0].value = prev0;
574 vreg->req[1].value = prev1;
575
576 pr_err("%s: msm_rpm_set fail id=%d, rc=%d\n",
577 __func__, vreg->req[0].id, rc);
578 } else {
579 if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_REQUEST)
580 print_rpm_request(vreg, MSM_RPM_CTX_SET_0);
581 vreg->prev_active_req[0].value = vreg->req[0].value;
582 vreg->prev_active_req[1].value = vreg->req[1].value;
583 }
584
585 return rc;
586}
587
588static int smps_is_enabled(struct regulator_dev *dev)
589{
590 struct vreg *vreg = rdev_get_drvdata(dev);
591 return ((vreg->req[0].value & SMPS_VOLTAGE) >> SMPS_VOLTAGE_SHIFT) != 0;
592}
593
594static int _smps_set_voltage(struct regulator_dev *dev, int min_uV)
595{
596 struct vreg *vreg = rdev_get_drvdata(dev);
597 int scaled_min_uV = min_uV;
598 static int pmic8901_rev;
599
600 /* Scale input request voltage down if using v1 PMIC 8901. */
601 if (IS_8901_SMPS(vreg->id) && min_uV) {
602 if (pmic8901_rev <= 0)
603 pmic8901_rev = pm8901_rev(NULL);
604
605 if (pmic8901_rev < 0)
606 pr_err("%s: setting %s to %d uV; PMIC 8901 revision "
607 "unavailable, no scaling can be performed.\n",
608 __func__, dev->desc->name, min_uV);
609 else if (IS_PMIC_8901_V1(pmic8901_rev))
610 scaled_min_uV = PMIC_8901_V1_SCALE(min_uV);
611 }
612
613 return vreg_set(vreg, SMPS_VOLTAGE,
614 MICRO_TO_MILLI(scaled_min_uV) << SMPS_VOLTAGE_SHIFT,
615 0, 0, 2);
616}
617
618static int smps_set_voltage(struct regulator_dev *dev, int min_uV, int max_uV,
619 unsigned *selector)
620{
621 struct vreg *vreg = rdev_get_drvdata(dev);
622 int rc = 0;
623
624 if (smps_is_enabled(dev))
625 rc = _smps_set_voltage(dev, min_uV);
626 if (rc)
627 return rc;
628
629 /* only save if nonzero (or not disabling) */
630 if (min_uV && (!vreg->pdata->sleep_selectable || !smps_is_enabled(dev)))
631 vreg->save_uV = min_uV;
632
633 return rc;
634}
635
636static int smps_get_voltage(struct regulator_dev *dev)
637{
638 struct vreg *vreg = rdev_get_drvdata(dev);
639 return vreg->save_uV;
640}
641
642static int smps_enable(struct regulator_dev *dev)
643{
644 struct vreg *vreg = rdev_get_drvdata(dev);
645 int rc = 0;
646 unsigned mask, val;
647
648 /* enable by setting voltage */
649 if (MICRO_TO_MILLI(vreg->save_uV) > 0) {
650 /* reenable pin control if it is in use */
651 if (smps_get_mode(dev) == REGULATOR_MODE_IDLE) {
652 mask = SMPS_PIN_CTRL | SMPS_PIN_FN;
653 val = vreg->pdata->pin_ctrl << SMPS_PIN_CTRL_SHIFT
654 | vreg->pdata->pin_fn << SMPS_PIN_FN_SHIFT;
655 vreg_store(vreg, mask, val, 0, 0);
656 }
657
658 rc = _smps_set_voltage(dev, vreg->save_uV);
659 }
660 return rc;
661}
662
663static int smps_disable(struct regulator_dev *dev)
664{
665 struct vreg *vreg = rdev_get_drvdata(dev);
666 unsigned mask, val;
667
668 /* turn off pin control */
669 mask = SMPS_PIN_CTRL | SMPS_PIN_FN;
670 val = RPM_VREG_PIN_CTRL_NONE << SMPS_PIN_CTRL_SHIFT
671 | RPM_VREG_PIN_FN_NONE << SMPS_PIN_FN_SHIFT;
672 vreg_store(vreg, mask, val, 0, 0);
673
674 /* disable by setting voltage to zero */
675 return _smps_set_voltage(dev, 0);
676}
677
678/*
679 * Optimum mode programming:
680 * REGULATOR_MODE_FAST: Go to HPM (highest priority)
681 * REGULATOR_MODE_STANDBY: Go to pin ctrl mode if there are any pin ctrl
682 * votes, else go to LPM
683 *
684 * Pin ctrl mode voting via regulator set_mode:
685 * REGULATOR_MODE_IDLE: Go to pin ctrl mode if the optimum mode is LPM, else
686 * go to HPM
687 * REGULATOR_MODE_NORMAL: Go to LPM if it is the optimum mode, else go to HPM
688 *
689 * Pin ctrl mode takes priority on the RPM when force mode is not set;
690 * therefore, pin ctrl bits must be cleared if LPM or HPM is being voted for.
691 */
692static int smps_set_mode(struct regulator_dev *dev, unsigned int mode)
693{
694 struct vreg *vreg = rdev_get_drvdata(dev);
695 unsigned optimum = vreg->optimum;
696 unsigned pc_vote = vreg->pc_vote;
697 unsigned mode_initialized = vreg->mode_initialized;
698 unsigned mask0 = 0, val0 = 0, mask1 = 0, val1 = 0;
699 int set_hpm = -1, set_pin_control = -1;
700 int peak_uA;
701 int rc = 0;
702
703 peak_uA = MILLI_TO_MICRO((vreg->req[0].value & SMPS_PEAK_CURRENT) >>
704 SMPS_PEAK_CURRENT_SHIFT);
705
706 switch (mode) {
707 case REGULATOR_MODE_FAST:
708 set_hpm = 1;
709 set_pin_control = 0;
710 optimum = REGULATOR_MODE_FAST;
711 mode_initialized = 1;
712 break;
713
714 case REGULATOR_MODE_STANDBY:
715 set_hpm = 0;
716 if (pc_vote)
717 set_pin_control = 1;
718 else
719 set_pin_control = 0;
720 optimum = REGULATOR_MODE_STANDBY;
721 mode_initialized = 1;
722 break;
723
724 case REGULATOR_MODE_IDLE:
725 if (pc_vote++)
726 goto done; /* already taken care of */
727
728 if (mode_initialized && optimum == REGULATOR_MODE_FAST) {
729 set_hpm = 1;
730 set_pin_control = 0;
731 } else {
732 set_pin_control = 1;
733 }
734 break;
735
736 case REGULATOR_MODE_NORMAL:
737 if (pc_vote && --pc_vote)
738 goto done; /* already taken care of */
739
740 if (optimum == REGULATOR_MODE_STANDBY)
741 set_hpm = 0;
742 else
743 set_hpm = 1;
744 set_pin_control = 0;
745 break;
746
747 default:
748 return -EINVAL;
749 }
750
751 if (set_hpm == 1) {
752 /* Make sure that request currents are at HPM level. */
753 if (peak_uA < vreg_hpm_min_uA(vreg)) {
754 mask0 = SMPS_PEAK_CURRENT;
755 mask1 = SMPS_AVG_CURRENT;
756 val0 = (MICRO_TO_MILLI(vreg_hpm_min_uA(vreg)) <<
757 SMPS_PEAK_CURRENT_SHIFT) & SMPS_PEAK_CURRENT;
758 val1 = (MICRO_TO_MILLI(vreg_hpm_min_uA(vreg)) <<
759 SMPS_AVG_CURRENT_SHIFT) & SMPS_AVG_CURRENT;
760 }
761 } else if (set_hpm == 0) {
762 /* Make sure that request currents are at LPM level. */
763 if (peak_uA > vreg_lpm_max_uA(vreg)) {
764 mask0 = SMPS_PEAK_CURRENT;
765 mask1 = SMPS_AVG_CURRENT;
766 val0 = (MICRO_TO_MILLI(vreg_lpm_max_uA(vreg)) <<
767 SMPS_PEAK_CURRENT_SHIFT) & SMPS_PEAK_CURRENT;
768 val1 = (MICRO_TO_MILLI(vreg_lpm_max_uA(vreg)) <<
769 SMPS_AVG_CURRENT_SHIFT) & SMPS_AVG_CURRENT;
770 }
771 }
772
773 if (set_pin_control == 1) {
774 /* Enable pin control and pin function. */
775 mask0 |= SMPS_PIN_CTRL | SMPS_PIN_FN;
776 val0 |= vreg->pdata->pin_ctrl << SMPS_PIN_CTRL_SHIFT
777 | vreg->pdata->pin_fn << SMPS_PIN_FN_SHIFT;
778 } else if (set_pin_control == 0) {
779 /* Clear pin control and pin function*/
780 mask0 |= SMPS_PIN_CTRL | SMPS_PIN_FN;
781 val0 |= RPM_VREG_PIN_CTRL_NONE << SMPS_PIN_CTRL_SHIFT
782 | RPM_VREG_PIN_FN_NONE << SMPS_PIN_FN_SHIFT;
783 }
784
785 if (smps_is_enabled(dev)) {
786 rc = vreg_set(vreg, mask0, val0, mask1, val1, 2);
787 } else {
788 /* Regulator is disabled; store but don't send new request. */
789 rc = vreg_store(vreg, mask0, val0, mask1, val1);
790 }
791 if (rc)
792 return rc;
793
794done:
795 vreg->mode_initialized = mode_initialized;
796 vreg->optimum = optimum;
797 vreg->pc_vote = pc_vote;
798
799 return 0;
800}
801
802static unsigned int smps_get_mode(struct regulator_dev *dev)
803{
804 struct vreg *vreg = rdev_get_drvdata(dev);
805
806 if ((vreg->optimum == REGULATOR_MODE_FAST) && vreg->mode_initialized)
807 return REGULATOR_MODE_FAST;
808 else if (vreg->pc_vote)
809 return REGULATOR_MODE_IDLE;
810 else if (vreg->optimum == REGULATOR_MODE_STANDBY)
811 return REGULATOR_MODE_STANDBY;
812 return REGULATOR_MODE_FAST;
813}
814
815unsigned int smps_get_optimum_mode(struct regulator_dev *dev, int input_uV,
816 int output_uV, int load_uA)
817{
818 struct vreg *vreg = rdev_get_drvdata(dev);
819
820 if (MICRO_TO_MILLI(load_uA) > 0) {
821 vreg->req[0].value &= ~SMPS_PEAK_CURRENT;
822 vreg->req[0].value |= (MICRO_TO_MILLI(saturate_load(load_uA)) <<
823 SMPS_PEAK_CURRENT_SHIFT) & SMPS_PEAK_CURRENT;
824 vreg->req[1].value &= ~SMPS_AVG_CURRENT;
825 vreg->req[1].value |= (MICRO_TO_MILLI(saturate_load(load_uA)) <<
826 SMPS_AVG_CURRENT_SHIFT) & SMPS_AVG_CURRENT;
827 } else {
828 /*
829 * smps_get_optimum_mode is being called before consumers have
830 * specified their load currents via regulator_set_optimum_mode.
831 * Return whatever the existing mode is.
832 */
833 return smps_get_mode(dev);
834 }
835
836 if (load_uA >= vreg->hpm_min_load)
837 return REGULATOR_MODE_FAST;
838 return REGULATOR_MODE_STANDBY;
839}
840
841static int ldo_is_enabled(struct regulator_dev *dev)
842{
843 struct vreg *vreg = rdev_get_drvdata(dev);
844 return ((vreg->req[0].value & LDO_VOLTAGE) >> LDO_VOLTAGE_SHIFT) != 0;
845}
846
847static int _ldo_set_voltage(struct regulator_dev *dev, int min_uV)
848{
849 struct vreg *vreg = rdev_get_drvdata(dev);
850
851 return vreg_set(vreg, LDO_VOLTAGE,
852 MICRO_TO_MILLI(min_uV) << LDO_VOLTAGE_SHIFT,
853 0, 0, 2);
854}
855
856static int ldo_set_voltage(struct regulator_dev *dev, int min_uV, int max_uV,
857 unsigned *selector)
858{
859 struct vreg *vreg = rdev_get_drvdata(dev);
860 int rc = 0;
861
862 if (ldo_is_enabled(dev))
863 rc = _ldo_set_voltage(dev, min_uV);
864 if (rc)
865 return rc;
866
867 /* only save if nonzero (or not disabling) */
868 if (min_uV && (!vreg->pdata->sleep_selectable || !ldo_is_enabled(dev)))
869 vreg->save_uV = min_uV;
870
871 return rc;
872}
873
874static int ldo_get_voltage(struct regulator_dev *dev)
875{
876 struct vreg *vreg = rdev_get_drvdata(dev);
877 return vreg->save_uV;
878}
879
880static int ldo_enable(struct regulator_dev *dev)
881{
882 struct vreg *vreg = rdev_get_drvdata(dev);
883 int rc = 0;
884 unsigned mask, val;
885
886 /* enable by setting voltage */
887 if (MICRO_TO_MILLI(vreg->save_uV) > 0) {
888 /* reenable pin control if it is in use */
889 if (ldo_get_mode(dev) == REGULATOR_MODE_IDLE) {
890 mask = LDO_PIN_CTRL | LDO_PIN_FN;
891 val = vreg->pdata->pin_ctrl << LDO_PIN_CTRL_SHIFT
892 | vreg->pdata->pin_fn << LDO_PIN_FN_SHIFT;
893 vreg_store(vreg, mask, val, 0, 0);
894 }
895
896 rc = _ldo_set_voltage(dev, vreg->save_uV);
897 }
898 return rc;
899}
900
901static int ldo_disable(struct regulator_dev *dev)
902{
903 struct vreg *vreg = rdev_get_drvdata(dev);
904 unsigned mask, val;
905
906 /* turn off pin control */
907 mask = LDO_PIN_CTRL | LDO_PIN_FN;
908 val = RPM_VREG_PIN_CTRL_NONE << LDO_PIN_CTRL_SHIFT
909 | RPM_VREG_PIN_FN_NONE << LDO_PIN_FN_SHIFT;
910 vreg_store(vreg, mask, val, 0, 0);
911
912 /* disable by setting voltage to zero */
913 return _ldo_set_voltage(dev, 0);
914}
915
916/*
917 * Optimum mode programming:
918 * REGULATOR_MODE_FAST: Go to HPM (highest priority)
919 * REGULATOR_MODE_STANDBY: Go to pin ctrl mode if there are any pin ctrl
920 * votes, else go to LPM
921 *
922 * Pin ctrl mode voting via regulator set_mode:
923 * REGULATOR_MODE_IDLE: Go to pin ctrl mode if the optimum mode is LPM, else
924 * go to HPM
925 * REGULATOR_MODE_NORMAL: Go to LPM if it is the optimum mode, else go to HPM
926 *
927 * Pin ctrl mode takes priority on the RPM when force mode is not set;
928 * therefore, pin ctrl bits must be cleared if LPM or HPM is being voted for.
929 */
930static int ldo_set_mode(struct regulator_dev *dev, unsigned int mode)
931{
932 struct vreg *vreg = rdev_get_drvdata(dev);
933 unsigned optimum = vreg->optimum;
934 unsigned pc_vote = vreg->pc_vote;
935 unsigned mode_initialized = vreg->mode_initialized;
936 unsigned mask0 = 0, val0 = 0, mask1 = 0, val1 = 0;
937 int set_hpm = -1, set_pin_control = -1;
938 int peak_uA;
939 int rc = 0;
940
941 peak_uA = MILLI_TO_MICRO((vreg->req[0].value & LDO_PEAK_CURRENT) >>
942 LDO_PEAK_CURRENT_SHIFT);
943
944 switch (mode) {
945 case REGULATOR_MODE_FAST:
946 set_hpm = 1;
947 set_pin_control = 0;
948 optimum = REGULATOR_MODE_FAST;
949 mode_initialized = 1;
950 break;
951
952 case REGULATOR_MODE_STANDBY:
953 set_hpm = 0;
954 if (pc_vote)
955 set_pin_control = 1;
956 else
957 set_pin_control = 0;
958 optimum = REGULATOR_MODE_STANDBY;
959 mode_initialized = 1;
960 break;
961
962 case REGULATOR_MODE_IDLE:
963 if (pc_vote++)
964 goto done; /* already taken care of */
965
966 if (mode_initialized && optimum == REGULATOR_MODE_FAST) {
967 set_hpm = 1;
968 set_pin_control = 0;
969 } else {
970 set_pin_control = 1;
971 }
972 break;
973
974 case REGULATOR_MODE_NORMAL:
975 if (pc_vote && --pc_vote)
976 goto done; /* already taken care of */
977
978 if (optimum == REGULATOR_MODE_STANDBY)
979 set_hpm = 0;
980 else
981 set_hpm = 1;
982 set_pin_control = 0;
983 break;
984
985 default:
986 return -EINVAL;
987 }
988
989 if (set_hpm == 1) {
990 /* Make sure that request currents are at HPM level. */
991 if (peak_uA < vreg_hpm_min_uA(vreg)) {
992 mask0 = LDO_PEAK_CURRENT;
993 mask1 = LDO_AVG_CURRENT;
994 val0 = (MICRO_TO_MILLI(vreg_hpm_min_uA(vreg)) <<
995 LDO_PEAK_CURRENT_SHIFT) & LDO_PEAK_CURRENT;
996 val1 = (MICRO_TO_MILLI(vreg_hpm_min_uA(vreg)) <<
997 LDO_AVG_CURRENT_SHIFT) & LDO_AVG_CURRENT;
998 }
999 } else if (set_hpm == 0) {
1000 /* Make sure that request currents are at LPM level. */
1001 if (peak_uA > vreg_lpm_max_uA(vreg)) {
1002 mask0 = LDO_PEAK_CURRENT;
1003 mask1 = LDO_AVG_CURRENT;
1004 val0 = (MICRO_TO_MILLI(vreg_lpm_max_uA(vreg)) <<
1005 LDO_PEAK_CURRENT_SHIFT) & LDO_PEAK_CURRENT;
1006 val1 = (MICRO_TO_MILLI(vreg_lpm_max_uA(vreg)) <<
1007 LDO_AVG_CURRENT_SHIFT) & LDO_AVG_CURRENT;
1008 }
1009 }
1010
1011 if (set_pin_control == 1) {
1012 /* Enable pin control and pin function. */
1013 mask0 |= LDO_PIN_CTRL | LDO_PIN_FN;
1014 val0 |= vreg->pdata->pin_ctrl << LDO_PIN_CTRL_SHIFT
1015 | vreg->pdata->pin_fn << LDO_PIN_FN_SHIFT;
1016 } else if (set_pin_control == 0) {
1017 /* Clear pin control and pin function*/
1018 mask0 |= LDO_PIN_CTRL | LDO_PIN_FN;
1019 val0 |= RPM_VREG_PIN_CTRL_NONE << LDO_PIN_CTRL_SHIFT
1020 | RPM_VREG_PIN_FN_NONE << LDO_PIN_FN_SHIFT;
1021 }
1022
1023 if (ldo_is_enabled(dev)) {
1024 rc = vreg_set(vreg, mask0, val0, mask1, val1, 2);
1025 } else {
1026 /* Regulator is disabled; store but don't send new request. */
1027 rc = vreg_store(vreg, mask0, val0, mask1, val1);
1028 }
1029 if (rc)
1030 return rc;
1031
1032done:
1033 vreg->mode_initialized = mode_initialized;
1034 vreg->optimum = optimum;
1035 vreg->pc_vote = pc_vote;
1036
1037 return 0;
1038}
1039
1040static unsigned int ldo_get_mode(struct regulator_dev *dev)
1041{
1042 struct vreg *vreg = rdev_get_drvdata(dev);
1043
1044 if ((vreg->optimum == REGULATOR_MODE_FAST) && vreg->mode_initialized)
1045 return REGULATOR_MODE_FAST;
1046 else if (vreg->pc_vote)
1047 return REGULATOR_MODE_IDLE;
1048 else if (vreg->optimum == REGULATOR_MODE_STANDBY)
1049 return REGULATOR_MODE_STANDBY;
1050 return REGULATOR_MODE_FAST;
1051}
1052
1053unsigned int ldo_get_optimum_mode(struct regulator_dev *dev, int input_uV,
1054 int output_uV, int load_uA)
1055{
1056 struct vreg *vreg = rdev_get_drvdata(dev);
1057
1058 if (MICRO_TO_MILLI(load_uA) > 0) {
1059 vreg->req[0].value &= ~LDO_PEAK_CURRENT;
1060 vreg->req[0].value |= (MICRO_TO_MILLI(saturate_load(load_uA)) <<
1061 LDO_PEAK_CURRENT_SHIFT) & LDO_PEAK_CURRENT;
1062 vreg->req[1].value &= ~LDO_AVG_CURRENT;
1063 vreg->req[1].value |= (MICRO_TO_MILLI(saturate_load(load_uA)) <<
1064 LDO_AVG_CURRENT_SHIFT) & LDO_AVG_CURRENT;
1065 } else {
1066 /*
1067 * ldo_get_optimum_mode is being called before consumers have
1068 * specified their load currents via regulator_set_optimum_mode.
1069 * Return whatever the existing mode is.
1070 */
1071 return ldo_get_mode(dev);
1072 }
1073
1074 if (load_uA >= vreg->hpm_min_load)
1075 return REGULATOR_MODE_FAST;
1076 return REGULATOR_MODE_STANDBY;
1077}
1078
1079static int switch_enable(struct regulator_dev *dev)
1080{
1081 struct vreg *vreg = rdev_get_drvdata(dev);
1082 unsigned mask = 0, val = 0;
1083
1084 /* reenable pin control if it is in use */
1085 if (switch_get_mode(dev) == REGULATOR_MODE_IDLE) {
1086 mask = SWITCH_PIN_CTRL | SWITCH_PIN_FN;
1087 val = vreg->pdata->pin_ctrl << SWITCH_PIN_CTRL_SHIFT
1088 | vreg->pdata->pin_fn << SWITCH_PIN_FN_SHIFT;
1089 }
1090
1091 return vreg_set(rdev_get_drvdata(dev), SWITCH_STATE | mask,
1092 (RPM_VREG_STATE_ON << SWITCH_STATE_SHIFT) | val, 0, 0, 1);
1093}
1094
1095static int switch_disable(struct regulator_dev *dev)
1096{
1097 unsigned mask, val;
1098
1099 /* turn off pin control */
1100 mask = SWITCH_PIN_CTRL | SWITCH_PIN_FN;
1101 val = RPM_VREG_PIN_CTRL_NONE << SWITCH_PIN_CTRL_SHIFT
1102 | RPM_VREG_PIN_FN_NONE << SWITCH_PIN_FN_SHIFT;
1103
1104 return vreg_set(rdev_get_drvdata(dev), SWITCH_STATE | mask,
1105 (RPM_VREG_STATE_OFF << SWITCH_STATE_SHIFT) | val, 0, 0, 1);
1106}
1107
1108static int switch_is_enabled(struct regulator_dev *dev)
1109{
1110 struct vreg *vreg = rdev_get_drvdata(dev);
1111 enum rpm_vreg_state state;
1112
1113 state = (vreg->req[0].value & SWITCH_STATE) >> SWITCH_STATE_SHIFT;
1114
1115 return state == RPM_VREG_STATE_ON;
1116}
1117
1118/*
1119 * Pin ctrl mode voting via regulator set_mode:
1120 * REGULATOR_MODE_IDLE: Go to pin ctrl mode if the optimum mode is LPM, else
1121 * go to HPM
1122 * REGULATOR_MODE_NORMAL: Go to LPM if it is the optimum mode, else go to HPM
1123 */
1124static int switch_set_mode(struct regulator_dev *dev, unsigned int mode)
1125{
1126 struct vreg *vreg = rdev_get_drvdata(dev);
1127 unsigned pc_vote = vreg->pc_vote;
1128 unsigned mask, val;
1129 int rc;
1130
1131 switch (mode) {
1132 case REGULATOR_MODE_IDLE:
1133 if (pc_vote++)
1134 goto done; /* already taken care of */
1135
1136 mask = SWITCH_PIN_CTRL | SWITCH_PIN_FN;
1137 val = vreg->pdata->pin_ctrl << SWITCH_PIN_CTRL_SHIFT
1138 | vreg->pdata->pin_fn << SWITCH_PIN_FN_SHIFT;
1139 break;
1140
1141 case REGULATOR_MODE_NORMAL:
1142 if (--pc_vote)
1143 goto done; /* already taken care of */
1144
1145 mask = SWITCH_PIN_CTRL | SWITCH_PIN_FN;
1146 val = RPM_VREG_PIN_CTRL_NONE << SWITCH_PIN_CTRL_SHIFT
1147 | RPM_VREG_PIN_FN_NONE << SWITCH_PIN_FN_SHIFT;
1148 break;
1149
1150 default:
1151 return -EINVAL;
1152 }
1153
1154 if (switch_is_enabled(dev)) {
1155 rc = vreg_set(vreg, mask, val, 0, 0, 2);
1156 } else {
1157 /* Regulator is disabled; store but don't send new request. */
1158 rc = vreg_store(vreg, mask, val, 0, 0);
1159 }
1160 if (rc)
1161 return rc;
1162
1163done:
1164 vreg->pc_vote = pc_vote;
1165 return 0;
1166}
1167
1168static unsigned int switch_get_mode(struct regulator_dev *dev)
1169{
1170 struct vreg *vreg = rdev_get_drvdata(dev);
1171
1172 if (vreg->pc_vote)
1173 return REGULATOR_MODE_IDLE;
1174 return REGULATOR_MODE_NORMAL;
1175}
1176
1177static int ncp_enable(struct regulator_dev *dev)
1178{
1179 return vreg_set(rdev_get_drvdata(dev), NCP_STATE,
1180 RPM_VREG_STATE_ON << NCP_STATE_SHIFT, 0, 0, 2);
1181}
1182
1183static int ncp_disable(struct regulator_dev *dev)
1184{
1185 return vreg_set(rdev_get_drvdata(dev), NCP_STATE,
1186 RPM_VREG_STATE_OFF << NCP_STATE_SHIFT, 0, 0, 2);
1187}
1188
1189static int ncp_is_enabled(struct regulator_dev *dev)
1190{
1191 struct vreg *vreg = rdev_get_drvdata(dev);
1192 enum rpm_vreg_state state;
1193
1194 state = (vreg->req[0].value & NCP_STATE) >> NCP_STATE_SHIFT;
1195
1196 return state == RPM_VREG_STATE_ON;
1197}
1198
1199static int ncp_set_voltage(struct regulator_dev *dev, int min_uV, int max_uV,
1200 unsigned *selector)
1201{
1202 return vreg_set(rdev_get_drvdata(dev), NCP_VOLTAGE,
1203 MICRO_TO_MILLI(min_uV) << NCP_VOLTAGE_SHIFT, 0, 0, 2);
1204}
1205
1206static int ncp_get_voltage(struct regulator_dev *dev)
1207{
1208 struct vreg *vreg = rdev_get_drvdata(dev);
1209
1210 return MILLI_TO_MICRO((vreg->req[0].value & NCP_VOLTAGE) >>
1211 NCP_VOLTAGE_SHIFT);
1212}
1213
1214static struct regulator_ops ldo_ops = {
1215 .enable = ldo_enable,
1216 .disable = ldo_disable,
1217 .is_enabled = ldo_is_enabled,
1218 .set_voltage = ldo_set_voltage,
1219 .get_voltage = ldo_get_voltage,
1220 .set_mode = ldo_set_mode,
1221 .get_optimum_mode = ldo_get_optimum_mode,
1222 .get_mode = ldo_get_mode,
1223};
1224
1225static struct regulator_ops smps_ops = {
1226 .enable = smps_enable,
1227 .disable = smps_disable,
1228 .is_enabled = smps_is_enabled,
1229 .set_voltage = smps_set_voltage,
1230 .get_voltage = smps_get_voltage,
1231 .set_mode = smps_set_mode,
1232 .get_optimum_mode = smps_get_optimum_mode,
1233 .get_mode = smps_get_mode,
1234};
1235
1236static struct regulator_ops switch_ops = {
1237 .enable = switch_enable,
1238 .disable = switch_disable,
1239 .is_enabled = switch_is_enabled,
1240 .set_mode = switch_set_mode,
1241 .get_mode = switch_get_mode,
1242};
1243
1244static struct regulator_ops ncp_ops = {
1245 .enable = ncp_enable,
1246 .disable = ncp_disable,
1247 .is_enabled = ncp_is_enabled,
1248 .set_voltage = ncp_set_voltage,
1249 .get_voltage = ncp_get_voltage,
1250};
1251
1252#define DESC(_id, _name, _ops) \
1253 [_id] = { \
1254 .id = _id, \
1255 .name = _name, \
1256 .ops = _ops, \
1257 .type = REGULATOR_VOLTAGE, \
1258 .owner = THIS_MODULE, \
1259 }
1260
1261static struct regulator_desc vreg_descrip[RPM_VREG_ID_MAX] = {
1262 DESC(RPM_VREG_ID_PM8058_L0, "8058_l0", &ldo_ops),
1263 DESC(RPM_VREG_ID_PM8058_L1, "8058_l1", &ldo_ops),
1264 DESC(RPM_VREG_ID_PM8058_L2, "8058_l2", &ldo_ops),
1265 DESC(RPM_VREG_ID_PM8058_L3, "8058_l3", &ldo_ops),
1266 DESC(RPM_VREG_ID_PM8058_L4, "8058_l4", &ldo_ops),
1267 DESC(RPM_VREG_ID_PM8058_L5, "8058_l5", &ldo_ops),
1268 DESC(RPM_VREG_ID_PM8058_L6, "8058_l6", &ldo_ops),
1269 DESC(RPM_VREG_ID_PM8058_L7, "8058_l7", &ldo_ops),
1270 DESC(RPM_VREG_ID_PM8058_L8, "8058_l8", &ldo_ops),
1271 DESC(RPM_VREG_ID_PM8058_L9, "8058_l9", &ldo_ops),
1272 DESC(RPM_VREG_ID_PM8058_L10, "8058_l10", &ldo_ops),
1273 DESC(RPM_VREG_ID_PM8058_L11, "8058_l11", &ldo_ops),
1274 DESC(RPM_VREG_ID_PM8058_L12, "8058_l12", &ldo_ops),
1275 DESC(RPM_VREG_ID_PM8058_L13, "8058_l13", &ldo_ops),
1276 DESC(RPM_VREG_ID_PM8058_L14, "8058_l14", &ldo_ops),
1277 DESC(RPM_VREG_ID_PM8058_L15, "8058_l15", &ldo_ops),
1278 DESC(RPM_VREG_ID_PM8058_L16, "8058_l16", &ldo_ops),
1279 DESC(RPM_VREG_ID_PM8058_L17, "8058_l17", &ldo_ops),
1280 DESC(RPM_VREG_ID_PM8058_L18, "8058_l18", &ldo_ops),
1281 DESC(RPM_VREG_ID_PM8058_L19, "8058_l19", &ldo_ops),
1282 DESC(RPM_VREG_ID_PM8058_L20, "8058_l20", &ldo_ops),
1283 DESC(RPM_VREG_ID_PM8058_L21, "8058_l21", &ldo_ops),
1284 DESC(RPM_VREG_ID_PM8058_L22, "8058_l22", &ldo_ops),
1285 DESC(RPM_VREG_ID_PM8058_L23, "8058_l23", &ldo_ops),
1286 DESC(RPM_VREG_ID_PM8058_L24, "8058_l24", &ldo_ops),
1287 DESC(RPM_VREG_ID_PM8058_L25, "8058_l25", &ldo_ops),
1288
1289 DESC(RPM_VREG_ID_PM8058_S0, "8058_s0", &smps_ops),
1290 DESC(RPM_VREG_ID_PM8058_S1, "8058_s1", &smps_ops),
1291 DESC(RPM_VREG_ID_PM8058_S2, "8058_s2", &smps_ops),
1292 DESC(RPM_VREG_ID_PM8058_S3, "8058_s3", &smps_ops),
1293 DESC(RPM_VREG_ID_PM8058_S4, "8058_s4", &smps_ops),
1294
1295 DESC(RPM_VREG_ID_PM8058_LVS0, "8058_lvs0", &switch_ops),
1296 DESC(RPM_VREG_ID_PM8058_LVS1, "8058_lvs1", &switch_ops),
1297
1298 DESC(RPM_VREG_ID_PM8058_NCP, "8058_ncp", &ncp_ops),
1299
1300 DESC(RPM_VREG_ID_PM8901_L0, "8901_l0", &ldo_ops),
1301 DESC(RPM_VREG_ID_PM8901_L1, "8901_l1", &ldo_ops),
1302 DESC(RPM_VREG_ID_PM8901_L2, "8901_l2", &ldo_ops),
1303 DESC(RPM_VREG_ID_PM8901_L3, "8901_l3", &ldo_ops),
1304 DESC(RPM_VREG_ID_PM8901_L4, "8901_l4", &ldo_ops),
1305 DESC(RPM_VREG_ID_PM8901_L5, "8901_l5", &ldo_ops),
1306 DESC(RPM_VREG_ID_PM8901_L6, "8901_l6", &ldo_ops),
1307
1308 DESC(RPM_VREG_ID_PM8901_S0, "8901_s0", &smps_ops),
1309 DESC(RPM_VREG_ID_PM8901_S1, "8901_s1", &smps_ops),
1310 DESC(RPM_VREG_ID_PM8901_S2, "8901_s2", &smps_ops),
1311 DESC(RPM_VREG_ID_PM8901_S3, "8901_s3", &smps_ops),
1312 DESC(RPM_VREG_ID_PM8901_S4, "8901_s4", &smps_ops),
1313
1314 DESC(RPM_VREG_ID_PM8901_LVS0, "8901_lvs0", &switch_ops),
1315 DESC(RPM_VREG_ID_PM8901_LVS1, "8901_lvs1", &switch_ops),
1316 DESC(RPM_VREG_ID_PM8901_LVS2, "8901_lvs2", &switch_ops),
1317 DESC(RPM_VREG_ID_PM8901_LVS3, "8901_lvs3", &switch_ops),
1318
1319 DESC(RPM_VREG_ID_PM8901_MVS0, "8901_mvs0", &switch_ops),
1320};
1321
1322static void ldo_init(struct vreg *vreg)
1323{
1324 enum rpm_vreg_pin_fn pf = RPM_VREG_PIN_FN_NONE;
1325
1326 /* Allow pf=sleep_b to be specified by platform data. */
1327 if (vreg->pdata->pin_fn == RPM_VREG_PIN_FN_SLEEP_B)
1328 pf = RPM_VREG_PIN_FN_SLEEP_B;
1329
1330 vreg->req[0].value =
1331 MICRO_TO_MILLI(saturate_load(vreg->pdata->peak_uA)) <<
1332 LDO_PEAK_CURRENT_SHIFT |
1333 vreg->pdata->mode << LDO_MODE_SHIFT | pf << LDO_PIN_FN_SHIFT |
1334 RPM_VREG_PIN_CTRL_NONE << LDO_PIN_CTRL_SHIFT;
1335
1336 vreg->req[1].value =
1337 vreg->pdata->pull_down_enable << LDO_PULL_DOWN_ENABLE_SHIFT |
1338 MICRO_TO_MILLI(saturate_load(vreg->pdata->avg_uA)) <<
1339 LDO_AVG_CURRENT_SHIFT;
1340}
1341
1342static void smps_init(struct vreg *vreg)
1343{
1344 enum rpm_vreg_pin_fn pf = RPM_VREG_PIN_FN_NONE;
1345
1346 /* Allow pf=sleep_b to be specified by platform data. */
1347 if (vreg->pdata->pin_fn == RPM_VREG_PIN_FN_SLEEP_B)
1348 pf = RPM_VREG_PIN_FN_SLEEP_B;
1349
1350 vreg->req[0].value =
1351 MICRO_TO_MILLI(saturate_load(vreg->pdata->peak_uA)) <<
1352 SMPS_PEAK_CURRENT_SHIFT |
1353 vreg->pdata->mode << SMPS_MODE_SHIFT | pf << SMPS_PIN_FN_SHIFT |
1354 RPM_VREG_PIN_CTRL_NONE << SMPS_PIN_CTRL_SHIFT;
1355
1356
1357 vreg->req[1].value =
1358 vreg->pdata->pull_down_enable << SMPS_PULL_DOWN_ENABLE_SHIFT |
1359 MICRO_TO_MILLI(saturate_load(vreg->pdata->avg_uA)) <<
1360 SMPS_AVG_CURRENT_SHIFT |
1361 vreg->pdata->freq << SMPS_FREQ_SHIFT |
1362 0 << SMPS_CLK_SRC_SHIFT;
1363}
1364
1365static void ncp_init(struct vreg *vreg)
1366{
1367 vreg->req[0].value = vreg->pdata->state << NCP_STATE_SHIFT;
1368}
1369
1370static void switch_init(struct vreg *vreg)
1371{
1372 enum rpm_vreg_pin_fn pf = RPM_VREG_PIN_FN_NONE;
1373
1374 /* Allow pf=sleep_b to be specified by platform data. */
1375 if (vreg->pdata->pin_fn == RPM_VREG_PIN_FN_SLEEP_B)
1376 pf = RPM_VREG_PIN_FN_SLEEP_B;
1377
1378 vreg->req[0].value =
1379 vreg->pdata->state << SWITCH_STATE_SHIFT |
1380 vreg->pdata->pull_down_enable <<
1381 SWITCH_PULL_DOWN_ENABLE_SHIFT |
1382 pf << SWITCH_PIN_FN_SHIFT |
1383 RPM_VREG_PIN_CTRL_NONE << SWITCH_PIN_CTRL_SHIFT;
1384}
1385
1386static int vreg_init(enum rpm_vreg_id id, struct vreg *vreg)
1387{
1388 vreg->save_uV = vreg->pdata->default_uV;
1389
1390 if (vreg->pdata->peak_uA >= vreg->hpm_min_load)
1391 vreg->optimum = REGULATOR_MODE_FAST;
1392 else
1393 vreg->optimum = REGULATOR_MODE_STANDBY;
1394
1395 vreg->mode_initialized = 0;
1396
1397 if (IS_LDO(id))
1398 ldo_init(vreg);
1399 else if (IS_SMPS(id))
1400 smps_init(vreg);
1401 else if (IS_NCP(id))
1402 ncp_init(vreg);
1403 else if (IS_SWITCH(id))
1404 switch_init(vreg);
1405 else
1406 return -EINVAL;
1407
1408 return 0;
1409}
1410
1411static int __devinit rpm_vreg_probe(struct platform_device *pdev)
1412{
1413 struct regulator_desc *rdesc;
1414 struct regulator_dev *rdev;
1415 struct vreg *vreg;
1416 int rc;
1417
1418 if (pdev == NULL)
1419 return -EINVAL;
1420
1421 if (pdev->id < 0 || pdev->id >= RPM_VREG_ID_MAX)
1422 return -ENODEV;
1423
1424 vreg = &vregs[pdev->id];
1425 vreg->pdata = pdev->dev.platform_data;
1426 vreg->id = pdev->id;
1427 rdesc = &vreg_descrip[pdev->id];
1428
1429 rc = vreg_init(pdev->id, vreg);
1430 if (rc) {
1431 pr_err("%s: vreg_init failed, rc=%d\n", __func__, rc);
1432 return rc;
1433 }
1434
1435 /* Disallow idle and normal modes if pin control isn't set. */
1436 if ((vreg->pdata->pin_ctrl == RPM_VREG_PIN_CTRL_NONE)
1437 && ((vreg->pdata->pin_fn == RPM_VREG_PIN_FN_ENABLE)
1438 || (vreg->pdata->pin_fn == RPM_VREG_PIN_FN_MODE)))
1439 vreg->pdata->init_data.constraints.valid_modes_mask
1440 &= ~(REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE);
1441
1442 rdev = regulator_register(rdesc, &pdev->dev,
1443 &vreg->pdata->init_data, vreg);
1444 if (IS_ERR(rdev)) {
1445 rc = PTR_ERR(rdev);
1446 pr_err("%s: id=%d, rc=%d\n", __func__,
1447 pdev->id, rc);
1448 return rc;
1449 }
1450
1451 platform_set_drvdata(pdev, rdev);
1452
1453 return rc;
1454}
1455
1456static int __devexit rpm_vreg_remove(struct platform_device *pdev)
1457{
1458 struct regulator_dev *rdev = platform_get_drvdata(pdev);
1459
1460 platform_set_drvdata(pdev, NULL);
1461 regulator_unregister(rdev);
1462
1463 return 0;
1464}
1465
1466static struct platform_driver rpm_vreg_driver = {
1467 .probe = rpm_vreg_probe,
1468 .remove = __devexit_p(rpm_vreg_remove),
1469 .driver = {
1470 .name = "rpm-regulator",
1471 .owner = THIS_MODULE,
1472 },
1473};
1474
1475static int __init rpm_vreg_init(void)
1476{
1477 return platform_driver_register(&rpm_vreg_driver);
1478}
1479
1480static void __exit rpm_vreg_exit(void)
1481{
1482 platform_driver_unregister(&rpm_vreg_driver);
1483}
1484
1485postcore_initcall(rpm_vreg_init);
1486module_exit(rpm_vreg_exit);
1487
1488#define VREG_ID_IS_8058_S0_OR_S1(id) \
1489 ((id == RPM_VREG_ID_PM8058_S0) || (id == RPM_VREG_ID_PM8058_S1))
1490
1491static void print_rpm_request(struct vreg *vreg, int set)
1492{
1493 int v, ip, fm, pc, pf, pd, ia, freq, clk, state;
1494
1495 /* Suppress 8058_s0 and 8058_s1 printing. */
1496 if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_8058_S0_S1)
1497 && VREG_ID_IS_8058_S0_OR_S1(vreg->id))
1498 return;
1499
1500 if (IS_LDO(vreg->id)) {
1501 v = (vreg->req[0].value & LDO_VOLTAGE) >> LDO_VOLTAGE_SHIFT;
1502 ip = (vreg->req[0].value & LDO_PEAK_CURRENT)
1503 >> LDO_PEAK_CURRENT_SHIFT;
1504 fm = (vreg->req[0].value & LDO_MODE) >> LDO_MODE_SHIFT;
1505 pc = (vreg->req[0].value & LDO_PIN_CTRL) >> LDO_PIN_CTRL_SHIFT;
1506 pf = (vreg->req[0].value & LDO_PIN_FN) >> LDO_PIN_FN_SHIFT;
1507 pd = (vreg->req[1].value & LDO_PULL_DOWN_ENABLE)
1508 >> LDO_PULL_DOWN_ENABLE_SHIFT;
1509 ia = (vreg->req[1].value & LDO_AVG_CURRENT)
1510 >> LDO_AVG_CURRENT_SHIFT;
1511
1512 pr_info("rpm-regulator: %s %-9s: s=%c, v=%4d mV, ip=%4d "
1513 "mA, fm=%s (%d), pc=%s%s%s%s%s (%d), pf=%s (%d), pd=%s "
1514 "(%d), ia=%4d mA; req[0]={%d, 0x%08X}, "
1515 "req[1]={%d, 0x%08X}\n",
1516 (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"),
1517 vreg_descrip[vreg->id].name,
1518 (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), v, ip,
1519 (fm == RPM_VREG_MODE_NONE ? "none" :
1520 (fm == RPM_VREG_MODE_LPM ? "LPM" :
1521 (fm == RPM_VREG_MODE_HPM ? "HPM" : ""))),
1522 fm,
1523 (pc & RPM_VREG_PIN_CTRL_A0 ? " A0" : ""),
1524 (pc & RPM_VREG_PIN_CTRL_A1 ? " A1" : ""),
1525 (pc & RPM_VREG_PIN_CTRL_D0 ? " D0" : ""),
1526 (pc & RPM_VREG_PIN_CTRL_D1 ? " D1" : ""),
1527 (pc == RPM_VREG_PIN_CTRL_NONE ? " none" : ""), pc,
1528 (pf == RPM_VREG_PIN_FN_NONE ?
1529 "none" :
1530 (pf == RPM_VREG_PIN_FN_ENABLE ?
1531 "on/off" :
1532 (pf == RPM_VREG_PIN_FN_MODE ?
1533 "HPM/LPM" :
1534 (pf == RPM_VREG_PIN_FN_SLEEP_B ?
1535 "sleep_b" : "")))),
1536 pf, (pd == 1 ? "Y" : "N"), pd, ia,
1537 vreg->req[0].id, vreg->req[0].value,
1538 vreg->req[1].id, vreg->req[1].value);
1539
1540 } else if (IS_SMPS(vreg->id)) {
1541 v = (vreg->req[0].value & SMPS_VOLTAGE) >> SMPS_VOLTAGE_SHIFT;
1542 ip = (vreg->req[0].value & SMPS_PEAK_CURRENT)
1543 >> SMPS_PEAK_CURRENT_SHIFT;
1544 fm = (vreg->req[0].value & SMPS_MODE) >> SMPS_MODE_SHIFT;
1545 pc = (vreg->req[0].value & SMPS_PIN_CTRL)
1546 >> SMPS_PIN_CTRL_SHIFT;
1547 pf = (vreg->req[0].value & SMPS_PIN_FN) >> SMPS_PIN_FN_SHIFT;
1548 pd = (vreg->req[1].value & SMPS_PULL_DOWN_ENABLE)
1549 >> SMPS_PULL_DOWN_ENABLE_SHIFT;
1550 ia = (vreg->req[1].value & SMPS_AVG_CURRENT)
1551 >> SMPS_AVG_CURRENT_SHIFT;
1552 freq = (vreg->req[1].value & SMPS_FREQ) >> SMPS_FREQ_SHIFT;
1553 clk = (vreg->req[1].value & SMPS_CLK_SRC) >> SMPS_CLK_SRC_SHIFT;
1554
1555 pr_info("rpm-regulator: %s %-9s: s=%c, v=%4d mV, ip=%4d "
1556 "mA, fm=%s (%d), pc=%s%s%s%s%s (%d), pf=%s (%d), pd=%s "
1557 "(%d), ia=%4d mA, freq=%2d, clk=%d; "
1558 "req[0]={%d, 0x%08X}, req[1]={%d, 0x%08X}\n",
1559 (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"),
1560 vreg_descrip[vreg->id].name,
1561 (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), v, ip,
1562 (fm == RPM_VREG_MODE_NONE ? "none" :
1563 (fm == RPM_VREG_MODE_LPM ? "LPM" :
1564 (fm == RPM_VREG_MODE_HPM ? "HPM" : ""))),
1565 fm,
1566 (pc & RPM_VREG_PIN_CTRL_A0 ? " A0" : ""),
1567 (pc & RPM_VREG_PIN_CTRL_A1 ? " A1" : ""),
1568 (pc & RPM_VREG_PIN_CTRL_D0 ? " D0" : ""),
1569 (pc & RPM_VREG_PIN_CTRL_D1 ? " D1" : ""),
1570 (pc == RPM_VREG_PIN_CTRL_NONE ? " none" : ""), pc,
1571 (pf == RPM_VREG_PIN_FN_NONE ?
1572 "none" :
1573 (pf == RPM_VREG_PIN_FN_ENABLE ?
1574 "on/off" :
1575 (pf == RPM_VREG_PIN_FN_MODE ?
1576 "HPM/LPM" :
1577 (pf == RPM_VREG_PIN_FN_SLEEP_B ?
1578 "sleep_b" : "")))),
1579 pf, (pd == 1 ? "Y" : "N"), pd, ia, freq, clk,
1580 vreg->req[0].id, vreg->req[0].value,
1581 vreg->req[1].id, vreg->req[1].value);
1582
1583 } else if (IS_SWITCH(vreg->id)) {
1584 state = (vreg->req[0].value & SWITCH_STATE)
1585 >> SWITCH_STATE_SHIFT;
1586 pd = (vreg->req[0].value & SWITCH_PULL_DOWN_ENABLE)
1587 >> SWITCH_PULL_DOWN_ENABLE_SHIFT;
1588 pc = (vreg->req[0].value & SWITCH_PIN_CTRL)
1589 >> SWITCH_PIN_CTRL_SHIFT;
1590 pf = (vreg->req[0].value & SWITCH_PIN_FN)
1591 >> SWITCH_PIN_FN_SHIFT;
1592
1593 pr_info("rpm-regulator: %s %-9s: s=%c, state=%s (%d), "
1594 "pd=%s (%d), pc =%s%s%s%s%s (%d), pf=%s (%d); "
1595 "req[0]={%d, 0x%08X}\n",
1596 (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"),
1597 vreg_descrip[vreg->id].name,
1598 (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'),
1599 (state == 1 ? "on" : "off"), state,
1600 (pd == 1 ? "Y" : "N"), pd,
1601 (pc & RPM_VREG_PIN_CTRL_A0 ? " A0" : ""),
1602 (pc & RPM_VREG_PIN_CTRL_A1 ? " A1" : ""),
1603 (pc & RPM_VREG_PIN_CTRL_D0 ? " D0" : ""),
1604 (pc & RPM_VREG_PIN_CTRL_D1 ? " D1" : ""),
1605 (pc == RPM_VREG_PIN_CTRL_NONE ? " none" : ""), pc,
1606 (pf == RPM_VREG_PIN_FN_NONE ?
1607 "none" :
1608 (pf == RPM_VREG_PIN_FN_ENABLE ?
1609 "on/off" :
1610 (pf == RPM_VREG_PIN_FN_MODE ?
1611 "HPM/LPM" :
1612 (pf == RPM_VREG_PIN_FN_SLEEP_B ?
1613 "sleep_b" : "")))),
1614 pf, vreg->req[0].id, vreg->req[0].value);
1615
1616 } else if (IS_NCP(vreg->id)) {
1617 v = (vreg->req[0].value & NCP_VOLTAGE) >> NCP_VOLTAGE_SHIFT;
1618 state = (vreg->req[0].value & NCP_STATE) >> NCP_STATE_SHIFT;
1619
1620 pr_info("rpm-regulator: %s %-9s: s=%c, v=-%4d mV, "
1621 "state=%s (%d); req[0]={%d, 0x%08X}\n",
1622 (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"),
1623 vreg_descrip[vreg->id].name,
1624 (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'),
1625 v, (state == 1 ? "on" : "off"), state,
1626 vreg->req[0].id, vreg->req[0].value);
1627 }
1628}
1629
1630static void print_rpm_vote(struct vreg *vreg, enum rpm_vreg_voter voter,
1631 int set, int voter_mV, int aggregate_mV)
1632{
1633 /* Suppress 8058_s0 and 8058_s1 printing. */
1634 if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_8058_S0_S1)
1635 && VREG_ID_IS_8058_S0_OR_S1(vreg->id))
1636 return;
1637
1638 pr_info("rpm-regulator: vote received %-9s: voter=%d, set=%c, "
1639 "v_voter=%4d mV, v_aggregate=%4d mV\n",
1640 vreg_descrip[vreg->id].name, voter, (set == 0 ? 'A' : 'S'),
1641 voter_mV, aggregate_mV);
1642}
1643
1644static void print_rpm_duplicate(struct vreg *vreg, int set, int cnt)
1645{
1646 /* Suppress 8058_s0 and 8058_s1 printing. */
1647 if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_8058_S0_S1)
1648 && VREG_ID_IS_8058_S0_OR_S1(vreg->id))
1649 return;
1650
1651 if (cnt == 2)
1652 pr_info("rpm-regulator: ignored duplicate request %-9s: set=%c;"
1653 " req[0]={%d, 0x%08X}, req[1]={%d, 0x%08X}\n",
1654 vreg_descrip[vreg->id].name, (set == 0 ? 'A' : 'S'),
1655 vreg->req[0].id, vreg->req[0].value,
1656 vreg->req[1].id, vreg->req[1].value);
1657 else if (cnt == 1)
1658 pr_info("rpm-regulator: ignored duplicate request %-9s: set=%c;"
1659 " req[0]={%d, 0x%08X}\n",
1660 vreg_descrip[vreg->id].name, (set == 0 ? 'A' : 'S'),
1661 vreg->req[0].id, vreg->req[0].value);
1662}
1663
1664MODULE_LICENSE("GPL v2");
1665MODULE_DESCRIPTION("rpm regulator driver");
1666MODULE_VERSION("1.0");
1667MODULE_ALIAS("platform:rpm-regulator");