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Pavankumar Kondetie0c201f2010-12-07 17:53:55 +05301/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __LINUX_USB_GADGET_MSM72K_UDC_H__
17#define __LINUX_USB_GADGET_MSM72K_UDC_H__
18
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053019#define USB_AHBBURST (MSM_USB_BASE + 0x0090)
20#define USB_AHBMODE (MSM_USB_BASE + 0x0098)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053021#define USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */
22
23#define USB_USBCMD (MSM_USB_BASE + 0x0140)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#define USB_USBSTS (MSM_USB_BASE + 0x0144)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053025#define USB_PORTSC (MSM_USB_BASE + 0x0184)
26#define USB_OTGSC (MSM_USB_BASE + 0x01A4)
27#define USB_USBMODE (MSM_USB_BASE + 0x01A8)
Pavankumar Kondeti04aebcb2011-05-04 10:19:49 +053028#define USB_PHY_CTRL (MSM_USB_BASE + 0x0240)
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053029
30#define USBCMD_RESET 2
31#define USB_USBINTR (MSM_USB_BASE + 0x0148)
32
33#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
34#define PORTSC_PTS_MASK (3 << 30)
35#define PORTSC_PTS_ULPI (3 << 30)
36
37#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
38#define ULPI_RUN (1 << 30)
39#define ULPI_WRITE (1 << 29)
40#define ULPI_READ (0 << 29)
41#define ULPI_ADDR(n) (((n) & 255) << 16)
42#define ULPI_DATA(n) ((n) & 255)
43#define ULPI_DATA_READ(n) (((n) >> 8) & 255)
44
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070045/* synopsys 28nm phy registers */
46#define ULPI_PWR_CLK_MNG_REG 0x88
47#define OTG_COMP_DISABLE BIT(0)
48
49#define PHY_ALT_INT (1 << 28) /* PHY alternate interrupt */
Pavankumar Kondeti87c01042010-12-07 17:53:58 +053050#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */
51#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */
Pavankumar Kondeti04aebcb2011-05-04 10:19:49 +053052#define PHY_RETEN (1 << 1) /* PHY retention enable/disable */
Pavankumar Kondeti87c01042010-12-07 17:53:58 +053053
Pavankumar Kondetie0c201f2010-12-07 17:53:55 +053054/* OTG definitions */
55#define OTGSC_INTSTS_MASK (0x7f << 16)
56#define OTGSC_ID (1 << 8)
57#define OTGSC_BSV (1 << 11)
58#define OTGSC_IDIS (1 << 16)
59#define OTGSC_BSVIS (1 << 19)
60#define OTGSC_IDIE (1 << 24)
61#define OTGSC_BSVIE (1 << 27)
62
63#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */