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Daniel Walkerda6df072010-04-23 16:04:20 -07001/* include/linux/msm_mdp.h
2 *
3 * Copyright (C) 2007 Google Incorporated
Ken Zhang420dd202013-01-08 14:28:20 -05004 * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved.
Daniel Walkerda6df072010-04-23 16:04:20 -07005 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef _MSM_MDP_H_
16#define _MSM_MDP_H_
17
18#include <linux/types.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019#include <linux/fb.h>
Daniel Walkerda6df072010-04-23 16:04:20 -070020
21#define MSMFB_IOCTL_MAGIC 'm'
22#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
23#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
25#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
26#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
27#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
Carl Vanderlipba093a22011-11-22 13:59:59 -080028#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070029/* new ioctls's for set/get ccs matrix */
30#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
31#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
32#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \
33 struct mdp_overlay)
34#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
Kuogee Hsieh586fd162012-02-14 15:24:16 -080035
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \
37 struct msmfb_overlay_data)
Kuogee Hsieh586fd162012-02-14 15:24:16 -080038#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
39
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070040#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \
41 struct mdp_page_protection)
42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \
43 struct mdp_page_protection)
44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \
45 struct mdp_overlay)
46#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
47#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \
48 struct msmfb_overlay_blt)
49#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
Carl Vanderlipba093a22011-11-22 13:59:59 -080050#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \
51 struct mdp_histogram_start_req)
52#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070053#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int)
54
55#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \
56 struct msmfb_overlay_3d)
57
kuogee hsieh405dc302011-07-21 15:06:59 -070058#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \
59 struct msmfb_mixer_info_req)
Nagamalleswararao Ganji0737d652011-10-14 02:02:33 -070060#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
61 struct msmfb_overlay_data)
Vinay Kalia27020d12011-10-14 17:50:29 -070062#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
Vinay Kaliae1ba2702011-12-21 16:24:52 -080063#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
64#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
Vinay Kalia27020d12011-10-14 17:50:29 -070065#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \
66 struct msmfb_data)
67#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \
68 struct msmfb_data)
69#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
Pravin Tamkhane02a40682011-11-29 14:17:01 -080070#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
Padmanabhan Komanduruf3b0c232012-07-27 20:46:06 +053071#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
72#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
Ken Zhang5cf85c02012-08-23 19:32:52 -070073#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 162, struct msmfb_metadata)
Kalyan Thota9284a272012-11-02 20:55:30 +053074#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
Ken Zhang5295d802012-11-07 18:33:16 -050075#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_buf_sync)
Ken Zhang4e83b932012-12-02 21:15:47 -050076#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 165, \
77 struct mdp_display_commit)
Ken Zhang420dd202013-01-08 14:28:20 -050078#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
Kuogee Hsieha77eca62012-09-13 13:22:04 -070079
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070080#define FB_TYPE_3D_PANEL 0x10101010
81#define MDP_IMGTYPE2_START 0x10000
82#define MSMFB_DRIVER_VERSION 0xF9E8D701
Daniel Walkerda6df072010-04-23 16:04:20 -070083
84enum {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070085 NOTIFY_UPDATE_START,
86 NOTIFY_UPDATE_STOP,
87};
88
89enum {
90 MDP_RGB_565, /* RGB 565 planer */
91 MDP_XRGB_8888, /* RGB 888 padded */
92 MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */
Padmanabhan Komandurud9f38b02012-02-02 18:57:03 +053093 MDP_Y_CBCR_H2V2_ADRENO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094 MDP_ARGB_8888, /* ARGB 888 */
95 MDP_RGB_888, /* RGB 888 planer */
96 MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */
97 MDP_YCRYCB_H2V1, /* YCrYCb interleave */
98 MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
99 MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700100 MDP_Y_CRCB_H1V2,
101 MDP_Y_CBCR_H1V2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700102 MDP_RGBA_8888, /* ARGB 888 */
103 MDP_BGRA_8888, /* ABGR 888 */
104 MDP_RGBX_8888, /* RGBX 888 */
105 MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */
106 MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */
107 MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */
Pradeep Jilagam9b4a6be2011-10-03 17:19:20 +0530108 MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109 MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */
110 MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
111 MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */
Adrian Salido-Moreno2b410482011-08-15 10:40:40 -0700112 MDP_YCRCB_H1V1, /* YCrCb interleave */
113 MDP_YCBCR_H1V1, /* YCbCr interleave */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700114 MDP_BGR_565, /* BGR 565 planer */
Adrian Salido-Morenod559ef12012-07-12 20:16:14 -0700115 MDP_BGR_888, /* BGR 888 */
Adrian Salido-Moreno330c0bf2012-08-22 14:15:33 -0700116 MDP_Y_CBCR_H2V2_VENUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117 MDP_IMGTYPE_LIMIT,
kuogee hsieh1ce7e4c2012-01-13 14:05:54 -0800118 MDP_RGB_BORDERFILL, /* border fill pipe */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700119 MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120 MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */
Daniel Walkerda6df072010-04-23 16:04:20 -0700121};
122
123enum {
124 PMEM_IMG,
125 FB_IMG,
126};
127
Liyuan Lid9736632011-11-11 13:47:59 -0800128enum {
129 HSIC_HUE = 0,
130 HSIC_SAT,
131 HSIC_INT,
132 HSIC_CON,
133 NUM_HSIC_PARAM,
134};
135
Adrian Salido-Moreno1857f062012-05-29 17:57:28 -0700136#define MDSS_MDP_ROT_ONLY 0x80
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700137#define MDSS_MDP_RIGHT_MIXER 0x100
138
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139/* mdp_blit_req flag values */
140#define MDP_ROT_NOP 0
141#define MDP_FLIP_LR 0x1
142#define MDP_FLIP_UD 0x2
143#define MDP_ROT_90 0x4
144#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
145#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
146#define MDP_DITHER 0x8
147#define MDP_BLUR 0x10
148#define MDP_BLEND_FG_PREMULT 0x20000
Padmanabhan Komandurudd10bf12012-10-17 20:27:33 +0530149#define MDP_IS_FG 0x40000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700150#define MDP_DEINTERLACE 0x80000000
151#define MDP_SHARPENING 0x40000000
152#define MDP_NO_DMA_BARRIER_START 0x20000000
153#define MDP_NO_DMA_BARRIER_END 0x10000000
154#define MDP_NO_BLIT 0x08000000
155#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
156#define MDP_BLIT_WITH_NO_DMA_BARRIERS \
157 (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
158#define MDP_BLIT_SRC_GEM 0x04000000
159#define MDP_BLIT_DST_GEM 0x02000000
160#define MDP_BLIT_NON_CACHED 0x01000000
161#define MDP_OV_PIPE_SHARE 0x00800000
162#define MDP_DEINTERLACE_ODD 0x00400000
163#define MDP_OV_PLAY_NOWAIT 0x00200000
164#define MDP_SOURCE_ROTATED_90 0x00100000
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700165#define MDP_OVERLAY_PP_CFG_EN 0x00080000
Ajay Singh Parmar4c7ccb32012-02-21 12:56:04 +0530166#define MDP_BACKEND_COMPOSITION 0x00040000
Nagamalleswararao Ganji880f8472011-12-14 03:52:28 -0800167#define MDP_BORDERFILL_SUPPORTED 0x00010000
168#define MDP_SECURE_OVERLAY_SESSION 0x00008000
169#define MDP_MEMORY_ID_TYPE_FB 0x00001000
Daniel Walkerda6df072010-04-23 16:04:20 -0700170
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700171#define MDP_TRANSP_NOP 0xffffffff
172#define MDP_ALPHA_NOP 0xff
173
174#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
175#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
176#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
177#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
178#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
179/* Sentinel: Don't use! */
180#define MDP_FB_PAGE_PROTECTION_INVALID (5)
181/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */
182#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
Daniel Walkerda6df072010-04-23 16:04:20 -0700183
184struct mdp_rect {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700185 uint32_t x;
186 uint32_t y;
187 uint32_t w;
188 uint32_t h;
Daniel Walkerda6df072010-04-23 16:04:20 -0700189};
190
191struct mdp_img {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700192 uint32_t width;
193 uint32_t height;
194 uint32_t format;
195 uint32_t offset;
Daniel Walkerda6df072010-04-23 16:04:20 -0700196 int memory_id; /* the file descriptor */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700197 uint32_t priv;
Daniel Walkerda6df072010-04-23 16:04:20 -0700198};
199
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700200/*
201 * {3x3} + {3} ccs matrix
202 */
203
204#define MDP_CCS_RGB2YUV 0
205#define MDP_CCS_YUV2RGB 1
206
207#define MDP_CCS_SIZE 9
208#define MDP_BV_SIZE 3
209
210struct mdp_ccs {
211 int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */
212 uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */
213 uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */
214};
215
Nagamalleswararao Ganji4b991722011-01-28 13:24:34 -0800216struct mdp_csc {
217 int id;
218 uint32_t csc_mv[9];
219 uint32_t csc_pre_bv[3];
220 uint32_t csc_post_bv[3];
221 uint32_t csc_pre_lv[6];
222 uint32_t csc_post_lv[6];
223};
224
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700225/* The version of the mdp_blit_req structure so that
226 * user applications can selectively decide which functionality
227 * to include
228 */
229
230#define MDP_BLIT_REQ_VERSION 2
231
Daniel Walkerda6df072010-04-23 16:04:20 -0700232struct mdp_blit_req {
233 struct mdp_img src;
234 struct mdp_img dst;
235 struct mdp_rect src_rect;
236 struct mdp_rect dst_rect;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700237 uint32_t alpha;
238 uint32_t transp_mask;
239 uint32_t flags;
240 int sharpening_strength; /* -127 <--> 127, default 64 */
Daniel Walkerda6df072010-04-23 16:04:20 -0700241};
242
243struct mdp_blit_req_list {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700244 uint32_t count;
Daniel Walkerda6df072010-04-23 16:04:20 -0700245 struct mdp_blit_req req[];
246};
247
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700248#define MSMFB_DATA_VERSION 2
249
250struct msmfb_data {
251 uint32_t offset;
252 int memory_id;
253 int id;
254 uint32_t flags;
255 uint32_t priv;
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800256 uint32_t iova;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700257};
258
259#define MSMFB_NEW_REQUEST -1
260
261struct msmfb_overlay_data {
262 uint32_t id;
263 struct msmfb_data data;
264 uint32_t version_key;
265 struct msmfb_data plane1_data;
266 struct msmfb_data plane2_data;
Adrian Salido-Moreno1857f062012-05-29 17:57:28 -0700267 struct msmfb_data dst_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700268};
269
270struct msmfb_img {
271 uint32_t width;
272 uint32_t height;
273 uint32_t format;
274};
275
Vinay Kalia27020d12011-10-14 17:50:29 -0700276#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
277struct msmfb_writeback_data {
278 struct msmfb_data buf_info;
279 struct msmfb_img img;
280};
281
Ken Zhang77ce0192012-08-10 11:27:19 -0400282#define MDP_PP_OPS_ENABLE 0x1
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700283#define MDP_PP_OPS_READ 0x2
284#define MDP_PP_OPS_WRITE 0x4
Ken Zhang77ce0192012-08-10 11:27:19 -0400285#define MDP_PP_OPS_DISABLE 0x8
Ken Zhang824758e2012-08-15 11:02:21 -0400286#define MDP_PP_IGC_FLAG_ROM0 0x10
287#define MDP_PP_IGC_FLAG_ROM1 0x20
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700288
289struct mdp_qseed_cfg {
290 uint32_t table_num;
291 uint32_t ops;
292 uint32_t len;
293 uint32_t *data;
294};
295
296struct mdp_qseed_cfg_data {
297 uint32_t block;
298 struct mdp_qseed_cfg qseed_data;
299};
300
301#define MDP_OVERLAY_PP_CSC_CFG 0x1
302#define MDP_OVERLAY_PP_QSEED_CFG 0x2
Ping Li58229242012-11-30 14:05:43 -0500303#define MDP_OVERLAY_PP_PA_CFG 0x4
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700304
305#define MDP_CSC_FLAG_ENABLE 0x1
306#define MDP_CSC_FLAG_YUV_IN 0x2
307#define MDP_CSC_FLAG_YUV_OUT 0x4
308
309struct mdp_csc_cfg {
310 /* flags for enable CSC, toggling RGB,YUV input/output */
311 uint32_t flags;
312 uint32_t csc_mv[9];
313 uint32_t csc_pre_bv[3];
314 uint32_t csc_post_bv[3];
315 uint32_t csc_pre_lv[6];
316 uint32_t csc_post_lv[6];
317};
318
319struct mdp_csc_cfg_data {
320 uint32_t block;
321 struct mdp_csc_cfg csc_data;
322};
323
Ping Li58229242012-11-30 14:05:43 -0500324struct mdp_pa_cfg {
325 uint32_t flags;
326 uint32_t hue_adj;
327 uint32_t sat_adj;
328 uint32_t val_adj;
329 uint32_t cont_adj;
330};
331
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700332struct mdp_overlay_pp_params {
333 uint32_t config_ops;
334 struct mdp_csc_cfg csc_cfg;
335 struct mdp_qseed_cfg qseed_cfg[2];
Ping Li58229242012-11-30 14:05:43 -0500336 struct mdp_pa_cfg pa_cfg;
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700337};
338
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700339struct mdp_overlay {
340 struct msmfb_img src;
341 struct mdp_rect src_rect;
342 struct mdp_rect dst_rect;
343 uint32_t z_order; /* stage number */
344 uint32_t is_fg; /* control alpha & transp */
345 uint32_t alpha;
346 uint32_t transp_mask;
347 uint32_t flags;
348 uint32_t id;
349 uint32_t user_data[8];
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700350 struct mdp_overlay_pp_params overlay_pp_cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700351};
352
353struct msmfb_overlay_3d {
354 uint32_t is_3d;
355 uint32_t width;
356 uint32_t height;
357};
358
359
360struct msmfb_overlay_blt {
361 uint32_t enable;
362 uint32_t offset;
363 uint32_t width;
364 uint32_t height;
365 uint32_t bpp;
366};
367
368struct mdp_histogram {
369 uint32_t frame_cnt;
370 uint32_t bin_cnt;
371 uint32_t *r;
372 uint32_t *g;
373 uint32_t *b;
374};
375
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800376
377/*
378
Ken Zhang6a431632012-08-08 16:46:22 -0400379 mdp_block_type defines the identifiers for pipes in MDP 4.3 and up
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800380
381 MDP_BLOCK_RESERVED is provided for backward compatibility and is
382 deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used
383 instead.
384
Ken Zhang6a431632012-08-08 16:46:22 -0400385 MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses,
386 same for others.
387
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800388*/
389
390enum {
391 MDP_BLOCK_RESERVED = 0,
392 MDP_BLOCK_OVERLAY_0,
393 MDP_BLOCK_OVERLAY_1,
394 MDP_BLOCK_VG_1,
395 MDP_BLOCK_VG_2,
396 MDP_BLOCK_RGB_1,
397 MDP_BLOCK_RGB_2,
398 MDP_BLOCK_DMA_P,
399 MDP_BLOCK_DMA_S,
400 MDP_BLOCK_DMA_E,
Pravin Tamkhaneb18c9e22012-04-13 18:29:34 -0700401 MDP_BLOCK_OVERLAY_2,
Ken Zhang6a431632012-08-08 16:46:22 -0400402 MDP_LOGICAL_BLOCK_DISP_0 = 0x1000,
403 MDP_LOGICAL_BLOCK_DISP_1,
404 MDP_LOGICAL_BLOCK_DISP_2,
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800405 MDP_BLOCK_MAX,
406};
407
Carl Vanderlipba093a22011-11-22 13:59:59 -0800408/*
409 * mdp_histogram_start_req is used to provide the parameters for
410 * histogram start request
411 */
412
413struct mdp_histogram_start_req {
414 uint32_t block;
415 uint8_t frame_cnt;
416 uint8_t bit_mask;
Carl Vanderlip16316322012-10-08 16:47:34 -0700417 uint16_t num_bins;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800418};
419
420/*
421 * mdp_histogram_data is used to return the histogram data, once
422 * the histogram is done/stopped/cance
423 */
424
425struct mdp_histogram_data {
426 uint32_t block;
Ken Zhang0f523bd2012-08-23 11:14:03 -0400427 uint32_t bin_cnt;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800428 uint32_t *c0;
429 uint32_t *c1;
430 uint32_t *c2;
Carl Vanderlip7b8b6402012-03-01 10:58:03 -0800431 uint32_t *extra_info;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800432};
433
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800434struct mdp_pcc_coeff {
435 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
436};
437
438struct mdp_pcc_cfg_data {
439 uint32_t block;
440 uint32_t ops;
441 struct mdp_pcc_coeff r, g, b;
442};
443
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400444#define MDP_GAMUT_TABLE_NUM 8
445
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800446enum {
447 mdp_lut_igc,
448 mdp_lut_pgc,
449 mdp_lut_hist,
450 mdp_lut_max,
451};
452
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800453struct mdp_igc_lut_data {
454 uint32_t block;
455 uint32_t len, ops;
456 uint32_t *c0_c1_data;
457 uint32_t *c2_data;
458};
459
460struct mdp_ar_gc_lut_data {
461 uint32_t x_start;
462 uint32_t slope;
463 uint32_t offset;
464};
465
466struct mdp_pgc_lut_data {
467 uint32_t block;
468 uint32_t flags;
469 uint8_t num_r_stages;
470 uint8_t num_g_stages;
471 uint8_t num_b_stages;
472 struct mdp_ar_gc_lut_data *r_data;
473 struct mdp_ar_gc_lut_data *g_data;
474 struct mdp_ar_gc_lut_data *b_data;
475};
476
477
478struct mdp_hist_lut_data {
479 uint32_t block;
480 uint32_t ops;
481 uint32_t len;
482 uint32_t *data;
483};
484
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800485struct mdp_lut_cfg_data {
486 uint32_t lut_type;
487 union {
488 struct mdp_igc_lut_data igc_lut_data;
489 struct mdp_pgc_lut_data pgc_lut_data;
490 struct mdp_hist_lut_data hist_lut_data;
491 } data;
492};
493
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700494struct mdp_bl_scale_data {
495 uint32_t min_lvl;
496 uint32_t scale;
497};
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700498
Ken Zhang77ce0192012-08-10 11:27:19 -0400499struct mdp_pa_cfg_data {
500 uint32_t block;
Ping Li58229242012-11-30 14:05:43 -0500501 struct mdp_pa_cfg pa_data;
Ken Zhang77ce0192012-08-10 11:27:19 -0400502};
503
Ken Zhang7fb85772012-08-18 14:51:33 -0400504struct mdp_dither_cfg_data {
505 uint32_t block;
506 uint32_t flags;
507 uint32_t g_y_depth;
508 uint32_t r_cr_depth;
509 uint32_t b_cb_depth;
510};
511
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400512struct mdp_gamut_cfg_data {
513 uint32_t block;
514 uint32_t flags;
515 uint32_t gamut_first;
516 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
517 uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
518 uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
519 uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
520};
521
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700522struct mdp_calib_config_data {
523 uint32_t ops;
524 uint32_t addr;
525 uint32_t data;
526};
527
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800528enum {
529 mdp_op_pcc_cfg,
530 mdp_op_csc_cfg,
531 mdp_op_lut_cfg,
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700532 mdp_op_qseed_cfg,
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700533 mdp_bl_scale_cfg,
Ken Zhang77ce0192012-08-10 11:27:19 -0400534 mdp_op_pa_cfg,
Ken Zhang7fb85772012-08-18 14:51:33 -0400535 mdp_op_dither_cfg,
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400536 mdp_op_gamut_cfg,
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700537 mdp_op_calib_cfg,
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800538 mdp_op_max,
539};
540
541struct msmfb_mdp_pp {
542 uint32_t op;
543 union {
544 struct mdp_pcc_cfg_data pcc_cfg_data;
545 struct mdp_csc_cfg_data csc_cfg_data;
546 struct mdp_lut_cfg_data lut_cfg_data;
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700547 struct mdp_qseed_cfg_data qseed_cfg_data;
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700548 struct mdp_bl_scale_data bl_scale_data;
Ken Zhang77ce0192012-08-10 11:27:19 -0400549 struct mdp_pa_cfg_data pa_cfg_data;
Ken Zhang7fb85772012-08-18 14:51:33 -0400550 struct mdp_dither_cfg_data dither_cfg_data;
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400551 struct mdp_gamut_cfg_data gamut_cfg_data;
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700552 struct mdp_calib_config_data calib_cfg;
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800553 } data;
554};
555
Ken Zhang5cf85c02012-08-23 19:32:52 -0700556enum {
557 metadata_op_none,
558 metadata_op_base_blend,
Ken Zhang420dd202013-01-08 14:28:20 -0500559 metadata_op_frame_rate,
Ken Zhang5cf85c02012-08-23 19:32:52 -0700560 metadata_op_max
561};
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800562
Ken Zhang5cf85c02012-08-23 19:32:52 -0700563struct mdp_blend_cfg {
564 uint32_t is_premultiplied;
565};
566
567struct msmfb_metadata {
568 uint32_t op;
569 uint32_t flags;
570 union {
571 struct mdp_blend_cfg blend_cfg;
Ken Zhang420dd202013-01-08 14:28:20 -0500572 uint32_t panel_frame_rate;
Ken Zhang5cf85c02012-08-23 19:32:52 -0700573 } data;
574};
Ken Zhang5295d802012-11-07 18:33:16 -0500575
576#define MDP_MAX_FENCE_FD 10
577#define MDP_BUF_SYNC_FLAG_WAIT 1
578
579struct mdp_buf_sync {
580 uint32_t flags;
581 uint32_t acq_fen_fd_cnt;
582 int *acq_fen_fd;
583 int *rel_fen_fd;
584};
585
Ken Zhang4e83b932012-12-02 21:15:47 -0500586#define MDP_DISPLAY_COMMIT_OVERLAY 1
587
588struct mdp_display_commit {
589 uint32_t flags;
590 uint32_t wait_for_finish;
591 struct fb_var_screeninfo var;
592};
593
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700594struct mdp_page_protection {
595 uint32_t page_protection;
596};
597
kuogee hsieh405dc302011-07-21 15:06:59 -0700598
599struct mdp_mixer_info {
600 int pndx;
601 int pnum;
602 int ptype;
603 int mixer_num;
604 int z_order;
605};
606
607#define MAX_PIPE_PER_MIXER 4
608
609struct msmfb_mixer_info_req {
610 int mixer_num;
611 int cnt;
612 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
613};
614
Ravishangar Kalyanam6bc448a2012-03-14 11:31:52 -0700615enum {
616 DISPLAY_SUBSYSTEM_ID,
617 ROTATOR_SUBSYSTEM_ID,
618};
kuogee hsieh405dc302011-07-21 15:06:59 -0700619
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700620#ifdef __KERNEL__
Adrian Salido-Moreno00baebf2012-08-03 10:23:20 -0700621int msm_fb_get_iommu_domain(void);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700622/* get the framebuffer physical address information */
Ravishangar Kalyanam6bc448a2012-03-14 11:31:52 -0700623int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num,
624 int subsys_id);
Vinay Kalia27020d12011-10-14 17:50:29 -0700625struct fb_info *msm_fb_get_writeback_fb(void);
626int msm_fb_writeback_init(struct fb_info *info);
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800627int msm_fb_writeback_start(struct fb_info *info);
Vinay Kalia27020d12011-10-14 17:50:29 -0700628int msm_fb_writeback_queue_buffer(struct fb_info *info,
629 struct msmfb_data *data);
630int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
631 struct msmfb_data *data);
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800632int msm_fb_writeback_stop(struct fb_info *info);
Vinay Kalia27020d12011-10-14 17:50:29 -0700633int msm_fb_writeback_terminate(struct fb_info *info);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700634#endif
635
636#endif /*_MSM_MDP_H_*/