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gerrit-public.fairphone.software / kernel / msm / 4234a6656d6b37ca5ba013ff9b6923a90480a536 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 0ae0fc631ff71623fccaccd032406f60dde7b03f [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
36 reg = <0 0x2000000>;
37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]54/include/ "msm8226-smp2p.dtsi"
55/include/ "msm8226-gpu.dtsi"
56/include/ "msm8226-bus.dtsi"
57/include/ "msm8226-mdss.dtsi"
58/include/ "msm8226-coresight.dtsi"
59/include/ "msm8226-iommu-domains.dtsi"
60
61&soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65
66 intc: interrupt-controller@f9000000 {
67 compatible = "qcom,msm-qgic2";
68 interrupt-controller;
69 #interrupt-cells = <3>;
70 reg = <0xF9000000 0x1000>,
71 <0xF9002000 0x1000>;
72 };
73
74 msmgpio: gpio@fd510000 {
75 compatible = "qcom,msm-gpio";
76 interrupt-controller;
77 #interrupt-cells = <2>;
78 reg = <0xfd510000 0x4000>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 ngpio = <117>;
82 interrupts = <0 208 0>;
83 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]84 };
85
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]86 qcom,mpm2-sleep-counter@fc4a3000 {
87 compatible = "qcom,mpm2-sleep-counter";
88 reg = <0xfc4a3000 0x1000>;
89 clock-frequency = <32768>;
90 };
91
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]92 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]93 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]94 interrupts = <1 2 0 1 3 0>;
95 clock-frequency = <19200000>;
96 };
97
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]98 timer@f9020000 {
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges;
102 compatible = "arm,armv7-timer-mem";
103 reg = <0xf9020000 0x1000>;
104 clock-frequency = <19200000>;
105
106 frame@f9021000 {
107 frame-number = <0>;
108 interrupts = <0 8 0x4>,
109 <0 7 0x4>;
110 reg = <0xf9021000 0x1000>,
111 <0xf9022000 0x1000>;
112 };
113
114 frame@f9023000 {
115 frame-number = <1>;
116 interrupts = <0 9 0x4>;
117 reg = <0xf9023000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9024000 {
122 frame-number = <2>;
123 interrupts = <0 10 0x4>;
124 reg = <0xf9024000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9025000 {
129 frame-number = <3>;
130 interrupts = <0 11 0x4>;
131 reg = <0xf9025000 0x1000>;
132 status = "disabled";
133 };
134
135 frame@f9026000 {
136 frame-number = <4>;
137 interrupts = <0 12 0x4>;
138 reg = <0xf9026000 0x1000>;
139 status = "disabled";
140 };
141
142 frame@f9027000 {
143 frame-number = <5>;
144 interrupts = <0 13 0x4>;
145 reg = <0xf9027000 0x1000>;
146 status = "disabled";
147 };
148
149 frame@f9028000 {
150 frame-number = <6>;
151 interrupts = <0 14 0x4>;
152 reg = <0xf9028000 0x1000>;
153 status = "disabled";
154 };
155 };
156
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]157 qcom,vidc@fdc00000 {
158 compatible = "qcom,msm-vidc";
159 reg = <0xfdc00000 0xff000>;
160 interrupts = <0 44 0>;
161 qcom,load-freq-tbl = <352800 160000000>,
162 <244800 133330000>,
163 <108000 66700000>;
164 qcom,hfi = "venus";
165 qcom,bus-ports = <1>;
166 qcom,reg-presets = <0xE0024 0x0>,
167 <0x80124 0x3>,
168 <0xE0020 0x5555556>,
169 <0x800B0 0x10101001>,
170 <0x800B4 0x00101010>,
171 <0x800C0 0x1010100f>,
172 <0x800C4 0x00101010>,
173 <0x800D0 0x00000010>,
174 <0x800D4 0x00000010>,
175 <0x800D8 0x00000707>;
176 qcom,enc-ddr-ab-ib = <0 0>,
177 <129000 142000>,
178 <384000 422000>,
179 <866000 953000>;
180 qcom,dec-ddr-ab-ib = <0 0>,
181 <103000 134000>,
182 <268000 348000>,
183 <505000 657000>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]184 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]185 <0x2 0x2>,
186 <0x1f0 0x3>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]187 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]188 qcom,vidc-iommu-domains {
189 qcom,domain-ns {
190 qcom,vidc-domain-phandle = <&venus_domain_ns>;
191 qcom,vidc-partition-buffer-types = <0x1ff>,
192 <0x200>;
193 };
194
195 qcom,domain-cp {
196 qcom,vidc-domain-phandle = <&venus_domain_cp>;
197 qcom,vidc-partition-buffer-types = <0x2>,
198 <0x1f1>;
199 };
200 };
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]201 };
202
203 qcom,wfd {
204 compatible = "qcom,msm-wfd";
205 };
206
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]207 serial@f991f000 {
208 compatible = "qcom,msm-lsuart-v14";
209 reg = <0xf991f000 0x1000>;
210 interrupts = <0 109 0>;
211 status = "disabled";
212 };
213
214 serial@f995e000 {
215 compatible = "qcom,msm-lsuart-v14";
216 reg = <0xf995e000 0x1000>;
217 interrupts = <0 114 0>;
218 status = "disabled";
219 };
220
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]221 qcom,msm-imem@fe805000 {
222 compatible = "qcom,msm-imem";
223 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
224 };
225
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]226 qcom,sps@f9984000 {
227 compatible = "qcom,msm_sps";
228 reg = <0xf9984000 0x15000>,
229 <0xf9999000 0xb000>;
230 interrupts = <0 94 0>;
231 };
232
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]233 qcom,usbbam@f9a44000 {
234 compatible = "qcom,usb-bam-msm";
235 reg = <0xf9a44000 0x11000>;
236 reg-names = "hsusb";
237 interrupts = <0 135 0>;
238 interrupt-names = "hsusb";
239 qcom,usb-bam-num-pipes = <16>;
240 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
241 qcom,ignore-core-reset-ack;
242 qcom,disable-clk-gating;
243
244 qcom,pipe0 {
245 label = "hsusb-qdss-in-0";
246 qcom,usb-bam-mem-type = <3>;
247 qcom,bam-type = <1>;
248 qcom,dir = <1>;
249 qcom,pipe-num = <0>;
250 qcom,peer-bam = <1>;
251 qcom,src-bam-physical-address = <0xfc37c000>;
252 qcom,src-bam-pipe-index = <0>;
253 qcom,dst-bam-physical-address = <0xf9a44000>;
254 qcom,dst-bam-pipe-index = <2>;
255 qcom,data-fifo-offset = <0x0>;
256 qcom,data-fifo-size = <0x600>;
257 qcom,descriptor-fifo-offset = <0x600>;
258 qcom,descriptor-fifo-size = <0x200>;
259 };
260 };
261
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]262 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]263 compatible = "qcom,hsusb-otg";
264 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]265 interrupts = <0 134 0>, <0 140 0>;
266 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]267 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]268 HSUSB_1p8-supply = <&pm8226_l10>;
269 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]270 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]271
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]272 qcom,hsusb-otg-phy-init-seq =
273 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]274 qcom,hsusb-otg-phy-type = <2>;
275 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]276 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]277 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]278 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]279
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]280 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]281 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]282 qcom,msm-bus,num-paths = <1>;
283 qcom,msm-bus,vectors-KBps =
284 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]285 <87 512 60000 960000>,
286 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]287 };
288
Mayank Ranaf8bfadb2013-07-25 12:01:25 +0530[diff] [blame]289 android_usb: android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]290 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]291 reg = <0xfe8050c8 0xc8>;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]292 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]293 };
294
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]295 wcd9xxx_intc: wcd9xxx-irq {
296 compatible = "qcom,wcd9xxx-irq";
297 interrupt-controller;
298 #interrupt-cells = <1>;
299 interrupt-parent = <&msmgpio>;
300 interrupts = <68 0>;
301 interrupt-names = "cdc-int";
302 };
303
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]304 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]305 cell-index = <1>;
306 compatible = "qcom,slim-ngd";
307 reg = <0xfe12f000 0x35000>,
308 <0xfe104000 0x20000>;
309 reg-names = "slimbus_physical", "slimbus_bam_physical";
310 interrupts = <0 163 0>, <0 164 0>;
311 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]312
313 tapan_codec {
314 compatible = "qcom,tapan-slim-pgd";
315 elemental-addr = [00 01 E0 00 17 02];
316
317 interrupt-parent = <&wcd9xxx_intc>;
318 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
319 17 18 19 20 21 22 23 24 25 26 27 28>;
320 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
321
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]322 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]323 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]324 qcom,cdc-vdd-buck-current = <650000>;
325
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]326 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]327 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
328 qcom,cdc-vdd-h-current = <25000>;
329
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]330 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]331 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
332 qcom,cdc-vdd-px-current = <25000>;
333
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]334 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]335 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
Bhalchandra Gajare4962c6e2013-08-15 13:02:49 -0700[diff] [blame]336 qcom,cdc-vdd-cx-current = <2000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]337
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]338 cdc-vdd-buckhelper-supply = <&pm8226_l25>;
339 qcom,cdc-vdd-buckhelper-voltage = <1775000 2125000>;
340 qcom,cdc-vdd-buckhelper-current = <10000>;
341
342 qcom,cdc-static-supplies = "cdc-vdd-h",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]343 "cdc-vdd-px",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]344 "cdc-vdd-cx";
345
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]346 qcom,cdc-cp-supplies = "cdc-vdd-buck",
347 "cdc-vdd-buckhelper";
348
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]349 qcom,cdc-micbias-ldoh-v = <0x3>;
350 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]351 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]352 qcom,cdc-micbias-cfilt3-mv = <1800>;
353
354 qcom,cdc-micbias1-cfilt-sel = <0x0>;
355 qcom,cdc-micbias2-cfilt-sel = <0x1>;
356 qcom,cdc-micbias3-cfilt-sel = <0x2>;
357
358 qcom,cdc-mclk-clk-rate = <9600000>;
359 qcom,cdc-slim-ifd = "tapan-slim-ifd";
360 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
361 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]362 };
363
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]364 qcom,msm-adsp-loader {
365 compatible = "qcom,adsp-loader";
366 qcom,adsp-state = <0>;
367 };
368
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]369 sound {
370 compatible = "qcom,msm8226-audio-tapan";
371 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]372 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]373 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
374 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
375 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
376 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
377 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]378 };
379
Phani Kumar Uppalapatic2f9c222013-05-09 19:17:58 -0700[diff] [blame]380 sound-9302 {
381 compatible = "qcom,msm8226-audio-tapan";
382 qcom,model = "msm8226-tapan9302-snd-card";
383 qcom,tapan-mclk-clk-freq = <9600000>;
384 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
385 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
386 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
387 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
388 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
389 qcom,tapan-codec-9302;
390 };
391
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]392 qcom,msm-pcm {
393 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]394 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]395 };
396
397 qcom,msm-pcm-routing {
398 compatible = "qcom,msm-pcm-routing";
399 };
400
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]401 qcom,msm-pcm-low-latency {
402 compatible = "qcom,msm-pcm-dsp";
403 qcom,msm-pcm-dsp-id = <1>;
404 qcom,msm-pcm-low-latency;
405 };
406
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]407 qcom,msm-pcm-lpa {
408 compatible = "qcom,msm-pcm-lpa";
409 };
410
411 qcom,msm-compr-dsp {
412 compatible = "qcom,msm-compr-dsp";
413 };
414
415 qcom,msm-voip-dsp {
416 compatible = "qcom,msm-voip-dsp";
417 };
418
419 qcom,msm-pcm-voice {
420 compatible = "qcom,msm-pcm-voice";
421 };
422
423 qcom,msm-stub-codec {
424 compatible = "qcom,msm-stub-codec";
425 };
426
427 qcom,msm-dai-fe {
428 compatible = "qcom,msm-dai-fe";
429 };
430
431 qcom,msm-pcm-afe {
432 compatible = "qcom,msm-pcm-afe";
433 };
434
435 qcom,msm-dai-q6-hdmi {
436 compatible = "qcom,msm-dai-q6-hdmi";
437 qcom,msm-dai-q6-dev-id = <8>;
438 };
439
440 qcom,msm-dai-q6 {
441 compatible = "qcom,msm-dai-q6";
442 qcom,msm-dai-q6-sb-0-rx {
443 compatible = "qcom,msm-dai-q6-dev";
444 qcom,msm-dai-q6-dev-id = <16384>;
445 };
446
447 qcom,msm-dai-q6-sb-0-tx {
448 compatible = "qcom,msm-dai-q6-dev";
449 qcom,msm-dai-q6-dev-id = <16385>;
450 };
451
452 qcom,msm-dai-q6-sb-1-rx {
453 compatible = "qcom,msm-dai-q6-dev";
454 qcom,msm-dai-q6-dev-id = <16386>;
455 };
456
457 qcom,msm-dai-q6-sb-1-tx {
458 compatible = "qcom,msm-dai-q6-dev";
459 qcom,msm-dai-q6-dev-id = <16387>;
460 };
461
462 qcom,msm-dai-q6-sb-3-rx {
463 compatible = "qcom,msm-dai-q6-dev";
464 qcom,msm-dai-q6-dev-id = <16390>;
465 };
466
467 qcom,msm-dai-q6-sb-3-tx {
468 compatible = "qcom,msm-dai-q6-dev";
469 qcom,msm-dai-q6-dev-id = <16391>;
470 };
471
472 qcom,msm-dai-q6-sb-4-rx {
473 compatible = "qcom,msm-dai-q6-dev";
474 qcom,msm-dai-q6-dev-id = <16392>;
475 };
476
477 qcom,msm-dai-q6-sb-4-tx {
478 compatible = "qcom,msm-dai-q6-dev";
479 qcom,msm-dai-q6-dev-id = <16393>;
480 };
481
482 qcom,msm-dai-q6-bt-sco-rx {
483 compatible = "qcom,msm-dai-q6-dev";
484 qcom,msm-dai-q6-dev-id = <12288>;
485 };
486
487 qcom,msm-dai-q6-bt-sco-tx {
488 compatible = "qcom,msm-dai-q6-dev";
489 qcom,msm-dai-q6-dev-id = <12289>;
490 };
491
492 qcom,msm-dai-q6-int-fm-rx {
493 compatible = "qcom,msm-dai-q6-dev";
494 qcom,msm-dai-q6-dev-id = <12292>;
495 };
496
497 qcom,msm-dai-q6-int-fm-tx {
498 compatible = "qcom,msm-dai-q6-dev";
499 qcom,msm-dai-q6-dev-id = <12293>;
500 };
501
502 qcom,msm-dai-q6-be-afe-pcm-rx {
503 compatible = "qcom,msm-dai-q6-dev";
504 qcom,msm-dai-q6-dev-id = <224>;
505 };
506
507 qcom,msm-dai-q6-be-afe-pcm-tx {
508 compatible = "qcom,msm-dai-q6-dev";
509 qcom,msm-dai-q6-dev-id = <225>;
510 };
511
512 qcom,msm-dai-q6-afe-proxy-rx {
513 compatible = "qcom,msm-dai-q6-dev";
514 qcom,msm-dai-q6-dev-id = <241>;
515 };
516
517 qcom,msm-dai-q6-afe-proxy-tx {
518 compatible = "qcom,msm-dai-q6-dev";
519 qcom,msm-dai-q6-dev-id = <240>;
520 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]521
522 qcom,msm-dai-q6-incall-record-rx {
523 compatible = "qcom,msm-dai-q6-dev";
524 qcom,msm-dai-q6-dev-id = <32771>;
525 };
526
527 qcom,msm-dai-q6-incall-record-tx {
528 compatible = "qcom,msm-dai-q6-dev";
529 qcom,msm-dai-q6-dev-id = <32772>;
530 };
531
532 qcom,msm-dai-q6-incall-music-rx {
533 compatible = "qcom,msm-dai-q6-dev";
534 qcom,msm-dai-q6-dev-id = <32773>;
535 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]536
537 qcom,msm-dai-q6-incall-music-2-rx {
538 compatible = "qcom,msm-dai-q6-dev";
539 qcom,msm-dai-q6-dev-id = <32770>;
540 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]541 };
542
543 qcom,msm-pcm-hostless {
544 compatible = "qcom,msm-pcm-hostless";
545 };
546
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]547 qcom,msm-pri-auxpcm {
548 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]549 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
550 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
551 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
552 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
553 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
554 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
555 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]556 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]557 };
558
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]559 qcom,wcnss-wlan@fb000000 {
560 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]561 reg = <0xfb000000 0x280000>,
562 <0xf9011008 0x04>;
563 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]564 interrupts = <0 145 0 0 146 0>;
565 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
566
567 qcom,pronto-vddmx-supply = <&pm8226_l3>;
568 qcom,pronto-vddcx-supply = <&pm8226_s1>;
569 qcom,pronto-vddpx-supply = <&pm8226_l6>;
570 qcom,iris-vddxo-supply = <&pm8226_l10>;
571 qcom,iris-vddrfa-supply = <&pm8226_l24>;
572 qcom,iris-vddpa-supply = <&pm8226_l16>;
573 qcom,iris-vdddig-supply = <&pm8226_l24>;
574
575 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]576 qcom,has-pronto-hw;
577 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]578 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]579
580 qcom,msm-adsp-sensors {
581 compatible = "qcom,msm-adsp-sensors";
582 qcom,src-id = <11>;
583 qcom,dst-id = <604>;
584 qcom,ab = <32505856>;
585 qcom,ib = <32505856>;
586 };
587
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]588 qcom,wdt@f9017000 {
589 compatible = "qcom,msm-watchdog";
590 reg = <0xf9017000 0x1000>;
591 interrupts = <0 3 0>, <0 4 0>;
592 qcom,bark-time = <11000>;
593 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]594 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]595 };
596
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]597 qcom,smem@fa00000 {
598 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]599 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]600 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]601 <0xfc428000 0x4000>;
602 reg-names = "smem", "irq-reg-base", "aux-mem1";
603
604 qcom,smd-modem {
605 compatible = "qcom,smd";
606 qcom,smd-edge = <0>;
607 qcom,smd-irq-offset = <0x8>;
608 qcom,smd-irq-bitmask = <0x1000>;
609 qcom,pil-string = "modem";
610 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]611 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]612
613 qcom,smsm-modem {
614 compatible = "qcom,smsm";
615 qcom,smsm-edge = <0>;
616 qcom,smsm-irq-offset = <0x8>;
617 qcom,smsm-irq-bitmask = <0x2000>;
618 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]619 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]620
621 qcom,smd-adsp {
622 compatible = "qcom,smd";
623 qcom,smd-edge = <1>;
624 qcom,smd-irq-offset = <0x8>;
625 qcom,smd-irq-bitmask = <0x100>;
626 qcom,pil-string = "adsp";
627 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]628 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]629
630 qcom,smsm-adsp {
631 compatible = "qcom,smsm";
632 qcom,smsm-edge = <1>;
633 qcom,smsm-irq-offset = <0x8>;
634 qcom,smsm-irq-bitmask = <0x200>;
635 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]636 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]637
638 qcom,smd-wcnss {
639 compatible = "qcom,smd";
640 qcom,smd-edge = <6>;
641 qcom,smd-irq-offset = <0x8>;
642 qcom,smd-irq-bitmask = <0x20000>;
643 qcom,pil-string = "wcnss";
644 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]645 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]646
647 qcom,smsm-wcnss {
648 compatible = "qcom,smsm";
649 qcom,smsm-edge = <6>;
650 qcom,smsm-irq-offset = <0x8>;
651 qcom,smsm-irq-bitmask = <0x80000>;
652 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]653 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]654
655 qcom,smd-rpm {
656 compatible = "qcom,smd";
657 qcom,smd-edge = <15>;
658 qcom,smd-irq-offset = <0x8>;
659 qcom,smd-irq-bitmask = <0x1>;
660 interrupts = <0 168 1>;
661 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]662 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]663 };
664
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]665 rpm_bus: qcom,rpm-smd {
666 compatible = "qcom,rpm-smd";
667 rpm-channel-name = "rpm_requests";
668 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]669 };
670
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]671 qcom,bcl {
672 compatible = "qcom,bcl";
673 };
674
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]675 sdcc1: qcom,sdcc@f9824000 {
676 cell-index = <1>; /* SDC1 eMMC slot */
677 compatible = "qcom,msm-sdcc";
678
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]679 reg = <0xf9824000 0x800>,
680 <0xf9824800 0x100>,
681 <0xf9804000 0x7000>;
682 reg-names = "core_mem", "dml_mem", "bam_mem";
683 interrupts = <0 123 0>, <0 137 0>;
684 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]685
686 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]687
688 qcom,msm-bus,name = "sdcc1";
689 qcom,msm-bus,num-cases = <8>;
690 qcom,msm-bus,num-paths = <1>;
691 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
692 <78 512 1600 3200>, /* 400 KB/s*/
693 <78 512 80000 160000>, /* 20 MB/s */
694 <78 512 100000 200000>, /* 25 MB/s */
695 <78 512 200000 400000>, /* 50 MB/s */
696 <78 512 400000 800000>, /* 100 MB/s */
697 <78 512 400000 800000>, /* 200 MB/s */
698 <78 512 2048000 4096000>; /* Max. bandwidth */
699 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
700 100000000 200000000 4294967295>;
701
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]702 status = "disabled";
703 };
704
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]705 sdhc_1: sdhci@f9824900 {
706 compatible = "qcom,sdhci-msm";
707 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
708 reg-names = "hc_mem", "core_mem";
709
710 interrupts = <0 123 0>, <0 138 0>;
711 interrupt-names = "hc_irq", "pwr_irq";
712
713 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]714
715 qcom,msm-bus,name = "sdhc1";
716 qcom,msm-bus,num-cases = <8>;
717 qcom,msm-bus,num-paths = <1>;
718 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
719 <78 512 1600 3200>, /* 400 KB/s*/
720 <78 512 80000 160000>, /* 20 MB/s */
721 <78 512 100000 200000>, /* 25 MB/s */
722 <78 512 200000 400000>, /* 50 MB/s */
723 <78 512 400000 800000>, /* 100 MB/s */
724 <78 512 400000 800000>, /* 200 MB/s */
725 <78 512 2048000 4096000>; /* Max. bandwidth */
726 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
727 100000000 200000000 4294967295>;
728
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]729 status = "disabled";
730 };
731
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]732 sdcc2: qcom,sdcc@f98a4000 {
733 cell-index = <2>; /* SDC2 SD card slot */
734 compatible = "qcom,msm-sdcc";
735
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]736 reg = <0xf98a4000 0x800>,
737 <0xf98a4800 0x100>,
738 <0xf9884000 0x7000>;
739 reg-names = "core_mem", "dml_mem", "bam_mem";
740 interrupts = <0 125 0>, <0 220 0>;
741 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]742
743 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]744
745 qcom,msm-bus,name = "sdcc2";
746 qcom,msm-bus,num-cases = <8>;
747 qcom,msm-bus,num-paths = <1>;
748 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
749 <81 512 1600 3200>, /* 400 KB/s*/
750 <81 512 80000 160000>, /* 20 MB/s */
751 <81 512 100000 200000>, /* 25 MB/s */
752 <81 512 200000 400000>, /* 50 MB/s */
753 <81 512 400000 800000>, /* 100 MB/s */
754 <81 512 400000 800000>, /* 200 MB/s */
755 <81 512 2048000 4096000>; /* Max. bandwidth */
756 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
757 100000000 200000000 4294967295>;
758
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]759 status = "disabled";
760 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]761
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]762 sdhc_2: sdhci@f98a4900 {
763 compatible = "qcom,sdhci-msm";
764 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
765 reg-names = "hc_mem", "core_mem";
766
767 interrupts = <0 125 0>, <0 221 0>;
768 interrupt-names = "hc_irq", "pwr_irq";
769
770 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]771
772 qcom,msm-bus,name = "sdhc2";
773 qcom,msm-bus,num-cases = <8>;
774 qcom,msm-bus,num-paths = <1>;
775 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
776 <81 512 1600 3200>, /* 400 KB/s*/
777 <81 512 80000 160000>, /* 20 MB/s */
778 <81 512 100000 200000>, /* 25 MB/s */
779 <81 512 200000 400000>, /* 50 MB/s */
780 <81 512 400000 800000>, /* 100 MB/s */
781 <81 512 400000 800000>, /* 200 MB/s */
782 <81 512 2048000 4096000>; /* Max. bandwidth */
783 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
784 100000000 200000000 4294967295>;
785
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]786 status = "disabled";
787 };
788
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]789 sdcc3: qcom,sdcc@f9864000 {
790 cell-index = <3>;
791 compatible = "qcom,msm-sdcc";
792 reg = <0xf9864000 0x800>,
793 <0xf9864800 0x100>,
794 <0xf9844000 0x7000>;
795 reg-names = "core_mem", "dml_mem", "bam_mem";
796
797 qcom,bus-width = <4>;
798 gpios = <&msmgpio 44 0>, /* CLK */
799 <&msmgpio 43 0>, /* CMD */
800 <&msmgpio 42 0>, /* DATA0 */
801 <&msmgpio 41 0>, /* DATA1 */
802 <&msmgpio 40 0>, /* DATA2 */
803 <&msmgpio 39 0>; /* DATA3 */
804 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
805
806 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
807
808 qcom,msm-bus,name = "sdcc3";
809 qcom,msm-bus,num-cases = <8>;
810 qcom,msm-bus,num-paths = <1>;
811 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
812 <79 512 1600 3200>, /* 400 KB/s*/
813 <79 512 80000 160000>, /* 20 MB/s */
814 <79 512 100000 200000>, /* 25 MB/s */
815 <79 512 200000 400000>, /* 50 MB/s */
816 <79 512 400000 800000>, /* 100 MB/s */
817 <79 512 400000 800000>, /* 200 MB/s */
818 <79 512 2048000 4096000>; /* Max. bandwidth */
819 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
820 100000000 200000000 4294967295>;
821
822 #address-cells = <0>;
823 interrupt-parent = <&sdcc3>;
824 interrupts = <0 1 2>;
825 #interrupt-cells = <1>;
826 interrupt-map-mask = <0xffffffff>;
827 interrupt-map = <0 &intc 0 127 0
828 1 &intc 0 223 0
829 2 &msmgpio 41 0x8>;
830 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
831
832 status = "disabled";
833 };
834
835 sdhc_3: sdhci@f9864900 {
836 compatible = "qcom,sdhci-msm";
837 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
838 reg-names = "hc_mem", "core_mem";
839
840 qcom,bus-width = <4>;
841 gpios = <&msmgpio 44 0>, /* CLK */
842 <&msmgpio 43 0>, /* CMD */
843 <&msmgpio 42 0>, /* DATA0 */
844 <&msmgpio 41 0>, /* DATA1 */
845 <&msmgpio 40 0>, /* DATA2 */
846 <&msmgpio 39 0>; /* DATA3 */
847 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
848
849 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
850
851 qcom,msm-bus,name = "sdhc3";
852 qcom,msm-bus,num-cases = <8>;
853 qcom,msm-bus,num-paths = <1>;
854 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
855 <79 512 1600 3200>, /* 400 KB/s*/
856 <79 512 80000 160000>, /* 20 MB/s */
857 <79 512 100000 200000>, /* 25 MB/s */
858 <79 512 200000 400000>, /* 50 MB/s */
859 <79 512 400000 800000>, /* 100 MB/s */
860 <79 512 400000 800000>, /* 200 MB/s */
861 <79 512 2048000 4096000>; /* Max. bandwidth */
862 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
863 100000000 200000000 4294967295>;
864
865 #address-cells = <0>;
866 interrupt-parent = <&sdhc_3>;
867 interrupts = <0 1 2>;
868 #interrupt-cells = <1>;
869 interrupt-map-mask = <0xffffffff>;
870 interrupt-map = <0 &intc 0 127 0
871 1 &intc 0 224 0
872 2 &msmgpio 41 0x8>;
873 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
874
875 status = "disabled";
876 };
877
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]878 spmi_bus: qcom,spmi@fc4c0000 {
879 cell-index = <0>;
880 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]881 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]882 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]883 <0Xfc4cb000 0x1000>,
884 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]885 /* 190,ee0_krait_hlos_spmi_periph_irq */
886 /* 187,channel_0_krait_hlos_trans_done_irq */
887 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]888 qcom,pmic-arb-ee = <0>;
889 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]890 };
891
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]892 i2c@f9925000 { /* BLSP-1 QUP-3 */
893 cell-index = <2>;
894 compatible = "qcom,i2c-qup";
895 reg = <0xf9925000 0x1000>;
896 #address-cells = <1>;
897 #size-cells = <0>;
898 reg-names = "qup_phys_addr";
899 interrupts = <0 97 0>;
900 interrupt-names = "qup_err_intr";
901 qcom,i2c-bus-freq = <400000>;
902 qcom,i2c-src-freq = <19200000>;
903 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]904 i2c@f9926000 { /* BLSP-1 QUP-4 */
905 cell-index = <0>;
906 compatible = "qcom,i2c-qup";
907 reg = <0xf9926000 0x1000>;
908 #address-cells = <1>;
909 #size-cells = <0>;
910 reg-names = "qup_phys_addr";
911 interrupts = <0 98 0>;
912 interrupt-names = "qup_err_intr";
913 qcom,i2c-bus-freq = <100000>;
914 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]915
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]916 i2c@f9927000 { /* BLSP1 QUP5 */
917 cell-index = <5>;
918 compatible = "qcom,i2c-qup";
919 #address-cells = <1>;
920 #size-cells = <0>;
921 reg-names = "qup_phys_addr";
922 reg = <0xf9927000 0x1000>;
923 interrupt-names = "qup_err_intr";
924 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]925 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]926 qcom,i2c-src-freq = <19200000>;
Amy Malochebf346092013-07-31 12:57:28 -0700[diff] [blame]927 qcom,sda-gpio = <&msmgpio 18 0>;
928 qcom,scl-gpio = <&msmgpio 19 0>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]929 };
930
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]931 qcom,acpuclk@f9011050 {
932 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]933 reg = <0xf9011050 0x8>;
934 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]935 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]936 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]937
938 qcom,ocmem@fdd00000 {
939 compatible = "qcom,msm-ocmem";
940 reg = <0xfdd00000 0x2000>,
941 <0xfdd02000 0x2000>,
942 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]943 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]944 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
945 interrupts = <0 76 0 0 77 0>;
946 interrupt-names = "ocmem_irq", "dm_irq";
947 qcom,ocmem-num-regions = <0x1>;
948 qcom,ocmem-num-macros = <0x2>;
949 qcom,resource-type = <0x706d636f>;
950 #address-cells = <1>;
951 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]952 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]953
954 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]955 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]956 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]957 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]958 };
959 };
960
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]961 qcom,venus@fdce0000 {
962 compatible = "qcom,pil-venus";
963 reg = <0xfdce0000 0x4000>,
964 <0xfdc80000 0x400>;
965 reg-names = "wrapper_base", "vbif_base";
966 vdd-supply = <&gdsc_venus>;
967
968 qcom,firmware-name = "venus";
969 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]970
971 qcom,pronto@fb21b000 {
972 compatible = "qcom,pil-pronto";
973 reg = <0xfb21b000 0x3000>,
974 <0xfc401700 0x4>,
975 <0xfd485300 0xc>;
976 reg-names = "pmu_base", "clk_base", "halt_base";
977 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]978 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]979
980 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]981
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]982 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]983 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]984 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]985 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]986
987 /* GPIO output to wcnss */
988 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]989 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]990
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]991 qcom,iris-fm {
992 compatible = "qcom,iris_fm";
993 };
994
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]995 qcom,lpass@fe200000 {
996 compatible = "qcom,pil-q6v5-lpass";
997 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]998 <0xfd485100 0x00010>,
999 <0xfc4016c0 0x00004>;
1000 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]1001 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1002 interrupts = <0 162 1>;
1003
1004 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1005
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1006 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1007 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1008 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]1009 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1010
1011 /* GPIO output to lpass */
1012 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1013 };
1014
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1015 qcom,mss@fc880000 {
1016 compatible = "qcom,pil-q6v5-mss";
1017 reg = <0xfc880000 0x100>,
1018 <0xfd485000 0x400>,
1019 <0xfc820000 0x020>,
1020 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1021 <0xfd485194 0x4>;
1022 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]1023 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1024
1025 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1026 vdd_cx-supply = <&pm8226_s1_corner>;
1027 vdd_mx-supply = <&pm8226_l3>;
1028 vdd_pll-supply = <&pm8226_l8>;
1029 qcom,vdd_pll = <1800000>;
1030
1031 qcom,is-loadable;
1032 qcom,firmware-name = "mba";
1033 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1034
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1035 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1036 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1037 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1038 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1039 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1040
1041 /* GPIO output to mss */
1042 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1043 };
1044
Neeti Desaif82314e2013-08-09 15:59:54 -0700[diff] [blame]1045 memory_hole: qcom,msm-mem-hole {
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1046 compatible = "qcom,msm-mem-hole";
Neeti Desai183b33d2013-08-09 14:58:38 -0700[diff] [blame]1047 qcom,memblock-remove = <0x08400000 0x4000000
1048 0x0d200000 0x2300000
1049 0x0fa00000 0x500000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1050 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1051
1052 tsens: tsens@fc4a8000 {
1053 compatible = "qcom,msm-tsens";
1054 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1055 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1056 reg-names = "tsens_physical", "tsens_eeprom_physical";
1057 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1058 qcom,sensors = <4>;
1059 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1060 qcom,calib-mode = "fuse_map2";
1061 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1062
1063 qcom,msm-thermal {
1064 compatible = "qcom,msm-thermal";
1065 qcom,sensor-id = <0>;
1066 qcom,poll-ms = <250>;
1067 qcom,limit-temp = <60>;
1068 qcom,temp-hysteresis = <10>;
1069 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1070 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1071 qcom,core-limit-temp = <80>;
1072 qcom,core-temp-hysteresis = <10>;
1073 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1074 qcom,vdd-restriction-temp = <5>;
1075 qcom,vdd-restriction-temp-hysteresis = <10>;
1076 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1077
1078 qcom,vdd-dig-rstr{
1079 qcom,vdd-rstr-reg = "vdd-dig";
1080 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1081 qcom,min-level = <1>; /* No Request */
1082 };
1083
1084 qcom,vdd-apps-rstr{
1085 qcom,vdd-rstr-reg = "vdd-apps";
1086 qcom,levels = <600000 787200 998400>;
1087 qcom,freq-req;
1088 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1089 };
1090
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1091 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1092 compatible = "qcom,spi-qup-v2";
1093 #address-cells = <1>;
1094 #size-cells = <0>;
1095 reg-names = "spi_physical", "spi_bam_physical";
1096 reg = <0xf9923000 0x1000>,
1097 <0xf9904000 0xF000>;
1098 interrupt-names = "spi_irq", "spi_bam_irq";
1099 interrupts = <0 95 0>, <0 238 0>;
1100 spi-max-frequency = <19200000>;
1101
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1102 qcom,gpio-mosi = <&msmgpio 0 0>;
1103 qcom,gpio-miso = <&msmgpio 1 0>;
1104 qcom,gpio-clk = <&msmgpio 3 0>;
1105 qcom,gpio-cs0 = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1106
1107 qcom,infinite-mode = <0>;
1108 qcom,use-bam;
1109 qcom,ver-reg-exists;
1110 qcom,bam-consumer-pipe-index = <12>;
1111 qcom,bam-producer-pipe-index = <13>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1112 qcom,master-id = <86>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1113 };
1114
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1115 qcom,bam_dmux@fc834000 {
1116 compatible = "qcom,bam_dmux";
1117 reg = <0xfc834000 0x7000>;
1118 interrupts = <0 29 1>;
1119 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1120
1121 qcom,msm-rtb {
1122 compatible = "qcom,msm-rtb";
1123 qcom,memory-reservation-type = "EBI1";
1124 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1125 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1126
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1127 qcom,msm-rng@f9bff000 {
1128 compatible = "qcom,msm-rng";
1129 reg = <0xf9bff000 0x200>;
1130 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1131 qcom,msm-bus,name = "msm-rng-noc";
1132 qcom,msm-bus,num-cases = <2>;
1133 qcom,msm-bus,num-paths = <1>;
1134 qcom,msm-bus,vectors-KBps =
1135 <1 618 0 0>,
1136 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1137 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1138
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1139 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1140 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1141 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1142 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1143
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1144 jtag_fuse: jtagfuse@fc4be024 {
1145 compatible = "qcom,jtag-fuse";
1146 reg = <0xfc4be024 0x8>;
1147 reg-names = "fuse-base";
1148 };
1149
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1150 jtag_mm0: jtagmm@fc33c000 {
1151 compatible = "qcom,jtag-mm";
1152 reg = <0xfc33c000 0x1000>,
1153 <0xfc330000 0x1000>;
1154 reg-names = "etm-base","debug-base";
1155 };
1156
1157 jtag_mm1: jtagmm@fc33d000 {
1158 compatible = "qcom,jtag-mm";
1159 reg = <0xfc33d000 0x1000>,
1160 <0xfc332000 0x1000>;
1161 reg-names = "etm-base","debug-base";
1162 };
1163
1164 jtag_mm2: jtagmm@fc33e000 {
1165 compatible = "qcom,jtag-mm";
1166 reg = <0xfc33e000 0x1000>,
1167 <0xfc334000 0x1000>;
1168 reg-names = "etm-base","debug-base";
1169 };
1170
1171 jtag_mm3: jtagmm@fc33f000 {
1172 compatible = "qcom,jtag-mm";
1173 reg = <0xfc33f000 0x1000>,
1174 <0xfc336000 0x1000>;
1175 reg-names = "etm-base","debug-base";
1176 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1177
1178 qcom,ipc-spinlock@fd484000 {
1179 compatible = "qcom,ipc-spinlock-sfpb";
1180 reg = <0xfd484000 0x400>;
1181 qcom,num-locks = <8>;
1182 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1183
1184 qcom,qseecom@d980000 {
1185 compatible = "qcom,qseecom";
1186 reg = <0xd980000 0x256000>;
1187 reg-names = "secapp-region";
1188 qcom,disk-encrypt-pipe-pair = <2>;
1189 qcom,hlos-ce-hw-instance = <0>;
1190 qcom,qsee-ce-hw-instance = <0>;
1191 qcom,msm-bus,name = "qseecom-noc";
1192 qcom,msm-bus,num-cases = <4>;
1193 qcom,msm-bus,active-only = <0>;
1194 qcom,msm-bus,num-paths = <1>;
1195 qcom,msm-bus,vectors-KBps =
1196 <55 512 0 0>,
1197 <55 512 3936000 393600>,
1198 <55 512 3936000 393600>,
1199 <55 512 3936000 393600>;
1200 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1201
1202 qcom,qcrypto@fd404000 {
1203 compatible = "qcom,qcrypto";
1204 reg = <0xfd400000 0x20000>,
1205 <0xfd404000 0x8000>;
1206 reg-names = "crypto-base","crypto-bam-base";
1207 interrupts = <0 207 0>;
1208 qcom,bam-pipe-pair = <2>;
1209 qcom,ce-hw-instance = <0>;
1210 qcom,ce-hw-shared;
1211 qcom,msm-bus,name = "qcrypto-noc";
1212 qcom,msm-bus,num-cases = <2>;
1213 qcom,msm-bus,active-only = <0>;
1214 qcom,msm-bus,num-paths = <1>;
1215 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1216 <55 512 0 0>,
1217 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1218 };
1219
1220 qcom,qcedev@fd400000 {
1221 compatible = "qcom,qcedev";
1222 reg = <0xfd400000 0x20000>,
1223 <0xfd404000 0x8000>;
1224 reg-names = "crypto-base","crypto-bam-base";
1225 interrupts = <0 207 0>;
1226 qcom,bam-pipe-pair = <1>;
1227 qcom,ce-hw-instance = <0>;
1228 qcom,ce-hw-shared;
1229 qcom,msm-bus,name = "qcedev-noc";
1230 qcom,msm-bus,num-cases = <2>;
1231 qcom,msm-bus,active-only = <0>;
1232 qcom,msm-bus,num-paths = <1>;
1233 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1234 <55 512 0 0>,
1235 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1236 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1237
1238 cpu-pmu {
1239 compatible = "arm,cortex-a7-pmu";
1240 qcom,irq-is-percpu;
1241 interrupts = <1 7 0xf00>;
1242 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1243};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1244
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1245&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1246 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1247 status = "ok";
1248};
1249
1250&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1251 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1252 status = "ok";
1253};
1254
1255&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1256 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1257 status = "ok";
1258};
1259
1260&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1261 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1262 status = "ok";
1263};
1264
1265&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1266 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1267 status = "ok";
1268};
1269
1270&gdsc_usb_hsic {
1271 status = "ok";
1272};
1273
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1274/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1275/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1276/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1277
1278&pm8226_vadc {
1279 chan@0 {
1280 label = "usb_in";
1281 reg = <0>;
1282 qcom,decimation = <0>;
1283 qcom,pre-div-channel-scaling = <4>;
1284 qcom,calibration-type = "absolute";
1285 qcom,scale-function = <0>;
1286 qcom,hw-settle-time = <0>;
1287 qcom,fast-avg-setup = <0>;
1288 };
1289
1290 chan@2 {
1291 label = "vchg_sns";
1292 reg = <2>;
1293 qcom,decimation = <0>;
1294 qcom,pre-div-channel-scaling = <3>;
1295 qcom,calibration-type = "absolute";
1296 qcom,scale-function = <0>;
1297 qcom,hw-settle-time = <0>;
1298 qcom,fast-avg-setup = <0>;
1299 };
1300
1301 chan@5 {
1302 label = "vcoin";
1303 reg = <5>;
1304 qcom,decimation = <0>;
1305 qcom,pre-div-channel-scaling = <1>;
1306 qcom,calibration-type = "absolute";
1307 qcom,scale-function = <0>;
1308 qcom,hw-settle-time = <0>;
1309 qcom,fast-avg-setup = <0>;
1310 };
1311
1312 chan@6 {
1313 label = "vbat_sns";
1314 reg = <6>;
1315 qcom,decimation = <0>;
1316 qcom,pre-div-channel-scaling = <1>;
1317 qcom,calibration-type = "absolute";
1318 qcom,scale-function = <0>;
1319 qcom,hw-settle-time = <0>;
1320 qcom,fast-avg-setup = <0>;
1321 };
1322
1323 chan@7 {
1324 label = "vph_pwr";
1325 reg = <7>;
1326 qcom,decimation = <0>;
1327 qcom,pre-div-channel-scaling = <1>;
1328 qcom,calibration-type = "absolute";
1329 qcom,scale-function = <0>;
1330 qcom,hw-settle-time = <0>;
1331 qcom,fast-avg-setup = <0>;
1332 };
1333
1334 chan@30 {
1335 label = "batt_therm";
1336 reg = <0x30>;
1337 qcom,decimation = <0>;
1338 qcom,pre-div-channel-scaling = <0>;
1339 qcom,calibration-type = "ratiometric";
1340 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1341 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1342 qcom,fast-avg-setup = <0>;
1343 };
1344
1345 chan@31 {
1346 label = "batt_id";
1347 reg = <0x31>;
1348 qcom,decimation = <0>;
1349 qcom,pre-div-channel-scaling = <0>;
1350 qcom,calibration-type = "ratiometric";
1351 qcom,scale-function = <0>;
1352 qcom,hw-settle-time = <2>;
1353 qcom,fast-avg-setup = <0>;
1354 };
1355
1356 chan@b2 {
1357 label = "xo_therm_pu2";
1358 reg = <0xb2>;
1359 qcom,decimation = <0>;
1360 qcom,pre-div-channel-scaling = <0>;
1361 qcom,calibration-type = "ratiometric";
1362 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1363 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1364 qcom,fast-avg-setup = <0>;
1365 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1366
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1367 chan@39 {
1368 label = "usb_id_nopull";
1369 reg = <0x39>;
1370 qcom,decimation = <0>;
1371 qcom,pre-div-channel-scaling = <0>;
1372 qcom,calibration-type = "ratiometric";
1373 qcom,scale-function = <0>;
1374 qcom,hw-settle-time = <2>;
1375 qcom,fast-avg-setup = <0>;
1376 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1377};
1378
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1379&pm8226_adc_tm {
1380 /* Channel Node */
1381 chan@30 {
1382 label = "batt_therm";
1383 reg = <0x30>;
1384 qcom,decimation = <0>;
1385 qcom,pre-div-channel-scaling = <0>;
1386 qcom,calibration-type = "ratiometric";
1387 qcom,scale-function = <1>;
1388 qcom,hw-settle-time = <2>;
1389 qcom,fast-avg-setup = <3>;
1390 qcom,btm-channel-number = <0x48>;
1391 };
1392
1393 chan@8 {
1394 label = "die_temp";
1395 reg = <8>;
1396 qcom,decimation = <0>;
1397 qcom,pre-div-channel-scaling = <0>;
1398 qcom,calibration-type = "absolute";
1399 qcom,scale-function = <3>;
1400 qcom,hw-settle-time = <0>;
1401 qcom,fast-avg-setup = <3>;
1402 qcom,btm-channel-number = <0x68>;
1403 };
1404
1405 chan@6 {
1406 label = "vbat_sns";
1407 reg = <6>;
1408 qcom,decimation = <0>;
1409 qcom,pre-div-channel-scaling = <1>;
1410 qcom,calibration-type = "absolute";
1411 qcom,scale-function = <0>;
1412 qcom,hw-settle-time = <0>;
1413 qcom,fast-avg-setup = <3>;
1414 qcom,btm-channel-number = <0x70>;
1415 };
1416
1417 chan@14 {
1418 label = "pa_therm0";
1419 reg = <0x14>;
1420 qcom,decimation = <0>;
1421 qcom,pre-div-channel-scaling = <0>;
1422 qcom,calibration-type = "ratiometric";
1423 qcom,scale-function = <2>;
1424 qcom,hw-settle-time = <2>;
1425 qcom,fast-avg-setup = <0>;
1426 qcom,btm-channel-number = <0x78>;
1427 qcom,thermal-node;
1428 };
1429
1430 chan@17 {
1431 label = "pa_therm1";
1432 reg = <0x17>;
1433 qcom,decimation = <0>;
1434 qcom,pre-div-channel-scaling = <0>;
1435 qcom,calibration-type = "ratiometric";
1436 qcom,scale-function = <2>;
1437 qcom,hw-settle-time = <2>;
1438 qcom,fast-avg-setup = <0>;
1439 qcom,btm-channel-number = <0x80>;
1440 qcom,thermal-node;
1441 };
1442};
1443
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1444&pm8226_chg {
1445 status = "ok";
1446
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1447 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1448 status = "ok";
1449 };
1450
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1451 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1452 status = "ok";
1453 };
1454
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1455 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1456 status = "ok";
1457 };
1458
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1459 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1460 status = "ok";
1461 };
1462
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1463 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1464 status = "ok";
1465 };
1466
1467 qcom,chg-misc@1600 {
1468 status = "ok";
1469 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1470};