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Yoshinori Sato71557a32008-08-06 19:49:00 -04001#ifndef __ASM_SH_ETH_H__
2#define __ASM_SH_ETH_H__
3
Yoshihiro Shimodae47c9052011-03-07 21:59:45 +00004#include <linux/phy.h>
5
Yoshinori Sato71557a32008-08-06 19:49:00 -04006enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
Yoshihiro Shimoda4a555302011-03-07 21:59:26 +00007enum {
8 SH_ETH_REG_GIGABIT,
9 SH_ETH_REG_FAST_SH4,
10 SH_ETH_REG_FAST_SH3_SH2
11};
Yoshinori Sato71557a32008-08-06 19:49:00 -040012
13struct sh_eth_plat_data {
14 int phy;
15 int edmac_endian;
Yoshihiro Shimoda4a555302011-03-07 21:59:26 +000016 int register_type;
Yoshihiro Shimodae47c9052011-03-07 21:59:45 +000017 phy_interface_t phy_interface;
Yoshihiro Shimoda8eac3f62011-09-27 21:49:05 +000018 void (*set_mdio_gate)(void *addr);
Yoshihiro Shimoda49235762009-08-27 23:25:03 +000019
Magnus Damm748031f2009-10-09 00:17:14 +000020 unsigned char mac_addr[6];
Yoshihiro Shimoda49235762009-08-27 23:25:03 +000021 unsigned no_ether_link:1;
22 unsigned ether_link_active_low:1;
Yoshinori Sato71557a32008-08-06 19:49:00 -040023};
24
25#endif