blob: 3241a25784d09b6c5ba83ba88752fcee5c7f9dd0 [file] [log] [blame]
Eric Miao14c6b5e2009-03-20 12:50:22 +08001/*
2 * linux/arch/arm/mach-mmp/pxa910.c
3 *
4 * Code specific to PXA910
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Eric Miao14c6b5e2009-03-20 12:50:22 +080010#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/list.h>
14#include <linux/io.h>
Haojian Zhuang157d2642011-10-17 20:37:52 +080015#include <linux/platform_device.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080016
17#include <asm/mach/time.h>
18#include <mach/addr-map.h>
19#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h>
21#include <mach/cputype.h>
22#include <mach/irqs.h>
Eric Miao14c6b5e2009-03-20 12:50:22 +080023#include <mach/dma.h>
24#include <mach/mfp.h>
25#include <mach/devices.h>
26
27#include "common.h"
28#include "clock.h"
29
30#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
31
32static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
33{
34 MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
35 MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
36 MFP_ADDR_X(GPIO100, GPIO109, 0x238),
37
38 MFP_ADDR(GPIO123, 0xcc),
39 MFP_ADDR(GPIO124, 0xd0),
40
41 MFP_ADDR(DF_IO0, 0x40),
42 MFP_ADDR(DF_IO1, 0x3c),
43 MFP_ADDR(DF_IO2, 0x38),
44 MFP_ADDR(DF_IO3, 0x34),
45 MFP_ADDR(DF_IO4, 0x30),
46 MFP_ADDR(DF_IO5, 0x2c),
47 MFP_ADDR(DF_IO6, 0x28),
48 MFP_ADDR(DF_IO7, 0x24),
49 MFP_ADDR(DF_IO8, 0x20),
50 MFP_ADDR(DF_IO9, 0x1c),
51 MFP_ADDR(DF_IO10, 0x18),
52 MFP_ADDR(DF_IO11, 0x14),
53 MFP_ADDR(DF_IO12, 0x10),
54 MFP_ADDR(DF_IO13, 0xc),
55 MFP_ADDR(DF_IO14, 0x8),
56 MFP_ADDR(DF_IO15, 0x4),
57
58 MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
59 MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
60 MFP_ADDR(SM_nCS0, 0x4c),
61 MFP_ADDR(SM_nCS1, 0x50),
62 MFP_ADDR(DF_WEn, 0x54),
63 MFP_ADDR(DF_REn, 0x58),
64 MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
65 MFP_ADDR(DF_ALE_SM_WEn, 0x60),
66 MFP_ADDR(SM_SCLK, 0x64),
67 MFP_ADDR(DF_RDY0, 0x68),
68 MFP_ADDR(SM_BE0, 0x6c),
69 MFP_ADDR(SM_BE1, 0x70),
70 MFP_ADDR(SM_ADV, 0x74),
71 MFP_ADDR(DF_RDY1, 0x78),
72 MFP_ADDR(SM_ADVMUX, 0x7c),
73 MFP_ADDR(SM_RDY, 0x80),
74
75 MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
76
77 MFP_ADDR_END,
78};
79
Eric Miao14c6b5e2009-03-20 12:50:22 +080080void __init pxa910_init_irq(void)
81{
82 icu_init_irq();
Eric Miao14c6b5e2009-03-20 12:50:22 +080083}
84
85/* APB peripheral clocks */
86static APBC_CLK(uart1, PXA910_UART0, 1, 14745600);
87static APBC_CLK(uart2, PXA910_UART1, 1, 14745600);
Eric Miao1a779202009-04-13 15:34:54 +080088static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
89static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
Eric Miaoa27ba762009-04-13 18:29:52 +080090static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
Haojian Zhuang389eda12011-10-17 21:26:55 +080094static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
Eric Miao14c6b5e2009-03-20 12:50:22 +080095
Lei Wend204b2c2011-06-21 02:54:18 -070096static APMU_CLK(nand, NAND, 0x19b, 156000000);
cxie47bdba922010-11-23 10:43:22 +080097static APMU_CLK(u2o, USB, 0x1b, 480000000);
Haojian Zhuanga0f266c2009-10-13 15:24:55 +080098
Eric Miao14c6b5e2009-03-20 12:50:22 +080099/* device and clock bindings */
100static struct clk_lookup pxa910_clkregs[] = {
101 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
102 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
Eric Miao1a779202009-04-13 15:34:54 +0800103 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
104 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
Eric Miaoa27ba762009-04-13 18:29:52 +0800105 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
106 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
107 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
108 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
Haojian Zhuanga0f266c2009-10-13 15:24:55 +0800109 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
Haojian Zhuang389eda12011-10-17 21:26:55 +0800110 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
cxie47bdba922010-11-23 10:43:22 +0800111 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
Eric Miao14c6b5e2009-03-20 12:50:22 +0800112};
113
114static int __init pxa910_init(void)
115{
116 if (cpu_is_pxa910()) {
117 mfp_init_base(MFPR_VIRT_BASE);
118 mfp_init_addr(pxa910_mfp_addr_map);
119 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
Russell King0a0300d2010-01-12 12:28:00 +0000120 clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
Eric Miao14c6b5e2009-03-20 12:50:22 +0800121 }
122
123 return 0;
124}
125postcore_initcall(pxa910_init);
126
127/* system timer - clock enabled, 3.25MHz */
128#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
129
130static void __init pxa910_timer_init(void)
131{
132 /* reset and configure */
133 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA910_TIMERS);
134 __raw_writel(TIMER_CLK_RST, APBC_PXA910_TIMERS);
135
136 timer_init(IRQ_PXA910_AP1_TIMER1);
137}
138
139struct sys_timer pxa910_timer = {
140 .init = pxa910_timer_init,
141};
142
143/* on-chip devices */
144
145/* NOTE: there are totally 3 UARTs on PXA910:
146 *
147 * UART1 - Slow UART (can be used both by AP and CP)
148 * UART2/3 - Fast UART
149 *
150 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
151 * they are re-ordered as:
152 *
153 * pxa910_device_uart1 - UART2 as FFUART
154 * pxa910_device_uart2 - UART3 as BTUART
155 *
156 * UART1 is not used by AP for the moment.
157 */
158PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
159PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
Eric Miao1a779202009-04-13 15:34:54 +0800160PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
161PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
Eric Miaoa27ba762009-04-13 18:29:52 +0800162PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
163PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
164PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
165PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
Haojian Zhuanga0f266c2009-10-13 15:24:55 +0800166PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
Haojian Zhuang157d2642011-10-17 20:37:52 +0800167
168struct resource pxa910_resource_gpio[] = {
169 {
170 .start = 0xd4019000,
171 .end = 0xd4019fff,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PXA910_AP_GPIO,
175 .end = IRQ_PXA910_AP_GPIO,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180struct platform_device pxa910_device_gpio = {
181 .name = "pxa-gpio",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
184 .resource = pxa910_resource_gpio,
185};