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Rohit Vaswanie897f842012-03-19 14:19:34 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15
16#include <linux/dma-mapping.h>
17#include <mach/irqs.h>
18#include <mach/msm_iomap.h>
19#include <mach/dma.h>
20#include <mach/board.h>
21
22#include "devices.h"
23#include "smd_private.h"
24#include "clock-local.h"
Rohit Vaswanie897f842012-03-19 14:19:34 -070025#include "msm_watchdog.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026
27#include <asm/mach/flash.h>
28#include <asm/mach/mmc.h>
29
30/*
31 * UARTs
32 */
33
34static struct resource resources_uart1[] = {
35 {
36 .start = INT_UART1,
37 .end = INT_UART1,
38 .flags = IORESOURCE_IRQ,
39 },
40 {
41 .start = MSM_UART1_PHYS,
42 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
43 .flags = IORESOURCE_MEM,
44 },
45};
46
47struct platform_device msm_device_uart1 = {
48 .name = "msm_serial",
49 .id = 0,
50 .num_resources = ARRAY_SIZE(resources_uart1),
51 .resource = resources_uart1,
52};
53
54static struct resource resources_uart2[] = {
55 {
56 .start = INT_UART2,
57 .end = INT_UART2,
58 .flags = IORESOURCE_IRQ,
59 },
60 {
61 .start = MSM_UART2_PHYS,
62 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
63 .flags = IORESOURCE_MEM,
64 },
65};
66
67struct platform_device msm_device_uart2 = {
68 .name = "msm_serial",
69 .id = 1,
70 .num_resources = ARRAY_SIZE(resources_uart2),
71 .resource = resources_uart2,
72};
73
Rohit Vaswani0eafbe92012-06-21 15:21:24 -070074static struct resource resources_uart3[] = {
75 {
76 .start = INT_UART3,
77 .end = INT_UART3,
78 .flags = IORESOURCE_IRQ,
79 },
80 {
81 .start = MSM_UART3_PHYS,
82 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
83 .flags = IORESOURCE_MEM,
84 },
85};
86
87struct platform_device msm_device_uart3 = {
88 .name = "msm_uim",
89 .id = 2,
90 .num_resources = ARRAY_SIZE(resources_uart3),
91 .resource = resources_uart3,
92};
93
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094/*
95 * SSBIs
96 */
97
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053098#ifdef CONFIG_MSM_SSBI
99#define MSM_SSBI1_PHYS 0x94080000
100#define MSM_SSBI_PMIC1_PHYS MSM_SSBI1_PHYS
101static struct resource msm_ssbi_pmic1_resources[] = {
102 {
103 .start = MSM_SSBI_PMIC1_PHYS,
104 .end = MSM_SSBI_PMIC1_PHYS + SZ_4K - 1,
105 .flags = IORESOURCE_MEM,
106 },
107};
108
109struct platform_device msm_device_ssbi_pmic1 = {
110 .name = "msm_ssbi",
111 .id = 0,
112 .resource = msm_ssbi_pmic1_resources,
113 .num_resources = ARRAY_SIZE(msm_ssbi_pmic1_resources),
114};
115#endif
116
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700118#define MSM_SSBI2_PHYS 0x94090000
119#define MSM_SSBI2_SIZE SZ_4K
120
121static struct resource msm_ssbi2_resources[] = {
122 {
123 .name = "ssbi_base",
124 .start = MSM_SSBI2_PHYS,
125 .end = MSM_SSBI2_PHYS + MSM_SSBI2_SIZE - 1,
126 .flags = IORESOURCE_MEM,
127 },
128};
129
130struct platform_device msm_device_ssbi2 = {
131 .name = "i2c_ssbi",
132 .id = 1,
133 .num_resources = ARRAY_SIZE(msm_ssbi2_resources),
134 .resource = msm_ssbi2_resources,
135};
136
137#define MSM_SSBI3_PHYS 0x940c0000
138#define MSM_SSBI3_SIZE SZ_4K
139
140static struct resource msm_ssbi3_resources[] = {
141 {
142 .name = "ssbi_base",
143 .start = MSM_SSBI3_PHYS,
144 .end = MSM_SSBI3_PHYS + MSM_SSBI3_SIZE - 1,
145 .flags = IORESOURCE_MEM,
146 },
147};
148
149struct platform_device msm_device_ssbi3 = {
150 .name = "i2c_ssbi",
151 .id = 2,
152 .num_resources = ARRAY_SIZE(msm_ssbi3_resources),
153 .resource = msm_ssbi3_resources,
154};
155
156#endif /* CONFIG_I2C_SSBI */
157
158/*
159 * GSBI
160 */
161
162#ifdef CONFIG_I2C_QUP
163
164#define MSM_GSBI1_PHYS 0x81200000
165#define MSM_GSBI1_QUP_PHYS 0x81a00000
166
167static struct resource gsbi1_qup_i2c_resources[] = {
168 {
169 .name = "qup_phys_addr",
170 .start = MSM_GSBI1_QUP_PHYS,
171 .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1,
172 .flags = IORESOURCE_MEM,
173 },
174 {
175 .name = "gsbi_qup_i2c_addr",
176 .start = MSM_GSBI1_PHYS,
177 .end = MSM_GSBI1_PHYS + 4 - 1,
178 .flags = IORESOURCE_MEM,
179 },
180 {
181 .name = "qup_err_intr",
182 .start = INT_GSBI_QUP_ERROR,
183 .end = INT_GSBI_QUP_ERROR,
184 .flags = IORESOURCE_IRQ,
185 },
186};
187
188struct platform_device msm_gsbi1_qup_i2c_device = {
189 .name = "qup_i2c",
190 .id = 3,
191 .num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
192 .resource = gsbi1_qup_i2c_resources,
193};
194
195#endif /* CONFIG_I2C_QUP */
196
197/*
198 * NAND
199 */
200
201#define MSM_NAND_PHYS 0x81600000
202#define MSM_NAND_SIZE SZ_4K
203#define MSM_EBI2_CTRL_PHYS 0x81400000
204#define MSM_EBI2_CTRL_SIZE SZ_4K
205
206static struct resource resources_nand[] = {
207 [0] = {
208 .name = "msm_nand_dmac",
209 .start = DMOV_NAND_CHAN,
210 .end = DMOV_NAND_CHAN,
211 .flags = IORESOURCE_DMA,
212 },
213 [1] = {
214 .name = "msm_nand_phys",
215 .start = MSM_NAND_PHYS,
216 .end = MSM_NAND_PHYS + MSM_NAND_SIZE - 1,
217 .flags = IORESOURCE_MEM,
218 },
219 [3] = {
220 .name = "ebi2_reg_base",
221 .start = MSM_EBI2_CTRL_PHYS,
222 .end = MSM_EBI2_CTRL_PHYS + MSM_EBI2_CTRL_SIZE - 1,
223 .flags = IORESOURCE_MEM,
224 },
225};
226
227struct flash_platform_data msm_nand_data = {
228 .parts = NULL,
229 .nr_parts = 0,
230 .interleave = 0,
231};
232
233struct platform_device msm_device_nand = {
234 .name = "msm_nand",
235 .id = -1,
236 .num_resources = ARRAY_SIZE(resources_nand),
237 .resource = resources_nand,
238 .dev = {
239 .platform_data = &msm_nand_data,
240 },
241};
242
243/*
244 * SMD
245 */
246
247struct platform_device msm_device_smd = {
248 .name = "msm_smd",
249 .id = -1,
250};
251
252/*
253 * ADM
254 */
255
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700256static struct resource msm_dmov_resource[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700257 {
258 .start = INT_ADM_AARM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700259 .flags = IORESOURCE_IRQ,
260 },
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700261 {
262 .start = 0x94610000,
263 .end = 0x94610000 + SZ_4K - 1,
264 .flags = IORESOURCE_MEM,
265 },
266};
267
268static struct msm_dmov_pdata msm_dmov_pdata = {
269 .sd = 3,
270 .sd_size = 0x400,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700271};
272
273struct platform_device msm_device_dmov = {
274 .name = "msm_dmov",
275 .id = -1,
276 .resource = msm_dmov_resource,
277 .num_resources = ARRAY_SIZE(msm_dmov_resource),
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700278 .dev = {
279 .platform_data = &msm_dmov_pdata,
280 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281};
282
283/*
284 * SDC
285 */
286
287#define MSM_SDC1_PHYS 0x80A00000
288#define MSM_SDC1_SIZE SZ_4K
289
290static struct resource resources_sdc1[] = {
291 {
292 .start = MSM_SDC1_PHYS,
293 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
294 .flags = IORESOURCE_MEM,
295 },
296 {
297 .start = INT_SDC1_0,
298 .end = INT_SDC1_1,
299 .flags = IORESOURCE_IRQ,
300 },
301 {
302 .start = DMOV_SDC1_CHAN,
303 .end = DMOV_SDC1_CHAN,
304 .flags = IORESOURCE_DMA,
305 },
306};
307
308struct platform_device msm_device_sdc1 = {
309 .name = "msm_sdcc",
310 .id = 1,
311 .num_resources = ARRAY_SIZE(resources_sdc1),
312 .resource = resources_sdc1,
313 .dev = {
314 .coherent_dma_mask = 0xffffffff,
315 },
316};
317
318static struct platform_device *msm_sdcc_devices[] __initdata = {
319 &msm_device_sdc1,
320};
321
322int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
323{
324 struct platform_device *pdev;
325
326 if (controller != 1)
327 return -EINVAL;
328
329 pdev = msm_sdcc_devices[controller-1];
330 pdev->dev.platform_data = plat;
331 return platform_device_register(pdev);
332}
333
334/*
335 * QFEC
336 */
337
338# define QFEC_MAC_IRQ INT_SBD_IRQ
339# define QFEC_MAC_BASE 0x40000000
340# define QFEC_CLK_BASE 0x94020000
341
342# define QFEC_MAC_SIZE 0x2000
343# define QFEC_CLK_SIZE 0x18100
344
345# define QFEC_MAC_FUSE_BASE 0x80004210
346# define QFEC_MAC_FUSE_SIZE 16
347
348static struct resource qfec_resources[] = {
349 [0] = {
350 .start = QFEC_MAC_BASE,
351 .end = QFEC_MAC_BASE + QFEC_MAC_SIZE,
352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
355 .start = QFEC_MAC_IRQ,
356 .end = QFEC_MAC_IRQ,
357 .flags = IORESOURCE_IRQ,
358 },
359 [2] = {
360 .start = QFEC_CLK_BASE,
361 .end = QFEC_CLK_BASE + QFEC_CLK_SIZE,
362 .flags = IORESOURCE_IO,
363 },
364 [3] = {
365 .start = QFEC_MAC_FUSE_BASE,
366 .end = QFEC_MAC_FUSE_BASE + QFEC_MAC_FUSE_SIZE,
367 .flags = IORESOURCE_DMA,
368 },
369};
370
371struct platform_device qfec_device = {
372 .name = "qfec",
373 .id = 0,
374 .num_resources = ARRAY_SIZE(qfec_resources),
375 .resource = qfec_resources,
376};
377
378/*
379 * FUSE
380 */
381
382#if defined(CONFIG_QFP_FUSE)
383
384char fuse_regulator_name[] = "8058_lvs0";
385
386struct resource qfp_fuse_resources[] = {
387 {
388 .start = (uint32_t) MSM_QFP_FUSE_BASE,
389 .end = (uint32_t) MSM_QFP_FUSE_BASE + MSM_QFP_FUSE_SIZE,
390 .flags = IORESOURCE_MEM,
391 },
392};
393
394struct platform_device fsm_qfp_fuse_device = {
395 .name = "qfp_fuse_driver",
396 .id = 0,
397 .dev = {.platform_data = fuse_regulator_name},
398 .num_resources = ARRAY_SIZE(qfp_fuse_resources),
399 .resource = qfp_fuse_resources,
400};
401
402#endif
403
Rohit Vaswani4c0d3042011-07-13 14:19:23 -0700404/*
405 * XO
406 */
407
408struct platform_device fsm_xo_device = {
409 .name = "fsm_xo_driver",
410 .id = -1,
411};
412
Rohit Vaswanie897f842012-03-19 14:19:34 -0700413/*
414 * Watchdog
415 */
416
417static struct msm_watchdog_pdata fsm_watchdog_pdata = {
418 .pet_time = 10000,
419 .bark_time = 11000,
420 .has_secure = false,
421 .has_vic = true,
Rohit Vaswanic77e4a62012-08-09 18:10:28 -0700422 .base = MSM_TMR_BASE + WDT1_OFFSET,
423};
424
425static struct resource msm_watchdog_resources[] = {
426 {
427 .start = INT_WDT1_ACCSCSSBARK,
428 .end = INT_WDT1_ACCSCSSBARK,
429 .flags = IORESOURCE_IRQ,
430 },
Rohit Vaswanie897f842012-03-19 14:19:34 -0700431};
432
433struct platform_device fsm9xxx_device_watchdog = {
434 .name = "msm_watchdog",
435 .id = -1,
436 .dev = {
437 .platform_data = &fsm_watchdog_pdata,
438 },
Rohit Vaswanic77e4a62012-08-09 18:10:28 -0700439 .num_resources = ARRAY_SIZE(msm_watchdog_resources),
440 .resource = msm_watchdog_resources,
Rohit Vaswanie897f842012-03-19 14:19:34 -0700441};
442