Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Driver for OHCI 1394 controllers |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3 | * |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 4 | * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software Foundation, |
| 18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
Stefan Richter | e524f61 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 21 | #include <linux/compiler.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 22 | #include <linux/delay.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 23 | #include <linux/device.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 24 | #include <linux/dma-mapping.h> |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 25 | #include <linux/firewire.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 26 | #include <linux/firewire-constants.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 27 | #include <linux/gfp.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 28 | #include <linux/init.h> |
| 29 | #include <linux/interrupt.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 30 | #include <linux/io.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 31 | #include <linux/kernel.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 32 | #include <linux/list.h> |
Al Viro | faa2fb4 | 2007-05-15 20:36:10 +0100 | [diff] [blame] | 33 | #include <linux/mm.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 34 | #include <linux/module.h> |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 35 | #include <linux/moduleparam.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 36 | #include <linux/pci.h> |
Stefan Richter | fc38379 | 2009-08-28 13:25:15 +0200 | [diff] [blame] | 37 | #include <linux/pci_ids.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 38 | #include <linux/spinlock.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 39 | #include <linux/string.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 40 | |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 41 | #include <asm/byteorder.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 42 | #include <asm/page.h> |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 43 | #include <asm/system.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 44 | |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 45 | #ifdef CONFIG_PPC_PMAC |
| 46 | #include <asm/pmac_feature.h> |
| 47 | #endif |
| 48 | |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 49 | #include "core.h" |
| 50 | #include "ohci.h" |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 51 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 52 | #define DESCRIPTOR_OUTPUT_MORE 0 |
| 53 | #define DESCRIPTOR_OUTPUT_LAST (1 << 12) |
| 54 | #define DESCRIPTOR_INPUT_MORE (2 << 12) |
| 55 | #define DESCRIPTOR_INPUT_LAST (3 << 12) |
| 56 | #define DESCRIPTOR_STATUS (1 << 11) |
| 57 | #define DESCRIPTOR_KEY_IMMEDIATE (2 << 8) |
| 58 | #define DESCRIPTOR_PING (1 << 7) |
| 59 | #define DESCRIPTOR_YY (1 << 6) |
| 60 | #define DESCRIPTOR_NO_IRQ (0 << 4) |
| 61 | #define DESCRIPTOR_IRQ_ERROR (1 << 4) |
| 62 | #define DESCRIPTOR_IRQ_ALWAYS (3 << 4) |
| 63 | #define DESCRIPTOR_BRANCH_ALWAYS (3 << 2) |
| 64 | #define DESCRIPTOR_WAIT (3 << 0) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 65 | |
| 66 | struct descriptor { |
| 67 | __le16 req_count; |
| 68 | __le16 control; |
| 69 | __le32 data_address; |
| 70 | __le32 branch_address; |
| 71 | __le16 res_count; |
| 72 | __le16 transfer_status; |
| 73 | } __attribute__((aligned(16))); |
| 74 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 75 | #define CONTROL_SET(regs) (regs) |
| 76 | #define CONTROL_CLEAR(regs) ((regs) + 4) |
| 77 | #define COMMAND_PTR(regs) ((regs) + 12) |
| 78 | #define CONTEXT_MATCH(regs) ((regs) + 16) |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 79 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 80 | struct ar_buffer { |
| 81 | struct descriptor descriptor; |
| 82 | struct ar_buffer *next; |
| 83 | __le32 data[0]; |
| 84 | }; |
| 85 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 86 | struct ar_context { |
| 87 | struct fw_ohci *ohci; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 88 | struct ar_buffer *current_buffer; |
| 89 | struct ar_buffer *last_buffer; |
| 90 | void *pointer; |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 91 | u32 regs; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 92 | struct tasklet_struct tasklet; |
| 93 | }; |
| 94 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 95 | struct context; |
| 96 | |
| 97 | typedef int (*descriptor_callback_t)(struct context *ctx, |
| 98 | struct descriptor *d, |
| 99 | struct descriptor *last); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 100 | |
| 101 | /* |
| 102 | * A buffer that contains a block of DMA-able coherent memory used for |
| 103 | * storing a portion of a DMA descriptor program. |
| 104 | */ |
| 105 | struct descriptor_buffer { |
| 106 | struct list_head list; |
| 107 | dma_addr_t buffer_bus; |
| 108 | size_t buffer_size; |
| 109 | size_t used; |
| 110 | struct descriptor buffer[0]; |
| 111 | }; |
| 112 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 113 | struct context { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 114 | struct fw_ohci *ohci; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 115 | u32 regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 116 | int total_allocation; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 117 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 118 | /* |
| 119 | * List of page-sized buffers for storing DMA descriptors. |
| 120 | * Head of list contains buffers in use and tail of list contains |
| 121 | * free buffers. |
| 122 | */ |
| 123 | struct list_head buffer_list; |
| 124 | |
| 125 | /* |
| 126 | * Pointer to a buffer inside buffer_list that contains the tail |
| 127 | * end of the current DMA program. |
| 128 | */ |
| 129 | struct descriptor_buffer *buffer_tail; |
| 130 | |
| 131 | /* |
| 132 | * The descriptor containing the branch address of the first |
| 133 | * descriptor that has not yet been filled by the device. |
| 134 | */ |
| 135 | struct descriptor *last; |
| 136 | |
| 137 | /* |
| 138 | * The last descriptor in the DMA program. It contains the branch |
| 139 | * address that must be updated upon appending a new descriptor. |
| 140 | */ |
| 141 | struct descriptor *prev; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 142 | |
| 143 | descriptor_callback_t callback; |
| 144 | |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 145 | struct tasklet_struct tasklet; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 146 | }; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 147 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 148 | #define IT_HEADER_SY(v) ((v) << 0) |
| 149 | #define IT_HEADER_TCODE(v) ((v) << 4) |
| 150 | #define IT_HEADER_CHANNEL(v) ((v) << 8) |
| 151 | #define IT_HEADER_TAG(v) ((v) << 14) |
| 152 | #define IT_HEADER_SPEED(v) ((v) << 16) |
| 153 | #define IT_HEADER_DATA_LENGTH(v) ((v) << 16) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 154 | |
| 155 | struct iso_context { |
| 156 | struct fw_iso_context base; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 157 | struct context context; |
David Moore | 0642b65 | 2007-12-19 03:09:18 -0500 | [diff] [blame] | 158 | int excess_bytes; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 159 | void *header; |
| 160 | size_t header_length; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 161 | }; |
| 162 | |
| 163 | #define CONFIG_ROM_SIZE 1024 |
| 164 | |
| 165 | struct fw_ohci { |
| 166 | struct fw_card card; |
| 167 | |
| 168 | __iomem char *registers; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 169 | int node_id; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 170 | int generation; |
Stefan Richter | e09770d | 2008-03-11 02:23:29 +0100 | [diff] [blame] | 171 | int request_generation; /* for timestamping incoming requests */ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 172 | unsigned quirks; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 173 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 174 | /* |
| 175 | * Spinlock for accessing fw_ohci data. Never call out of |
| 176 | * this driver with this lock held. |
| 177 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 178 | spinlock_t lock; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 179 | |
| 180 | struct ar_context ar_request_ctx; |
| 181 | struct ar_context ar_response_ctx; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 182 | struct context at_request_ctx; |
| 183 | struct context at_response_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 184 | |
| 185 | u32 it_context_mask; |
| 186 | struct iso_context *it_context_list; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 187 | u64 ir_context_channels; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 188 | u32 ir_context_mask; |
| 189 | struct iso_context *ir_context_list; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 190 | |
| 191 | __be32 *config_rom; |
| 192 | dma_addr_t config_rom_bus; |
| 193 | __be32 *next_config_rom; |
| 194 | dma_addr_t next_config_rom_bus; |
| 195 | __be32 next_header; |
| 196 | |
| 197 | __le32 *self_id_cpu; |
| 198 | dma_addr_t self_id_bus; |
| 199 | struct tasklet_struct bus_reset_tasklet; |
| 200 | |
| 201 | u32 self_id_buffer[512]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 202 | }; |
| 203 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 204 | static inline struct fw_ohci *fw_ohci(struct fw_card *card) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 205 | { |
| 206 | return container_of(card, struct fw_ohci, card); |
| 207 | } |
| 208 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 209 | #define IT_CONTEXT_CYCLE_MATCH_ENABLE 0x80000000 |
| 210 | #define IR_CONTEXT_BUFFER_FILL 0x80000000 |
| 211 | #define IR_CONTEXT_ISOCH_HEADER 0x40000000 |
| 212 | #define IR_CONTEXT_CYCLE_MATCH_ENABLE 0x20000000 |
| 213 | #define IR_CONTEXT_MULTI_CHANNEL_MODE 0x10000000 |
| 214 | #define IR_CONTEXT_DUAL_BUFFER_MODE 0x08000000 |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 215 | |
| 216 | #define CONTEXT_RUN 0x8000 |
| 217 | #define CONTEXT_WAKE 0x1000 |
| 218 | #define CONTEXT_DEAD 0x0800 |
| 219 | #define CONTEXT_ACTIVE 0x0400 |
| 220 | |
Stefan Richter | 8b7b6af | 2009-01-20 19:10:58 +0100 | [diff] [blame] | 221 | #define OHCI1394_MAX_AT_REQ_RETRIES 0xf |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 222 | #define OHCI1394_MAX_AT_RESP_RETRIES 0x2 |
| 223 | #define OHCI1394_MAX_PHYS_RESP_RETRIES 0x8 |
| 224 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 225 | #define OHCI1394_REGISTER_SIZE 0x800 |
| 226 | #define OHCI_LOOP_COUNT 500 |
| 227 | #define OHCI1394_PCI_HCI_Control 0x40 |
| 228 | #define SELF_ID_BUF_SIZE 0x800 |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 229 | #define OHCI_TCODE_PHY_PACKET 0x0e |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 230 | #define OHCI_VERSION_1_1 0x010010 |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 231 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 232 | static char ohci_driver_name[] = KBUILD_MODNAME; |
| 233 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 234 | #define QUIRK_CYCLE_TIMER 1 |
| 235 | #define QUIRK_RESET_PACKET 2 |
| 236 | #define QUIRK_BE_HEADERS 4 |
| 237 | |
| 238 | /* In case of multiple matches in ohci_quirks[], only the first one is used. */ |
| 239 | static const struct { |
| 240 | unsigned short vendor, device, flags; |
| 241 | } ohci_quirks[] = { |
| 242 | {PCI_VENDOR_ID_TI, PCI_ANY_ID, QUIRK_RESET_PACKET}, |
| 243 | {PCI_VENDOR_ID_AL, PCI_ANY_ID, QUIRK_CYCLE_TIMER}, |
| 244 | {PCI_VENDOR_ID_NEC, PCI_ANY_ID, QUIRK_CYCLE_TIMER}, |
| 245 | {PCI_VENDOR_ID_VIA, PCI_ANY_ID, QUIRK_CYCLE_TIMER}, |
| 246 | {PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_FW, QUIRK_BE_HEADERS}, |
| 247 | }; |
| 248 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 249 | #ifdef CONFIG_FIREWIRE_OHCI_DEBUG |
| 250 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 251 | #define OHCI_PARAM_DEBUG_AT_AR 1 |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 252 | #define OHCI_PARAM_DEBUG_SELFIDS 2 |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 253 | #define OHCI_PARAM_DEBUG_IRQS 4 |
| 254 | #define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */ |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 255 | |
| 256 | static int param_debug; |
| 257 | module_param_named(debug, param_debug, int, 0644); |
| 258 | MODULE_PARM_DESC(debug, "Verbose logging (default = 0" |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 259 | ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR) |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 260 | ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS) |
| 261 | ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS) |
| 262 | ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 263 | ", or a combination, or all = -1)"); |
| 264 | |
| 265 | static void log_irqs(u32 evt) |
| 266 | { |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 267 | if (likely(!(param_debug & |
| 268 | (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS)))) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 269 | return; |
| 270 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 271 | if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) && |
| 272 | !(evt & OHCI1394_busReset)) |
| 273 | return; |
| 274 | |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 275 | fw_notify("IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 276 | evt & OHCI1394_selfIDComplete ? " selfID" : "", |
| 277 | evt & OHCI1394_RQPkt ? " AR_req" : "", |
| 278 | evt & OHCI1394_RSPkt ? " AR_resp" : "", |
| 279 | evt & OHCI1394_reqTxComplete ? " AT_req" : "", |
| 280 | evt & OHCI1394_respTxComplete ? " AT_resp" : "", |
| 281 | evt & OHCI1394_isochRx ? " IR" : "", |
| 282 | evt & OHCI1394_isochTx ? " IT" : "", |
| 283 | evt & OHCI1394_postedWriteErr ? " postedWriteErr" : "", |
| 284 | evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "", |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 285 | evt & OHCI1394_cycleInconsistent ? " cycleInconsistent" : "", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 286 | evt & OHCI1394_regAccessFail ? " regAccessFail" : "", |
| 287 | evt & OHCI1394_busReset ? " busReset" : "", |
| 288 | evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt | |
| 289 | OHCI1394_RSPkt | OHCI1394_reqTxComplete | |
| 290 | OHCI1394_respTxComplete | OHCI1394_isochRx | |
| 291 | OHCI1394_isochTx | OHCI1394_postedWriteErr | |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 292 | OHCI1394_cycleTooLong | OHCI1394_cycleInconsistent | |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 293 | OHCI1394_regAccessFail | OHCI1394_busReset) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 294 | ? " ?" : ""); |
| 295 | } |
| 296 | |
| 297 | static const char *speed[] = { |
| 298 | [0] = "S100", [1] = "S200", [2] = "S400", [3] = "beta", |
| 299 | }; |
| 300 | static const char *power[] = { |
| 301 | [0] = "+0W", [1] = "+15W", [2] = "+30W", [3] = "+45W", |
| 302 | [4] = "-3W", [5] = " ?W", [6] = "-3..-6W", [7] = "-3..-10W", |
| 303 | }; |
| 304 | static const char port[] = { '.', '-', 'p', 'c', }; |
| 305 | |
| 306 | static char _p(u32 *s, int shift) |
| 307 | { |
| 308 | return port[*s >> shift & 3]; |
| 309 | } |
| 310 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 311 | static void log_selfids(int node_id, int generation, int self_id_count, u32 *s) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 312 | { |
| 313 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_SELFIDS))) |
| 314 | return; |
| 315 | |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 316 | fw_notify("%d selfIDs, generation %d, local node ID %04x\n", |
| 317 | self_id_count, generation, node_id); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 318 | |
| 319 | for (; self_id_count--; ++s) |
| 320 | if ((*s & 1 << 23) == 0) |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 321 | fw_notify("selfID 0: %08x, phy %d [%c%c%c] " |
| 322 | "%s gc=%d %s %s%s%s\n", |
| 323 | *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2), |
| 324 | speed[*s >> 14 & 3], *s >> 16 & 63, |
| 325 | power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "", |
| 326 | *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : ""); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 327 | else |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 328 | fw_notify("selfID n: %08x, phy %d [%c%c%c%c%c%c%c%c]\n", |
| 329 | *s, *s >> 24 & 63, |
| 330 | _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10), |
| 331 | _p(s, 8), _p(s, 6), _p(s, 4), _p(s, 2)); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 332 | } |
| 333 | |
| 334 | static const char *evts[] = { |
| 335 | [0x00] = "evt_no_status", [0x01] = "-reserved-", |
| 336 | [0x02] = "evt_long_packet", [0x03] = "evt_missing_ack", |
| 337 | [0x04] = "evt_underrun", [0x05] = "evt_overrun", |
| 338 | [0x06] = "evt_descriptor_read", [0x07] = "evt_data_read", |
| 339 | [0x08] = "evt_data_write", [0x09] = "evt_bus_reset", |
| 340 | [0x0a] = "evt_timeout", [0x0b] = "evt_tcode_err", |
| 341 | [0x0c] = "-reserved-", [0x0d] = "-reserved-", |
| 342 | [0x0e] = "evt_unknown", [0x0f] = "evt_flushed", |
| 343 | [0x10] = "-reserved-", [0x11] = "ack_complete", |
| 344 | [0x12] = "ack_pending ", [0x13] = "-reserved-", |
| 345 | [0x14] = "ack_busy_X", [0x15] = "ack_busy_A", |
| 346 | [0x16] = "ack_busy_B", [0x17] = "-reserved-", |
| 347 | [0x18] = "-reserved-", [0x19] = "-reserved-", |
| 348 | [0x1a] = "-reserved-", [0x1b] = "ack_tardy", |
| 349 | [0x1c] = "-reserved-", [0x1d] = "ack_data_error", |
| 350 | [0x1e] = "ack_type_error", [0x1f] = "-reserved-", |
| 351 | [0x20] = "pending/cancelled", |
| 352 | }; |
| 353 | static const char *tcodes[] = { |
| 354 | [0x0] = "QW req", [0x1] = "BW req", |
| 355 | [0x2] = "W resp", [0x3] = "-reserved-", |
| 356 | [0x4] = "QR req", [0x5] = "BR req", |
| 357 | [0x6] = "QR resp", [0x7] = "BR resp", |
| 358 | [0x8] = "cycle start", [0x9] = "Lk req", |
| 359 | [0xa] = "async stream packet", [0xb] = "Lk resp", |
| 360 | [0xc] = "-reserved-", [0xd] = "-reserved-", |
| 361 | [0xe] = "link internal", [0xf] = "-reserved-", |
| 362 | }; |
| 363 | static const char *phys[] = { |
| 364 | [0x0] = "phy config packet", [0x1] = "link-on packet", |
| 365 | [0x2] = "self-id packet", [0x3] = "-reserved-", |
| 366 | }; |
| 367 | |
| 368 | static void log_ar_at_event(char dir, int speed, u32 *header, int evt) |
| 369 | { |
| 370 | int tcode = header[0] >> 4 & 0xf; |
| 371 | char specific[12]; |
| 372 | |
| 373 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_AT_AR))) |
| 374 | return; |
| 375 | |
| 376 | if (unlikely(evt >= ARRAY_SIZE(evts))) |
| 377 | evt = 0x1f; |
| 378 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 379 | if (evt == OHCI1394_evt_bus_reset) { |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 380 | fw_notify("A%c evt_bus_reset, generation %d\n", |
| 381 | dir, (header[2] >> 16) & 0xff); |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 382 | return; |
| 383 | } |
| 384 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 385 | if (header[0] == ~header[1]) { |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 386 | fw_notify("A%c %s, %s, %08x\n", |
| 387 | dir, evts[evt], phys[header[0] >> 30 & 0x3], header[0]); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 388 | return; |
| 389 | } |
| 390 | |
| 391 | switch (tcode) { |
| 392 | case 0x0: case 0x6: case 0x8: |
| 393 | snprintf(specific, sizeof(specific), " = %08x", |
| 394 | be32_to_cpu((__force __be32)header[3])); |
| 395 | break; |
| 396 | case 0x1: case 0x5: case 0x7: case 0x9: case 0xb: |
| 397 | snprintf(specific, sizeof(specific), " %x,%x", |
| 398 | header[3] >> 16, header[3] & 0xffff); |
| 399 | break; |
| 400 | default: |
| 401 | specific[0] = '\0'; |
| 402 | } |
| 403 | |
| 404 | switch (tcode) { |
| 405 | case 0xe: case 0xa: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 406 | fw_notify("A%c %s, %s\n", dir, evts[evt], tcodes[tcode]); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 407 | break; |
| 408 | case 0x0: case 0x1: case 0x4: case 0x5: case 0x9: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 409 | fw_notify("A%c spd %x tl %02x, " |
| 410 | "%04x -> %04x, %s, " |
| 411 | "%s, %04x%08x%s\n", |
| 412 | dir, speed, header[0] >> 10 & 0x3f, |
| 413 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 414 | tcodes[tcode], header[1] & 0xffff, header[2], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 415 | break; |
| 416 | default: |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 417 | fw_notify("A%c spd %x tl %02x, " |
| 418 | "%04x -> %04x, %s, " |
| 419 | "%s%s\n", |
| 420 | dir, speed, header[0] >> 10 & 0x3f, |
| 421 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 422 | tcodes[tcode], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 423 | } |
| 424 | } |
| 425 | |
| 426 | #else |
| 427 | |
| 428 | #define log_irqs(evt) |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 429 | #define log_selfids(node_id, generation, self_id_count, sid) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 430 | #define log_ar_at_event(dir, speed, header, evt) |
| 431 | |
| 432 | #endif /* CONFIG_FIREWIRE_OHCI_DEBUG */ |
| 433 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 434 | static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 435 | { |
| 436 | writel(data, ohci->registers + offset); |
| 437 | } |
| 438 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 439 | static inline u32 reg_read(const struct fw_ohci *ohci, int offset) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 440 | { |
| 441 | return readl(ohci->registers + offset); |
| 442 | } |
| 443 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 444 | static inline void flush_writes(const struct fw_ohci *ohci) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 445 | { |
| 446 | /* Do a dummy read to flush writes. */ |
| 447 | reg_read(ohci, OHCI1394_Version); |
| 448 | } |
| 449 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 450 | static int ohci_update_phy_reg(struct fw_card *card, int addr, |
| 451 | int clear_bits, int set_bits) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 452 | { |
| 453 | struct fw_ohci *ohci = fw_ohci(card); |
| 454 | u32 val, old; |
| 455 | |
| 456 | reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); |
Stefan Richter | 362e901 | 2007-07-12 22:24:19 +0200 | [diff] [blame] | 457 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 458 | msleep(2); |
| 459 | val = reg_read(ohci, OHCI1394_PhyControl); |
| 460 | if ((val & OHCI1394_PhyControl_ReadDone) == 0) { |
| 461 | fw_error("failed to set phy reg bits.\n"); |
| 462 | return -EBUSY; |
| 463 | } |
| 464 | |
| 465 | old = OHCI1394_PhyControl_ReadData(val); |
| 466 | old = (old & ~clear_bits) | set_bits; |
| 467 | reg_write(ohci, OHCI1394_PhyControl, |
| 468 | OHCI1394_PhyControl_Write(addr, old)); |
| 469 | |
| 470 | return 0; |
| 471 | } |
| 472 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 473 | static int ar_context_add_page(struct ar_context *ctx) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 474 | { |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 475 | struct device *dev = ctx->ohci->card.device; |
| 476 | struct ar_buffer *ab; |
Stefan Richter | f5101d5 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 477 | dma_addr_t uninitialized_var(ab_bus); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 478 | size_t offset; |
| 479 | |
Jarod Wilson | bde1709 | 2008-03-12 17:43:26 -0400 | [diff] [blame] | 480 | ab = dma_alloc_coherent(dev, PAGE_SIZE, &ab_bus, GFP_ATOMIC); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 481 | if (ab == NULL) |
| 482 | return -ENOMEM; |
| 483 | |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 484 | ab->next = NULL; |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 485 | memset(&ab->descriptor, 0, sizeof(ab->descriptor)); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 486 | ab->descriptor.control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | |
| 487 | DESCRIPTOR_STATUS | |
| 488 | DESCRIPTOR_BRANCH_ALWAYS); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 489 | offset = offsetof(struct ar_buffer, data); |
| 490 | ab->descriptor.req_count = cpu_to_le16(PAGE_SIZE - offset); |
| 491 | ab->descriptor.data_address = cpu_to_le32(ab_bus + offset); |
| 492 | ab->descriptor.res_count = cpu_to_le16(PAGE_SIZE - offset); |
| 493 | ab->descriptor.branch_address = 0; |
| 494 | |
Kristian Høgsberg | ec839e4 | 2007-05-22 18:55:48 -0400 | [diff] [blame] | 495 | ctx->last_buffer->descriptor.branch_address = cpu_to_le32(ab_bus | 1); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 496 | ctx->last_buffer->next = ab; |
| 497 | ctx->last_buffer = ab; |
| 498 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 499 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 500 | flush_writes(ctx->ohci); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 501 | |
| 502 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 503 | } |
| 504 | |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 505 | static void ar_context_release(struct ar_context *ctx) |
| 506 | { |
| 507 | struct ar_buffer *ab, *ab_next; |
| 508 | size_t offset; |
| 509 | dma_addr_t ab_bus; |
| 510 | |
| 511 | for (ab = ctx->current_buffer; ab; ab = ab_next) { |
| 512 | ab_next = ab->next; |
| 513 | offset = offsetof(struct ar_buffer, data); |
| 514 | ab_bus = le32_to_cpu(ab->descriptor.data_address) - offset; |
| 515 | dma_free_coherent(ctx->ohci->card.device, PAGE_SIZE, |
| 516 | ab, ab_bus); |
| 517 | } |
| 518 | } |
| 519 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 520 | #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) |
| 521 | #define cond_le32_to_cpu(v) \ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 522 | (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v)) |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 523 | #else |
| 524 | #define cond_le32_to_cpu(v) le32_to_cpu(v) |
| 525 | #endif |
| 526 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 527 | static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 528 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 529 | struct fw_ohci *ohci = ctx->ohci; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 530 | struct fw_packet p; |
| 531 | u32 status, length, tcode; |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 532 | int evt; |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 533 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 534 | p.header[0] = cond_le32_to_cpu(buffer[0]); |
| 535 | p.header[1] = cond_le32_to_cpu(buffer[1]); |
| 536 | p.header[2] = cond_le32_to_cpu(buffer[2]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 537 | |
| 538 | tcode = (p.header[0] >> 4) & 0x0f; |
| 539 | switch (tcode) { |
| 540 | case TCODE_WRITE_QUADLET_REQUEST: |
| 541 | case TCODE_READ_QUADLET_RESPONSE: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 542 | p.header[3] = (__force __u32) buffer[3]; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 543 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 544 | p.payload_length = 0; |
| 545 | break; |
| 546 | |
| 547 | case TCODE_READ_BLOCK_REQUEST : |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 548 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 549 | p.header_length = 16; |
| 550 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 551 | break; |
| 552 | |
| 553 | case TCODE_WRITE_BLOCK_REQUEST: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 554 | case TCODE_READ_BLOCK_RESPONSE: |
| 555 | case TCODE_LOCK_REQUEST: |
| 556 | case TCODE_LOCK_RESPONSE: |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 557 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 558 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 559 | p.payload_length = p.header[3] >> 16; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 560 | break; |
| 561 | |
| 562 | case TCODE_WRITE_RESPONSE: |
| 563 | case TCODE_READ_QUADLET_REQUEST: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 564 | case OHCI_TCODE_PHY_PACKET: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 565 | p.header_length = 12; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 566 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 567 | break; |
Stefan Richter | ccff962 | 2008-05-31 19:36:06 +0200 | [diff] [blame] | 568 | |
| 569 | default: |
| 570 | /* FIXME: Stop context, discard everything, and restart? */ |
| 571 | p.header_length = 0; |
| 572 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 573 | } |
| 574 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 575 | p.payload = (void *) buffer + p.header_length; |
| 576 | |
| 577 | /* FIXME: What to do about evt_* errors? */ |
| 578 | length = (p.header_length + p.payload_length + 3) / 4; |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 579 | status = cond_le32_to_cpu(buffer[length]); |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 580 | evt = (status >> 16) & 0x1f; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 581 | |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 582 | p.ack = evt - 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 583 | p.speed = (status >> 21) & 0x7; |
| 584 | p.timestamp = status & 0xffff; |
| 585 | p.generation = ohci->request_generation; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 586 | |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 587 | log_ar_at_event('R', p.speed, p.header, evt); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 588 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 589 | /* |
| 590 | * The OHCI bus reset handler synthesizes a phy packet with |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 591 | * the new generation number when a bus reset happens (see |
| 592 | * section 8.4.2.3). This helps us determine when a request |
| 593 | * was received and make sure we send the response in the same |
| 594 | * generation. We only need this for requests; for responses |
| 595 | * we use the unique tlabel for finding the matching |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 596 | * request. |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 597 | * |
| 598 | * Alas some chips sometimes emit bus reset packets with a |
| 599 | * wrong generation. We set the correct generation for these |
| 600 | * at a slightly incorrect time (in bus_reset_tasklet). |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 601 | */ |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 602 | if (evt == OHCI1394_evt_bus_reset) { |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 603 | if (!(ohci->quirks & QUIRK_RESET_PACKET)) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 604 | ohci->request_generation = (p.header[2] >> 16) & 0xff; |
| 605 | } else if (ctx == &ohci->ar_request_ctx) { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 606 | fw_core_handle_request(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 607 | } else { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 608 | fw_core_handle_response(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 609 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 610 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 611 | return buffer + length + 1; |
| 612 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 613 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 614 | static void ar_context_tasklet(unsigned long data) |
| 615 | { |
| 616 | struct ar_context *ctx = (struct ar_context *)data; |
| 617 | struct fw_ohci *ohci = ctx->ohci; |
| 618 | struct ar_buffer *ab; |
| 619 | struct descriptor *d; |
| 620 | void *buffer, *end; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 621 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 622 | ab = ctx->current_buffer; |
| 623 | d = &ab->descriptor; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 624 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 625 | if (d->res_count == 0) { |
| 626 | size_t size, rest, offset; |
Jarod Wilson | 6b84236 | 2008-03-25 16:47:16 -0400 | [diff] [blame] | 627 | dma_addr_t start_bus; |
| 628 | void *start; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 629 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 630 | /* |
| 631 | * This descriptor is finished and we may have a |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 632 | * packet split across this and the next buffer. We |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 633 | * reuse the page for reassembling the split packet. |
| 634 | */ |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 635 | |
| 636 | offset = offsetof(struct ar_buffer, data); |
Jarod Wilson | 6b84236 | 2008-03-25 16:47:16 -0400 | [diff] [blame] | 637 | start = buffer = ab; |
| 638 | start_bus = le32_to_cpu(ab->descriptor.data_address) - offset; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 639 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 640 | ab = ab->next; |
| 641 | d = &ab->descriptor; |
| 642 | size = buffer + PAGE_SIZE - ctx->pointer; |
| 643 | rest = le16_to_cpu(d->req_count) - le16_to_cpu(d->res_count); |
| 644 | memmove(buffer, ctx->pointer, size); |
| 645 | memcpy(buffer + size, ab->data, rest); |
| 646 | ctx->current_buffer = ab; |
| 647 | ctx->pointer = (void *) ab->data + rest; |
| 648 | end = buffer + size + rest; |
| 649 | |
| 650 | while (buffer < end) |
| 651 | buffer = handle_ar_packet(ctx, buffer); |
| 652 | |
Jarod Wilson | bde1709 | 2008-03-12 17:43:26 -0400 | [diff] [blame] | 653 | dma_free_coherent(ohci->card.device, PAGE_SIZE, |
Jarod Wilson | 6b84236 | 2008-03-25 16:47:16 -0400 | [diff] [blame] | 654 | start, start_bus); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 655 | ar_context_add_page(ctx); |
| 656 | } else { |
| 657 | buffer = ctx->pointer; |
| 658 | ctx->pointer = end = |
| 659 | (void *) ab + PAGE_SIZE - le16_to_cpu(d->res_count); |
| 660 | |
| 661 | while (buffer < end) |
| 662 | buffer = handle_ar_packet(ctx, buffer); |
| 663 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 664 | } |
| 665 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 666 | static int ar_context_init(struct ar_context *ctx, |
| 667 | struct fw_ohci *ohci, u32 regs) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 668 | { |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 669 | struct ar_buffer ab; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 670 | |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 671 | ctx->regs = regs; |
| 672 | ctx->ohci = ohci; |
| 673 | ctx->last_buffer = &ab; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 674 | tasklet_init(&ctx->tasklet, ar_context_tasklet, (unsigned long)ctx); |
| 675 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 676 | ar_context_add_page(ctx); |
| 677 | ar_context_add_page(ctx); |
| 678 | ctx->current_buffer = ab.next; |
| 679 | ctx->pointer = ctx->current_buffer->data; |
| 680 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 681 | return 0; |
| 682 | } |
| 683 | |
| 684 | static void ar_context_run(struct ar_context *ctx) |
| 685 | { |
| 686 | struct ar_buffer *ab = ctx->current_buffer; |
| 687 | dma_addr_t ab_bus; |
| 688 | size_t offset; |
| 689 | |
| 690 | offset = offsetof(struct ar_buffer, data); |
Stefan Richter | 0a9972b | 2007-06-23 20:28:17 +0200 | [diff] [blame] | 691 | ab_bus = le32_to_cpu(ab->descriptor.data_address) - offset; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 692 | |
| 693 | reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ab_bus | 1); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 694 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 695 | flush_writes(ctx->ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 696 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 697 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 698 | static struct descriptor *find_branch_descriptor(struct descriptor *d, int z) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 699 | { |
| 700 | int b, key; |
| 701 | |
| 702 | b = (le16_to_cpu(d->control) & DESCRIPTOR_BRANCH_ALWAYS) >> 2; |
| 703 | key = (le16_to_cpu(d->control) & DESCRIPTOR_KEY_IMMEDIATE) >> 8; |
| 704 | |
| 705 | /* figure out which descriptor the branch address goes in */ |
| 706 | if (z == 2 && (b == 3 || key == 2)) |
| 707 | return d; |
| 708 | else |
| 709 | return d + z - 1; |
| 710 | } |
| 711 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 712 | static void context_tasklet(unsigned long data) |
| 713 | { |
| 714 | struct context *ctx = (struct context *) data; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 715 | struct descriptor *d, *last; |
| 716 | u32 address; |
| 717 | int z; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 718 | struct descriptor_buffer *desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 719 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 720 | desc = list_entry(ctx->buffer_list.next, |
| 721 | struct descriptor_buffer, list); |
| 722 | last = ctx->last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 723 | while (last->branch_address != 0) { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 724 | struct descriptor_buffer *old_desc = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 725 | address = le32_to_cpu(last->branch_address); |
| 726 | z = address & 0xf; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 727 | address &= ~0xf; |
| 728 | |
| 729 | /* If the branch address points to a buffer outside of the |
| 730 | * current buffer, advance to the next buffer. */ |
| 731 | if (address < desc->buffer_bus || |
| 732 | address >= desc->buffer_bus + desc->used) |
| 733 | desc = list_entry(desc->list.next, |
| 734 | struct descriptor_buffer, list); |
| 735 | d = desc->buffer + (address - desc->buffer_bus) / sizeof(*d); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 736 | last = find_branch_descriptor(d, z); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 737 | |
| 738 | if (!ctx->callback(ctx, d, last)) |
| 739 | break; |
| 740 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 741 | if (old_desc != desc) { |
| 742 | /* If we've advanced to the next buffer, move the |
| 743 | * previous buffer to the free list. */ |
| 744 | unsigned long flags; |
| 745 | old_desc->used = 0; |
| 746 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 747 | list_move_tail(&old_desc->list, &ctx->buffer_list); |
| 748 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 749 | } |
| 750 | ctx->last = last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 751 | } |
| 752 | } |
| 753 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 754 | /* |
| 755 | * Allocate a new buffer and add it to the list of free buffers for this |
| 756 | * context. Must be called with ohci->lock held. |
| 757 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 758 | static int context_add_buffer(struct context *ctx) |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 759 | { |
| 760 | struct descriptor_buffer *desc; |
Stefan Richter | f5101d5 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 761 | dma_addr_t uninitialized_var(bus_addr); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 762 | int offset; |
| 763 | |
| 764 | /* |
| 765 | * 16MB of descriptors should be far more than enough for any DMA |
| 766 | * program. This will catch run-away userspace or DoS attacks. |
| 767 | */ |
| 768 | if (ctx->total_allocation >= 16*1024*1024) |
| 769 | return -ENOMEM; |
| 770 | |
| 771 | desc = dma_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, |
| 772 | &bus_addr, GFP_ATOMIC); |
| 773 | if (!desc) |
| 774 | return -ENOMEM; |
| 775 | |
| 776 | offset = (void *)&desc->buffer - (void *)desc; |
| 777 | desc->buffer_size = PAGE_SIZE - offset; |
| 778 | desc->buffer_bus = bus_addr + offset; |
| 779 | desc->used = 0; |
| 780 | |
| 781 | list_add_tail(&desc->list, &ctx->buffer_list); |
| 782 | ctx->total_allocation += PAGE_SIZE; |
| 783 | |
| 784 | return 0; |
| 785 | } |
| 786 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 787 | static int context_init(struct context *ctx, struct fw_ohci *ohci, |
| 788 | u32 regs, descriptor_callback_t callback) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 789 | { |
| 790 | ctx->ohci = ohci; |
| 791 | ctx->regs = regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 792 | ctx->total_allocation = 0; |
| 793 | |
| 794 | INIT_LIST_HEAD(&ctx->buffer_list); |
| 795 | if (context_add_buffer(ctx) < 0) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 796 | return -ENOMEM; |
| 797 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 798 | ctx->buffer_tail = list_entry(ctx->buffer_list.next, |
| 799 | struct descriptor_buffer, list); |
| 800 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 801 | tasklet_init(&ctx->tasklet, context_tasklet, (unsigned long)ctx); |
| 802 | ctx->callback = callback; |
| 803 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 804 | /* |
| 805 | * We put a dummy descriptor in the buffer that has a NULL |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 806 | * branch address and looks like it's been sent. That way we |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 807 | * have a descriptor to append DMA programs to. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 808 | */ |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 809 | memset(ctx->buffer_tail->buffer, 0, sizeof(*ctx->buffer_tail->buffer)); |
| 810 | ctx->buffer_tail->buffer->control = cpu_to_le16(DESCRIPTOR_OUTPUT_LAST); |
| 811 | ctx->buffer_tail->buffer->transfer_status = cpu_to_le16(0x8011); |
| 812 | ctx->buffer_tail->used += sizeof(*ctx->buffer_tail->buffer); |
| 813 | ctx->last = ctx->buffer_tail->buffer; |
| 814 | ctx->prev = ctx->buffer_tail->buffer; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 815 | |
| 816 | return 0; |
| 817 | } |
| 818 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 819 | static void context_release(struct context *ctx) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 820 | { |
| 821 | struct fw_card *card = &ctx->ohci->card; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 822 | struct descriptor_buffer *desc, *tmp; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 823 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 824 | list_for_each_entry_safe(desc, tmp, &ctx->buffer_list, list) |
| 825 | dma_free_coherent(card->device, PAGE_SIZE, desc, |
| 826 | desc->buffer_bus - |
| 827 | ((void *)&desc->buffer - (void *)desc)); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 828 | } |
| 829 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 830 | /* Must be called with ohci->lock held */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 831 | static struct descriptor *context_get_descriptors(struct context *ctx, |
| 832 | int z, dma_addr_t *d_bus) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 833 | { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 834 | struct descriptor *d = NULL; |
| 835 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 836 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 837 | if (z * sizeof(*d) > desc->buffer_size) |
| 838 | return NULL; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 839 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 840 | if (z * sizeof(*d) > desc->buffer_size - desc->used) { |
| 841 | /* No room for the descriptor in this buffer, so advance to the |
| 842 | * next one. */ |
| 843 | |
| 844 | if (desc->list.next == &ctx->buffer_list) { |
| 845 | /* If there is no free buffer next in the list, |
| 846 | * allocate one. */ |
| 847 | if (context_add_buffer(ctx) < 0) |
| 848 | return NULL; |
| 849 | } |
| 850 | desc = list_entry(desc->list.next, |
| 851 | struct descriptor_buffer, list); |
| 852 | ctx->buffer_tail = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 853 | } |
| 854 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 855 | d = desc->buffer + desc->used / sizeof(*d); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 856 | memset(d, 0, z * sizeof(*d)); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 857 | *d_bus = desc->buffer_bus + desc->used; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 858 | |
| 859 | return d; |
| 860 | } |
| 861 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 862 | static void context_run(struct context *ctx, u32 extra) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 863 | { |
| 864 | struct fw_ohci *ohci = ctx->ohci; |
| 865 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 866 | reg_write(ohci, COMMAND_PTR(ctx->regs), |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 867 | le32_to_cpu(ctx->last->branch_address)); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 868 | reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); |
| 869 | reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 870 | flush_writes(ohci); |
| 871 | } |
| 872 | |
| 873 | static void context_append(struct context *ctx, |
| 874 | struct descriptor *d, int z, int extra) |
| 875 | { |
| 876 | dma_addr_t d_bus; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 877 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 878 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 879 | d_bus = desc->buffer_bus + (d - desc->buffer) * sizeof(*d); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 880 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 881 | desc->used += (z + extra) * sizeof(*d); |
| 882 | ctx->prev->branch_address = cpu_to_le32(d_bus | z); |
| 883 | ctx->prev = find_branch_descriptor(d, z); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 884 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 885 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 886 | flush_writes(ctx->ohci); |
| 887 | } |
| 888 | |
| 889 | static void context_stop(struct context *ctx) |
| 890 | { |
| 891 | u32 reg; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 892 | int i; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 893 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 894 | reg_write(ctx->ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 895 | flush_writes(ctx->ohci); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 896 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 897 | for (i = 0; i < 10; i++) { |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 898 | reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs)); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 899 | if ((reg & CONTEXT_ACTIVE) == 0) |
Stefan Richter | b006854 | 2009-01-05 20:43:23 +0100 | [diff] [blame] | 900 | return; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 901 | |
Stefan Richter | b980f5a | 2007-07-12 22:25:14 +0200 | [diff] [blame] | 902 | mdelay(1); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 903 | } |
Stefan Richter | b006854 | 2009-01-05 20:43:23 +0100 | [diff] [blame] | 904 | fw_error("Error: DMA context still active (0x%08x)\n", reg); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 905 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 906 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 907 | struct driver_data { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 908 | struct fw_packet *packet; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 909 | }; |
| 910 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 911 | /* |
| 912 | * This function apppends a packet to the DMA queue for transmission. |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 913 | * Must always be called with the ochi->lock held to ensure proper |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 914 | * generation handling and locking around packet queue manipulation. |
| 915 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 916 | static int at_context_queue_packet(struct context *ctx, |
| 917 | struct fw_packet *packet) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 918 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 919 | struct fw_ohci *ohci = ctx->ohci; |
Stefan Richter | 4b6d51e | 2007-10-21 11:20:07 +0200 | [diff] [blame] | 920 | dma_addr_t d_bus, uninitialized_var(payload_bus); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 921 | struct driver_data *driver_data; |
| 922 | struct descriptor *d, *last; |
| 923 | __le32 *header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 924 | int z, tcode; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 925 | u32 reg; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 926 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 927 | d = context_get_descriptors(ctx, 4, &d_bus); |
| 928 | if (d == NULL) { |
| 929 | packet->ack = RCODE_SEND_ERROR; |
| 930 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 931 | } |
| 932 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 933 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 934 | d[0].res_count = cpu_to_le16(packet->timestamp); |
| 935 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 936 | /* |
| 937 | * The DMA format for asyncronous link packets is different |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 938 | * from the IEEE1394 layout, so shift the fields around |
| 939 | * accordingly. If header_length is 8, it's a PHY packet, to |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 940 | * which we need to prepend an extra quadlet. |
| 941 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 942 | |
| 943 | header = (__le32 *) &d[1]; |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 944 | switch (packet->header_length) { |
| 945 | case 16: |
| 946 | case 12: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 947 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 948 | (packet->speed << 16)); |
| 949 | header[1] = cpu_to_le32((packet->header[1] & 0xffff) | |
| 950 | (packet->header[0] & 0xffff0000)); |
| 951 | header[2] = cpu_to_le32(packet->header[2]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 952 | |
| 953 | tcode = (packet->header[0] >> 4) & 0x0f; |
| 954 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 955 | header[3] = cpu_to_le32(packet->header[3]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 956 | else |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 957 | header[3] = (__force __le32) packet->header[3]; |
| 958 | |
| 959 | d[0].req_count = cpu_to_le16(packet->header_length); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 960 | break; |
| 961 | |
| 962 | case 8: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 963 | header[0] = cpu_to_le32((OHCI1394_phy_tcode << 4) | |
| 964 | (packet->speed << 16)); |
| 965 | header[1] = cpu_to_le32(packet->header[0]); |
| 966 | header[2] = cpu_to_le32(packet->header[1]); |
| 967 | d[0].req_count = cpu_to_le16(12); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 968 | break; |
| 969 | |
| 970 | case 4: |
| 971 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 972 | (packet->speed << 16)); |
| 973 | header[1] = cpu_to_le32(packet->header[0] & 0xffff0000); |
| 974 | d[0].req_count = cpu_to_le16(8); |
| 975 | break; |
| 976 | |
| 977 | default: |
| 978 | /* BUG(); */ |
| 979 | packet->ack = RCODE_SEND_ERROR; |
| 980 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 981 | } |
| 982 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 983 | driver_data = (struct driver_data *) &d[3]; |
| 984 | driver_data->packet = packet; |
Kristian Høgsberg | 20d1167 | 2007-03-26 19:18:19 -0400 | [diff] [blame] | 985 | packet->driver_data = driver_data; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 986 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 987 | if (packet->payload_length > 0) { |
| 988 | payload_bus = |
| 989 | dma_map_single(ohci->card.device, packet->payload, |
| 990 | packet->payload_length, DMA_TO_DEVICE); |
FUJITA Tomonori | 8d8bb39 | 2008-07-25 19:44:49 -0700 | [diff] [blame] | 991 | if (dma_mapping_error(ohci->card.device, payload_bus)) { |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 992 | packet->ack = RCODE_SEND_ERROR; |
| 993 | return -1; |
| 994 | } |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 995 | packet->payload_bus = payload_bus; |
| 996 | packet->payload_mapped = true; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 997 | |
| 998 | d[2].req_count = cpu_to_le16(packet->payload_length); |
| 999 | d[2].data_address = cpu_to_le32(payload_bus); |
| 1000 | last = &d[2]; |
| 1001 | z = 3; |
| 1002 | } else { |
| 1003 | last = &d[0]; |
| 1004 | z = 2; |
| 1005 | } |
| 1006 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1007 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 1008 | DESCRIPTOR_IRQ_ALWAYS | |
| 1009 | DESCRIPTOR_BRANCH_ALWAYS); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1010 | |
Jarod Wilson | 76f73ca | 2008-04-07 22:32:33 +0200 | [diff] [blame] | 1011 | /* |
| 1012 | * If the controller and packet generations don't match, we need to |
| 1013 | * bail out and try again. If IntEvent.busReset is set, the AT context |
| 1014 | * is halted, so appending to the context and trying to run it is |
| 1015 | * futile. Most controllers do the right thing and just flush the AT |
| 1016 | * queue (per section 7.2.3.2 of the OHCI 1.1 specification), but |
| 1017 | * some controllers (like a JMicron JMB381 PCI-e) misbehave and wind |
| 1018 | * up stalling out. So we just bail out in software and try again |
| 1019 | * later, and everyone is happy. |
| 1020 | * FIXME: Document how the locking works. |
| 1021 | */ |
| 1022 | if (ohci->generation != packet->generation || |
| 1023 | reg_read(ohci, OHCI1394_IntEventSet) & OHCI1394_busReset) { |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1024 | if (packet->payload_mapped) |
Stefan Richter | ab88ca4 | 2007-08-29 19:40:28 +0200 | [diff] [blame] | 1025 | dma_unmap_single(ohci->card.device, payload_bus, |
| 1026 | packet->payload_length, DMA_TO_DEVICE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1027 | packet->ack = RCODE_GENERATION; |
| 1028 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1029 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1030 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1031 | context_append(ctx, d, z, 4 - z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1032 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1033 | /* If the context isn't already running, start it up. */ |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1034 | reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs)); |
Kristian Høgsberg | 053b308 | 2007-04-10 18:11:17 -0400 | [diff] [blame] | 1035 | if ((reg & CONTEXT_RUN) == 0) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1036 | context_run(ctx, 0); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1037 | |
| 1038 | return 0; |
| 1039 | } |
| 1040 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1041 | static int handle_at_packet(struct context *context, |
| 1042 | struct descriptor *d, |
| 1043 | struct descriptor *last) |
| 1044 | { |
| 1045 | struct driver_data *driver_data; |
| 1046 | struct fw_packet *packet; |
| 1047 | struct fw_ohci *ohci = context->ohci; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1048 | int evt; |
| 1049 | |
| 1050 | if (last->transfer_status == 0) |
| 1051 | /* This descriptor isn't done yet, stop iteration. */ |
| 1052 | return 0; |
| 1053 | |
| 1054 | driver_data = (struct driver_data *) &d[3]; |
| 1055 | packet = driver_data->packet; |
| 1056 | if (packet == NULL) |
| 1057 | /* This packet was cancelled, just continue. */ |
| 1058 | return 1; |
| 1059 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1060 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 1061 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1062 | packet->payload_length, DMA_TO_DEVICE); |
| 1063 | |
| 1064 | evt = le16_to_cpu(last->transfer_status) & 0x1f; |
| 1065 | packet->timestamp = le16_to_cpu(last->res_count); |
| 1066 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1067 | log_ar_at_event('T', packet->speed, packet->header, evt); |
| 1068 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1069 | switch (evt) { |
| 1070 | case OHCI1394_evt_timeout: |
| 1071 | /* Async response transmit timed out. */ |
| 1072 | packet->ack = RCODE_CANCELLED; |
| 1073 | break; |
| 1074 | |
| 1075 | case OHCI1394_evt_flushed: |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1076 | /* |
| 1077 | * The packet was flushed should give same error as |
| 1078 | * when we try to use a stale generation count. |
| 1079 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1080 | packet->ack = RCODE_GENERATION; |
| 1081 | break; |
| 1082 | |
| 1083 | case OHCI1394_evt_missing_ack: |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1084 | /* |
| 1085 | * Using a valid (current) generation count, but the |
| 1086 | * node is not on the bus or not sending acks. |
| 1087 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1088 | packet->ack = RCODE_NO_ACK; |
| 1089 | break; |
| 1090 | |
| 1091 | case ACK_COMPLETE + 0x10: |
| 1092 | case ACK_PENDING + 0x10: |
| 1093 | case ACK_BUSY_X + 0x10: |
| 1094 | case ACK_BUSY_A + 0x10: |
| 1095 | case ACK_BUSY_B + 0x10: |
| 1096 | case ACK_DATA_ERROR + 0x10: |
| 1097 | case ACK_TYPE_ERROR + 0x10: |
| 1098 | packet->ack = evt - 0x10; |
| 1099 | break; |
| 1100 | |
| 1101 | default: |
| 1102 | packet->ack = RCODE_SEND_ERROR; |
| 1103 | break; |
| 1104 | } |
| 1105 | |
| 1106 | packet->callback(packet, &ohci->card, packet->ack); |
| 1107 | |
| 1108 | return 1; |
| 1109 | } |
| 1110 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1111 | #define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff) |
| 1112 | #define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f) |
| 1113 | #define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff) |
| 1114 | #define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff) |
| 1115 | #define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1116 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1117 | static void handle_local_rom(struct fw_ohci *ohci, |
| 1118 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1119 | { |
| 1120 | struct fw_packet response; |
| 1121 | int tcode, length, i; |
| 1122 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1123 | tcode = HEADER_GET_TCODE(packet->header[0]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1124 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1125 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1126 | else |
| 1127 | length = 4; |
| 1128 | |
| 1129 | i = csr - CSR_CONFIG_ROM; |
| 1130 | if (i + length > CONFIG_ROM_SIZE) { |
| 1131 | fw_fill_response(&response, packet->header, |
| 1132 | RCODE_ADDRESS_ERROR, NULL, 0); |
| 1133 | } else if (!TCODE_IS_READ_REQUEST(tcode)) { |
| 1134 | fw_fill_response(&response, packet->header, |
| 1135 | RCODE_TYPE_ERROR, NULL, 0); |
| 1136 | } else { |
| 1137 | fw_fill_response(&response, packet->header, RCODE_COMPLETE, |
| 1138 | (void *) ohci->config_rom + i, length); |
| 1139 | } |
| 1140 | |
| 1141 | fw_core_handle_response(&ohci->card, &response); |
| 1142 | } |
| 1143 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1144 | static void handle_local_lock(struct fw_ohci *ohci, |
| 1145 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1146 | { |
| 1147 | struct fw_packet response; |
| 1148 | int tcode, length, ext_tcode, sel; |
| 1149 | __be32 *payload, lock_old; |
| 1150 | u32 lock_arg, lock_data; |
| 1151 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1152 | tcode = HEADER_GET_TCODE(packet->header[0]); |
| 1153 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1154 | payload = packet->payload; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1155 | ext_tcode = HEADER_GET_EXTENDED_TCODE(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1156 | |
| 1157 | if (tcode == TCODE_LOCK_REQUEST && |
| 1158 | ext_tcode == EXTCODE_COMPARE_SWAP && length == 8) { |
| 1159 | lock_arg = be32_to_cpu(payload[0]); |
| 1160 | lock_data = be32_to_cpu(payload[1]); |
| 1161 | } else if (tcode == TCODE_READ_QUADLET_REQUEST) { |
| 1162 | lock_arg = 0; |
| 1163 | lock_data = 0; |
| 1164 | } else { |
| 1165 | fw_fill_response(&response, packet->header, |
| 1166 | RCODE_TYPE_ERROR, NULL, 0); |
| 1167 | goto out; |
| 1168 | } |
| 1169 | |
| 1170 | sel = (csr - CSR_BUS_MANAGER_ID) / 4; |
| 1171 | reg_write(ohci, OHCI1394_CSRData, lock_data); |
| 1172 | reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); |
| 1173 | reg_write(ohci, OHCI1394_CSRControl, sel); |
| 1174 | |
| 1175 | if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) |
| 1176 | lock_old = cpu_to_be32(reg_read(ohci, OHCI1394_CSRData)); |
| 1177 | else |
| 1178 | fw_notify("swap not done yet\n"); |
| 1179 | |
| 1180 | fw_fill_response(&response, packet->header, |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 1181 | RCODE_COMPLETE, &lock_old, sizeof(lock_old)); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1182 | out: |
| 1183 | fw_core_handle_response(&ohci->card, &response); |
| 1184 | } |
| 1185 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1186 | static void handle_local_request(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1187 | { |
| 1188 | u64 offset; |
| 1189 | u32 csr; |
| 1190 | |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1191 | if (ctx == &ctx->ohci->at_request_ctx) { |
| 1192 | packet->ack = ACK_PENDING; |
| 1193 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1194 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1195 | |
| 1196 | offset = |
| 1197 | ((unsigned long long) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1198 | HEADER_GET_OFFSET_HIGH(packet->header[1]) << 32) | |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1199 | packet->header[2]; |
| 1200 | csr = offset - CSR_REGISTER_BASE; |
| 1201 | |
| 1202 | /* Handle config rom reads. */ |
| 1203 | if (csr >= CSR_CONFIG_ROM && csr < CSR_CONFIG_ROM_END) |
| 1204 | handle_local_rom(ctx->ohci, packet, csr); |
| 1205 | else switch (csr) { |
| 1206 | case CSR_BUS_MANAGER_ID: |
| 1207 | case CSR_BANDWIDTH_AVAILABLE: |
| 1208 | case CSR_CHANNELS_AVAILABLE_HI: |
| 1209 | case CSR_CHANNELS_AVAILABLE_LO: |
| 1210 | handle_local_lock(ctx->ohci, packet, csr); |
| 1211 | break; |
| 1212 | default: |
| 1213 | if (ctx == &ctx->ohci->at_request_ctx) |
| 1214 | fw_core_handle_request(&ctx->ohci->card, packet); |
| 1215 | else |
| 1216 | fw_core_handle_response(&ctx->ohci->card, packet); |
| 1217 | break; |
| 1218 | } |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1219 | |
| 1220 | if (ctx == &ctx->ohci->at_response_ctx) { |
| 1221 | packet->ack = ACK_COMPLETE; |
| 1222 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1223 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1224 | } |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1225 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1226 | static void at_context_transmit(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1227 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1228 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1229 | int ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1230 | |
| 1231 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 1232 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1233 | if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1234 | ctx->ohci->generation == packet->generation) { |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1235 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1236 | handle_local_request(ctx, packet); |
| 1237 | return; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1238 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1239 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1240 | ret = at_context_queue_packet(ctx, packet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1241 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1242 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1243 | if (ret < 0) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1244 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1245 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1246 | } |
| 1247 | |
| 1248 | static void bus_reset_tasklet(unsigned long data) |
| 1249 | { |
| 1250 | struct fw_ohci *ohci = (struct fw_ohci *)data; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1251 | int self_id_count, i, j, reg; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1252 | int generation, new_generation; |
| 1253 | unsigned long flags; |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1254 | void *free_rom = NULL; |
| 1255 | dma_addr_t free_rom_bus = 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1256 | |
| 1257 | reg = reg_read(ohci, OHCI1394_NodeID); |
| 1258 | if (!(reg & OHCI1394_NodeID_idValid)) { |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1259 | fw_notify("node ID not valid, new bus reset in progress\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1260 | return; |
| 1261 | } |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1262 | if ((reg & OHCI1394_NodeID_nodeNumber) == 63) { |
| 1263 | fw_notify("malconfigured bus\n"); |
| 1264 | return; |
| 1265 | } |
| 1266 | ohci->node_id = reg & (OHCI1394_NodeID_busNumber | |
| 1267 | OHCI1394_NodeID_nodeNumber); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1268 | |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1269 | reg = reg_read(ohci, OHCI1394_SelfIDCount); |
| 1270 | if (reg & OHCI1394_SelfIDCount_selfIDError) { |
| 1271 | fw_notify("inconsistent self IDs\n"); |
| 1272 | return; |
| 1273 | } |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1274 | /* |
| 1275 | * The count in the SelfIDCount register is the number of |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1276 | * bytes in the self ID receive buffer. Since we also receive |
| 1277 | * the inverted quadlets and a header quadlet, we shift one |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1278 | * bit extra to get the actual number of self IDs. |
| 1279 | */ |
Stefan Richter | 928ec5f | 2009-09-06 18:49:17 +0200 | [diff] [blame] | 1280 | self_id_count = (reg >> 3) & 0xff; |
| 1281 | if (self_id_count == 0 || self_id_count > 252) { |
Stefan Richter | 016bf3d | 2008-03-19 22:05:02 +0100 | [diff] [blame] | 1282 | fw_notify("inconsistent self IDs\n"); |
| 1283 | return; |
| 1284 | } |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 1285 | generation = (cond_le32_to_cpu(ohci->self_id_cpu[0]) >> 16) & 0xff; |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1286 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1287 | |
| 1288 | for (i = 1, j = 0; j < self_id_count; i += 2, j++) { |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1289 | if (ohci->self_id_cpu[i] != ~ohci->self_id_cpu[i + 1]) { |
| 1290 | fw_notify("inconsistent self IDs\n"); |
| 1291 | return; |
| 1292 | } |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 1293 | ohci->self_id_buffer[j] = |
| 1294 | cond_le32_to_cpu(ohci->self_id_cpu[i]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1295 | } |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1296 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1297 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1298 | /* |
| 1299 | * Check the consistency of the self IDs we just read. The |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1300 | * problem we face is that a new bus reset can start while we |
| 1301 | * read out the self IDs from the DMA buffer. If this happens, |
| 1302 | * the DMA buffer will be overwritten with new self IDs and we |
| 1303 | * will read out inconsistent data. The OHCI specification |
| 1304 | * (section 11.2) recommends a technique similar to |
| 1305 | * linux/seqlock.h, where we remember the generation of the |
| 1306 | * self IDs in the buffer before reading them out and compare |
| 1307 | * it to the current generation after reading them out. If |
| 1308 | * the two generations match we know we have a consistent set |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1309 | * of self IDs. |
| 1310 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1311 | |
| 1312 | new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; |
| 1313 | if (new_generation != generation) { |
| 1314 | fw_notify("recursive bus reset detected, " |
| 1315 | "discarding self ids\n"); |
| 1316 | return; |
| 1317 | } |
| 1318 | |
| 1319 | /* FIXME: Document how the locking works. */ |
| 1320 | spin_lock_irqsave(&ohci->lock, flags); |
| 1321 | |
| 1322 | ohci->generation = generation; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1323 | context_stop(&ohci->at_request_ctx); |
| 1324 | context_stop(&ohci->at_response_ctx); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1325 | reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); |
| 1326 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 1327 | if (ohci->quirks & QUIRK_RESET_PACKET) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 1328 | ohci->request_generation = generation; |
| 1329 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1330 | /* |
| 1331 | * This next bit is unrelated to the AT context stuff but we |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1332 | * have to do it under the spinlock also. If a new config rom |
| 1333 | * was set up before this reset, the old one is now no longer |
| 1334 | * in use and we can free it. Update the config rom pointers |
| 1335 | * to point to the current config rom and clear the |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1336 | * next_config_rom pointer so a new udpate can take place. |
| 1337 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1338 | |
| 1339 | if (ohci->next_config_rom != NULL) { |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 1340 | if (ohci->next_config_rom != ohci->config_rom) { |
| 1341 | free_rom = ohci->config_rom; |
| 1342 | free_rom_bus = ohci->config_rom_bus; |
| 1343 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1344 | ohci->config_rom = ohci->next_config_rom; |
| 1345 | ohci->config_rom_bus = ohci->next_config_rom_bus; |
| 1346 | ohci->next_config_rom = NULL; |
| 1347 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1348 | /* |
| 1349 | * Restore config_rom image and manually update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1350 | * config_rom registers. Writing the header quadlet |
| 1351 | * will indicate that the config rom is ready, so we |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1352 | * do that last. |
| 1353 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1354 | reg_write(ohci, OHCI1394_BusOptions, |
| 1355 | be32_to_cpu(ohci->config_rom[2])); |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1356 | ohci->config_rom[0] = ohci->next_header; |
| 1357 | reg_write(ohci, OHCI1394_ConfigROMhdr, |
| 1358 | be32_to_cpu(ohci->next_header)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1359 | } |
| 1360 | |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 1361 | #ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA |
| 1362 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); |
| 1363 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); |
| 1364 | #endif |
| 1365 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1366 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1367 | |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1368 | if (free_rom) |
| 1369 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1370 | free_rom, free_rom_bus); |
| 1371 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 1372 | log_selfids(ohci->node_id, generation, |
| 1373 | self_id_count, ohci->self_id_buffer); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1374 | |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1375 | fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1376 | self_id_count, ohci->self_id_buffer); |
| 1377 | } |
| 1378 | |
| 1379 | static irqreturn_t irq_handler(int irq, void *data) |
| 1380 | { |
| 1381 | struct fw_ohci *ohci = data; |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 1382 | u32 event, iso_event; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1383 | int i; |
| 1384 | |
| 1385 | event = reg_read(ohci, OHCI1394_IntEventClear); |
| 1386 | |
Stefan Richter | a515958 | 2007-06-09 19:31:14 +0200 | [diff] [blame] | 1387 | if (!event || !~event) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1388 | return IRQ_NONE; |
| 1389 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 1390 | /* busReset must not be cleared yet, see OHCI 1.1 clause 7.2.3.2 */ |
| 1391 | reg_write(ohci, OHCI1394_IntEventClear, event & ~OHCI1394_busReset); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1392 | log_irqs(event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1393 | |
| 1394 | if (event & OHCI1394_selfIDComplete) |
| 1395 | tasklet_schedule(&ohci->bus_reset_tasklet); |
| 1396 | |
| 1397 | if (event & OHCI1394_RQPkt) |
| 1398 | tasklet_schedule(&ohci->ar_request_ctx.tasklet); |
| 1399 | |
| 1400 | if (event & OHCI1394_RSPkt) |
| 1401 | tasklet_schedule(&ohci->ar_response_ctx.tasklet); |
| 1402 | |
| 1403 | if (event & OHCI1394_reqTxComplete) |
| 1404 | tasklet_schedule(&ohci->at_request_ctx.tasklet); |
| 1405 | |
| 1406 | if (event & OHCI1394_respTxComplete) |
| 1407 | tasklet_schedule(&ohci->at_response_ctx.tasklet); |
| 1408 | |
Kristian Høgsberg | c889475 | 2007-02-16 17:34:36 -0500 | [diff] [blame] | 1409 | iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1410 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); |
| 1411 | |
| 1412 | while (iso_event) { |
| 1413 | i = ffs(iso_event) - 1; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1414 | tasklet_schedule(&ohci->ir_context_list[i].context.tasklet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1415 | iso_event &= ~(1 << i); |
| 1416 | } |
| 1417 | |
Kristian Høgsberg | c889475 | 2007-02-16 17:34:36 -0500 | [diff] [blame] | 1418 | iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1419 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); |
| 1420 | |
| 1421 | while (iso_event) { |
| 1422 | i = ffs(iso_event) - 1; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1423 | tasklet_schedule(&ohci->it_context_list[i].context.tasklet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1424 | iso_event &= ~(1 << i); |
| 1425 | } |
| 1426 | |
Jarod Wilson | 75f7832 | 2008-04-03 17:18:23 -0400 | [diff] [blame] | 1427 | if (unlikely(event & OHCI1394_regAccessFail)) |
| 1428 | fw_error("Register access failure - " |
| 1429 | "please notify linux1394-devel@lists.sf.net\n"); |
| 1430 | |
Stefan Richter | e524f61 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 1431 | if (unlikely(event & OHCI1394_postedWriteErr)) |
| 1432 | fw_error("PCI posted write error\n"); |
| 1433 | |
Stefan Richter | bb9f220 | 2007-12-22 22:14:52 +0100 | [diff] [blame] | 1434 | if (unlikely(event & OHCI1394_cycleTooLong)) { |
| 1435 | if (printk_ratelimit()) |
| 1436 | fw_notify("isochronous cycle too long\n"); |
| 1437 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 1438 | OHCI1394_LinkControl_cycleMaster); |
| 1439 | } |
| 1440 | |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 1441 | if (unlikely(event & OHCI1394_cycleInconsistent)) { |
| 1442 | /* |
| 1443 | * We need to clear this event bit in order to make |
| 1444 | * cycleMatch isochronous I/O work. In theory we should |
| 1445 | * stop active cycleMatch iso contexts now and restart |
| 1446 | * them at least two cycles later. (FIXME?) |
| 1447 | */ |
| 1448 | if (printk_ratelimit()) |
| 1449 | fw_notify("isochronous cycle inconsistent\n"); |
| 1450 | } |
| 1451 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1452 | return IRQ_HANDLED; |
| 1453 | } |
| 1454 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1455 | static int software_reset(struct fw_ohci *ohci) |
| 1456 | { |
| 1457 | int i; |
| 1458 | |
| 1459 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); |
| 1460 | |
| 1461 | for (i = 0; i < OHCI_LOOP_COUNT; i++) { |
| 1462 | if ((reg_read(ohci, OHCI1394_HCControlSet) & |
| 1463 | OHCI1394_HCControl_softReset) == 0) |
| 1464 | return 0; |
| 1465 | msleep(1); |
| 1466 | } |
| 1467 | |
| 1468 | return -EBUSY; |
| 1469 | } |
| 1470 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1471 | static void copy_config_rom(__be32 *dest, const __be32 *src, size_t length) |
| 1472 | { |
| 1473 | size_t size = length * 4; |
| 1474 | |
| 1475 | memcpy(dest, src, size); |
| 1476 | if (size < CONFIG_ROM_SIZE) |
| 1477 | memset(&dest[length], 0, CONFIG_ROM_SIZE - size); |
| 1478 | } |
| 1479 | |
| 1480 | static int ohci_enable(struct fw_card *card, |
| 1481 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1482 | { |
| 1483 | struct fw_ohci *ohci = fw_ohci(card); |
| 1484 | struct pci_dev *dev = to_pci_dev(card->device); |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 1485 | u32 lps; |
| 1486 | int i; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1487 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1488 | if (software_reset(ohci)) { |
| 1489 | fw_error("Failed to reset ohci card.\n"); |
| 1490 | return -EBUSY; |
| 1491 | } |
| 1492 | |
| 1493 | /* |
| 1494 | * Now enable LPS, which we need in order to start accessing |
| 1495 | * most of the registers. In fact, on some cards (ALI M5251), |
| 1496 | * accessing registers in the SClk domain without LPS enabled |
| 1497 | * will lock up the machine. Wait 50msec to make sure we have |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 1498 | * full link enabled. However, with some cards (well, at least |
| 1499 | * a JMicron PCIe card), we have to try again sometimes. |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1500 | */ |
| 1501 | reg_write(ohci, OHCI1394_HCControlSet, |
| 1502 | OHCI1394_HCControl_LPS | |
| 1503 | OHCI1394_HCControl_postedWriteEnable); |
| 1504 | flush_writes(ohci); |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 1505 | |
| 1506 | for (lps = 0, i = 0; !lps && i < 3; i++) { |
| 1507 | msleep(50); |
| 1508 | lps = reg_read(ohci, OHCI1394_HCControlSet) & |
| 1509 | OHCI1394_HCControl_LPS; |
| 1510 | } |
| 1511 | |
| 1512 | if (!lps) { |
| 1513 | fw_error("Failed to set Link Power Status\n"); |
| 1514 | return -EIO; |
| 1515 | } |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1516 | |
| 1517 | reg_write(ohci, OHCI1394_HCControlClear, |
| 1518 | OHCI1394_HCControl_noByteSwapData); |
| 1519 | |
Stefan Richter | affc9c2 | 2008-06-05 20:50:53 +0200 | [diff] [blame] | 1520 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); |
Stefan Richter | e896ec4 | 2008-06-05 20:49:38 +0200 | [diff] [blame] | 1521 | reg_write(ohci, OHCI1394_LinkControlClear, |
| 1522 | OHCI1394_LinkControl_rcvPhyPkt); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1523 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 1524 | OHCI1394_LinkControl_rcvSelfID | |
| 1525 | OHCI1394_LinkControl_cycleTimerEnable | |
| 1526 | OHCI1394_LinkControl_cycleMaster); |
| 1527 | |
| 1528 | reg_write(ohci, OHCI1394_ATRetries, |
| 1529 | OHCI1394_MAX_AT_REQ_RETRIES | |
| 1530 | (OHCI1394_MAX_AT_RESP_RETRIES << 4) | |
| 1531 | (OHCI1394_MAX_PHYS_RESP_RETRIES << 8)); |
| 1532 | |
| 1533 | ar_context_run(&ohci->ar_request_ctx); |
| 1534 | ar_context_run(&ohci->ar_response_ctx); |
| 1535 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1536 | reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000); |
| 1537 | reg_write(ohci, OHCI1394_IntEventClear, ~0); |
| 1538 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
| 1539 | reg_write(ohci, OHCI1394_IntMaskSet, |
| 1540 | OHCI1394_selfIDComplete | |
| 1541 | OHCI1394_RQPkt | OHCI1394_RSPkt | |
| 1542 | OHCI1394_reqTxComplete | OHCI1394_respTxComplete | |
| 1543 | OHCI1394_isochRx | OHCI1394_isochTx | |
Stefan Richter | bb9f220 | 2007-12-22 22:14:52 +0100 | [diff] [blame] | 1544 | OHCI1394_postedWriteErr | OHCI1394_cycleTooLong | |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 1545 | OHCI1394_cycleInconsistent | OHCI1394_regAccessFail | |
Jarod Wilson | 75f7832 | 2008-04-03 17:18:23 -0400 | [diff] [blame] | 1546 | OHCI1394_masterIntEnable); |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 1547 | if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS) |
| 1548 | reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1549 | |
| 1550 | /* Activate link_on bit and contender bit in our self ID packets.*/ |
| 1551 | if (ohci_update_phy_reg(card, 4, 0, |
| 1552 | PHY_LINK_ACTIVE | PHY_CONTENDER) < 0) |
| 1553 | return -EIO; |
| 1554 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1555 | /* |
| 1556 | * When the link is not yet enabled, the atomic config rom |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1557 | * update mechanism described below in ohci_set_config_rom() |
| 1558 | * is not active. We have to update ConfigRomHeader and |
| 1559 | * BusOptions manually, and the write to ConfigROMmap takes |
| 1560 | * effect immediately. We tie this to the enabling of the |
| 1561 | * link, so we have a valid config rom before enabling - the |
| 1562 | * OHCI requires that ConfigROMhdr and BusOptions have valid |
| 1563 | * values before enabling. |
| 1564 | * |
| 1565 | * However, when the ConfigROMmap is written, some controllers |
| 1566 | * always read back quadlets 0 and 2 from the config rom to |
| 1567 | * the ConfigRomHeader and BusOptions registers on bus reset. |
| 1568 | * They shouldn't do that in this initial case where the link |
| 1569 | * isn't enabled. This means we have to use the same |
| 1570 | * workaround here, setting the bus header to 0 and then write |
| 1571 | * the right values in the bus reset tasklet. |
| 1572 | */ |
| 1573 | |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 1574 | if (config_rom) { |
| 1575 | ohci->next_config_rom = |
| 1576 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1577 | &ohci->next_config_rom_bus, |
| 1578 | GFP_KERNEL); |
| 1579 | if (ohci->next_config_rom == NULL) |
| 1580 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1581 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1582 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 1583 | } else { |
| 1584 | /* |
| 1585 | * In the suspend case, config_rom is NULL, which |
| 1586 | * means that we just reuse the old config rom. |
| 1587 | */ |
| 1588 | ohci->next_config_rom = ohci->config_rom; |
| 1589 | ohci->next_config_rom_bus = ohci->config_rom_bus; |
| 1590 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1591 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1592 | ohci->next_header = ohci->next_config_rom[0]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1593 | ohci->next_config_rom[0] = 0; |
| 1594 | reg_write(ohci, OHCI1394_ConfigROMhdr, 0); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 1595 | reg_write(ohci, OHCI1394_BusOptions, |
| 1596 | be32_to_cpu(ohci->next_config_rom[2])); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1597 | reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); |
| 1598 | |
| 1599 | reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); |
| 1600 | |
| 1601 | if (request_irq(dev->irq, irq_handler, |
Thomas Gleixner | 65efffa | 2007-03-05 18:19:51 -0800 | [diff] [blame] | 1602 | IRQF_SHARED, ohci_driver_name, ohci)) { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1603 | fw_error("Failed to allocate shared interrupt %d.\n", |
| 1604 | dev->irq); |
| 1605 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1606 | ohci->config_rom, ohci->config_rom_bus); |
| 1607 | return -EIO; |
| 1608 | } |
| 1609 | |
| 1610 | reg_write(ohci, OHCI1394_HCControlSet, |
| 1611 | OHCI1394_HCControl_linkEnable | |
| 1612 | OHCI1394_HCControl_BIBimageValid); |
| 1613 | flush_writes(ohci); |
| 1614 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1615 | /* |
| 1616 | * We are ready to go, initiate bus reset to finish the |
| 1617 | * initialization. |
| 1618 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1619 | |
| 1620 | fw_core_initiate_bus_reset(&ohci->card, 1); |
| 1621 | |
| 1622 | return 0; |
| 1623 | } |
| 1624 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1625 | static int ohci_set_config_rom(struct fw_card *card, |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1626 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1627 | { |
| 1628 | struct fw_ohci *ohci; |
| 1629 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1630 | int ret = -EBUSY; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1631 | __be32 *next_config_rom; |
Stefan Richter | f5101d5 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 1632 | dma_addr_t uninitialized_var(next_config_rom_bus); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1633 | |
| 1634 | ohci = fw_ohci(card); |
| 1635 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1636 | /* |
| 1637 | * When the OHCI controller is enabled, the config rom update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1638 | * mechanism is a bit tricky, but easy enough to use. See |
| 1639 | * section 5.5.6 in the OHCI specification. |
| 1640 | * |
| 1641 | * The OHCI controller caches the new config rom address in a |
| 1642 | * shadow register (ConfigROMmapNext) and needs a bus reset |
| 1643 | * for the changes to take place. When the bus reset is |
| 1644 | * detected, the controller loads the new values for the |
| 1645 | * ConfigRomHeader and BusOptions registers from the specified |
| 1646 | * config rom and loads ConfigROMmap from the ConfigROMmapNext |
| 1647 | * shadow register. All automatically and atomically. |
| 1648 | * |
| 1649 | * Now, there's a twist to this story. The automatic load of |
| 1650 | * ConfigRomHeader and BusOptions doesn't honor the |
| 1651 | * noByteSwapData bit, so with a be32 config rom, the |
| 1652 | * controller will load be32 values in to these registers |
| 1653 | * during the atomic update, even on litte endian |
| 1654 | * architectures. The workaround we use is to put a 0 in the |
| 1655 | * header quadlet; 0 is endian agnostic and means that the |
| 1656 | * config rom isn't ready yet. In the bus reset tasklet we |
| 1657 | * then set up the real values for the two registers. |
| 1658 | * |
| 1659 | * We use ohci->lock to avoid racing with the code that sets |
| 1660 | * ohci->next_config_rom to NULL (see bus_reset_tasklet). |
| 1661 | */ |
| 1662 | |
| 1663 | next_config_rom = |
| 1664 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1665 | &next_config_rom_bus, GFP_KERNEL); |
| 1666 | if (next_config_rom == NULL) |
| 1667 | return -ENOMEM; |
| 1668 | |
| 1669 | spin_lock_irqsave(&ohci->lock, flags); |
| 1670 | |
| 1671 | if (ohci->next_config_rom == NULL) { |
| 1672 | ohci->next_config_rom = next_config_rom; |
| 1673 | ohci->next_config_rom_bus = next_config_rom_bus; |
| 1674 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 1675 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1676 | |
| 1677 | ohci->next_header = config_rom[0]; |
| 1678 | ohci->next_config_rom[0] = 0; |
| 1679 | |
| 1680 | reg_write(ohci, OHCI1394_ConfigROMmap, |
| 1681 | ohci->next_config_rom_bus); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1682 | ret = 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1683 | } |
| 1684 | |
| 1685 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1686 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1687 | /* |
| 1688 | * Now initiate a bus reset to have the changes take |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1689 | * effect. We clean up the old config rom memory and DMA |
| 1690 | * mappings in the bus reset tasklet, since the OHCI |
| 1691 | * controller could need to access it before the bus reset |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1692 | * takes effect. |
| 1693 | */ |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1694 | if (ret == 0) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1695 | fw_core_initiate_bus_reset(&ohci->card, 1); |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1696 | else |
| 1697 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 1698 | next_config_rom, next_config_rom_bus); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1699 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1700 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1701 | } |
| 1702 | |
| 1703 | static void ohci_send_request(struct fw_card *card, struct fw_packet *packet) |
| 1704 | { |
| 1705 | struct fw_ohci *ohci = fw_ohci(card); |
| 1706 | |
| 1707 | at_context_transmit(&ohci->at_request_ctx, packet); |
| 1708 | } |
| 1709 | |
| 1710 | static void ohci_send_response(struct fw_card *card, struct fw_packet *packet) |
| 1711 | { |
| 1712 | struct fw_ohci *ohci = fw_ohci(card); |
| 1713 | |
| 1714 | at_context_transmit(&ohci->at_response_ctx, packet); |
| 1715 | } |
| 1716 | |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1717 | static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet) |
| 1718 | { |
| 1719 | struct fw_ohci *ohci = fw_ohci(card); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1720 | struct context *ctx = &ohci->at_request_ctx; |
| 1721 | struct driver_data *driver_data = packet->driver_data; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1722 | int ret = -ENOENT; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1723 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1724 | tasklet_disable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1725 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1726 | if (packet->ack != 0) |
| 1727 | goto out; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1728 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1729 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 1730 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
| 1731 | packet->payload_length, DMA_TO_DEVICE); |
| 1732 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1733 | log_ar_at_event('T', packet->speed, packet->header, 0x20); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1734 | driver_data->packet = NULL; |
| 1735 | packet->ack = RCODE_CANCELLED; |
| 1736 | packet->callback(packet, &ohci->card, packet->ack); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1737 | ret = 0; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1738 | out: |
| 1739 | tasklet_enable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1740 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1741 | return ret; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 1742 | } |
| 1743 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1744 | static int ohci_enable_phys_dma(struct fw_card *card, |
| 1745 | int node_id, int generation) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1746 | { |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 1747 | #ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA |
| 1748 | return 0; |
| 1749 | #else |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1750 | struct fw_ohci *ohci = fw_ohci(card); |
| 1751 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1752 | int n, ret = 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1753 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1754 | /* |
| 1755 | * FIXME: Make sure this bitmask is cleared when we clear the busReset |
| 1756 | * interrupt bit. Clear physReqResourceAllBuses on bus reset. |
| 1757 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1758 | |
| 1759 | spin_lock_irqsave(&ohci->lock, flags); |
| 1760 | |
| 1761 | if (ohci->generation != generation) { |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1762 | ret = -ESTALE; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1763 | goto out; |
| 1764 | } |
| 1765 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1766 | /* |
| 1767 | * Note, if the node ID contains a non-local bus ID, physical DMA is |
| 1768 | * enabled for _all_ nodes on remote buses. |
| 1769 | */ |
Stefan Richter | 907293d | 2007-01-23 21:11:43 +0100 | [diff] [blame] | 1770 | |
| 1771 | n = (node_id & 0xffc0) == LOCAL_BUS ? node_id & 0x3f : 63; |
| 1772 | if (n < 32) |
| 1773 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); |
| 1774 | else |
| 1775 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); |
| 1776 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1777 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1778 | out: |
Stefan Richter | 6cad95f | 2007-01-21 20:46:45 +0100 | [diff] [blame] | 1779 | spin_unlock_irqrestore(&ohci->lock, flags); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1780 | |
| 1781 | return ret; |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 1782 | #endif /* CONFIG_FIREWIRE_OHCI_REMOTE_DMA */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1783 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1784 | |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1785 | static u32 cycle_timer_ticks(u32 cycle_timer) |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1786 | { |
| 1787 | u32 ticks; |
| 1788 | |
| 1789 | ticks = cycle_timer & 0xfff; |
| 1790 | ticks += 3072 * ((cycle_timer >> 12) & 0x1fff); |
| 1791 | ticks += (3072 * 8000) * (cycle_timer >> 25); |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1792 | |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1793 | return ticks; |
| 1794 | } |
| 1795 | |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1796 | /* |
| 1797 | * Some controllers exhibit one or more of the following bugs when updating the |
| 1798 | * iso cycle timer register: |
| 1799 | * - When the lowest six bits are wrapping around to zero, a read that happens |
| 1800 | * at the same time will return garbage in the lowest ten bits. |
| 1801 | * - When the cycleOffset field wraps around to zero, the cycleCount field is |
| 1802 | * not incremented for about 60 ns. |
| 1803 | * - Occasionally, the entire register reads zero. |
| 1804 | * |
| 1805 | * To catch these, we read the register three times and ensure that the |
| 1806 | * difference between each two consecutive reads is approximately the same, i.e. |
| 1807 | * less than twice the other. Furthermore, any negative difference indicates an |
| 1808 | * error. (A PCI read should take at least 20 ticks of the 24.576 MHz timer to |
| 1809 | * execute, so we have enough precision to compute the ratio of the differences.) |
| 1810 | */ |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 1811 | static u32 ohci_get_cycle_time(struct fw_card *card) |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 1812 | { |
| 1813 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1814 | u32 c0, c1, c2; |
| 1815 | u32 t0, t1, t2; |
| 1816 | s32 diff01, diff12; |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1817 | int i; |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 1818 | |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1819 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1820 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 1821 | if (ohci->quirks & QUIRK_CYCLE_TIMER) { |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1822 | i = 0; |
| 1823 | c1 = c2; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1824 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1825 | do { |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1826 | c0 = c1; |
| 1827 | c1 = c2; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1828 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1829 | t0 = cycle_timer_ticks(c0); |
| 1830 | t1 = cycle_timer_ticks(c1); |
| 1831 | t2 = cycle_timer_ticks(c2); |
| 1832 | diff01 = t1 - t0; |
| 1833 | diff12 = t2 - t1; |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 1834 | } while ((diff01 <= 0 || diff12 <= 0 || |
| 1835 | diff01 / diff12 >= 2 || diff12 / diff01 >= 2) |
| 1836 | && i++ < 20); |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 1837 | } |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 1838 | |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 1839 | return c2; |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 1840 | } |
| 1841 | |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 1842 | static void copy_iso_headers(struct iso_context *ctx, void *p) |
| 1843 | { |
| 1844 | int i = ctx->header_length; |
| 1845 | |
| 1846 | if (i + ctx->base.header_size > PAGE_SIZE) |
| 1847 | return; |
| 1848 | |
| 1849 | /* |
| 1850 | * The iso header is byteswapped to little endian by |
| 1851 | * the controller, but the remaining header quadlets |
| 1852 | * are big endian. We want to present all the headers |
| 1853 | * as big endian, so we have to swap the first quadlet. |
| 1854 | */ |
| 1855 | if (ctx->base.header_size > 0) |
| 1856 | *(u32 *) (ctx->header + i) = __swab32(*(u32 *) (p + 4)); |
| 1857 | if (ctx->base.header_size > 4) |
| 1858 | *(u32 *) (ctx->header + i + 4) = __swab32(*(u32 *) p); |
| 1859 | if (ctx->base.header_size > 8) |
| 1860 | memcpy(ctx->header + i + 8, p + 8, ctx->base.header_size - 8); |
| 1861 | ctx->header_length += ctx->base.header_size; |
| 1862 | } |
| 1863 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1864 | static int handle_ir_packet_per_buffer(struct context *context, |
| 1865 | struct descriptor *d, |
| 1866 | struct descriptor *last) |
| 1867 | { |
| 1868 | struct iso_context *ctx = |
| 1869 | container_of(context, struct iso_context, context); |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 1870 | struct descriptor *pd; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1871 | __le32 *ir_header; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 1872 | void *p; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1873 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 1874 | for (pd = d; pd <= last; pd++) { |
| 1875 | if (pd->transfer_status) |
| 1876 | break; |
| 1877 | } |
| 1878 | if (pd > last) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1879 | /* Descriptor(s) not done yet, stop iteration */ |
| 1880 | return 0; |
| 1881 | |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 1882 | p = last + 1; |
| 1883 | copy_iso_headers(ctx, p); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1884 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 1885 | if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) { |
| 1886 | ir_header = (__le32 *) p; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1887 | ctx->base.callback(&ctx->base, |
| 1888 | le32_to_cpu(ir_header[0]) & 0xffff, |
| 1889 | ctx->header_length, ctx->header, |
| 1890 | ctx->base.callback_data); |
| 1891 | ctx->header_length = 0; |
| 1892 | } |
| 1893 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1894 | return 1; |
| 1895 | } |
| 1896 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1897 | static int handle_it_packet(struct context *context, |
| 1898 | struct descriptor *d, |
| 1899 | struct descriptor *last) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1900 | { |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1901 | struct iso_context *ctx = |
| 1902 | container_of(context, struct iso_context, context); |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 1903 | int i; |
| 1904 | struct descriptor *pd; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1905 | |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 1906 | for (pd = d; pd <= last; pd++) |
| 1907 | if (pd->transfer_status) |
| 1908 | break; |
| 1909 | if (pd > last) |
| 1910 | /* Descriptor(s) not done yet, stop iteration */ |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1911 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1912 | |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 1913 | i = ctx->header_length; |
| 1914 | if (i + 4 < PAGE_SIZE) { |
| 1915 | /* Present this value as big-endian to match the receive code */ |
| 1916 | *(__be32 *)(ctx->header + i) = cpu_to_be32( |
| 1917 | ((u32)le16_to_cpu(pd->transfer_status) << 16) | |
| 1918 | le16_to_cpu(pd->res_count)); |
| 1919 | ctx->header_length += 4; |
| 1920 | } |
| 1921 | if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) { |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 1922 | ctx->base.callback(&ctx->base, le16_to_cpu(last->res_count), |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 1923 | ctx->header_length, ctx->header, |
| 1924 | ctx->base.callback_data); |
| 1925 | ctx->header_length = 0; |
| 1926 | } |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1927 | return 1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1928 | } |
| 1929 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1930 | static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card, |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1931 | int type, int channel, size_t header_size) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1932 | { |
| 1933 | struct fw_ohci *ohci = fw_ohci(card); |
| 1934 | struct iso_context *ctx, *list; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1935 | descriptor_callback_t callback; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1936 | u64 *channels, dont_care = ~0ULL; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 1937 | u32 *mask, regs; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1938 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1939 | int index, ret = -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1940 | |
| 1941 | if (type == FW_ISO_CONTEXT_TRANSMIT) { |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1942 | channels = &dont_care; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1943 | mask = &ohci->it_context_mask; |
| 1944 | list = ohci->it_context_list; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1945 | callback = handle_it_packet; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1946 | } else { |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1947 | channels = &ohci->ir_context_channels; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1948 | mask = &ohci->ir_context_mask; |
| 1949 | list = ohci->ir_context_list; |
Stefan Richter | 6498ba0 | 2010-02-21 17:57:05 +0100 | [diff] [blame] | 1950 | callback = handle_ir_packet_per_buffer; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1951 | } |
| 1952 | |
| 1953 | spin_lock_irqsave(&ohci->lock, flags); |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1954 | index = *channels & 1ULL << channel ? ffs(*mask) - 1 : -1; |
| 1955 | if (index >= 0) { |
| 1956 | *channels &= ~(1ULL << channel); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1957 | *mask &= ~(1 << index); |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 1958 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1959 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1960 | |
| 1961 | if (index < 0) |
| 1962 | return ERR_PTR(-EBUSY); |
| 1963 | |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1964 | if (type == FW_ISO_CONTEXT_TRANSMIT) |
| 1965 | regs = OHCI1394_IsoXmitContextBase(index); |
| 1966 | else |
| 1967 | regs = OHCI1394_IsoRcvContextBase(index); |
| 1968 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1969 | ctx = &list[index]; |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 1970 | memset(ctx, 0, sizeof(*ctx)); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 1971 | ctx->header_length = 0; |
| 1972 | ctx->header = (void *) __get_free_page(GFP_KERNEL); |
| 1973 | if (ctx->header == NULL) |
| 1974 | goto out; |
| 1975 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1976 | ret = context_init(&ctx->context, ohci, regs, callback); |
| 1977 | if (ret < 0) |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 1978 | goto out_with_header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1979 | |
| 1980 | return &ctx->base; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 1981 | |
| 1982 | out_with_header: |
| 1983 | free_page((unsigned long)ctx->header); |
| 1984 | out: |
| 1985 | spin_lock_irqsave(&ohci->lock, flags); |
| 1986 | *mask |= 1 << index; |
| 1987 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 1988 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1989 | return ERR_PTR(ret); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1990 | } |
| 1991 | |
Kristian Høgsberg | eb0306e | 2007-03-14 17:34:54 -0400 | [diff] [blame] | 1992 | static int ohci_start_iso(struct fw_iso_context *base, |
| 1993 | s32 cycle, u32 sync, u32 tags) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1994 | { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1995 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1996 | struct fw_ohci *ohci = ctx->context.ohci; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 1997 | u32 control, match; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1998 | int index; |
| 1999 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2000 | if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) { |
| 2001 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2002 | match = 0; |
| 2003 | if (cycle >= 0) |
| 2004 | match = IT_CONTEXT_CYCLE_MATCH_ENABLE | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2005 | (cycle & 0x7fff) << 16; |
Kristian Høgsberg | 21efb3c | 2007-02-16 17:34:50 -0500 | [diff] [blame] | 2006 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2007 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); |
| 2008 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2009 | context_run(&ctx->context, match); |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2010 | } else { |
| 2011 | index = ctx - ohci->ir_context_list; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2012 | control = IR_CONTEXT_ISOCH_HEADER; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2013 | match = (tags << 28) | (sync << 8) | ctx->base.channel; |
| 2014 | if (cycle >= 0) { |
| 2015 | match |= (cycle & 0x07fff) << 12; |
| 2016 | control |= IR_CONTEXT_CYCLE_MATCH_ENABLE; |
| 2017 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2018 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2019 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); |
| 2020 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2021 | reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 2022 | context_run(&ctx->context, control); |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2023 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2024 | |
| 2025 | return 0; |
| 2026 | } |
| 2027 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 2028 | static int ohci_stop_iso(struct fw_iso_context *base) |
| 2029 | { |
| 2030 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2031 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 2032 | int index; |
| 2033 | |
| 2034 | if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) { |
| 2035 | index = ctx - ohci->it_context_list; |
| 2036 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); |
| 2037 | } else { |
| 2038 | index = ctx - ohci->ir_context_list; |
| 2039 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); |
| 2040 | } |
| 2041 | flush_writes(ohci); |
| 2042 | context_stop(&ctx->context); |
| 2043 | |
| 2044 | return 0; |
| 2045 | } |
| 2046 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2047 | static void ohci_free_iso_context(struct fw_iso_context *base) |
| 2048 | { |
| 2049 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2050 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2051 | unsigned long flags; |
| 2052 | int index; |
| 2053 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 2054 | ohci_stop_iso(base); |
| 2055 | context_release(&ctx->context); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 2056 | free_page((unsigned long)ctx->header); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 2057 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2058 | spin_lock_irqsave(&ohci->lock, flags); |
| 2059 | |
| 2060 | if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) { |
| 2061 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2062 | ohci->it_context_mask |= 1 << index; |
| 2063 | } else { |
| 2064 | index = ctx - ohci->ir_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2065 | ohci->ir_context_mask |= 1 << index; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2066 | ohci->ir_context_channels |= 1ULL << base->channel; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2067 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2068 | |
| 2069 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2070 | } |
| 2071 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2072 | static int ohci_queue_iso_transmit(struct fw_iso_context *base, |
| 2073 | struct fw_iso_packet *packet, |
| 2074 | struct fw_iso_buffer *buffer, |
| 2075 | unsigned long payload) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2076 | { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2077 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2078 | struct descriptor *d, *last, *pd; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2079 | struct fw_iso_packet *p; |
| 2080 | __le32 *header; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 2081 | dma_addr_t d_bus, page_bus; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2082 | u32 z, header_z, payload_z, irq; |
| 2083 | u32 payload_index, payload_end_index, next_page_index; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2084 | int page, end_page, i, length, offset; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2085 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2086 | p = packet; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 2087 | payload_index = payload; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2088 | |
| 2089 | if (p->skip) |
| 2090 | z = 1; |
| 2091 | else |
| 2092 | z = 2; |
| 2093 | if (p->header_length > 0) |
| 2094 | z++; |
| 2095 | |
| 2096 | /* Determine the first page the payload isn't contained in. */ |
| 2097 | end_page = PAGE_ALIGN(payload_index + p->payload_length) >> PAGE_SHIFT; |
| 2098 | if (p->payload_length > 0) |
| 2099 | payload_z = end_page - (payload_index >> PAGE_SHIFT); |
| 2100 | else |
| 2101 | payload_z = 0; |
| 2102 | |
| 2103 | z += payload_z; |
| 2104 | |
| 2105 | /* Get header size in number of descriptors. */ |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 2106 | header_z = DIV_ROUND_UP(p->header_length, sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2107 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2108 | d = context_get_descriptors(&ctx->context, z + header_z, &d_bus); |
| 2109 | if (d == NULL) |
| 2110 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2111 | |
| 2112 | if (!p->skip) { |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2113 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2114 | d[0].req_count = cpu_to_le16(8); |
Clemens Ladisch | 7f51a10 | 2010-02-08 08:30:03 +0100 | [diff] [blame] | 2115 | /* |
| 2116 | * Link the skip address to this descriptor itself. This causes |
| 2117 | * a context to skip a cycle whenever lost cycles or FIFO |
| 2118 | * overruns occur, without dropping the data. The application |
| 2119 | * should then decide whether this is an error condition or not. |
| 2120 | * FIXME: Make the context's cycle-lost behaviour configurable? |
| 2121 | */ |
| 2122 | d[0].branch_address = cpu_to_le32(d_bus | z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2123 | |
| 2124 | header = (__le32 *) &d[1]; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2125 | header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) | |
| 2126 | IT_HEADER_TAG(p->tag) | |
| 2127 | IT_HEADER_TCODE(TCODE_STREAM_DATA) | |
| 2128 | IT_HEADER_CHANNEL(ctx->base.channel) | |
| 2129 | IT_HEADER_SPEED(ctx->base.speed)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2130 | header[1] = |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2131 | cpu_to_le32(IT_HEADER_DATA_LENGTH(p->header_length + |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2132 | p->payload_length)); |
| 2133 | } |
| 2134 | |
| 2135 | if (p->header_length > 0) { |
| 2136 | d[2].req_count = cpu_to_le16(p->header_length); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 2137 | d[2].data_address = cpu_to_le32(d_bus + z * sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2138 | memcpy(&d[z], p->header, p->header_length); |
| 2139 | } |
| 2140 | |
| 2141 | pd = d + z - payload_z; |
| 2142 | payload_end_index = payload_index + p->payload_length; |
| 2143 | for (i = 0; i < payload_z; i++) { |
| 2144 | page = payload_index >> PAGE_SHIFT; |
| 2145 | offset = payload_index & ~PAGE_MASK; |
| 2146 | next_page_index = (page + 1) << PAGE_SHIFT; |
| 2147 | length = |
| 2148 | min(next_page_index, payload_end_index) - payload_index; |
| 2149 | pd[i].req_count = cpu_to_le16(length); |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 2150 | |
| 2151 | page_bus = page_private(buffer->pages[page]); |
| 2152 | pd[i].data_address = cpu_to_le32(page_bus + offset); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2153 | |
| 2154 | payload_index += length; |
| 2155 | } |
| 2156 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2157 | if (p->interrupt) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2158 | irq = DESCRIPTOR_IRQ_ALWAYS; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2159 | else |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2160 | irq = DESCRIPTOR_NO_IRQ; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2161 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2162 | last = z == 2 ? d : d + z - 1; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 2163 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 2164 | DESCRIPTOR_STATUS | |
| 2165 | DESCRIPTOR_BRANCH_ALWAYS | |
Kristian Høgsberg | cbb59da | 2007-02-16 17:34:35 -0500 | [diff] [blame] | 2166 | irq); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2167 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2168 | context_append(&ctx->context, d, z, header_z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2169 | |
| 2170 | return 0; |
| 2171 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2172 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2173 | static int ohci_queue_iso_receive_packet_per_buffer(struct fw_iso_context *base, |
| 2174 | struct fw_iso_packet *packet, |
| 2175 | struct fw_iso_buffer *buffer, |
| 2176 | unsigned long payload) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2177 | { |
| 2178 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 2179 | struct descriptor *d, *pd; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2180 | struct fw_iso_packet *p = packet; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2181 | dma_addr_t d_bus, page_bus; |
| 2182 | u32 z, header_z, rest; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2183 | int i, j, length; |
| 2184 | int page, offset, packet_count, header_size, payload_per_buffer; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2185 | |
| 2186 | /* |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2187 | * The OHCI controller puts the isochronous header and trailer in the |
| 2188 | * buffer, so we need at least 8 bytes. |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2189 | */ |
| 2190 | packet_count = p->header_length / ctx->base.header_size; |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2191 | header_size = max(ctx->base.header_size, (size_t)8); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2192 | |
| 2193 | /* Get header size in number of descriptors. */ |
| 2194 | header_z = DIV_ROUND_UP(header_size, sizeof(*d)); |
| 2195 | page = payload >> PAGE_SHIFT; |
| 2196 | offset = payload & ~PAGE_MASK; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2197 | payload_per_buffer = p->payload_length / packet_count; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2198 | |
| 2199 | for (i = 0; i < packet_count; i++) { |
| 2200 | /* d points to the header descriptor */ |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2201 | z = DIV_ROUND_UP(payload_per_buffer + offset, PAGE_SIZE) + 1; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2202 | d = context_get_descriptors(&ctx->context, |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2203 | z + header_z, &d_bus); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2204 | if (d == NULL) |
| 2205 | return -ENOMEM; |
| 2206 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2207 | d->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 2208 | DESCRIPTOR_INPUT_MORE); |
| 2209 | if (p->skip && i == 0) |
| 2210 | d->control |= cpu_to_le16(DESCRIPTOR_WAIT); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2211 | d->req_count = cpu_to_le16(header_size); |
| 2212 | d->res_count = d->req_count; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2213 | d->transfer_status = 0; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2214 | d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d))); |
| 2215 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2216 | rest = payload_per_buffer; |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 2217 | pd = d; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2218 | for (j = 1; j < z; j++) { |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 2219 | pd++; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2220 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 2221 | DESCRIPTOR_INPUT_MORE); |
| 2222 | |
| 2223 | if (offset + rest < PAGE_SIZE) |
| 2224 | length = rest; |
| 2225 | else |
| 2226 | length = PAGE_SIZE - offset; |
| 2227 | pd->req_count = cpu_to_le16(length); |
| 2228 | pd->res_count = pd->req_count; |
| 2229 | pd->transfer_status = 0; |
| 2230 | |
| 2231 | page_bus = page_private(buffer->pages[page]); |
| 2232 | pd->data_address = cpu_to_le32(page_bus + offset); |
| 2233 | |
| 2234 | offset = (offset + length) & ~PAGE_MASK; |
| 2235 | rest -= length; |
| 2236 | if (offset == 0) |
| 2237 | page++; |
| 2238 | } |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2239 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 2240 | DESCRIPTOR_INPUT_LAST | |
| 2241 | DESCRIPTOR_BRANCH_ALWAYS); |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2242 | if (p->interrupt && i == packet_count - 1) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2243 | pd->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS); |
| 2244 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2245 | context_append(&ctx->context, d, z, header_z); |
| 2246 | } |
| 2247 | |
| 2248 | return 0; |
| 2249 | } |
| 2250 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2251 | static int ohci_queue_iso(struct fw_iso_context *base, |
| 2252 | struct fw_iso_packet *packet, |
| 2253 | struct fw_iso_buffer *buffer, |
| 2254 | unsigned long payload) |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2255 | { |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 2256 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 2257 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2258 | int ret; |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 2259 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 2260 | spin_lock_irqsave(&ctx->context.ohci->lock, flags); |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2261 | if (base->type == FW_ISO_CONTEXT_TRANSMIT) |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2262 | ret = ohci_queue_iso_transmit(base, packet, buffer, payload); |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 2263 | else |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2264 | ret = ohci_queue_iso_receive_packet_per_buffer(base, packet, |
| 2265 | buffer, payload); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 2266 | spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); |
| 2267 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2268 | return ret; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 2269 | } |
| 2270 | |
Stefan Richter | 21ebcd1 | 2007-01-14 15:29:07 +0100 | [diff] [blame] | 2271 | static const struct fw_card_driver ohci_driver = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2272 | .enable = ohci_enable, |
| 2273 | .update_phy_reg = ohci_update_phy_reg, |
| 2274 | .set_config_rom = ohci_set_config_rom, |
| 2275 | .send_request = ohci_send_request, |
| 2276 | .send_response = ohci_send_response, |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2277 | .cancel_packet = ohci_cancel_packet, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2278 | .enable_phys_dma = ohci_enable_phys_dma, |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 2279 | .get_cycle_time = ohci_get_cycle_time, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2280 | |
| 2281 | .allocate_iso_context = ohci_allocate_iso_context, |
| 2282 | .free_iso_context = ohci_free_iso_context, |
| 2283 | .queue_iso = ohci_queue_iso, |
Kristian Høgsberg | 69cdb72 | 2007-02-16 17:34:41 -0500 | [diff] [blame] | 2284 | .start_iso = ohci_start_iso, |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 2285 | .stop_iso = ohci_stop_iso, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2286 | }; |
| 2287 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2288 | #ifdef CONFIG_PPC_PMAC |
| 2289 | static void ohci_pmac_on(struct pci_dev *dev) |
| 2290 | { |
| 2291 | if (machine_is(powermac)) { |
| 2292 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 2293 | |
| 2294 | if (ofn) { |
| 2295 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 1); |
| 2296 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1); |
| 2297 | } |
| 2298 | } |
| 2299 | } |
| 2300 | |
| 2301 | static void ohci_pmac_off(struct pci_dev *dev) |
| 2302 | { |
| 2303 | if (machine_is(powermac)) { |
| 2304 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 2305 | |
| 2306 | if (ofn) { |
| 2307 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0); |
| 2308 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 0); |
| 2309 | } |
| 2310 | } |
| 2311 | } |
| 2312 | #else |
| 2313 | #define ohci_pmac_on(dev) |
| 2314 | #define ohci_pmac_off(dev) |
| 2315 | #endif /* CONFIG_PPC_PMAC */ |
| 2316 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2317 | static int __devinit pci_probe(struct pci_dev *dev, |
| 2318 | const struct pci_device_id *ent) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2319 | { |
| 2320 | struct fw_ohci *ohci; |
Stefan Richter | 95984f6 | 2008-07-22 18:41:10 +0200 | [diff] [blame] | 2321 | u32 bus_options, max_receive, link_speed, version; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2322 | u64 guid; |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 2323 | int i, err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2324 | size_t size; |
| 2325 | |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 2326 | ohci = kzalloc(sizeof(*ohci), GFP_KERNEL); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2327 | if (ohci == NULL) { |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2328 | err = -ENOMEM; |
| 2329 | goto fail; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2330 | } |
| 2331 | |
| 2332 | fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); |
| 2333 | |
Stefan Richter | 130d549 | 2008-03-24 20:55:28 +0100 | [diff] [blame] | 2334 | ohci_pmac_on(dev); |
| 2335 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2336 | err = pci_enable_device(dev); |
| 2337 | if (err) { |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2338 | fw_error("Failed to enable OHCI hardware\n"); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 2339 | goto fail_free; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2340 | } |
| 2341 | |
| 2342 | pci_set_master(dev); |
| 2343 | pci_write_config_dword(dev, OHCI1394_PCI_HCI_Control, 0); |
| 2344 | pci_set_drvdata(dev, ohci); |
| 2345 | |
| 2346 | spin_lock_init(&ohci->lock); |
| 2347 | |
| 2348 | tasklet_init(&ohci->bus_reset_tasklet, |
| 2349 | bus_reset_tasklet, (unsigned long)ohci); |
| 2350 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2351 | err = pci_request_region(dev, 0, ohci_driver_name); |
| 2352 | if (err) { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2353 | fw_error("MMIO resource unavailable\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2354 | goto fail_disable; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2355 | } |
| 2356 | |
| 2357 | ohci->registers = pci_iomap(dev, 0, OHCI1394_REGISTER_SIZE); |
| 2358 | if (ohci->registers == NULL) { |
| 2359 | fw_error("Failed to remap registers\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2360 | err = -ENXIO; |
| 2361 | goto fail_iomem; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2362 | } |
| 2363 | |
Stefan Richter | 95984f6 | 2008-07-22 18:41:10 +0200 | [diff] [blame] | 2364 | version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; |
Stefan Richter | 95984f6 | 2008-07-22 18:41:10 +0200 | [diff] [blame] | 2365 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame^] | 2366 | for (i = 0; i < ARRAY_SIZE(ohci_quirks); i++) |
| 2367 | if (ohci_quirks[i].vendor == dev->vendor && |
| 2368 | (ohci_quirks[i].device == dev->device || |
| 2369 | ohci_quirks[i].device == (unsigned short)PCI_ANY_ID)) { |
| 2370 | ohci->quirks = ohci_quirks[i].flags; |
| 2371 | break; |
| 2372 | } |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 2373 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2374 | ar_context_init(&ohci->ar_request_ctx, ohci, |
| 2375 | OHCI1394_AsReqRcvContextControlSet); |
| 2376 | |
| 2377 | ar_context_init(&ohci->ar_response_ctx, ohci, |
| 2378 | OHCI1394_AsRspRcvContextControlSet); |
| 2379 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 2380 | context_init(&ohci->at_request_ctx, ohci, |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2381 | OHCI1394_AsReqTrContextControlSet, handle_at_packet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2382 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 2383 | context_init(&ohci->at_response_ctx, ohci, |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2384 | OHCI1394_AsRspTrContextControlSet, handle_at_packet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2385 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2386 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); |
| 2387 | ohci->it_context_mask = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); |
| 2388 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); |
| 2389 | size = sizeof(struct iso_context) * hweight32(ohci->it_context_mask); |
| 2390 | ohci->it_context_list = kzalloc(size, GFP_KERNEL); |
| 2391 | |
| 2392 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2393 | ohci->ir_context_channels = ~0ULL; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2394 | ohci->ir_context_mask = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); |
| 2395 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); |
| 2396 | size = sizeof(struct iso_context) * hweight32(ohci->ir_context_mask); |
| 2397 | ohci->ir_context_list = kzalloc(size, GFP_KERNEL); |
| 2398 | |
| 2399 | if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2400 | err = -ENOMEM; |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2401 | goto fail_contexts; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2402 | } |
| 2403 | |
| 2404 | /* self-id dma buffer allocation */ |
| 2405 | ohci->self_id_cpu = dma_alloc_coherent(ohci->card.device, |
| 2406 | SELF_ID_BUF_SIZE, |
| 2407 | &ohci->self_id_bus, |
| 2408 | GFP_KERNEL); |
| 2409 | if (ohci->self_id_cpu == NULL) { |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2410 | err = -ENOMEM; |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2411 | goto fail_contexts; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2412 | } |
| 2413 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2414 | bus_options = reg_read(ohci, OHCI1394_BusOptions); |
| 2415 | max_receive = (bus_options >> 12) & 0xf; |
| 2416 | link_speed = bus_options & 0x7; |
| 2417 | guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | |
| 2418 | reg_read(ohci, OHCI1394_GUIDLo); |
| 2419 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2420 | err = fw_card_add(&ohci->card, max_receive, link_speed, guid); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 2421 | if (err) |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2422 | goto fail_self_id; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2423 | |
Kristian Høgsberg | 500be72 | 2007-02-16 17:34:43 -0500 | [diff] [blame] | 2424 | fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n", |
Kay Sievers | a1f6481 | 2008-10-30 01:41:56 +0100 | [diff] [blame] | 2425 | dev_name(&dev->dev), version >> 16, version & 0xff); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 2426 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2427 | return 0; |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2428 | |
| 2429 | fail_self_id: |
| 2430 | dma_free_coherent(ohci->card.device, SELF_ID_BUF_SIZE, |
| 2431 | ohci->self_id_cpu, ohci->self_id_bus); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2432 | fail_contexts: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2433 | kfree(ohci->ir_context_list); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2434 | kfree(ohci->it_context_list); |
| 2435 | context_release(&ohci->at_response_ctx); |
| 2436 | context_release(&ohci->at_request_ctx); |
| 2437 | ar_context_release(&ohci->ar_response_ctx); |
| 2438 | ar_context_release(&ohci->ar_request_ctx); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2439 | pci_iounmap(dev, ohci->registers); |
| 2440 | fail_iomem: |
| 2441 | pci_release_region(dev, 0); |
| 2442 | fail_disable: |
| 2443 | pci_disable_device(dev); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 2444 | fail_free: |
| 2445 | kfree(&ohci->card); |
Stefan Richter | 130d549 | 2008-03-24 20:55:28 +0100 | [diff] [blame] | 2446 | ohci_pmac_off(dev); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 2447 | fail: |
| 2448 | if (err == -ENOMEM) |
| 2449 | fw_error("Out of memory\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2450 | |
| 2451 | return err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2452 | } |
| 2453 | |
| 2454 | static void pci_remove(struct pci_dev *dev) |
| 2455 | { |
| 2456 | struct fw_ohci *ohci; |
| 2457 | |
| 2458 | ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | e254a4b | 2007-03-07 12:12:38 -0500 | [diff] [blame] | 2459 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
| 2460 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2461 | fw_core_remove_card(&ohci->card); |
| 2462 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2463 | /* |
| 2464 | * FIXME: Fail all pending packets here, now that the upper |
| 2465 | * layers can't queue any more. |
| 2466 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2467 | |
| 2468 | software_reset(ohci); |
| 2469 | free_irq(dev->irq, ohci); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 2470 | |
| 2471 | if (ohci->next_config_rom && ohci->next_config_rom != ohci->config_rom) |
| 2472 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2473 | ohci->next_config_rom, ohci->next_config_rom_bus); |
| 2474 | if (ohci->config_rom) |
| 2475 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2476 | ohci->config_rom, ohci->config_rom_bus); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2477 | dma_free_coherent(ohci->card.device, SELF_ID_BUF_SIZE, |
| 2478 | ohci->self_id_cpu, ohci->self_id_bus); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 2479 | ar_context_release(&ohci->ar_request_ctx); |
| 2480 | ar_context_release(&ohci->ar_response_ctx); |
| 2481 | context_release(&ohci->at_request_ctx); |
| 2482 | context_release(&ohci->at_response_ctx); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 2483 | kfree(ohci->it_context_list); |
| 2484 | kfree(ohci->ir_context_list); |
| 2485 | pci_iounmap(dev, ohci->registers); |
| 2486 | pci_release_region(dev, 0); |
| 2487 | pci_disable_device(dev); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 2488 | kfree(&ohci->card); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2489 | ohci_pmac_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 2490 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2491 | fw_notify("Removed fw-ohci device.\n"); |
| 2492 | } |
| 2493 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2494 | #ifdef CONFIG_PM |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2495 | static int pci_suspend(struct pci_dev *dev, pm_message_t state) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2496 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2497 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2498 | int err; |
| 2499 | |
| 2500 | software_reset(ohci); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2501 | free_irq(dev->irq, ohci); |
| 2502 | err = pci_save_state(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2503 | if (err) { |
Stefan Richter | 8a8cea2 | 2007-06-09 19:26:22 +0200 | [diff] [blame] | 2504 | fw_error("pci_save_state failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2505 | return err; |
| 2506 | } |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2507 | err = pci_set_power_state(dev, pci_choose_state(dev, state)); |
Stefan Richter | 5511142 | 2007-09-06 09:50:30 +0200 | [diff] [blame] | 2508 | if (err) |
| 2509 | fw_error("pci_set_power_state failed with %d\n", err); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2510 | ohci_pmac_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 2511 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2512 | return 0; |
| 2513 | } |
| 2514 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2515 | static int pci_resume(struct pci_dev *dev) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2516 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2517 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2518 | int err; |
| 2519 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 2520 | ohci_pmac_on(dev); |
| 2521 | pci_set_power_state(dev, PCI_D0); |
| 2522 | pci_restore_state(dev); |
| 2523 | err = pci_enable_device(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2524 | if (err) { |
Stefan Richter | 8a8cea2 | 2007-06-09 19:26:22 +0200 | [diff] [blame] | 2525 | fw_error("pci_enable_device failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2526 | return err; |
| 2527 | } |
| 2528 | |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2529 | return ohci_enable(&ohci->card, NULL, 0); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2530 | } |
| 2531 | #endif |
| 2532 | |
Németh Márton | a67483d | 2010-01-10 13:14:26 +0100 | [diff] [blame] | 2533 | static const struct pci_device_id pci_table[] = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2534 | { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_FIREWIRE_OHCI, ~0) }, |
| 2535 | { } |
| 2536 | }; |
| 2537 | |
| 2538 | MODULE_DEVICE_TABLE(pci, pci_table); |
| 2539 | |
| 2540 | static struct pci_driver fw_ohci_pci_driver = { |
| 2541 | .name = ohci_driver_name, |
| 2542 | .id_table = pci_table, |
| 2543 | .probe = pci_probe, |
| 2544 | .remove = pci_remove, |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2545 | #ifdef CONFIG_PM |
| 2546 | .resume = pci_resume, |
| 2547 | .suspend = pci_suspend, |
| 2548 | #endif |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2549 | }; |
| 2550 | |
| 2551 | MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>"); |
| 2552 | MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers"); |
| 2553 | MODULE_LICENSE("GPL"); |
| 2554 | |
Olaf Hering | 1e4c7b0 | 2007-05-05 23:17:13 +0200 | [diff] [blame] | 2555 | /* Provide a module alias so root-on-sbp2 initrds don't break. */ |
| 2556 | #ifndef CONFIG_IEEE1394_OHCI1394_MODULE |
| 2557 | MODULE_ALIAS("ohci1394"); |
| 2558 | #endif |
| 2559 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2560 | static int __init fw_ohci_init(void) |
| 2561 | { |
| 2562 | return pci_register_driver(&fw_ohci_pci_driver); |
| 2563 | } |
| 2564 | |
| 2565 | static void __exit fw_ohci_cleanup(void) |
| 2566 | { |
| 2567 | pci_unregister_driver(&fw_ohci_pci_driver); |
| 2568 | } |
| 2569 | |
| 2570 | module_init(fw_ohci_init); |
| 2571 | module_exit(fw_ohci_cleanup); |