blob: 85cd09ffb15d8bb3dc0dbef0775f80a0f8cf67f4 [file] [log] [blame]
Neil Leedere1bb10a2012-08-30 14:04:19 -04001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/sched.h>
15#include <linux/sysrq.h>
16#include <linux/time.h>
17#include <linux/proc_fs.h>
18#include <linux/kernel_stat.h>
19#include <linux/uaccess.h>
20#include <linux/sysdev.h>
21#include <linux/delay.h>
22#include <linux/device.h>
23#include <linux/kernel.h>
24#include <linux/spinlock.h>
25#include <linux/semaphore.h>
26#include <linux/file.h>
27#include <linux/percpu.h>
28#include <linux/string.h>
29#include <linux/smp.h>
30#include <asm/cacheflush.h>
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040031#include <asm/smp_plat.h>
Neil Leeder7673a872011-11-07 11:36:39 -050032#include <asm/mmu_writeable.h>
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040033
34#ifdef CONFIG_ARCH_MSM_KRAIT
35#include <mach/msm-krait-l2-accessors.h>
36#endif
37
38#define TYPE_MAX_CHARACTERS 10
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039
40/*
41 * CP parameters
42 */
43struct cp_params {
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040044 unsigned long il2index;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070045 unsigned long cp;
46 unsigned long op1;
47 unsigned long op2;
48 unsigned long crn;
49 unsigned long crm;
50 unsigned long write_value;
51 char rw;
52};
53
54static struct semaphore cp_sem;
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040055static unsigned long il2_output;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070056static int cpu;
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040057char type[TYPE_MAX_CHARACTERS] = "C";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058
59static DEFINE_PER_CPU(struct cp_params, cp_param)
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040060 = { 0, 15, 0, 0, 0, 0, 0, 'r' };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061
62static struct sysdev_class cpaccess_sysclass = {
63 .name = "cpaccess",
64};
65
Neil Leederaec69fb2012-06-25 17:44:29 -040066void cpaccess_dummy_inst(void);
67
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -040068#ifdef CONFIG_ARCH_MSM_KRAIT
69/*
70 * do_read_il2 - Read indirect L2 registers
71 * @ret: Pointer to return value
72 *
73 */
74static void do_read_il2(void *ret)
75{
76 *(unsigned long *)ret =
77 get_l2_indirect_reg(per_cpu(cp_param.il2index, cpu));
78}
79
80/*
81 * do_write_il2 - Write indirect L2 registers
82 * @ret: Pointer to return value
83 *
84 */
85static void do_write_il2(void *ret)
86{
87 *(unsigned long *)ret =
88 set_get_l2_indirect_reg(per_cpu(cp_param.il2index, cpu),
89 per_cpu(cp_param.write_value, cpu));
90}
91
92/*
93 * do_il2_rw - Call Read/Write indirect L2 register functions
94 * @ret: Pointer to return value in case of CP register
95 *
96 */
97static int do_il2_rw(char *str_tmp)
98{
99 unsigned long write_value, il2index;
100 char rw;
101 int ret = 0;
102
103 il2index = 0;
104 sscanf(str_tmp, "%lx:%c:%lx:%d", &il2index, &rw, &write_value,
105 &cpu);
106 per_cpu(cp_param.il2index, cpu) = il2index;
107 per_cpu(cp_param.rw, cpu) = rw;
108 per_cpu(cp_param.write_value, cpu) = write_value;
109
110 if (per_cpu(cp_param.rw, cpu) == 'r') {
111 if (is_smp()) {
112 if (smp_call_function_single(cpu, do_read_il2,
113 &il2_output, 1))
114 pr_err("Error cpaccess smp call single\n");
115 } else
116 do_read_il2(&il2_output);
117 } else if (per_cpu(cp_param.rw, cpu) == 'w') {
118 if (is_smp()) {
119 if (smp_call_function_single(cpu, do_write_il2,
120 &il2_output, 1))
121 pr_err("Error cpaccess smp call single\n");
122 } else
123 do_write_il2(&il2_output);
124 } else {
125 pr_err("cpaccess: Wrong Entry for 'r' or 'w'.\n");
126 return -EINVAL;
127 }
128 return ret;
129}
130#else
131static void do_il2_rw(char *str_tmp)
132{
133 il2_output = 0;
134}
135#endif
136
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700137/*
138 * get_asm_value - Dummy fuction
139 * @write_val: Write value incase of a CP register write operation.
140 *
141 * This function is just a placeholder. The first 2 instructions
142 * will be inserted to perform MRC/MCR instruction and a return.
143 * See do_cpregister_rw function. Value passed to function is
144 * accessed from r0 register.
145 */
146static noinline unsigned long cpaccess_dummy(unsigned long write_val)
147{
Neil Leederaec69fb2012-06-25 17:44:29 -0400148 unsigned long ret = 0xBEEF;
149
150 asm volatile (".globl cpaccess_dummy_inst\n"
151 "cpaccess_dummy_inst:\n\t"
Neil Leedere1bb10a2012-08-30 14:04:19 -0400152 "mrc p15, 0, %0, c0, c0, 0\n\t" : "=r" (ret) :
153 "r" (write_val));
Neil Leederaec69fb2012-06-25 17:44:29 -0400154 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700155} __attribute__((aligned(32)))
156
157/*
158 * get_asm_value - Read/Write CP registers
159 * @ret: Pointer to return value in case of CP register
160 * read op.
161 *
162 */
163static void get_asm_value(void *ret)
164{
165 *(unsigned long *)ret =
166 cpaccess_dummy(per_cpu(cp_param.write_value, cpu));
167}
168
169/*
170 * dp_cpregister_rw - Read/Write CP registers
171 * @write: 1 for Write and 0 for Read operation
172 *
173 * Returns value read from CP register
174 */
175static unsigned long do_cpregister_rw(int write)
176{
177 unsigned long opcode, ret, *p_opcode;
178
179 /*
180 * Mask the crn, crm, op1, op2 and cp values so they do not
181 * interfer with other fields of the op code.
182 */
183 per_cpu(cp_param.cp, cpu) &= 0xF;
184 per_cpu(cp_param.crn, cpu) &= 0xF;
185 per_cpu(cp_param.crm, cpu) &= 0xF;
186 per_cpu(cp_param.op1, cpu) &= 0x7;
187 per_cpu(cp_param.op2, cpu) &= 0x7;
188
189 /*
190 * Base MRC opcode for MIDR is EE100010,
191 * MCR is 0xEE000010
192 */
193 opcode = (write == 1 ? 0xEE000010 : 0xEE100010);
194 opcode |= (per_cpu(cp_param.crn, cpu)<<16) |
195 (per_cpu(cp_param.crm, cpu)<<0) |
196 (per_cpu(cp_param.op1, cpu)<<21) |
197 (per_cpu(cp_param.op2, cpu)<<5) |
198 (per_cpu(cp_param.cp, cpu) << 8);
199
200 /*
Neil Leeder7673a872011-11-07 11:36:39 -0500201 * Grab address of the Dummy function, write the MRC/MCR
202 * instruction, ensuring cache coherency.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700203 */
Neil Leederaec69fb2012-06-25 17:44:29 -0400204 p_opcode = (unsigned long *)&cpaccess_dummy_inst;
Neil Leeder7673a872011-11-07 11:36:39 -0500205 mem_text_write_kernel_word(p_opcode, opcode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700206
207#ifdef CONFIG_SMP
208 /*
209 * Use smp_call_function_single to do CPU core specific
210 * get_asm_value function call.
211 */
212 if (smp_call_function_single(cpu, get_asm_value, &ret, 1))
213 printk(KERN_ERR "Error cpaccess smp call single\n");
214#else
215 get_asm_value(&ret);
216#endif
217
218 return ret;
219}
220
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400221static int get_register_params(char *str_tmp)
222{
223 unsigned long op1, op2, crn, crm, cp = 15, write_value, il2index;
224 char rw;
225 int cnt = 0;
226
227 il2index = 0;
228 strncpy(type, strsep(&str_tmp, ":"), TYPE_MAX_CHARACTERS);
229
230 if (strncasecmp(type, "C", TYPE_MAX_CHARACTERS) == 0) {
231
232 sscanf(str_tmp, "%lu:%lu:%lu:%lu:%lu:%c:%lx:%d",
233 &cp, &op1, &crn, &crm, &op2, &rw, &write_value, &cpu);
234 per_cpu(cp_param.cp, cpu) = cp;
235 per_cpu(cp_param.op1, cpu) = op1;
236 per_cpu(cp_param.crn, cpu) = crn;
237 per_cpu(cp_param.crm, cpu) = crm;
238 per_cpu(cp_param.op2, cpu) = op2;
239 per_cpu(cp_param.rw, cpu) = rw;
240 per_cpu(cp_param.write_value, cpu) = write_value;
241
242 if ((per_cpu(cp_param.rw, cpu) != 'w') &&
243 (per_cpu(cp_param.rw, cpu) != 'r')) {
244 pr_err("cpaccess: Wrong entry for 'r' or 'w'.\n");
245 return -EINVAL;
246 }
247
248 if (per_cpu(cp_param.rw, cpu) == 'w')
249 do_cpregister_rw(1);
250 } else if (strncasecmp(type, "IL2", TYPE_MAX_CHARACTERS) == 0)
251 do_il2_rw(str_tmp);
252 else {
253 pr_err("cpaccess: Not a valid type. Entered: %s\n", type);
254 return -EINVAL;
255 }
256
257 return cnt;
258}
259
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700260/*
261 * cp_register_write_sysfs - sysfs interface for writing to
262 * CP register
263 * @dev: sys device
264 * @attr: device attribute
265 * @buf: write value
266 * @cnt: not used
267 *
268 */
269static ssize_t cp_register_write_sysfs(struct sys_device *dev,
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400270 struct sysdev_attribute *attr, const char *buf, size_t cnt)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700271{
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400272 char *str_tmp = (char *)buf;
273
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700274 if (down_timeout(&cp_sem, 6000))
275 return -ERESTARTSYS;
276
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400277 get_register_params(str_tmp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700278
279 return cnt;
280}
281
282/*
283 * cp_register_read_sysfs - sysfs interface for reading CP registers
284 * @dev: sys device
285 * @attr: device attribute
286 * @buf: write value
287 *
288 * Code to read in the CPxx crn, crm, op1, op2 variables, or into
289 * the base MRC opcode, store to executable memory, clean/invalidate
290 * caches and then execute the new instruction and provide the
291 * result to the caller.
292 */
293static ssize_t cp_register_read_sysfs(struct sys_device *dev,
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400294 struct sysdev_attribute *attr, char *buf)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700295{
296 int ret;
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400297
298 if (strncasecmp(type, "C", TYPE_MAX_CHARACTERS) == 0)
299 ret = snprintf(buf, TYPE_MAX_CHARACTERS, "%lx\n",
300 do_cpregister_rw(0));
301 else if (strncasecmp(type, "IL2", TYPE_MAX_CHARACTERS) == 0)
302 ret = snprintf(buf, TYPE_MAX_CHARACTERS, "%lx\n", il2_output);
303 else
304 ret = -EINVAL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700305
306 if (cp_sem.count <= 0)
307 up(&cp_sem);
308
309 return ret;
310}
311
312/*
313 * Setup sysfs files
314 */
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400315SYSDEV_ATTR(cp_rw, 0644, cp_register_read_sysfs, cp_register_write_sysfs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700316
317static struct sys_device device_cpaccess = {
318 .id = 0,
319 .cls = &cpaccess_sysclass,
320};
321
322/*
323 * init_cpaccess_sysfs - initialize sys devices
324 */
325static int __init init_cpaccess_sysfs(void)
326{
327 int error = sysdev_class_register(&cpaccess_sysclass);
328
329 if (!error)
330 error = sysdev_register(&device_cpaccess);
331 else
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400332 pr_err("Error initializing cpaccess interface\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700333
334 if (!error)
335 error = sysdev_create_file(&device_cpaccess,
336 &attr_cp_rw);
337 else {
Suren Eda Naarayana Kulothungan4c317fb2011-04-20 21:12:01 -0400338 pr_err("Error initializing cpaccess interface\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700339 sysdev_unregister(&device_cpaccess);
340 sysdev_class_unregister(&cpaccess_sysclass);
341 }
342
343 sema_init(&cp_sem, 1);
344
345 return error;
346}
347
348static void __exit exit_cpaccess_sysfs(void)
349{
350 sysdev_remove_file(&device_cpaccess, &attr_cp_rw);
351 sysdev_unregister(&device_cpaccess);
352 sysdev_class_unregister(&cpaccess_sysclass);
353}
354
355module_init(init_cpaccess_sysfs);
356module_exit(exit_cpaccess_sysfs);
357MODULE_LICENSE("GPL v2");