Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 13 | /* Mode select */ |
| 14 | #define QPNP_PIN_MODE_DIG_IN 0 |
| 15 | #define QPNP_PIN_MODE_DIG_OUT 1 |
| 16 | #define QPNP_PIN_MODE_DIG_IN_OUT 2 |
| 17 | #define QPNP_PIN_MODE_BIDIR 3 |
| 18 | #define QPNP_PIN_MODE_AIN 4 |
| 19 | #define QPNP_PIN_MODE_AOUT 5 |
| 20 | #define QPNP_PIN_MODE_SINK 6 |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 21 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 22 | /* Invert source select (GPIO, MPP) */ |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 23 | #define QPNP_PIN_INVERT_DISABLE 0 |
| 24 | #define QPNP_PIN_INVERT_ENABLE 1 |
| 25 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 26 | /* Output type (GPIO) */ |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 27 | #define QPNP_PIN_OUT_BUF_CMOS 0 |
| 28 | #define QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS 1 |
| 29 | #define QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS 2 |
| 30 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 31 | /* Voltage select (GPIO, MPP) */ |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 32 | #define QPNP_PIN_VIN0 0 |
| 33 | #define QPNP_PIN_VIN1 1 |
| 34 | #define QPNP_PIN_VIN2 2 |
| 35 | #define QPNP_PIN_VIN3 3 |
| 36 | #define QPNP_PIN_VIN4 4 |
| 37 | #define QPNP_PIN_VIN5 5 |
| 38 | #define QPNP_PIN_VIN6 6 |
| 39 | #define QPNP_PIN_VIN7 7 |
| 40 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 41 | /* Pull Up Values (GPIO) */ |
| 42 | #define QPNP_PIN_GPIO_PULL_UP_30 0 |
| 43 | #define QPNP_PIN_GPIO_PULL_UP_1P5 1 |
| 44 | #define QPNP_PIN_GPIO_PULL_UP_31P5 2 |
| 45 | #define QPNP_PIN_GPIO_PULL_UP_1P5_30 3 |
| 46 | #define QPNP_PIN_GPIO_PULL_DN 4 |
| 47 | #define QPNP_PIN_GPIO_PULL_NO 5 |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 48 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 49 | /* Pull Up Values (MPP) */ |
| 50 | #define QPNP_PIN_MPP_PULL_UP_0P6KOHM 0 |
| 51 | #define QPNP_PIN_MPP_PULL_UP_OPEN 1 |
| 52 | #define QPNP_PIN_MPP_PULL_UP_10KOHM 2 |
| 53 | #define QPNP_PIN_MPP_PULL_UP_30KOHM 3 |
| 54 | |
| 55 | /* Out Strength (GPIO) */ |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 56 | #define QPNP_PIN_OUT_STRENGTH_LOW 1 |
| 57 | #define QPNP_PIN_OUT_STRENGTH_MED 2 |
| 58 | #define QPNP_PIN_OUT_STRENGTH_HIGH 3 |
| 59 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 60 | /* Source Select (GPIO) / Enable Select (MPP) */ |
| 61 | #define QPNP_PIN_SEL_FUNC_CONSTANT 0 |
| 62 | #define QPNP_PIN_SEL_FUNC_PAIRED 1 |
| 63 | #define QPNP_PIN_SEL_FUNC_1 2 |
| 64 | #define QPNP_PIN_SEL_FUNC_2 3 |
| 65 | #define QPNP_PIN_SEL_DTEST1 4 |
| 66 | #define QPNP_PIN_SEL_DTEST2 5 |
| 67 | #define QPNP_PIN_SEL_DTEST3 6 |
| 68 | #define QPNP_PIN_SEL_DTEST4 7 |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 69 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 70 | /* Master enable (GPIO, MPP) */ |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 71 | #define QPNP_PIN_MASTER_DISABLE 0 |
| 72 | #define QPNP_PIN_MASTER_ENABLE 1 |
| 73 | |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 74 | /* Analog Output (MPP) */ |
| 75 | #define QPNP_PIN_AOUT_1V25 0 |
| 76 | #define QPNP_PIN_AOUT_0V625 1 |
| 77 | #define QPNP_PIN_AOUT_0V3125 2 |
| 78 | #define QPNP_PIN_AOUT_MPP 3 |
| 79 | #define QPNP_PIN_AOUT_ABUS1 4 |
| 80 | #define QPNP_PIN_AOUT_ABUS2 5 |
| 81 | #define QPNP_PIN_AOUT_ABUS3 6 |
| 82 | #define QPNP_PIN_AOUT_ABUS4 7 |
| 83 | |
| 84 | /* Analog Input (MPP) */ |
| 85 | #define QPNP_PIN_AIN_AMUX_CH5 0 |
| 86 | #define QPNP_PIN_AIN_AMUX_CH6 1 |
| 87 | #define QPNP_PIN_AIN_AMUX_CH7 2 |
| 88 | #define QPNP_PIN_AIN_AMUX_CH8 3 |
| 89 | #define QPNP_PIN_AIN_AMUX_ABUS1 4 |
| 90 | #define QPNP_PIN_AIN_AMUX_ABUS2 5 |
| 91 | #define QPNP_PIN_AIN_AMUX_ABUS3 6 |
| 92 | #define QPNP_PIN_AIN_AMUX_ABUS4 7 |
| 93 | |
| 94 | /* Current Sink (MPP) */ |
| 95 | #define QPNP_PIN_CS_OUT_5MA 0 |
| 96 | #define QPNP_PIN_CS_OUT_10MA 1 |
| 97 | #define QPNP_PIN_CS_OUT_15MA 2 |
| 98 | #define QPNP_PIN_CS_OUT_20MA 3 |
| 99 | #define QPNP_PIN_CS_OUT_25MA 4 |
| 100 | #define QPNP_PIN_CS_OUT_30MA 5 |
| 101 | #define QPNP_PIN_CS_OUT_35MA 6 |
| 102 | #define QPNP_PIN_CS_OUT_40MA 7 |
| 103 | |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 104 | /** |
| 105 | * struct qpnp_pin_cfg - structure to specify pin configurtion values |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 106 | * @mode: indicates whether the pin should be input, output, or |
| 107 | * both for gpios. mpp pins also support bidirectional, |
| 108 | * analog in, analog out and current sink. This value |
| 109 | * should be of type QPNP_PIN_MODE_*. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 110 | * @output_type: indicates pin should be configured as CMOS or open |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 111 | * drain. Should be of the type QPNP_PIN_OUT_BUF_*. This |
| 112 | * setting applies for gpios only. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 113 | * @invert: Invert the signal of the line - |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 114 | * QPNP_PIN_INVERT_DISABLE or QPNP_PIN_INVERT_ENABLE. |
| 115 | * @pull: This parameter should be programmed to different values |
| 116 | * depending on whether it's GPIO or MPP. |
| 117 | * For GPIO, it indicates whether a pull up or pull down |
| 118 | * should be applied. If a pullup is required the |
| 119 | * current strength needs to be specified. |
| 120 | * Current values of 30uA, 1.5uA, 31.5uA, 1.5uA with 30uA |
| 121 | * boost are supported. This value should be one of |
| 122 | * the QPNP_PIN_GPIO_PULL_*. Note that the hardware ignores |
| 123 | * this configuration if the GPIO is not set to input or |
| 124 | * output open-drain mode. |
| 125 | * For MPP, it indicates whether a pullup should be |
| 126 | * applied for bidirectitional mode only. The hardware |
| 127 | * ignores the configuration when operating in other modes. |
| 128 | * This value should be one of the QPNP_PIN_MPP_PULL_*. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 129 | * @vin_sel: specifies the voltage level when the output is set to 1. |
| 130 | * For an input gpio specifies the voltage level at which |
| 131 | * the input is interpreted as a logical 1. |
| 132 | * @out_strength: the amount of current supplied for an output gpio, |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 133 | * should be of the type QPNP_PIN_STRENGTH_*. |
Michael Bohan | d734fb2 | 2012-10-30 14:19:22 -0700 | [diff] [blame] | 134 | * @src_sel: select alternate function for the pin. Certain pins |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 135 | * can be paired (shorted) with each other. Some pins |
| 136 | * can act as alternate functions. In the context of |
| 137 | * gpio, this acts as a source select. For mpps, |
| 138 | * this is an enable select. |
| 139 | * This parameter should be of type QPNP_PIN_SEL_*. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 140 | * @master_en: QPNP_PIN_MASTER_ENABLE = Enable features within the |
| 141 | * pin block based on configurations. |
| 142 | * QPNP_PIN_MASTER_DISABLE = Completely disable the pin |
| 143 | * block and let the pin float with high impedance |
| 144 | * regardless of other settings. |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 145 | * @aout_ref: Set the analog output reference. This parameter should |
| 146 | * be of type QPNP_PIN_AOUT_*. This parameter only applies |
| 147 | * to mpp pins. |
| 148 | * @ain_route: Set the source for analog input. This parameter |
| 149 | * should be of type QPNP_PIN_AIN_*. This parameter only |
| 150 | * applies to mpp pins. |
| 151 | * @cs_out: Set the the amount of current to sync in mA. This |
| 152 | * parameter should be of type QPNP_PIN_CS_OUT_*. This |
| 153 | * parameter only applies to mpp pins. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 154 | */ |
| 155 | struct qpnp_pin_cfg { |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 156 | int mode; |
| 157 | int output_type; |
| 158 | int invert; |
| 159 | int pull; |
| 160 | int vin_sel; |
| 161 | int out_strength; |
Michael Bohan | d734fb2 | 2012-10-30 14:19:22 -0700 | [diff] [blame] | 162 | int src_sel; |
Michael Bohan | 6b90157 | 2012-05-30 13:32:24 -0700 | [diff] [blame] | 163 | int master_en; |
| 164 | int aout_ref; |
| 165 | int ain_route; |
| 166 | int cs_out; |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | /** |
| 170 | * qpnp_pin_config - Apply pin configuration for Linux gpio |
| 171 | * @gpio: Linux gpio number to configure. |
| 172 | * @param: parameters to configure. |
| 173 | * |
| 174 | * This routine takes a Linux gpio number that corresponds with a |
| 175 | * PMIC pin and applies the configuration specified in 'param'. |
| 176 | * This gpio number can be ascertained by of_get_gpio_flags() or |
| 177 | * the qpnp_pin_map_gpio() API. |
| 178 | */ |
| 179 | int qpnp_pin_config(int gpio, struct qpnp_pin_cfg *param); |
| 180 | |
| 181 | /** |
| 182 | * qpnp_pin_map - Obtain Linux GPIO number from device spec |
Michael Bohan | 6ea2cd2 | 2012-05-29 15:40:18 -0700 | [diff] [blame] | 183 | * @name: Name assigned by the 'label' binding for the primary node. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 184 | * @pmic_pin: PMIC pin number to lookup. |
| 185 | * |
| 186 | * This routine is used in legacy configurations that do not support |
| 187 | * Device Tree. If you are using Device Tree, you should not use this. |
Michael Bohan | 6ea2cd2 | 2012-05-29 15:40:18 -0700 | [diff] [blame] | 188 | * For such cases, use of_get_gpio() or friends instead. |
Michael Bohan | a05f455 | 2012-05-24 15:58:11 -0700 | [diff] [blame] | 189 | */ |
Michael Bohan | 6ea2cd2 | 2012-05-29 15:40:18 -0700 | [diff] [blame] | 190 | int qpnp_pin_map(const char *name, uint32_t pmic_pin); |