blob: 410a112bb52e29036d22c1de07ffed1965011389 [file] [log] [blame]
Rob Herring220e6cf2011-06-07 10:02:55 -05001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include <linux/clk.h>
17#include <linux/clkdev.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/irqdomain.h>
21#include <linux/of.h>
22#include <linux/of_irq.h>
23#include <linux/of_platform.h>
24#include <linux/of_address.h>
Will Deaconbf14fc52011-06-06 12:35:46 +010025#include <linux/smp.h>
Rob Herring220e6cf2011-06-07 10:02:55 -050026
27#include <asm/cacheflush.h>
Will Deaconeb504392012-01-20 12:01:12 +010028#include <asm/smp_plat.h>
Rob Herring220e6cf2011-06-07 10:02:55 -050029#include <asm/smp_scu.h>
Marc Zyngier7ac9b9e2012-01-10 19:44:19 +000030#include <asm/smp_twd.h>
Rob Herring220e6cf2011-06-07 10:02:55 -050031#include <asm/hardware/arm_timer.h>
32#include <asm/hardware/timer-sp.h>
33#include <asm/hardware/gic.h>
34#include <asm/hardware/cache-l2x0.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/time.h>
Rob Herring220e6cf2011-06-07 10:02:55 -050038
39#include "core.h"
40#include "sysregs.h"
41
42void __iomem *sregs_base;
43
44#define HB_SCU_VIRT_BASE 0xfee00000
45void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
46
47static struct map_desc scu_io_desc __initdata = {
48 .virtual = HB_SCU_VIRT_BASE,
49 .pfn = 0, /* run-time */
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52};
53
54static void __init highbank_scu_map_io(void)
55{
56 unsigned long base;
57
58 /* Get SCU base */
59 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
60
61 scu_io_desc.pfn = __phys_to_pfn(base);
62 iotable_init(&scu_io_desc, 1);
63}
64
65static void __init highbank_map_io(void)
66{
67 highbank_scu_map_io();
68 highbank_lluart_map_io();
69}
70
71#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
72#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
73
74void highbank_set_cpu_jump(int cpu, void *jump_addr)
75{
Will Deaconbf14fc52011-06-06 12:35:46 +010076 cpu = cpu_logical_map(cpu);
Rob Herringadf55f72012-01-09 15:41:58 -060077 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
Rob Herring220e6cf2011-06-07 10:02:55 -050078 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
79 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
80 HB_JUMP_TABLE_PHYS(cpu) + 15);
81}
82
83const static struct of_device_id irq_match[] = {
84 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
85 {}
86};
87
88static void __init highbank_init_irq(void)
89{
90 of_irq_init(irq_match);
91 l2x0_of_init(0, ~0UL);
92}
93
94static void __init highbank_timer_init(void)
95{
96 int irq;
97 struct device_node *np;
98 void __iomem *timer_base;
99
100 /* Map system registers */
101 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
102 sregs_base = of_iomap(np, 0);
103 WARN_ON(!sregs_base);
104
105 np = of_find_compatible_node(NULL, NULL, "arm,sp804");
106 timer_base = of_iomap(np, 0);
107 WARN_ON(!timer_base);
108 irq = irq_of_parse_and_map(np, 0);
109
110 highbank_clocks_init();
111
Rob Herringf3b7cd22012-01-16 08:06:09 -0600112 sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
Rob Herring220e6cf2011-06-07 10:02:55 -0500113 sp804_clockevents_init(timer_base, irq, "timer0");
Marc Zyngier7ac9b9e2012-01-10 19:44:19 +0000114
115 twd_local_timer_of_register();
Rob Herring220e6cf2011-06-07 10:02:55 -0500116}
117
118static struct sys_timer highbank_timer = {
119 .init = highbank_timer_init,
120};
121
122static void highbank_power_off(void)
123{
124 hignbank_set_pwr_shutdown();
125 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
126
127 while (1)
128 cpu_do_idle();
129}
130
131static void __init highbank_init(void)
132{
133 pm_power_off = highbank_power_off;
134
135 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
136}
137
138static const char *highbank_match[] __initconst = {
139 "calxeda,highbank",
140 NULL,
141};
142
143DT_MACHINE_START(HIGHBANK, "Highbank")
144 .map_io = highbank_map_io,
145 .init_irq = highbank_init_irq,
146 .timer = &highbank_timer,
Marc Zyngier7e017992011-09-06 10:23:45 +0100147 .handle_irq = gic_handle_irq,
Rob Herring220e6cf2011-06-07 10:02:55 -0500148 .init_machine = highbank_init,
149 .dt_compat = highbank_match,
Russell King00e99672011-11-05 11:16:05 +0000150 .restart = highbank_restart,
Rob Herring220e6cf2011-06-07 10:02:55 -0500151MACHINE_END