blob: e7a331de573358a7326303f61724bb0f148025d8 [file] [log] [blame]
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001/*
Pierre Ossman70f10482007-07-11 20:04:50 +02002 * linux/drivers/mmc/host/omap.c
Carlos Aguiar730c9b72006-03-29 09:21:00 +01003 *
4 * Copyright (C) 2004 Nokia Corporation
5 * Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com>
6 * Misc hacks here and there by Tony Lindgren <tony@atomide.com>
7 * Other hacks (DMA, SD, etc) by David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
Carlos Aguiar730c9b72006-03-29 09:21:00 +010014#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/ioport.h>
18#include <linux/platform_device.h>
19#include <linux/interrupt.h>
20#include <linux/dma-mapping.h>
21#include <linux/delay.h>
22#include <linux/spinlock.h>
23#include <linux/timer.h>
24#include <linux/mmc/host.h>
Carlos Aguiar730c9b72006-03-29 09:21:00 +010025#include <linux/mmc/card.h>
26#include <linux/clk.h>
Jens Axboe45711f12007-10-22 21:19:53 +020027#include <linux/scatterlist.h>
David Brownell6d16bfb2008-01-27 18:14:49 +010028#include <linux/i2c/tps65010.h>
Carlos Aguiar730c9b72006-03-29 09:21:00 +010029
30#include <asm/io.h>
31#include <asm/irq.h>
Carlos Aguiar730c9b72006-03-29 09:21:00 +010032
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/board.h>
34#include <mach/mmc.h>
35#include <mach/gpio.h>
36#include <mach/dma.h>
37#include <mach/mux.h>
38#include <mach/fpga.h>
Carlos Aguiar730c9b72006-03-29 09:21:00 +010039
Juha Yrjola juha.yrjola0551f4d2006-11-11 23:38:36 +010040#define OMAP_MMC_REG_CMD 0x00
41#define OMAP_MMC_REG_ARGL 0x04
42#define OMAP_MMC_REG_ARGH 0x08
43#define OMAP_MMC_REG_CON 0x0c
44#define OMAP_MMC_REG_STAT 0x10
45#define OMAP_MMC_REG_IE 0x14
46#define OMAP_MMC_REG_CTO 0x18
47#define OMAP_MMC_REG_DTO 0x1c
48#define OMAP_MMC_REG_DATA 0x20
49#define OMAP_MMC_REG_BLEN 0x24
50#define OMAP_MMC_REG_NBLK 0x28
51#define OMAP_MMC_REG_BUF 0x2c
52#define OMAP_MMC_REG_SDIO 0x34
53#define OMAP_MMC_REG_REV 0x3c
54#define OMAP_MMC_REG_RSP0 0x40
55#define OMAP_MMC_REG_RSP1 0x44
56#define OMAP_MMC_REG_RSP2 0x48
57#define OMAP_MMC_REG_RSP3 0x4c
58#define OMAP_MMC_REG_RSP4 0x50
59#define OMAP_MMC_REG_RSP5 0x54
60#define OMAP_MMC_REG_RSP6 0x58
61#define OMAP_MMC_REG_RSP7 0x5c
62#define OMAP_MMC_REG_IOSR 0x60
63#define OMAP_MMC_REG_SYSC 0x64
64#define OMAP_MMC_REG_SYSS 0x68
65
66#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
67#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
68#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
69#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
70#define OMAP_MMC_STAT_A_FULL (1 << 10)
71#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
72#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
73#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
74#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
75#define OMAP_MMC_STAT_END_BUSY (1 << 4)
76#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
77#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
78#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
79
80#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
81#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
82
83/*
84 * Command types
85 */
86#define OMAP_MMC_CMDTYPE_BC 0
87#define OMAP_MMC_CMDTYPE_BCR 1
88#define OMAP_MMC_CMDTYPE_AC 2
89#define OMAP_MMC_CMDTYPE_ADTC 3
90
Carlos Aguiar730c9b72006-03-29 09:21:00 +010091
92#define DRIVER_NAME "mmci-omap"
Carlos Aguiar730c9b72006-03-29 09:21:00 +010093
94/* Specifies how often in millisecs to poll for card status changes
95 * when the cover switch is open */
Jarkko Lavinen7584d272008-03-26 16:09:42 -040096#define OMAP_MMC_COVER_POLL_DELAY 500
Carlos Aguiar730c9b72006-03-29 09:21:00 +010097
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -040098struct mmc_omap_host;
99
100struct mmc_omap_slot {
101 int id;
102 unsigned int vdd;
103 u16 saved_con;
104 u16 bus_mode;
105 unsigned int fclk_freq;
106 unsigned powered:1;
107
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400108 struct tasklet_struct cover_tasklet;
109 struct timer_list cover_timer;
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400110 unsigned cover_open;
111
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400112 struct mmc_request *mrq;
113 struct mmc_omap_host *host;
114 struct mmc_host *mmc;
115 struct omap_mmc_slot_data *pdata;
116};
117
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100118struct mmc_omap_host {
119 int initialized;
120 int suspended;
121 struct mmc_request * mrq;
122 struct mmc_command * cmd;
123 struct mmc_data * data;
124 struct mmc_host * mmc;
125 struct device * dev;
126 unsigned char id; /* 16xx chips have 2 MMC blocks */
127 struct clk * iclk;
128 struct clk * fclk;
Juha Yrjola juha.yrjola89783b1e42006-11-11 23:36:01 +0100129 struct resource *mem_res;
130 void __iomem *virt_base;
131 unsigned int phys_base;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100132 int irq;
133 unsigned char bus_mode;
134 unsigned char hw_bus_mode;
135
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400136 struct work_struct cmd_abort_work;
137 unsigned abort:1;
138 struct timer_list cmd_abort_timer;
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400139
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400140 struct work_struct slot_release_work;
141 struct mmc_omap_slot *next_slot;
142 struct work_struct send_stop_work;
143 struct mmc_data *stop_data;
144
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100145 unsigned int sg_len;
146 int sg_idx;
147 u16 * buffer;
148 u32 buffer_bytes_left;
149 u32 total_bytes_left;
150
151 unsigned use_dma:1;
152 unsigned brs_received:1, dma_done:1;
153 unsigned dma_is_read:1;
154 unsigned dma_in_use:1;
155 int dma_ch;
156 spinlock_t dma_lock;
157 struct timer_list dma_timer;
158 unsigned dma_len;
159
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400160 struct mmc_omap_slot *slots[OMAP_MMC_MAX_SLOTS];
161 struct mmc_omap_slot *current_slot;
162 spinlock_t slot_lock;
163 wait_queue_head_t slot_wq;
164 int nr_slots;
165
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400166 struct timer_list clk_timer;
167 spinlock_t clk_lock; /* for changing enabled state */
168 unsigned int fclk_enabled:1;
169
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400170 struct omap_mmc_platform_data *pdata;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100171};
172
Russell King7c8ad982008-09-05 15:13:24 +0100173static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400174{
175 unsigned long tick_ns;
176
177 if (slot != NULL && slot->host->fclk_enabled && slot->fclk_freq > 0) {
178 tick_ns = (1000000000 + slot->fclk_freq - 1) / slot->fclk_freq;
179 ndelay(8 * tick_ns);
180 }
181}
182
Russell King7c8ad982008-09-05 15:13:24 +0100183static void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable)
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400184{
185 unsigned long flags;
186
187 spin_lock_irqsave(&host->clk_lock, flags);
188 if (host->fclk_enabled != enable) {
189 host->fclk_enabled = enable;
190 if (enable)
191 clk_enable(host->fclk);
192 else
193 clk_disable(host->fclk);
194 }
195 spin_unlock_irqrestore(&host->clk_lock, flags);
196}
197
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400198static void mmc_omap_select_slot(struct mmc_omap_slot *slot, int claimed)
199{
200 struct mmc_omap_host *host = slot->host;
201 unsigned long flags;
202
203 if (claimed)
204 goto no_claim;
205 spin_lock_irqsave(&host->slot_lock, flags);
206 while (host->mmc != NULL) {
207 spin_unlock_irqrestore(&host->slot_lock, flags);
208 wait_event(host->slot_wq, host->mmc == NULL);
209 spin_lock_irqsave(&host->slot_lock, flags);
210 }
211 host->mmc = slot->mmc;
212 spin_unlock_irqrestore(&host->slot_lock, flags);
213no_claim:
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400214 del_timer(&host->clk_timer);
215 if (host->current_slot != slot || !claimed)
216 mmc_omap_fclk_offdelay(host->current_slot);
217
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400218 if (host->current_slot != slot) {
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400219 OMAP_MMC_WRITE(host, CON, slot->saved_con & 0xFC00);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400220 if (host->pdata->switch_slot != NULL)
221 host->pdata->switch_slot(mmc_dev(slot->mmc), slot->id);
222 host->current_slot = slot;
223 }
224
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400225 if (claimed) {
226 mmc_omap_fclk_enable(host, 1);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400227
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400228 /* Doing the dummy read here seems to work around some bug
229 * at least in OMAP24xx silicon where the command would not
230 * start after writing the CMD register. Sigh. */
231 OMAP_MMC_READ(host, CON);
232
233 OMAP_MMC_WRITE(host, CON, slot->saved_con);
234 } else
235 mmc_omap_fclk_enable(host, 0);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400236}
237
238static void mmc_omap_start_request(struct mmc_omap_host *host,
239 struct mmc_request *req);
240
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400241static void mmc_omap_slot_release_work(struct work_struct *work)
242{
243 struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
244 slot_release_work);
245 struct mmc_omap_slot *next_slot = host->next_slot;
246 struct mmc_request *rq;
247
248 host->next_slot = NULL;
249 mmc_omap_select_slot(next_slot, 1);
250
251 rq = next_slot->mrq;
252 next_slot->mrq = NULL;
253 mmc_omap_start_request(host, rq);
254}
255
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400256static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled)
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400257{
258 struct mmc_omap_host *host = slot->host;
259 unsigned long flags;
260 int i;
261
262 BUG_ON(slot == NULL || host->mmc == NULL);
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400263
264 if (clk_enabled)
265 /* Keeps clock running for at least 8 cycles on valid freq */
266 mod_timer(&host->clk_timer, jiffies + HZ/10);
267 else {
268 del_timer(&host->clk_timer);
269 mmc_omap_fclk_offdelay(slot);
270 mmc_omap_fclk_enable(host, 0);
271 }
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400272
273 spin_lock_irqsave(&host->slot_lock, flags);
274 /* Check for any pending requests */
275 for (i = 0; i < host->nr_slots; i++) {
276 struct mmc_omap_slot *new_slot;
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400277
278 if (host->slots[i] == NULL || host->slots[i]->mrq == NULL)
279 continue;
280
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400281 BUG_ON(host->next_slot != NULL);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400282 new_slot = host->slots[i];
283 /* The current slot should not have a request in queue */
284 BUG_ON(new_slot == host->current_slot);
285
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400286 host->next_slot = new_slot;
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400287 host->mmc = new_slot->mmc;
288 spin_unlock_irqrestore(&host->slot_lock, flags);
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400289 schedule_work(&host->slot_release_work);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400290 return;
291 }
292
293 host->mmc = NULL;
294 wake_up(&host->slot_wq);
295 spin_unlock_irqrestore(&host->slot_lock, flags);
296}
297
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400298static inline
299int mmc_omap_cover_is_open(struct mmc_omap_slot *slot)
300{
Kyungmin Park8348f002008-03-26 16:09:38 -0400301 if (slot->pdata->get_cover_state)
302 return slot->pdata->get_cover_state(mmc_dev(slot->mmc),
303 slot->id);
304 return 0;
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400305}
306
307static ssize_t
308mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr,
309 char *buf)
310{
311 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
312 struct mmc_omap_slot *slot = mmc_priv(mmc);
313
314 return sprintf(buf, "%s\n", mmc_omap_cover_is_open(slot) ? "open" :
315 "closed");
316}
317
318static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
319
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400320static ssize_t
321mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr,
322 char *buf)
323{
324 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
325 struct mmc_omap_slot *slot = mmc_priv(mmc);
326
327 return sprintf(buf, "%s\n", slot->pdata->name);
328}
329
330static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL);
331
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100332static void
333mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
334{
335 u32 cmdreg;
336 u32 resptype;
337 u32 cmdtype;
338
339 host->cmd = cmd;
340
341 resptype = 0;
342 cmdtype = 0;
343
344 /* Our hardware needs to know exact type */
Carlos Eduardo Aguiar1b3b2632007-01-15 06:38:15 +0100345 switch (mmc_resp_type(cmd)) {
346 case MMC_RSP_NONE:
347 break;
348 case MMC_RSP_R1:
349 case MMC_RSP_R1B:
Philip Langdale6f949902007-01-04 07:04:47 -0800350 /* resp 1, 1b, 6, 7 */
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100351 resptype = 1;
352 break;
Carlos Eduardo Aguiar1b3b2632007-01-15 06:38:15 +0100353 case MMC_RSP_R2:
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100354 resptype = 2;
355 break;
Carlos Eduardo Aguiar1b3b2632007-01-15 06:38:15 +0100356 case MMC_RSP_R3:
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100357 resptype = 3;
358 break;
359 default:
Carlos Eduardo Aguiar1b3b2632007-01-15 06:38:15 +0100360 dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd));
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100361 break;
362 }
363
364 if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) {
365 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
366 } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) {
367 cmdtype = OMAP_MMC_CMDTYPE_BC;
368 } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) {
369 cmdtype = OMAP_MMC_CMDTYPE_BCR;
370 } else {
371 cmdtype = OMAP_MMC_CMDTYPE_AC;
372 }
373
374 cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
375
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400376 if (host->current_slot->bus_mode == MMC_BUSMODE_OPENDRAIN)
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100377 cmdreg |= 1 << 6;
378
379 if (cmd->flags & MMC_RSP_BUSY)
380 cmdreg |= 1 << 11;
381
382 if (host->data && !(host->data->flags & MMC_DATA_WRITE))
383 cmdreg |= 1 << 15;
384
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400385 mod_timer(&host->cmd_abort_timer, jiffies + HZ/2);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400386
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100387 OMAP_MMC_WRITE(host, CTO, 200);
388 OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
389 OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
390 OMAP_MMC_WRITE(host, IE,
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100391 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
392 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
393 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
394 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
395 OMAP_MMC_STAT_END_OF_DATA);
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100396 OMAP_MMC_WRITE(host, CMD, cmdreg);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100397}
398
399static void
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400400mmc_omap_release_dma(struct mmc_omap_host *host, struct mmc_data *data,
401 int abort)
402{
403 enum dma_data_direction dma_data_dir;
404
405 BUG_ON(host->dma_ch < 0);
406 if (data->error)
407 omap_stop_dma(host->dma_ch);
408 /* Release DMA channel lazily */
409 mod_timer(&host->dma_timer, jiffies + HZ);
410 if (data->flags & MMC_DATA_WRITE)
411 dma_data_dir = DMA_TO_DEVICE;
412 else
413 dma_data_dir = DMA_FROM_DEVICE;
414 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
415 dma_data_dir);
416}
417
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400418static void mmc_omap_send_stop_work(struct work_struct *work)
419{
420 struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
421 send_stop_work);
422 struct mmc_omap_slot *slot = host->current_slot;
423 struct mmc_data *data = host->stop_data;
424 unsigned long tick_ns;
425
426 tick_ns = (1000000000 + slot->fclk_freq - 1)/slot->fclk_freq;
427 ndelay(8*tick_ns);
428
429 mmc_omap_start_command(host, data->stop);
430}
431
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400432static void
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100433mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
434{
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400435 if (host->dma_in_use)
436 mmc_omap_release_dma(host, data, data->error);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100437
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100438 host->data = NULL;
439 host->sg_len = 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100440
441 /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing
442 * dozens of requests until the card finishes writing data.
443 * It'd be cheaper to just wait till an EOFB interrupt arrives...
444 */
445
446 if (!data->stop) {
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400447 struct mmc_host *mmc;
448
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100449 host->mrq = NULL;
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400450 mmc = host->mmc;
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400451 mmc_omap_release_slot(host->current_slot, 1);
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400452 mmc_request_done(mmc, data->mrq);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100453 return;
454 }
455
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -0400456 host->stop_data = data;
457 schedule_work(&host->send_stop_work);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100458}
459
460static void
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400461mmc_omap_send_abort(struct mmc_omap_host *host, int maxloops)
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400462{
463 struct mmc_omap_slot *slot = host->current_slot;
464 unsigned int restarts, passes, timeout;
465 u16 stat = 0;
466
467 /* Sending abort takes 80 clocks. Have some extra and round up */
468 timeout = (120*1000000 + slot->fclk_freq - 1)/slot->fclk_freq;
469 restarts = 0;
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400470 while (restarts < maxloops) {
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400471 OMAP_MMC_WRITE(host, STAT, 0xFFFF);
472 OMAP_MMC_WRITE(host, CMD, (3 << 12) | (1 << 7));
473
474 passes = 0;
475 while (passes < timeout) {
476 stat = OMAP_MMC_READ(host, STAT);
477 if (stat & OMAP_MMC_STAT_END_OF_CMD)
478 goto out;
479 udelay(1);
480 passes++;
481 }
482
483 restarts++;
484 }
485out:
486 OMAP_MMC_WRITE(host, STAT, stat);
487}
488
489static void
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400490mmc_omap_abort_xfer(struct mmc_omap_host *host, struct mmc_data *data)
491{
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400492 if (host->dma_in_use)
493 mmc_omap_release_dma(host, data, 1);
494
495 host->data = NULL;
496 host->sg_len = 0;
497
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400498 mmc_omap_send_abort(host, 10000);
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400499}
500
501static void
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100502mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
503{
504 unsigned long flags;
505 int done;
506
507 if (!host->dma_in_use) {
508 mmc_omap_xfer_done(host, data);
509 return;
510 }
511 done = 0;
512 spin_lock_irqsave(&host->dma_lock, flags);
513 if (host->dma_done)
514 done = 1;
515 else
516 host->brs_received = 1;
517 spin_unlock_irqrestore(&host->dma_lock, flags);
518 if (done)
519 mmc_omap_xfer_done(host, data);
520}
521
522static void
523mmc_omap_dma_timer(unsigned long data)
524{
525 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
526
527 BUG_ON(host->dma_ch < 0);
528 omap_free_dma(host->dma_ch);
529 host->dma_ch = -1;
530}
531
532static void
533mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
534{
535 unsigned long flags;
536 int done;
537
538 done = 0;
539 spin_lock_irqsave(&host->dma_lock, flags);
540 if (host->brs_received)
541 done = 1;
542 else
543 host->dma_done = 1;
544 spin_unlock_irqrestore(&host->dma_lock, flags);
545 if (done)
546 mmc_omap_xfer_done(host, data);
547}
548
549static void
550mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
551{
552 host->cmd = NULL;
553
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400554 del_timer(&host->cmd_abort_timer);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400555
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100556 if (cmd->flags & MMC_RSP_PRESENT) {
557 if (cmd->flags & MMC_RSP_136) {
558 /* response type 2 */
559 cmd->resp[3] =
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100560 OMAP_MMC_READ(host, RSP0) |
561 (OMAP_MMC_READ(host, RSP1) << 16);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100562 cmd->resp[2] =
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100563 OMAP_MMC_READ(host, RSP2) |
564 (OMAP_MMC_READ(host, RSP3) << 16);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100565 cmd->resp[1] =
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100566 OMAP_MMC_READ(host, RSP4) |
567 (OMAP_MMC_READ(host, RSP5) << 16);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100568 cmd->resp[0] =
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100569 OMAP_MMC_READ(host, RSP6) |
570 (OMAP_MMC_READ(host, RSP7) << 16);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100571 } else {
572 /* response types 1, 1b, 3, 4, 5, 6 */
573 cmd->resp[0] =
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100574 OMAP_MMC_READ(host, RSP6) |
575 (OMAP_MMC_READ(host, RSP7) << 16);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100576 }
577 }
578
Pierre Ossman17b04292007-07-22 22:18:46 +0200579 if (host->data == NULL || cmd->error) {
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400580 struct mmc_host *mmc;
581
582 if (host->data != NULL)
583 mmc_omap_abort_xfer(host, host->data);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100584 host->mrq = NULL;
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400585 mmc = host->mmc;
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400586 mmc_omap_release_slot(host->current_slot, 1);
Juha Yrjolaa914ded2008-03-26 16:09:12 -0400587 mmc_request_done(mmc, cmd->mrq);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100588 }
589}
590
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400591/*
592 * Abort stuck command. Can occur when card is removed while it is being
593 * read.
594 */
595static void mmc_omap_abort_command(struct work_struct *work)
596{
597 struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400598 cmd_abort_work);
599 BUG_ON(!host->cmd);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400600
601 dev_dbg(mmc_dev(host->mmc), "Aborting stuck command CMD%d\n",
602 host->cmd->opcode);
603
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400604 if (host->cmd->error == 0)
605 host->cmd->error = -ETIMEDOUT;
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400606
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400607 if (host->data == NULL) {
608 struct mmc_command *cmd;
609 struct mmc_host *mmc;
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400610
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400611 cmd = host->cmd;
612 host->cmd = NULL;
613 mmc_omap_send_abort(host, 10000);
614
615 host->mrq = NULL;
616 mmc = host->mmc;
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400617 mmc_omap_release_slot(host->current_slot, 1);
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400618 mmc_request_done(mmc, cmd->mrq);
619 } else
620 mmc_omap_cmd_done(host, host->cmd);
621
622 host->abort = 0;
623 enable_irq(host->irq);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400624}
625
626static void
627mmc_omap_cmd_timer(unsigned long data)
628{
629 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400630 unsigned long flags;
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400631
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400632 spin_lock_irqsave(&host->slot_lock, flags);
633 if (host->cmd != NULL && !host->abort) {
634 OMAP_MMC_WRITE(host, IE, 0);
635 disable_irq(host->irq);
636 host->abort = 1;
637 schedule_work(&host->cmd_abort_work);
638 }
639 spin_unlock_irqrestore(&host->slot_lock, flags);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -0400640}
641
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100642/* PIO only */
643static void
644mmc_omap_sg_to_buf(struct mmc_omap_host *host)
645{
646 struct scatterlist *sg;
647
648 sg = host->data->sg + host->sg_idx;
649 host->buffer_bytes_left = sg->length;
Jens Axboe45711f12007-10-22 21:19:53 +0200650 host->buffer = sg_virt(sg);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100651 if (host->buffer_bytes_left > host->total_bytes_left)
652 host->buffer_bytes_left = host->total_bytes_left;
653}
654
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -0400655static void
656mmc_omap_clk_timer(unsigned long data)
657{
658 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
659
660 mmc_omap_fclk_enable(host, 0);
661}
662
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100663/* PIO only */
664static void
665mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
666{
667 int n;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100668
669 if (host->buffer_bytes_left == 0) {
670 host->sg_idx++;
671 BUG_ON(host->sg_idx == host->sg_len);
672 mmc_omap_sg_to_buf(host);
673 }
674 n = 64;
675 if (n > host->buffer_bytes_left)
676 n = host->buffer_bytes_left;
677 host->buffer_bytes_left -= n;
678 host->total_bytes_left -= n;
679 host->data->bytes_xfered += n;
680
681 if (write) {
Juha Yrjola juha.yrjola89783b1e42006-11-11 23:36:01 +0100682 __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100683 } else {
Juha Yrjola juha.yrjola89783b1e42006-11-11 23:36:01 +0100684 __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100685 }
686}
687
688static inline void mmc_omap_report_irq(u16 status)
689{
690 static const char *mmc_omap_status_bits[] = {
691 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
692 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
693 };
694 int i, c = 0;
695
696 for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
697 if (status & (1 << i)) {
698 if (c)
699 printk(" ");
700 printk("%s", mmc_omap_status_bits[i]);
701 c++;
702 }
703}
704
David Howells7d12e782006-10-05 14:55:46 +0100705static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100706{
707 struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
708 u16 status;
709 int end_command;
710 int end_transfer;
Juha Yrjola2a50b882008-03-26 16:09:26 -0400711 int transfer_error, cmd_error;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100712
713 if (host->cmd == NULL && host->data == NULL) {
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100714 status = OMAP_MMC_READ(host, STAT);
Juha Yrjola2a50b882008-03-26 16:09:26 -0400715 dev_info(mmc_dev(host->slots[0]->mmc),
716 "Spurious IRQ 0x%04x\n", status);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100717 if (status != 0) {
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100718 OMAP_MMC_WRITE(host, STAT, status);
719 OMAP_MMC_WRITE(host, IE, 0);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100720 }
721 return IRQ_HANDLED;
722 }
723
724 end_command = 0;
725 end_transfer = 0;
726 transfer_error = 0;
Juha Yrjola2a50b882008-03-26 16:09:26 -0400727 cmd_error = 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100728
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100729 while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
Juha Yrjola2a50b882008-03-26 16:09:26 -0400730 int cmd;
731
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100732 OMAP_MMC_WRITE(host, STAT, status);
Juha Yrjola2a50b882008-03-26 16:09:26 -0400733 if (host->cmd != NULL)
734 cmd = host->cmd->opcode;
735 else
736 cmd = -1;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100737#ifdef CONFIG_MMC_DEBUG
738 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
Juha Yrjola2a50b882008-03-26 16:09:26 -0400739 status, cmd);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100740 mmc_omap_report_irq(status);
741 printk("\n");
742#endif
743 if (host->total_bytes_left) {
744 if ((status & OMAP_MMC_STAT_A_FULL) ||
745 (status & OMAP_MMC_STAT_END_OF_DATA))
746 mmc_omap_xfer_data(host, 0);
747 if (status & OMAP_MMC_STAT_A_EMPTY)
748 mmc_omap_xfer_data(host, 1);
749 }
750
Juha Yrjola2a50b882008-03-26 16:09:26 -0400751 if (status & OMAP_MMC_STAT_END_OF_DATA)
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100752 end_transfer = 1;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100753
754 if (status & OMAP_MMC_STAT_DATA_TOUT) {
Juha Yrjola2a50b882008-03-26 16:09:26 -0400755 dev_dbg(mmc_dev(host->mmc), "data timeout (CMD%d)\n",
756 cmd);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100757 if (host->data) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200758 host->data->error = -ETIMEDOUT;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100759 transfer_error = 1;
760 }
761 }
762
763 if (status & OMAP_MMC_STAT_DATA_CRC) {
764 if (host->data) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200765 host->data->error = -EILSEQ;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100766 dev_dbg(mmc_dev(host->mmc),
767 "data CRC error, bytes left %d\n",
768 host->total_bytes_left);
769 transfer_error = 1;
770 } else {
771 dev_dbg(mmc_dev(host->mmc), "data CRC error\n");
772 }
773 }
774
775 if (status & OMAP_MMC_STAT_CMD_TOUT) {
776 /* Timeouts are routine with some commands */
777 if (host->cmd) {
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -0400778 struct mmc_omap_slot *slot =
779 host->current_slot;
Juha Yrjola2a50b882008-03-26 16:09:26 -0400780 if (slot == NULL ||
781 !mmc_omap_cover_is_open(slot))
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400782 dev_err(mmc_dev(host->mmc),
Juha Yrjola2a50b882008-03-26 16:09:26 -0400783 "command timeout (CMD%d)\n",
784 cmd);
Pierre Ossman17b04292007-07-22 22:18:46 +0200785 host->cmd->error = -ETIMEDOUT;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100786 end_command = 1;
Juha Yrjola2a50b882008-03-26 16:09:26 -0400787 cmd_error = 1;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100788 }
789 }
790
791 if (status & OMAP_MMC_STAT_CMD_CRC) {
792 if (host->cmd) {
793 dev_err(mmc_dev(host->mmc),
794 "command CRC error (CMD%d, arg 0x%08x)\n",
Juha Yrjola2a50b882008-03-26 16:09:26 -0400795 cmd, host->cmd->arg);
Pierre Ossman17b04292007-07-22 22:18:46 +0200796 host->cmd->error = -EILSEQ;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100797 end_command = 1;
Juha Yrjola2a50b882008-03-26 16:09:26 -0400798 cmd_error = 1;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100799 } else
800 dev_err(mmc_dev(host->mmc),
801 "command CRC error without cmd?\n");
802 }
803
804 if (status & OMAP_MMC_STAT_CARD_ERR) {
Ragner Magalhaes0107a4b2007-06-13 19:09:28 +0200805 dev_dbg(mmc_dev(host->mmc),
806 "ignoring card status error (CMD%d)\n",
Juha Yrjola2a50b882008-03-26 16:09:26 -0400807 cmd);
Ragner Magalhaes0107a4b2007-06-13 19:09:28 +0200808 end_command = 1;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100809 }
810
811 /*
812 * NOTE: On 1610 the END_OF_CMD may come too early when
Juha Yrjola2a50b882008-03-26 16:09:26 -0400813 * starting a write
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100814 */
815 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
816 (!(status & OMAP_MMC_STAT_A_EMPTY))) {
817 end_command = 1;
818 }
819 }
820
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400821 if (cmd_error && host->data) {
822 del_timer(&host->cmd_abort_timer);
823 host->abort = 1;
824 OMAP_MMC_WRITE(host, IE, 0);
Ben Nizettee749c6f2009-04-16 15:55:21 +1000825 disable_irq_nosync(host->irq);
Jarkko Lavinen0fb47232008-03-26 16:09:48 -0400826 schedule_work(&host->cmd_abort_work);
827 return IRQ_HANDLED;
828 }
829
Juha Yrjola2a50b882008-03-26 16:09:26 -0400830 if (end_command)
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100831 mmc_omap_cmd_done(host, host->cmd);
Juha Yrjola2a50b882008-03-26 16:09:26 -0400832 if (host->data != NULL) {
833 if (transfer_error)
834 mmc_omap_xfer_done(host, host->data);
835 else if (end_transfer)
836 mmc_omap_end_of_data(host, host->data);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100837 }
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100838
839 return IRQ_HANDLED;
840}
841
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400842void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed)
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400843{
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400844 int cover_open;
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400845 struct mmc_omap_host *host = dev_get_drvdata(dev);
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400846 struct mmc_omap_slot *slot = host->slots[num];
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400847
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400848 BUG_ON(num >= host->nr_slots);
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400849
850 /* Other subsystems can call in here before we're initialised. */
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400851 if (host->nr_slots == 0 || !host->slots[num])
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400852 return;
853
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400854 cover_open = mmc_omap_cover_is_open(slot);
855 if (cover_open != slot->cover_open) {
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400856 slot->cover_open = cover_open;
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400857 sysfs_notify(&slot->mmc->class_dev.kobj, NULL, "cover_switch");
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400858 }
Jarkko Lavinen7584d272008-03-26 16:09:42 -0400859
860 tasklet_hi_schedule(&slot->cover_tasklet);
861}
862
863static void mmc_omap_cover_timer(unsigned long arg)
864{
865 struct mmc_omap_slot *slot = (struct mmc_omap_slot *) arg;
866 tasklet_schedule(&slot->cover_tasklet);
867}
868
869static void mmc_omap_cover_handler(unsigned long param)
870{
871 struct mmc_omap_slot *slot = (struct mmc_omap_slot *)param;
872 int cover_open = mmc_omap_cover_is_open(slot);
873
874 mmc_detect_change(slot->mmc, 0);
875 if (!cover_open)
876 return;
877
878 /*
879 * If no card is inserted, we postpone polling until
880 * the cover has been closed.
881 */
882 if (slot->mmc->card == NULL || !mmc_card_present(slot->mmc->card))
883 return;
884
885 mod_timer(&slot->cover_timer,
886 jiffies + msecs_to_jiffies(OMAP_MMC_COVER_POLL_DELAY));
Juha Yrjola5a0f3f12008-03-26 16:09:08 -0400887}
888
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100889/* Prepare to transfer the next segment of a scatterlist */
890static void
891mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
892{
893 int dma_ch = host->dma_ch;
894 unsigned long data_addr;
895 u16 buf, frame;
896 u32 count;
897 struct scatterlist *sg = &data->sg[host->sg_idx];
898 int src_port = 0;
899 int dst_port = 0;
900 int sync_dev = 0;
901
Juha Yrjola juha.yrjola89783b1e42006-11-11 23:36:01 +0100902 data_addr = host->phys_base + OMAP_MMC_REG_DATA;
Russell Kinga3fd4a12006-06-04 17:51:15 +0100903 frame = data->blksz;
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100904 count = sg_dma_len(sg);
905
Russell Kinga3fd4a12006-06-04 17:51:15 +0100906 if ((data->blocks == 1) && (count > data->blksz))
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100907 count = frame;
908
909 host->dma_len = count;
910
911 /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
912 * Use 16 or 32 word frames when the blocksize is at least that large.
913 * Blocksize is usually 512 bytes; but not for some SD reads.
914 */
915 if (cpu_is_omap15xx() && frame > 32)
916 frame = 32;
917 else if (frame > 64)
918 frame = 64;
919 count /= frame;
920 frame >>= 1;
921
922 if (!(data->flags & MMC_DATA_WRITE)) {
923 buf = 0x800f | ((frame - 1) << 8);
924
925 if (cpu_class_is_omap1()) {
926 src_port = OMAP_DMA_PORT_TIPB;
927 dst_port = OMAP_DMA_PORT_EMIFF;
928 }
929 if (cpu_is_omap24xx())
930 sync_dev = OMAP24XX_DMA_MMC1_RX;
931
932 omap_set_dma_src_params(dma_ch, src_port,
933 OMAP_DMA_AMODE_CONSTANT,
934 data_addr, 0, 0);
935 omap_set_dma_dest_params(dma_ch, dst_port,
936 OMAP_DMA_AMODE_POST_INC,
937 sg_dma_address(sg), 0, 0);
938 omap_set_dma_dest_data_pack(dma_ch, 1);
939 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
940 } else {
941 buf = 0x0f80 | ((frame - 1) << 0);
942
943 if (cpu_class_is_omap1()) {
944 src_port = OMAP_DMA_PORT_EMIFF;
945 dst_port = OMAP_DMA_PORT_TIPB;
946 }
947 if (cpu_is_omap24xx())
948 sync_dev = OMAP24XX_DMA_MMC1_TX;
949
950 omap_set_dma_dest_params(dma_ch, dst_port,
951 OMAP_DMA_AMODE_CONSTANT,
952 data_addr, 0, 0);
953 omap_set_dma_src_params(dma_ch, src_port,
954 OMAP_DMA_AMODE_POST_INC,
955 sg_dma_address(sg), 0, 0);
956 omap_set_dma_src_data_pack(dma_ch, 1);
957 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
958 }
959
960 /* Max limit for DMA frame count is 0xffff */
Eric Sesterhennd99c5902006-11-30 05:27:38 +0100961 BUG_ON(count > 0xffff);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100962
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +0100963 OMAP_MMC_WRITE(host, BUF, buf);
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100964 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
965 frame, count, OMAP_DMA_SYNC_FRAME,
966 sync_dev, 0);
967}
968
969/* A scatterlist segment completed */
970static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
971{
972 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
973 struct mmc_data *mmcdat = host->data;
974
975 if (unlikely(host->dma_ch < 0)) {
Tony Lindgrence9c1a82006-07-01 19:56:44 +0100976 dev_err(mmc_dev(host->mmc),
977 "DMA callback while DMA not enabled\n");
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100978 return;
979 }
980 /* FIXME: We really should do something to _handle_ the errors */
Tony Lindgren7ff879d2006-06-26 16:16:15 -0700981 if (ch_status & OMAP1_DMA_TOUT_IRQ) {
Carlos Aguiar730c9b72006-03-29 09:21:00 +0100982 dev_err(mmc_dev(host->mmc),"DMA timeout\n");
983 return;
984 }
985 if (ch_status & OMAP_DMA_DROP_IRQ) {
986 dev_err(mmc_dev(host->mmc), "DMA sync error\n");
987 return;
988 }
989 if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) {
990 return;
991 }
992 mmcdat->bytes_xfered += host->dma_len;
993 host->sg_idx++;
994 if (host->sg_idx < host->sg_len) {
995 mmc_omap_prepare_dma(host, host->data);
996 omap_start_dma(host->dma_ch);
997 } else
998 mmc_omap_dma_done(host, host->data);
999}
1000
1001static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data)
1002{
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001003 const char *dma_dev_name;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001004 int sync_dev, dma_ch, is_read, r;
1005
1006 is_read = !(data->flags & MMC_DATA_WRITE);
1007 del_timer_sync(&host->dma_timer);
1008 if (host->dma_ch >= 0) {
1009 if (is_read == host->dma_is_read)
1010 return 0;
1011 omap_free_dma(host->dma_ch);
1012 host->dma_ch = -1;
1013 }
1014
1015 if (is_read) {
Tony Lindgrend8874662008-12-10 17:37:16 -08001016 if (host->id == 0) {
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001017 sync_dev = OMAP_DMA_MMC_RX;
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001018 dma_dev_name = "MMC1 read";
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001019 } else {
1020 sync_dev = OMAP_DMA_MMC2_RX;
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001021 dma_dev_name = "MMC2 read";
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001022 }
1023 } else {
Tony Lindgrend8874662008-12-10 17:37:16 -08001024 if (host->id == 0) {
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001025 sync_dev = OMAP_DMA_MMC_TX;
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001026 dma_dev_name = "MMC1 write";
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001027 } else {
1028 sync_dev = OMAP_DMA_MMC2_TX;
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001029 dma_dev_name = "MMC2 write";
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001030 }
1031 }
Tony Lindgrendf48dd02008-05-06 16:36:47 -07001032 r = omap_request_dma(sync_dev, dma_dev_name, mmc_omap_dma_cb,
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001033 host, &dma_ch);
1034 if (r != 0) {
1035 dev_dbg(mmc_dev(host->mmc), "omap_request_dma() failed with %d\n", r);
1036 return r;
1037 }
1038 host->dma_ch = dma_ch;
1039 host->dma_is_read = is_read;
1040
1041 return 0;
1042}
1043
1044static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
1045{
1046 u16 reg;
1047
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001048 reg = OMAP_MMC_READ(host, SDIO);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001049 reg &= ~(1 << 5);
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001050 OMAP_MMC_WRITE(host, SDIO, reg);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001051 /* Set maximum timeout */
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001052 OMAP_MMC_WRITE(host, CTO, 0xff);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001053}
1054
1055static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
1056{
Juha Yrjolab8f9f0e2008-03-26 16:09:16 -04001057 unsigned int timeout, cycle_ns;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001058 u16 reg;
1059
Juha Yrjolab8f9f0e2008-03-26 16:09:16 -04001060 cycle_ns = 1000000000 / host->current_slot->fclk_freq;
1061 timeout = req->data->timeout_ns / cycle_ns;
1062 timeout += req->data->timeout_clks;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001063
1064 /* Check if we need to use timeout multiplier register */
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001065 reg = OMAP_MMC_READ(host, SDIO);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001066 if (timeout > 0xffff) {
1067 reg |= (1 << 5);
1068 timeout /= 1024;
1069 } else
1070 reg &= ~(1 << 5);
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001071 OMAP_MMC_WRITE(host, SDIO, reg);
1072 OMAP_MMC_WRITE(host, DTO, timeout);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001073}
1074
1075static void
1076mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
1077{
1078 struct mmc_data *data = req->data;
1079 int i, use_dma, block_size;
1080 unsigned sg_len;
1081
1082 host->data = data;
1083 if (data == NULL) {
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001084 OMAP_MMC_WRITE(host, BLEN, 0);
1085 OMAP_MMC_WRITE(host, NBLK, 0);
1086 OMAP_MMC_WRITE(host, BUF, 0);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001087 host->dma_in_use = 0;
1088 set_cmd_timeout(host, req);
1089 return;
1090 }
1091
Russell Kinga3fd4a12006-06-04 17:51:15 +01001092 block_size = data->blksz;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001093
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001094 OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
1095 OMAP_MMC_WRITE(host, BLEN, block_size - 1);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001096 set_data_timeout(host, req);
1097
1098 /* cope with calling layer confusion; it issues "single
1099 * block" writes using multi-block scatterlists.
1100 */
1101 sg_len = (data->blocks == 1) ? 1 : data->sg_len;
1102
1103 /* Only do DMA for entire blocks */
1104 use_dma = host->use_dma;
1105 if (use_dma) {
1106 for (i = 0; i < sg_len; i++) {
1107 if ((data->sg[i].length % block_size) != 0) {
1108 use_dma = 0;
1109 break;
1110 }
1111 }
1112 }
1113
1114 host->sg_idx = 0;
1115 if (use_dma) {
1116 if (mmc_omap_get_dma_channel(host, data) == 0) {
1117 enum dma_data_direction dma_data_dir;
1118
1119 if (data->flags & MMC_DATA_WRITE)
1120 dma_data_dir = DMA_TO_DEVICE;
1121 else
1122 dma_data_dir = DMA_FROM_DEVICE;
1123
1124 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
1125 sg_len, dma_data_dir);
1126 host->total_bytes_left = 0;
1127 mmc_omap_prepare_dma(host, req->data);
1128 host->brs_received = 0;
1129 host->dma_done = 0;
1130 host->dma_in_use = 1;
1131 } else
1132 use_dma = 0;
1133 }
1134
1135 /* Revert to PIO? */
1136 if (!use_dma) {
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001137 OMAP_MMC_WRITE(host, BUF, 0x1f1f);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001138 host->total_bytes_left = data->blocks * block_size;
1139 host->sg_len = sg_len;
1140 mmc_omap_sg_to_buf(host);
1141 host->dma_in_use = 0;
1142 }
1143}
1144
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001145static void mmc_omap_start_request(struct mmc_omap_host *host,
1146 struct mmc_request *req)
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001147{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001148 BUG_ON(host->mrq != NULL);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001149
1150 host->mrq = req;
1151
1152 /* only touch fifo AFTER the controller readies it */
1153 mmc_omap_prepare_data(host, req);
1154 mmc_omap_start_command(host, req->cmd);
1155 if (host->dma_in_use)
1156 omap_start_dma(host->dma_ch);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001157 BUG_ON(irqs_disabled());
1158}
1159
1160static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
1161{
1162 struct mmc_omap_slot *slot = mmc_priv(mmc);
1163 struct mmc_omap_host *host = slot->host;
1164 unsigned long flags;
1165
1166 spin_lock_irqsave(&host->slot_lock, flags);
1167 if (host->mmc != NULL) {
1168 BUG_ON(slot->mrq != NULL);
1169 slot->mrq = req;
1170 spin_unlock_irqrestore(&host->slot_lock, flags);
1171 return;
1172 } else
1173 host->mmc = mmc;
1174 spin_unlock_irqrestore(&host->slot_lock, flags);
1175 mmc_omap_select_slot(slot, 1);
1176 mmc_omap_start_request(host, req);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001177}
1178
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001179static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on,
1180 int vdd)
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001181{
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001182 struct mmc_omap_host *host;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001183
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001184 host = slot->host;
1185
1186 if (slot->pdata->set_power != NULL)
1187 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on,
1188 vdd);
1189
1190 if (cpu_is_omap24xx()) {
1191 u16 w;
1192
1193 if (power_on) {
1194 w = OMAP_MMC_READ(host, CON);
1195 OMAP_MMC_WRITE(host, CON, w | (1 << 11));
1196 } else {
1197 w = OMAP_MMC_READ(host, CON);
1198 OMAP_MMC_WRITE(host, CON, w & ~(1 << 11));
1199 }
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001200 }
1201}
1202
Tony Lindgrend3af5ab2007-05-01 16:36:00 +02001203static int mmc_omap_calc_divisor(struct mmc_host *mmc, struct mmc_ios *ios)
1204{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001205 struct mmc_omap_slot *slot = mmc_priv(mmc);
1206 struct mmc_omap_host *host = slot->host;
Tony Lindgrend3af5ab2007-05-01 16:36:00 +02001207 int func_clk_rate = clk_get_rate(host->fclk);
1208 int dsor;
1209
1210 if (ios->clock == 0)
1211 return 0;
1212
1213 dsor = func_clk_rate / ios->clock;
1214 if (dsor < 1)
1215 dsor = 1;
1216
1217 if (func_clk_rate / dsor > ios->clock)
1218 dsor++;
1219
1220 if (dsor > 250)
1221 dsor = 250;
Tony Lindgrend3af5ab2007-05-01 16:36:00 +02001222
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001223 slot->fclk_freq = func_clk_rate / dsor;
1224
Tony Lindgrend3af5ab2007-05-01 16:36:00 +02001225 if (ios->bus_width == MMC_BUS_WIDTH_4)
1226 dsor |= 1 << 15;
1227
1228 return dsor;
1229}
1230
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001231static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1232{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001233 struct mmc_omap_slot *slot = mmc_priv(mmc);
1234 struct mmc_omap_host *host = slot->host;
1235 int i, dsor;
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001236 int clk_enabled;
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001237
1238 mmc_omap_select_slot(slot, 0);
1239
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001240 dsor = mmc_omap_calc_divisor(mmc, ios);
1241
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001242 if (ios->vdd != slot->vdd)
1243 slot->vdd = ios->vdd;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001244
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001245 clk_enabled = 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001246 switch (ios->power_mode) {
1247 case MMC_POWER_OFF:
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001248 mmc_omap_set_power(slot, 0, ios->vdd);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001249 break;
1250 case MMC_POWER_UP:
Tony Lindgren46a67302007-05-01 16:34:16 +02001251 /* Cannot touch dsor yet, just power up MMC */
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001252 mmc_omap_set_power(slot, 1, ios->vdd);
1253 goto exit;
Tony Lindgren46a67302007-05-01 16:34:16 +02001254 case MMC_POWER_ON:
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001255 mmc_omap_fclk_enable(host, 1);
1256 clk_enabled = 1;
Juha Yrjola juha.yrjolac5cb4312006-11-11 23:42:39 +01001257 dsor |= 1 << 11;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001258 break;
1259 }
1260
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001261 if (slot->bus_mode != ios->bus_mode) {
1262 if (slot->pdata->set_bus_mode != NULL)
1263 slot->pdata->set_bus_mode(mmc_dev(mmc), slot->id,
1264 ios->bus_mode);
1265 slot->bus_mode = ios->bus_mode;
1266 }
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001267
1268 /* On insanely high arm_per frequencies something sometimes
1269 * goes somehow out of sync, and the POW bit is not being set,
1270 * which results in the while loop below getting stuck.
1271 * Writing to the CON register twice seems to do the trick. */
1272 for (i = 0; i < 2; i++)
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001273 OMAP_MMC_WRITE(host, CON, dsor);
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001274 slot->saved_con = dsor;
Tony Lindgren46a67302007-05-01 16:34:16 +02001275 if (ios->power_mode == MMC_POWER_ON) {
Jarkko Lavinen9d7c6ee2008-03-26 16:10:02 -04001276 /* worst case at 400kHz, 80 cycles makes 200 microsecs */
1277 int usecs = 250;
1278
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001279 /* Send clock cycles, poll completion */
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001280 OMAP_MMC_WRITE(host, IE, 0);
1281 OMAP_MMC_WRITE(host, STAT, 0xffff);
Juha Yrjola juha.yrjolac5cb4312006-11-11 23:42:39 +01001282 OMAP_MMC_WRITE(host, CMD, 1 << 7);
Jarkko Lavinen9d7c6ee2008-03-26 16:10:02 -04001283 while (usecs > 0 && (OMAP_MMC_READ(host, STAT) & 1) == 0) {
1284 udelay(1);
1285 usecs--;
1286 }
Juha Yrjola juha.yrjola3342ee82006-11-11 23:36:52 +01001287 OMAP_MMC_WRITE(host, STAT, 1);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001288 }
Juha Yrjola65b5b6e2008-03-26 16:09:22 -04001289
1290exit:
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001291 mmc_omap_release_slot(slot, clk_enabled);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001292}
1293
David Brownellab7aefd2006-11-12 17:55:30 -08001294static const struct mmc_host_ops mmc_omap_ops = {
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001295 .request = mmc_omap_request,
1296 .set_ios = mmc_omap_set_ios,
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001297};
1298
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001299static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id)
1300{
1301 struct mmc_omap_slot *slot = NULL;
1302 struct mmc_host *mmc;
1303 int r;
1304
1305 mmc = mmc_alloc_host(sizeof(struct mmc_omap_slot), host->dev);
1306 if (mmc == NULL)
1307 return -ENOMEM;
1308
1309 slot = mmc_priv(mmc);
1310 slot->host = host;
1311 slot->mmc = mmc;
1312 slot->id = id;
1313 slot->pdata = &host->pdata->slots[id];
1314
1315 host->slots[id] = slot;
1316
Pierre Ossman23af6032008-07-06 01:10:27 +02001317 mmc->caps = 0;
Tony Lindgren90c62bf2008-12-10 17:37:17 -08001318 if (host->pdata->slots[id].wires >= 4)
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001319 mmc->caps |= MMC_CAP_4_BIT_DATA;
1320
1321 mmc->ops = &mmc_omap_ops;
1322 mmc->f_min = 400000;
1323
1324 if (cpu_class_is_omap2())
1325 mmc->f_max = 48000000;
1326 else
1327 mmc->f_max = 24000000;
1328 if (host->pdata->max_freq)
1329 mmc->f_max = min(host->pdata->max_freq, mmc->f_max);
1330 mmc->ocr_avail = slot->pdata->ocr_mask;
1331
1332 /* Use scatterlist DMA to reduce per-transfer costs.
1333 * NOTE max_seg_size assumption that small blocks aren't
1334 * normally used (except e.g. for reading SD registers).
1335 */
1336 mmc->max_phys_segs = 32;
1337 mmc->max_hw_segs = 32;
1338 mmc->max_blk_size = 2048; /* BLEN is 11 bits (+1) */
1339 mmc->max_blk_count = 2048; /* NBLK is 11 bits (+1) */
1340 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1341 mmc->max_seg_size = mmc->max_req_size;
1342
1343 r = mmc_add_host(mmc);
1344 if (r < 0)
1345 goto err_remove_host;
1346
1347 if (slot->pdata->name != NULL) {
1348 r = device_create_file(&mmc->class_dev,
1349 &dev_attr_slot_name);
1350 if (r < 0)
1351 goto err_remove_host;
1352 }
1353
Juha Yrjola5a0f3f12008-03-26 16:09:08 -04001354 if (slot->pdata->get_cover_state != NULL) {
1355 r = device_create_file(&mmc->class_dev,
1356 &dev_attr_cover_switch);
1357 if (r < 0)
1358 goto err_remove_slot_name;
1359
Jarkko Lavinen7584d272008-03-26 16:09:42 -04001360 setup_timer(&slot->cover_timer, mmc_omap_cover_timer,
1361 (unsigned long)slot);
1362 tasklet_init(&slot->cover_tasklet, mmc_omap_cover_handler,
1363 (unsigned long)slot);
1364 tasklet_schedule(&slot->cover_tasklet);
Juha Yrjola5a0f3f12008-03-26 16:09:08 -04001365 }
1366
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001367 return 0;
1368
Juha Yrjola5a0f3f12008-03-26 16:09:08 -04001369err_remove_slot_name:
1370 if (slot->pdata->name != NULL)
1371 device_remove_file(&mmc->class_dev, &dev_attr_slot_name);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001372err_remove_host:
1373 mmc_remove_host(mmc);
1374 mmc_free_host(mmc);
1375 return r;
1376}
1377
1378static void mmc_omap_remove_slot(struct mmc_omap_slot *slot)
1379{
1380 struct mmc_host *mmc = slot->mmc;
1381
1382 if (slot->pdata->name != NULL)
1383 device_remove_file(&mmc->class_dev, &dev_attr_slot_name);
Juha Yrjola5a0f3f12008-03-26 16:09:08 -04001384 if (slot->pdata->get_cover_state != NULL)
1385 device_remove_file(&mmc->class_dev, &dev_attr_cover_switch);
1386
Jarkko Lavinen7584d272008-03-26 16:09:42 -04001387 tasklet_kill(&slot->cover_tasklet);
1388 del_timer_sync(&slot->cover_timer);
Juha Yrjola5a0f3f12008-03-26 16:09:08 -04001389 flush_scheduled_work();
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001390
1391 mmc_remove_host(mmc);
1392 mmc_free_host(mmc);
1393}
1394
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001395static int __init mmc_omap_probe(struct platform_device *pdev)
1396{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001397 struct omap_mmc_platform_data *pdata = pdev->dev.platform_data;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001398 struct mmc_omap_host *host = NULL;
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001399 struct resource *res;
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001400 int i, ret = 0;
Tony Lindgrence9c1a82006-07-01 19:56:44 +01001401 int irq;
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001402
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001403 if (pdata == NULL) {
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001404 dev_err(&pdev->dev, "platform data missing\n");
1405 return -ENXIO;
1406 }
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001407 if (pdata->nr_slots == 0) {
1408 dev_err(&pdev->dev, "no slots\n");
1409 return -ENXIO;
1410 }
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001411
1412 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Tony Lindgrence9c1a82006-07-01 19:56:44 +01001413 irq = platform_get_irq(pdev, 0);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001414 if (res == NULL || irq < 0)
Tony Lindgrence9c1a82006-07-01 19:56:44 +01001415 return -ENXIO;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001416
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001417 res = request_mem_region(res->start, res->end - res->start + 1,
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001418 pdev->name);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001419 if (res == NULL)
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001420 return -EBUSY;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001421
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001422 host = kzalloc(sizeof(struct mmc_omap_host), GFP_KERNEL);
1423 if (host == NULL) {
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001424 ret = -ENOMEM;
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001425 goto err_free_mem_region;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001426 }
1427
Jarkko Lavinen0f602ec2008-03-26 16:09:58 -04001428 INIT_WORK(&host->slot_release_work, mmc_omap_slot_release_work);
1429 INIT_WORK(&host->send_stop_work, mmc_omap_send_stop_work);
1430
Jarkko Lavinen0fb47232008-03-26 16:09:48 -04001431 INIT_WORK(&host->cmd_abort_work, mmc_omap_abort_command);
1432 setup_timer(&host->cmd_abort_timer, mmc_omap_cmd_timer,
1433 (unsigned long) host);
Jarkko Lavineneb1860b2008-03-26 16:09:29 -04001434
Jarkko Lavinen0807a9b2008-03-26 16:09:52 -04001435 spin_lock_init(&host->clk_lock);
1436 setup_timer(&host->clk_timer, mmc_omap_clk_timer, (unsigned long) host);
1437
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001438 spin_lock_init(&host->dma_lock);
Carlos Eduardo Aguiar01e77e12008-03-26 16:09:34 -04001439 setup_timer(&host->dma_timer, mmc_omap_dma_timer, (unsigned long) host);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001440 spin_lock_init(&host->slot_lock);
1441 init_waitqueue_head(&host->slot_wq);
1442
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001443 host->pdata = pdata;
1444 host->dev = &pdev->dev;
1445 platform_set_drvdata(pdev, host);
1446
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001447 host->id = pdev->id;
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001448 host->mem_res = res;
Tony Lindgrence9c1a82006-07-01 19:56:44 +01001449 host->irq = irq;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001450
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001451 host->use_dma = 1;
Tony Lindgrend8874662008-12-10 17:37:16 -08001452 host->dev->dma_mask = &pdata->dma_mask;
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001453 host->dma_ch = -1;
1454
1455 host->irq = irq;
1456 host->phys_base = host->mem_res->start;
Russell King55c381e2008-09-04 14:07:22 +01001457 host->virt_base = ioremap(res->start, res->end - res->start + 1);
1458 if (!host->virt_base)
1459 goto err_ioremap;
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001460
Russell Kingd4a36645a2009-01-23 19:03:37 +00001461 host->iclk = clk_get(&pdev->dev, "ick");
1462 if (IS_ERR(host->iclk))
1463 goto err_free_mmc_host;
1464 clk_enable(host->iclk);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001465
Russell King5c9e02b2009-01-19 20:53:30 +00001466 host->fclk = clk_get(&pdev->dev, "fck");
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001467 if (IS_ERR(host->fclk)) {
1468 ret = PTR_ERR(host->fclk);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001469 goto err_free_iclk;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001470 }
1471
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001472 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1473 if (ret)
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001474 goto err_free_fclk;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001475
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001476 if (pdata->init != NULL) {
1477 ret = pdata->init(&pdev->dev);
1478 if (ret < 0)
1479 goto err_free_irq;
1480 }
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001481
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001482 host->nr_slots = pdata->nr_slots;
1483 for (i = 0; i < pdata->nr_slots; i++) {
1484 ret = mmc_omap_new_slot(host, i);
1485 if (ret < 0) {
1486 while (--i >= 0)
1487 mmc_omap_remove_slot(host->slots[i]);
1488
1489 goto err_plat_cleanup;
1490 }
1491 }
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001492
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001493 return 0;
1494
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001495err_plat_cleanup:
1496 if (pdata->cleanup)
1497 pdata->cleanup(&pdev->dev);
1498err_free_irq:
1499 free_irq(host->irq, host);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001500err_free_fclk:
1501 clk_put(host->fclk);
1502err_free_iclk:
1503 if (host->iclk != NULL) {
1504 clk_disable(host->iclk);
1505 clk_put(host->iclk);
1506 }
1507err_free_mmc_host:
Russell King55c381e2008-09-04 14:07:22 +01001508 iounmap(host->virt_base);
1509err_ioremap:
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001510 kfree(host);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001511err_free_mem_region:
1512 release_mem_region(res->start, res->end - res->start + 1);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001513 return ret;
1514}
1515
1516static int mmc_omap_remove(struct platform_device *pdev)
1517{
1518 struct mmc_omap_host *host = platform_get_drvdata(pdev);
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001519 int i;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001520
1521 platform_set_drvdata(pdev, NULL);
1522
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001523 BUG_ON(host == NULL);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001524
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001525 for (i = 0; i < host->nr_slots; i++)
1526 mmc_omap_remove_slot(host->slots[i]);
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001527
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001528 if (host->pdata->cleanup)
1529 host->pdata->cleanup(&pdev->dev);
1530
Russell Kingd4a36645a2009-01-23 19:03:37 +00001531 mmc_omap_fclk_enable(host, 0);
1532 clk_put(host->fclk);
1533 clk_disable(host->iclk);
1534 clk_put(host->iclk);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001535
Russell King55c381e2008-09-04 14:07:22 +01001536 iounmap(host->virt_base);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001537 release_mem_region(pdev->resource[0].start,
Juha Yrjola juha.yrjola81ca7032006-11-11 23:39:20 +01001538 pdev->resource[0].end - pdev->resource[0].start + 1);
1539
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001540 kfree(host);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001541
1542 return 0;
1543}
1544
1545#ifdef CONFIG_PM
1546static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg)
1547{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001548 int i, ret = 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001549 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1550
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001551 if (host == NULL || host->suspended)
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001552 return 0;
1553
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001554 for (i = 0; i < host->nr_slots; i++) {
1555 struct mmc_omap_slot *slot;
1556
1557 slot = host->slots[i];
1558 ret = mmc_suspend_host(slot->mmc, mesg);
1559 if (ret < 0) {
1560 while (--i >= 0) {
1561 slot = host->slots[i];
1562 mmc_resume_host(slot->mmc);
1563 }
1564 return ret;
1565 }
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001566 }
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001567 host->suspended = 1;
1568 return 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001569}
1570
1571static int mmc_omap_resume(struct platform_device *pdev)
1572{
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001573 int i, ret = 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001574 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1575
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001576 if (host == NULL || !host->suspended)
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001577 return 0;
1578
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001579 for (i = 0; i < host->nr_slots; i++) {
1580 struct mmc_omap_slot *slot;
1581 slot = host->slots[i];
1582 ret = mmc_resume_host(slot->mmc);
1583 if (ret < 0)
1584 return ret;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001585
Juha Yrjolaabfbe5f2008-03-26 16:08:57 -04001586 host->suspended = 0;
1587 }
1588 return 0;
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001589}
1590#else
1591#define mmc_omap_suspend NULL
1592#define mmc_omap_resume NULL
1593#endif
1594
1595static struct platform_driver mmc_omap_driver = {
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001596 .remove = mmc_omap_remove,
1597 .suspend = mmc_omap_suspend,
1598 .resume = mmc_omap_resume,
1599 .driver = {
1600 .name = DRIVER_NAME,
Kay Sieversbc65c722008-04-15 14:34:28 -07001601 .owner = THIS_MODULE,
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001602 },
1603};
1604
1605static int __init mmc_omap_init(void)
1606{
Uwe Kleine-König7ceeb6a2009-04-02 19:47:41 +02001607 return platform_driver_probe(&mmc_omap_driver, mmc_omap_probe);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001608}
1609
1610static void __exit mmc_omap_exit(void)
1611{
1612 platform_driver_unregister(&mmc_omap_driver);
1613}
1614
1615module_init(mmc_omap_init);
1616module_exit(mmc_omap_exit);
1617
1618MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1619MODULE_LICENSE("GPL");
Kay Sieversbc65c722008-04-15 14:34:28 -07001620MODULE_ALIAS("platform:" DRIVER_NAME);
Carlos Aguiar730c9b72006-03-29 09:21:00 +01001621MODULE_AUTHOR("Juha Yrjölä");