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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _X8664_CACHEFLUSH_H
2#define _X8664_CACHEFLUSH_H
3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the intel. */
8#define flush_cache_all() do { } while (0)
9#define flush_cache_mm(mm) do { } while (0)
10#define flush_cache_range(vma, start, end) do { } while (0)
11#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
12#define flush_dcache_page(page) do { } while (0)
13#define flush_dcache_mmap_lock(mapping) do { } while (0)
14#define flush_dcache_mmap_unlock(mapping) do { } while (0)
15#define flush_icache_range(start, end) do { } while (0)
16#define flush_icache_page(vma,pg) do { } while (0)
17#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
18#define flush_cache_vmap(start, end) do { } while (0)
19#define flush_cache_vunmap(start, end) do { } while (0)
20
21#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
22 memcpy(dst, src, len)
23#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
24 memcpy(dst, src, len)
25
26void global_flush_tlb(void);
27int change_page_attr(struct page *page, int numpages, pgprot_t prot);
28int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot);
29
Arjan van de Ven67df1972006-01-06 00:12:04 -080030#ifdef CONFIG_DEBUG_RODATA
31void mark_rodata_ro(void);
32#endif
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#endif /* _X8664_CACHEFLUSH_H */