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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2440/mach-rx3715.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 *
3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.handhelds.org/projects/rx3715.html
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070012*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/tty.h>
21#include <linux/console.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010022#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/serial_core.h>
24#include <linux/serial.h>
25
Ben Dooks272eb572006-04-02 16:16:15 +010026#include <linux/mtd/mtd.h>
27#include <linux/mtd/nand.h>
28#include <linux/mtd/nand_ecc.h>
29#include <linux/mtd/partitions.h>
30
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
35#include <asm/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <asm/io.h>
37#include <asm/irq.h>
38#include <asm/mach-types.h>
39
40#include <asm/arch/regs-serial.h>
41#include <asm/arch/regs-gpio.h>
Ben Dookse838ffc2005-11-01 19:44:28 +000042#include <asm/arch/regs-lcd.h>
43
Ben Dooksbbf6f282006-12-07 20:47:58 +010044#include <asm/arch/h1940.h>
Ben Dooks272eb572006-04-02 16:16:15 +010045#include <asm/arch/nand.h>
Ben Dookse838ffc2005-11-01 19:44:28 +000046#include <asm/arch/fb.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047
Ben Dooksa21765a2007-02-11 18:31:01 +010048#include <asm/plat-s3c24xx/clock.h>
49#include <asm/plat-s3c24xx/devs.h>
50#include <asm/plat-s3c24xx/cpu.h>
51#include <asm/plat-s3c24xx/pm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
53static struct map_desc rx3715_iodesc[] __initdata = {
54 /* dump ISA space somewhere unused */
55
Ben Dooksff6ffa82005-11-09 14:05:31 +000056 {
57 .virtual = (u32)S3C24XX_VA_ISA_WORD,
58 .pfn = __phys_to_pfn(S3C2410_CS3),
59 .length = SZ_1M,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
63 .pfn = __phys_to_pfn(S3C2410_CS3),
64 .length = SZ_1M,
65 .type = MT_DEVICE,
66 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070067};
68
69
70static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
71 [0] = {
72 .name = "fclk",
73 .divisor = 0,
74 .min_baud = 0,
75 .max_baud = 0,
76 }
77};
78
79static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
80 [0] = {
81 .hwport = 0,
82 .flags = 0,
83 .ucon = 0x3c5,
84 .ulcon = 0x03,
85 .ufcon = 0x51,
86 .clocks = rx3715_serial_clocks,
87 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
88 },
89 [1] = {
90 .hwport = 1,
91 .flags = 0,
92 .ucon = 0x3c5,
93 .ulcon = 0x03,
94 .ufcon = 0x00,
95 .clocks = rx3715_serial_clocks,
96 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
97 },
98 /* IR port */
99 [2] = {
100 .hwport = 2,
101 .uart_flags = UPF_CONS_FLOW,
102 .ucon = 0x3c5,
103 .ulcon = 0x43,
104 .ufcon = 0x51,
105 .clocks = rx3715_serial_clocks,
106 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
107 }
108};
109
Ben Dookse838ffc2005-11-01 19:44:28 +0000110/* framebuffer lcd controller information */
111
112static struct s3c2410fb_mach_info rx3715_lcdcfg __initdata = {
113 .regs = {
114 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP | \
115 S3C2410_LCDCON1_TFT | \
116 S3C2410_LCDCON1_CLKVAL(0x0C),
117
118 .lcdcon2 = S3C2410_LCDCON2_VBPD(5) | \
119 S3C2410_LCDCON2_LINEVAL(319) | \
120 S3C2410_LCDCON2_VFPD(6) | \
121 S3C2410_LCDCON2_VSPW(2),
122
123 .lcdcon3 = S3C2410_LCDCON3_HBPD(35) | \
124 S3C2410_LCDCON3_HOZVAL(239) | \
125 S3C2410_LCDCON3_HFPD(35),
126
127 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) | \
128 S3C2410_LCDCON4_HSPW(7),
129
130 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
131 S3C2410_LCDCON5_FRM565 |
132 S3C2410_LCDCON5_HWSWP,
133 },
134
135 .lpcsel = 0xf82,
136
137 .gpccon = 0xaa955699,
138 .gpccon_mask = 0xffc003cc,
139 .gpcup = 0x0000ffff,
140 .gpcup_mask = 0xffffffff,
141
142 .gpdcon = 0xaa95aaa1,
143 .gpdcon_mask = 0xffc0fff0,
144 .gpdup = 0x0000faff,
145 .gpdup_mask = 0xffffffff,
146
147 .fixed_syncs = 1,
148 .width = 240,
149 .height = 320,
150
151 .xres = {
152 .min = 240,
153 .max = 240,
154 .defval = 240,
155 },
156
157 .yres = {
158 .max = 320,
159 .min = 320,
160 .defval = 320,
161 },
162
163 .bpp = {
164 .min = 16,
165 .max = 16,
166 .defval = 16,
167 },
168};
169
Ben Dooks272eb572006-04-02 16:16:15 +0100170static struct mtd_partition rx3715_nand_part[] = {
171 [0] = {
172 .name = "Whole Flash",
173 .offset = 0,
174 .size = MTDPART_SIZ_FULL,
175 .mask_flags = MTD_WRITEABLE,
176 }
177};
178
179static struct s3c2410_nand_set rx3715_nand_sets[] = {
180 [0] = {
181 .name = "Internal",
182 .nr_chips = 1,
183 .nr_partitions = ARRAY_SIZE(rx3715_nand_part),
184 .partitions = rx3715_nand_part,
185 },
186};
187
188static struct s3c2410_platform_nand rx3715_nand_info = {
189 .tacls = 25,
190 .twrph0 = 50,
191 .twrph1 = 15,
192 .nr_sets = ARRAY_SIZE(rx3715_nand_sets),
193 .sets = rx3715_nand_sets,
194};
195
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196static struct platform_device *rx3715_devices[] __initdata = {
197 &s3c_device_usb,
198 &s3c_device_lcd,
199 &s3c_device_wdt,
200 &s3c_device_i2c,
201 &s3c_device_iis,
Ben Dooks272eb572006-04-02 16:16:15 +0100202 &s3c_device_nand,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203};
204
Ben Dooks5fe10ab2005-09-20 17:24:33 +0100205static void __init rx3715_map_io(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206{
Ben Dooks272eb572006-04-02 16:16:15 +0100207 s3c_device_nand.dev.platform_data = &rx3715_nand_info;
208
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
210 s3c24xx_init_clocks(16934000);
211 s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212}
213
Ben Dooks5fe10ab2005-09-20 17:24:33 +0100214static void __init rx3715_init_irq(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215{
216 s3c24xx_init_irq();
217}
218
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219static void __init rx3715_init_machine(void)
220{
Krzysztof Heltb1dfe1f2007-03-19 15:10:20 +0100221#ifdef CONFIG_PM_H1940
Ben Dooksbbf6f282006-12-07 20:47:58 +0100222 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
Krzysztof Heltb1dfe1f2007-03-19 15:10:20 +0100223#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 s3c2410_pm_init();
Ben Dooksbbf6f282006-12-07 20:47:58 +0100225
Ben Dookse838ffc2005-11-01 19:44:28 +0000226 s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
Ben Dooks57e51712007-04-20 11:19:16 +0100227 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228}
Ben Dookse838ffc2005-11-01 19:44:28 +0000229
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230MACHINE_START(RX3715, "IPAQ-RX3715")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100231 /* Maintainer: Ben Dooks <ben@fluff.org> */
Russell Kinge9dea0c2005-07-03 17:38:58 +0100232 .phys_io = S3C2410_PA_UART,
233 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
234 .boot_params = S3C2410_SDRAM_PA + 0x100,
235 .map_io = rx3715_map_io,
236 .init_irq = rx3715_init_irq,
237 .init_machine = rx3715_init_machine,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 .timer = &s3c24xx_timer,
239MACHINE_END