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Darius Auguliseab5cfa2010-07-28 23:03:43 +03001/* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2 *
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/init.h>
Darius Augulisff266c02010-08-01 23:38:43 +030020#include <linux/dm9000.h>
Darius Auguliseab5cfa2010-07-28 23:03:43 +030021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <mach/map.h>
27#include <mach/s3c6410.h>
Darius Augulisff266c02010-08-01 23:38:43 +030028#include <mach/regs-srom.h>
Darius Auguliseab5cfa2010-07-28 23:03:43 +030029#include <plat/cpu.h>
Darius Augulisce611d72010-08-02 01:39:25 +030030#include <plat/devs.h>
Darius Auguliseab5cfa2010-07-28 23:03:43 +030031#include <plat/regs-serial.h>
32
33#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
34#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
35#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
36
37static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
38 [0] = {
39 .hwport = 0,
40 .flags = 0,
41 .ucon = UCON,
42 .ulcon = ULCON,
43 .ufcon = UFCON,
44 },
45 [1] = {
46 .hwport = 1,
47 .flags = 0,
48 .ucon = UCON,
49 .ulcon = ULCON,
50 .ufcon = UFCON,
51 },
52 [2] = {
53 .hwport = 2,
54 .flags = 0,
55 .ucon = UCON,
56 .ulcon = ULCON,
57 .ufcon = UFCON,
58 },
59 [3] = {
60 .hwport = 3,
61 .flags = 0,
62 .ucon = UCON,
63 .ulcon = ULCON,
64 .ufcon = UFCON,
65 },
66};
67
Darius Augulisff266c02010-08-01 23:38:43 +030068/* DM9000AEP 10/100 ethernet controller */
69
70static struct resource real6410_dm9k_resource[] = {
71 [0] = {
72 .start = S3C64XX_PA_XM0CSN1,
73 .end = S3C64XX_PA_XM0CSN1 + 1,
74 .flags = IORESOURCE_MEM
75 },
76 [1] = {
77 .start = S3C64XX_PA_XM0CSN1 + 4,
78 .end = S3C64XX_PA_XM0CSN1 + 5,
79 .flags = IORESOURCE_MEM
80 },
81 [2] = {
82 .start = S3C_EINT(7),
83 .end = S3C_EINT(7),
84 .flags = IORESOURCE_IRQ,
85 }
86};
87
88static struct dm9000_plat_data real6410_dm9k_pdata = {
89 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
90};
91
92static struct platform_device real6410_device_eth = {
93 .name = "dm9000",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
96 .resource = real6410_dm9k_resource,
97 .dev = {
98 .platform_data = &real6410_dm9k_pdata,
99 },
100};
101
102static struct platform_device *real6410_devices[] __initdata = {
103 &real6410_device_eth,
Darius Augulisce611d72010-08-02 01:39:25 +0300104 &s3c_device_hsmmc0,
105 &s3c_device_hsmmc1,
Darius Augulisff266c02010-08-01 23:38:43 +0300106};
107
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300108static void __init real6410_map_io(void)
109{
110 s3c64xx_init_io(NULL, 0);
111 s3c24xx_init_clocks(12000000);
112 s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
113}
114
115static void __init real6410_machine_init(void)
116{
Darius Augulisff266c02010-08-01 23:38:43 +0300117 u32 cs1;
118
119 /* configure nCS1 width to 16 bits */
120
121 cs1 = __raw_readl(S3C64XX_SROM_BW) &
122 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
123 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
124 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
125 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
126 S3C64XX_SROM_BW__NCS1__SHIFT;
127 __raw_writel(cs1, S3C64XX_SROM_BW);
128
129 /* set timing for nCS1 suitable for ethernet chip */
130
131 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
132 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
133 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
134 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
135 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
136 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
137 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
138
139 platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300140}
141
142MACHINE_START(REAL6410, "REAL6410")
143 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
144 .phys_io = S3C_PA_UART & 0xfff00000,
145 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
146 .boot_params = S3C64XX_PA_SDRAM + 0x100,
147
148 .init_irq = s3c6410_init_irq,
149 .map_io = real6410_map_io,
150 .init_machine = real6410_machine_init,
151 .timer = &s3c24xx_timer,
152MACHINE_END