Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2001-2002 by David Brownell |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 3 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the |
| 6 | * Free Software Foundation; either version 2 of the License, or (at your |
| 7 | * option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but |
| 10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 12 | * for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software Foundation, |
| 16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 17 | */ |
| 18 | |
| 19 | #ifndef __LINUX_EHCI_HCD_H |
| 20 | #define __LINUX_EHCI_HCD_H |
| 21 | |
| 22 | /* definitions used for the EHCI driver */ |
| 23 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 24 | /* |
| 25 | * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to |
| 26 | * __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN_DESC), depending on |
| 27 | * the host controller implementation. |
| 28 | * |
| 29 | * To facilitate the strongest possible byte-order checking from "sparse" |
| 30 | * and so on, we use __leXX unless that's not practical. |
| 31 | */ |
| 32 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC |
| 33 | typedef __u32 __bitwise __hc32; |
| 34 | typedef __u16 __bitwise __hc16; |
| 35 | #else |
| 36 | #define __hc32 __le32 |
| 37 | #define __hc16 __le16 |
| 38 | #endif |
| 39 | |
Anand Gadiyar | 411c940 | 2009-07-07 15:24:23 +0530 | [diff] [blame] | 40 | /* statistics can be kept for tuning/monitoring */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | struct ehci_stats { |
| 42 | /* irq usage */ |
| 43 | unsigned long normal; |
| 44 | unsigned long error; |
| 45 | unsigned long reclaim; |
| 46 | unsigned long lost_iaa; |
| 47 | |
| 48 | /* termination of urbs from core */ |
| 49 | unsigned long complete; |
| 50 | unsigned long unlink; |
| 51 | }; |
| 52 | |
| 53 | /* ehci_hcd->lock guards shared data against other CPUs: |
| 54 | * ehci_hcd: async, reclaim, periodic (and shadow), ... |
| 55 | * usb_host_endpoint: hcpriv |
| 56 | * ehci_qh: qh_next, qtd_list |
| 57 | * ehci_qtd: qtd_list |
| 58 | * |
| 59 | * Also, hold this lock when talking to HC registers or |
| 60 | * when updating hw_* fields in shared qh/qtd/... structures. |
| 61 | */ |
| 62 | |
| 63 | #define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */ |
| 64 | |
| 65 | struct ehci_hcd { /* one per controller */ |
David Brownell | 56c1e26 | 2005-04-09 09:00:29 -0700 | [diff] [blame] | 66 | /* glue to PCI and HCD framework */ |
| 67 | struct ehci_caps __iomem *caps; |
| 68 | struct ehci_regs __iomem *regs; |
| 69 | struct ehci_dbg_port __iomem *debug; |
| 70 | |
| 71 | __u32 hcs_params; /* cached register copy */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | spinlock_t lock; |
| 73 | |
| 74 | /* async schedule support */ |
| 75 | struct ehci_qh *async; |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 76 | struct ehci_qh *dummy; /* For AMD quirk use */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | struct ehci_qh *reclaim; |
Alan Stern | 22007e1 | 2011-07-05 12:34:05 -0400 | [diff] [blame] | 78 | struct ehci_qh *qh_scan_next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | unsigned scanning : 1; |
| 80 | |
| 81 | /* periodic schedule support */ |
| 82 | #define DEFAULT_I_TDPS 1024 /* some HCs can do less */ |
| 83 | unsigned periodic_size; |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 84 | __hc32 *periodic; /* hw periodic table */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | dma_addr_t periodic_dma; |
| 86 | unsigned i_thresh; /* uframes HC might cache */ |
| 87 | |
| 88 | union ehci_shadow *pshadow; /* mirror hw periodic table */ |
| 89 | int next_uframe; /* scan periodic, start here */ |
| 90 | unsigned periodic_sched; /* periodic activity count */ |
| 91 | |
Alan Stern | 0e5f231 | 2010-04-08 16:56:37 -0400 | [diff] [blame] | 92 | /* list of itds & sitds completed while clock_frame was still active */ |
Karsten Wiese | 9aa09d2 | 2009-02-08 16:07:58 -0800 | [diff] [blame] | 93 | struct list_head cached_itd_list; |
Alan Stern | 0e5f231 | 2010-04-08 16:56:37 -0400 | [diff] [blame] | 94 | struct list_head cached_sitd_list; |
Karsten Wiese | 9aa09d2 | 2009-02-08 16:07:58 -0800 | [diff] [blame] | 95 | unsigned clock_frame; |
| 96 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | /* per root hub port */ |
| 98 | unsigned long reset_done [EHCI_MAX_ROOT_PORTS]; |
Alan Stern | 383975d | 2007-05-04 11:52:40 -0400 | [diff] [blame] | 99 | |
Alan Stern | 57e06c1 | 2007-01-16 11:59:45 -0500 | [diff] [blame] | 100 | /* bit vectors (one bit per port) */ |
| 101 | unsigned long bus_suspended; /* which ports were |
| 102 | already suspended at the start of a bus suspend */ |
| 103 | unsigned long companion_ports; /* which ports are |
| 104 | dedicated to the companion controller */ |
Alan Stern | 383975d | 2007-05-04 11:52:40 -0400 | [diff] [blame] | 105 | unsigned long owned_ports; /* which ports are |
| 106 | owned by the companion during a bus suspend */ |
Alan Stern | d1f114d | 2008-05-20 16:58:58 -0400 | [diff] [blame] | 107 | unsigned long port_c_suspend; /* which ports have |
| 108 | the change-suspend feature turned on */ |
Alan Stern | eafe5b9 | 2008-10-06 11:25:53 -0400 | [diff] [blame] | 109 | unsigned long suspended_ports; /* which ports are |
| 110 | suspended */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
| 112 | /* per-HC memory pools (could be per-bus, but ...) */ |
| 113 | struct dma_pool *qh_pool; /* qh per active urb */ |
| 114 | struct dma_pool *qtd_pool; /* one or more per qh */ |
| 115 | struct dma_pool *itd_pool; /* itd per iso urb */ |
| 116 | struct dma_pool *sitd_pool; /* sitd per split iso urb */ |
| 117 | |
Alan Stern | 07d29b6 | 2007-12-11 16:05:30 -0500 | [diff] [blame] | 118 | struct timer_list iaa_watchdog; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | struct timer_list watchdog; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | unsigned long actions; |
Alan Stern | 1e12c91 | 2011-05-17 10:40:51 -0400 | [diff] [blame] | 121 | unsigned periodic_stamp; |
Alan Stern | 68335e8 | 2009-05-22 17:02:33 -0400 | [diff] [blame] | 122 | unsigned random_frame; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | unsigned long next_statechange; |
Oliver Neukum | ee4ecb8 | 2009-11-27 15:17:59 +0100 | [diff] [blame] | 124 | ktime_t last_periodic_enable; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | u32 command; |
| 126 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 127 | void (*start_hnp)(struct ehci_hcd *ehci); |
| 128 | |
Kumar Gala | 8cd42e9 | 2006-01-20 13:57:52 -0800 | [diff] [blame] | 129 | /* SILICON QUIRKS */ |
David Brownell | f8aeb3b | 2006-01-20 13:55:14 -0800 | [diff] [blame] | 130 | unsigned no_selective_suspend:1; |
Kumar Gala | 8cd42e9 | 2006-01-20 13:57:52 -0800 | [diff] [blame] | 131 | unsigned has_fsl_port_bug:1; /* FreeScale */ |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 132 | unsigned big_endian_mmio:1; |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 133 | unsigned big_endian_desc:1; |
Jan Andersson | c430131 | 2011-05-03 20:11:57 +0200 | [diff] [blame] | 134 | unsigned big_endian_capbase:1; |
Vitaly Bordug | 796bcae | 2008-11-09 19:43:30 +0100 | [diff] [blame] | 135 | unsigned has_amcc_usb23:1; |
Alek Du | 403dbd3 | 2009-07-13 17:30:41 +0800 | [diff] [blame] | 136 | unsigned need_io_watchdog:1; |
Oliver Neukum | ee4ecb8 | 2009-11-27 15:17:59 +0100 | [diff] [blame] | 137 | unsigned broken_periodic:1; |
Andiry Xu | ad93562 | 2011-03-01 14:57:05 +0800 | [diff] [blame] | 138 | unsigned amd_pll_fix:1; |
Alan Stern | ae68a83 | 2010-07-14 11:03:23 -0400 | [diff] [blame] | 139 | unsigned fs_i_thresh:1; /* Intel iso scheduling */ |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 140 | unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/ |
Gabor Juhos | 2f7ac6c | 2011-04-13 10:54:23 +0200 | [diff] [blame] | 141 | unsigned has_synopsys_hc_bug:1; /* Synopsys HC */ |
Vitaly Bordug | 796bcae | 2008-11-09 19:43:30 +0100 | [diff] [blame] | 142 | |
| 143 | /* required for usb32 quirk */ |
| 144 | #define OHCI_CTRL_HCFS (3 << 6) |
| 145 | #define OHCI_USB_OPER (2 << 6) |
| 146 | #define OHCI_USB_SUSPEND (3 << 6) |
| 147 | |
| 148 | #define OHCI_HCCTRL_OFFSET 0x4 |
| 149 | #define OHCI_HCCTRL_LEN 0x4 |
| 150 | __hc32 *ohci_hcctrl_reg; |
Alek Du | 331ac6b | 2009-07-13 12:41:20 +0800 | [diff] [blame] | 151 | unsigned has_hostpc:1; |
Alek Du | 48f2497 | 2010-06-04 15:47:55 +0800 | [diff] [blame] | 152 | unsigned has_lpm:1; /* support link power management */ |
Alek Du | 5a9cdf3 | 2010-06-04 15:47:56 +0800 | [diff] [blame] | 153 | unsigned has_ppcd:1; /* support per-port change bits */ |
David Brownell | f8aeb3b | 2006-01-20 13:55:14 -0800 | [diff] [blame] | 154 | u8 sbrn; /* packed release number */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | /* irq statistics */ |
| 157 | #ifdef EHCI_STATS |
| 158 | struct ehci_stats stats; |
| 159 | # define COUNT(x) do { (x)++; } while (0) |
| 160 | #else |
| 161 | # define COUNT(x) do {} while (0) |
| 162 | #endif |
Tony Jones | 694cc20 | 2007-09-11 14:07:31 -0700 | [diff] [blame] | 163 | |
| 164 | /* debug files */ |
| 165 | #ifdef DEBUG |
| 166 | struct dentry *debug_dir; |
Tony Jones | 694cc20 | 2007-09-11 14:07:31 -0700 | [diff] [blame] | 167 | #endif |
Anatolij Gustschin | 83722bc | 2011-04-18 22:02:00 +0200 | [diff] [blame] | 168 | /* |
| 169 | * OTG controllers and transceivers need software interaction |
| 170 | */ |
| 171 | struct otg_transceiver *transceiver; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | }; |
| 173 | |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 174 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd) |
| 176 | { |
| 177 | return (struct ehci_hcd *) (hcd->hcd_priv); |
| 178 | } |
| 179 | static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci) |
| 180 | { |
| 181 | return container_of ((void *) ehci, struct usb_hcd, hcd_priv); |
| 182 | } |
| 183 | |
| 184 | |
Alan Stern | 07d29b6 | 2007-12-11 16:05:30 -0500 | [diff] [blame] | 185 | static inline void |
| 186 | iaa_watchdog_start(struct ehci_hcd *ehci) |
| 187 | { |
| 188 | WARN_ON(timer_pending(&ehci->iaa_watchdog)); |
| 189 | mod_timer(&ehci->iaa_watchdog, |
| 190 | jiffies + msecs_to_jiffies(EHCI_IAA_MSECS)); |
| 191 | } |
| 192 | |
| 193 | static inline void iaa_watchdog_done(struct ehci_hcd *ehci) |
| 194 | { |
| 195 | del_timer(&ehci->iaa_watchdog); |
| 196 | } |
| 197 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | enum ehci_timer_action { |
| 199 | TIMER_IO_WATCHDOG, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | TIMER_ASYNC_SHRINK, |
| 201 | TIMER_ASYNC_OFF, |
| 202 | }; |
| 203 | |
| 204 | static inline void |
| 205 | timer_action_done (struct ehci_hcd *ehci, enum ehci_timer_action action) |
| 206 | { |
| 207 | clear_bit (action, &ehci->actions); |
| 208 | } |
| 209 | |
Alan Stern | 0e5f231 | 2010-04-08 16:56:37 -0400 | [diff] [blame] | 210 | static void free_cached_lists(struct ehci_hcd *ehci); |
Karsten Wiese | 9aa09d2 | 2009-02-08 16:07:58 -0800 | [diff] [blame] | 211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | /*-------------------------------------------------------------------------*/ |
| 213 | |
Yinghai Lu | 0af3673 | 2008-07-24 17:27:57 -0700 | [diff] [blame] | 214 | #include <linux/usb/ehci_def.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | |
| 216 | /*-------------------------------------------------------------------------*/ |
| 217 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 218 | #define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | |
| 220 | /* |
| 221 | * EHCI Specification 0.95 Section 3.5 |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 222 | * QTD: describe data transfer components (buffer, direction, ...) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". |
| 224 | * |
| 225 | * These are associated only with "QH" (Queue Head) structures, |
| 226 | * used with control, bulk, and interrupt transfers. |
| 227 | */ |
| 228 | struct ehci_qtd { |
| 229 | /* first part defined by EHCI spec */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 230 | __hc32 hw_next; /* see EHCI 3.5.1 */ |
| 231 | __hc32 hw_alt_next; /* see EHCI 3.5.2 */ |
| 232 | __hc32 hw_token; /* see EHCI 3.5.3 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | #define QTD_TOGGLE (1 << 31) /* data toggle */ |
| 234 | #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) |
| 235 | #define QTD_IOC (1 << 15) /* interrupt on complete */ |
| 236 | #define QTD_CERR(tok) (((tok)>>10) & 0x3) |
| 237 | #define QTD_PID(tok) (((tok)>>8) & 0x3) |
| 238 | #define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */ |
| 239 | #define QTD_STS_HALT (1 << 6) /* halted on error */ |
| 240 | #define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */ |
| 241 | #define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */ |
| 242 | #define QTD_STS_XACT (1 << 3) /* device gave illegal response */ |
| 243 | #define QTD_STS_MMF (1 << 2) /* incomplete split transaction */ |
| 244 | #define QTD_STS_STS (1 << 1) /* split transaction state */ |
| 245 | #define QTD_STS_PING (1 << 0) /* issue PING? */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 246 | |
| 247 | #define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE) |
| 248 | #define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) |
| 249 | #define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) |
| 250 | |
| 251 | __hc32 hw_buf [5]; /* see EHCI 3.5.4 */ |
| 252 | __hc32 hw_buf_hi [5]; /* Appendix B */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | |
| 254 | /* the rest is HCD-private */ |
| 255 | dma_addr_t qtd_dma; /* qtd address */ |
| 256 | struct list_head qtd_list; /* sw qtd list */ |
| 257 | struct urb *urb; /* qtd's urb */ |
| 258 | size_t length; /* length of buffer */ |
| 259 | } __attribute__ ((aligned (32))); |
| 260 | |
| 261 | /* mask NakCnt+T in qh->hw_alt_next */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 262 | #define QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | |
| 264 | #define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) |
| 265 | |
| 266 | /*-------------------------------------------------------------------------*/ |
| 267 | |
| 268 | /* type tag from {qh,itd,sitd,fstn}->hw_next */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 269 | #define Q_NEXT_TYPE(ehci,dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 271 | /* |
| 272 | * Now the following defines are not converted using the |
Harvey Harrison | 551509d | 2009-02-11 14:11:36 -0800 | [diff] [blame] | 273 | * cpu_to_le32() macro anymore, since we have to support |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 274 | * "dynamic" switching between be and le support, so that the driver |
| 275 | * can be used on one system with SoC EHCI controller using big-endian |
| 276 | * descriptors as well as a normal little-endian PCI EHCI controller. |
| 277 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | /* values for that type tag */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 279 | #define Q_TYPE_ITD (0 << 1) |
| 280 | #define Q_TYPE_QH (1 << 1) |
| 281 | #define Q_TYPE_SITD (2 << 1) |
| 282 | #define Q_TYPE_FSTN (3 << 1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | |
| 284 | /* next async queue entry, or pointer to interrupt/periodic QH */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 285 | #define QH_NEXT(ehci,dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | |
| 287 | /* for periodic/async schedules and qtd lists, mark end of list */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 288 | #define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | |
| 290 | /* |
| 291 | * Entries in periodic shadow table are pointers to one of four kinds |
| 292 | * of data structure. That's dictated by the hardware; a type tag is |
| 293 | * encoded in the low bits of the hardware's periodic schedule. Use |
| 294 | * Q_NEXT_TYPE to get the tag. |
| 295 | * |
| 296 | * For entries in the async schedule, the type tag always says "qh". |
| 297 | */ |
| 298 | union ehci_shadow { |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 299 | struct ehci_qh *qh; /* Q_TYPE_QH */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | struct ehci_itd *itd; /* Q_TYPE_ITD */ |
| 301 | struct ehci_sitd *sitd; /* Q_TYPE_SITD */ |
| 302 | struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 303 | __hc32 *hw_next; /* (all types) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | void *ptr; |
| 305 | }; |
| 306 | |
| 307 | /*-------------------------------------------------------------------------*/ |
| 308 | |
| 309 | /* |
| 310 | * EHCI Specification 0.95 Section 3.6 |
| 311 | * QH: describes control/bulk/interrupt endpoints |
| 312 | * See Fig 3-7 "Queue Head Structure Layout". |
| 313 | * |
| 314 | * These appear in both the async and (for interrupt) periodic schedules. |
| 315 | */ |
| 316 | |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 317 | /* first part defined by EHCI spec */ |
| 318 | struct ehci_qh_hw { |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 319 | __hc32 hw_next; /* see EHCI 3.6.1 */ |
| 320 | __hc32 hw_info1; /* see EHCI 3.6.2 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | #define QH_HEAD 0x00008000 |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 322 | __hc32 hw_info2; /* see EHCI 3.6.2 */ |
David Brownell | 7dedacf | 2005-08-04 18:06:41 -0700 | [diff] [blame] | 323 | #define QH_SMASK 0x000000ff |
| 324 | #define QH_CMASK 0x0000ff00 |
| 325 | #define QH_HUBADDR 0x007f0000 |
| 326 | #define QH_HUBPORT 0x3f800000 |
| 327 | #define QH_MULT 0xc0000000 |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 328 | __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */ |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 329 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | /* qtd overlay (hardware parts of a struct ehci_qtd) */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 331 | __hc32 hw_qtd_next; |
| 332 | __hc32 hw_alt_next; |
| 333 | __hc32 hw_token; |
| 334 | __hc32 hw_buf [5]; |
| 335 | __hc32 hw_buf_hi [5]; |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 336 | } __attribute__ ((aligned(32))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 338 | struct ehci_qh { |
| 339 | struct ehci_qh_hw *hw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | /* the rest is HCD-private */ |
| 341 | dma_addr_t qh_dma; /* address of qh */ |
| 342 | union ehci_shadow qh_next; /* ptr to qh; or periodic */ |
| 343 | struct list_head qtd_list; /* sw qtd list */ |
| 344 | struct ehci_qtd *dummy; |
| 345 | struct ehci_qh *reclaim; /* next to reclaim */ |
| 346 | |
| 347 | struct ehci_hcd *ehci; |
Alan Stern | 22007e1 | 2011-07-05 12:34:05 -0400 | [diff] [blame] | 348 | unsigned long unlink_time; |
David Brownell | 9c033e8 | 2007-05-17 12:21:19 -0700 | [diff] [blame] | 349 | |
| 350 | /* |
| 351 | * Do NOT use atomic operations for QH refcounting. On some CPUs |
| 352 | * (PPC7448 for example), atomic operations cannot be performed on |
| 353 | * memory that is cache-inhibited (i.e. being used for DMA). |
| 354 | * Spinlocks are used to protect all QH fields. |
| 355 | */ |
| 356 | u32 refcount; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | unsigned stamp; |
| 358 | |
Alan Stern | 3a44494 | 2009-08-19 12:22:06 -0400 | [diff] [blame] | 359 | u8 needs_rescan; /* Dequeue during giveback */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | u8 qh_state; |
| 361 | #define QH_STATE_LINKED 1 /* HC sees this */ |
| 362 | #define QH_STATE_UNLINK 2 /* HC may still see this */ |
| 363 | #define QH_STATE_IDLE 3 /* HC doesn't see this */ |
| 364 | #define QH_STATE_UNLINK_WAIT 4 /* LINKED and on reclaim q */ |
| 365 | #define QH_STATE_COMPLETING 5 /* don't touch token.HALT */ |
| 366 | |
Alan Stern | a2c2706 | 2009-02-10 10:16:58 -0500 | [diff] [blame] | 367 | u8 xacterrs; /* XactErr retry counter */ |
| 368 | #define QH_XACTERR_MAX 32 /* XactErr retry limit */ |
| 369 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | /* periodic schedule info */ |
| 371 | u8 usecs; /* intr bandwidth */ |
| 372 | u8 gap_uf; /* uframes split/csplit gap */ |
| 373 | u8 c_usecs; /* ... split completion bw */ |
david-b@pacbell.net | d038420 | 2005-08-13 18:44:58 -0700 | [diff] [blame] | 374 | u16 tt_usecs; /* tt downstream bandwidth */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | unsigned short period; /* polling interval */ |
| 376 | unsigned short start; /* where polling starts */ |
| 377 | #define NO_FRAME ((unsigned short)~0) /* pick new start */ |
Alan Stern | 914b701 | 2009-06-29 10:47:30 -0400 | [diff] [blame] | 378 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | struct usb_device *dev; /* access to TT */ |
Alan Stern | d10a6cb | 2011-07-19 14:01:23 -0400 | [diff] [blame] | 380 | unsigned is_out:1; /* bulk or intr OUT */ |
Alan Stern | 914b701 | 2009-06-29 10:47:30 -0400 | [diff] [blame] | 381 | unsigned clearing_tt:1; /* Clear-TT-Buf in progress */ |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 382 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | |
| 384 | /*-------------------------------------------------------------------------*/ |
| 385 | |
| 386 | /* description of one iso transaction (up to 3 KB data if highspeed) */ |
| 387 | struct ehci_iso_packet { |
| 388 | /* These will be copied to iTD when scheduling */ |
| 389 | u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 390 | __hc32 transaction; /* itd->hw_transaction[i] |= */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | u8 cross; /* buf crosses pages */ |
| 392 | /* for full speed OUT splits */ |
| 393 | u32 buf1; |
| 394 | }; |
| 395 | |
| 396 | /* temporary schedule data for packets from iso urbs (both speeds) |
| 397 | * each packet is one logical usb transaction to the device (not TT), |
| 398 | * beginning at stream->next_uframe |
| 399 | */ |
| 400 | struct ehci_iso_sched { |
| 401 | struct list_head td_list; |
| 402 | unsigned span; |
| 403 | struct ehci_iso_packet packet [0]; |
| 404 | }; |
| 405 | |
| 406 | /* |
| 407 | * ehci_iso_stream - groups all (s)itds for this endpoint. |
| 408 | * acts like a qh would, if EHCI had them for ISO. |
| 409 | */ |
| 410 | struct ehci_iso_stream { |
Clemens Ladisch | 1082f57 | 2010-03-01 17:18:56 +0100 | [diff] [blame] | 411 | /* first field matches ehci_hq, but is NULL */ |
| 412 | struct ehci_qh_hw *hw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | |
| 414 | u32 refcount; |
| 415 | u8 bEndpointAddress; |
| 416 | u8 highspeed; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | struct list_head td_list; /* queued itds/sitds */ |
| 418 | struct list_head free_list; /* list of unused itds/sitds */ |
| 419 | struct usb_device *udev; |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 420 | struct usb_host_endpoint *ep; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | |
| 422 | /* output of (re)scheduling */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | int next_uframe; |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 424 | __hc32 splits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | |
| 426 | /* the rest is derived from the endpoint descriptor, |
| 427 | * trusting urb->interval == f(epdesc->bInterval) and |
| 428 | * including the extra info for hw_bufp[0..2] |
| 429 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | u8 usecs, c_usecs; |
David Brownell | c06d4dc | 2008-01-24 12:30:34 -0800 | [diff] [blame] | 431 | u16 interval; |
david-b@pacbell.net | d038420 | 2005-08-13 18:44:58 -0700 | [diff] [blame] | 432 | u16 tt_usecs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | u16 maxp; |
| 434 | u16 raw_mask; |
| 435 | unsigned bandwidth; |
| 436 | |
| 437 | /* This is used to initialize iTD's hw_bufp fields */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 438 | __hc32 buf0; |
| 439 | __hc32 buf1; |
| 440 | __hc32 buf2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | |
| 442 | /* this is used to initialize sITD's tt info */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 443 | __hc32 address; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | }; |
| 445 | |
| 446 | /*-------------------------------------------------------------------------*/ |
| 447 | |
| 448 | /* |
| 449 | * EHCI Specification 0.95 Section 3.3 |
| 450 | * Fig 3-4 "Isochronous Transaction Descriptor (iTD)" |
| 451 | * |
| 452 | * Schedule records for high speed iso xfers |
| 453 | */ |
| 454 | struct ehci_itd { |
| 455 | /* first part defined by EHCI spec */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 456 | __hc32 hw_next; /* see EHCI 3.3.1 */ |
| 457 | __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | #define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ |
| 459 | #define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ |
| 460 | #define EHCI_ISOC_BABBLE (1<<29) /* babble detected */ |
| 461 | #define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */ |
| 462 | #define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) |
| 463 | #define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */ |
| 464 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 465 | #define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 466 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 467 | __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */ |
| 468 | __hc32 hw_bufp_hi [7]; /* Appendix B */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | |
| 470 | /* the rest is HCD-private */ |
| 471 | dma_addr_t itd_dma; /* for this itd */ |
| 472 | union ehci_shadow itd_next; /* ptr to periodic q entry */ |
| 473 | |
| 474 | struct urb *urb; |
| 475 | struct ehci_iso_stream *stream; /* endpoint's queue */ |
| 476 | struct list_head itd_list; /* list of stream's itds */ |
| 477 | |
| 478 | /* any/all hw_transactions here may be used by that urb */ |
| 479 | unsigned frame; /* where scheduled */ |
| 480 | unsigned pg; |
| 481 | unsigned index[8]; /* in urb->iso_frame_desc */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | } __attribute__ ((aligned (32))); |
| 483 | |
| 484 | /*-------------------------------------------------------------------------*/ |
| 485 | |
| 486 | /* |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 487 | * EHCI Specification 0.95 Section 3.4 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | * siTD, aka split-transaction isochronous Transfer Descriptor |
| 489 | * ... describe full speed iso xfers through TT in hubs |
| 490 | * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD) |
| 491 | */ |
| 492 | struct ehci_sitd { |
| 493 | /* first part defined by EHCI spec */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 494 | __hc32 hw_next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | /* uses bit field macros above - see EHCI 0.95 Table 3-8 */ |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 496 | __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */ |
| 497 | __hc32 hw_uframe; /* EHCI table 3-10 */ |
| 498 | __hc32 hw_results; /* EHCI table 3-11 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | #define SITD_IOC (1 << 31) /* interrupt on completion */ |
| 500 | #define SITD_PAGE (1 << 30) /* buffer 0/1 */ |
| 501 | #define SITD_LENGTH(x) (0x3ff & ((x)>>16)) |
| 502 | #define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */ |
| 503 | #define SITD_STS_ERR (1 << 6) /* error from TT */ |
| 504 | #define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */ |
| 505 | #define SITD_STS_BABBLE (1 << 4) /* device was babbling */ |
| 506 | #define SITD_STS_XACT (1 << 3) /* illegal IN response */ |
| 507 | #define SITD_STS_MMF (1 << 2) /* incomplete split transaction */ |
| 508 | #define SITD_STS_STS (1 << 1) /* split transaction state */ |
| 509 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 510 | #define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 512 | __hc32 hw_buf [2]; /* EHCI table 3-12 */ |
| 513 | __hc32 hw_backpointer; /* EHCI table 3-13 */ |
| 514 | __hc32 hw_buf_hi [2]; /* Appendix B */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | |
| 516 | /* the rest is HCD-private */ |
| 517 | dma_addr_t sitd_dma; |
| 518 | union ehci_shadow sitd_next; /* ptr to periodic q entry */ |
| 519 | |
| 520 | struct urb *urb; |
| 521 | struct ehci_iso_stream *stream; /* endpoint's queue */ |
| 522 | struct list_head sitd_list; /* list of stream's sitds */ |
| 523 | unsigned frame; |
| 524 | unsigned index; |
| 525 | } __attribute__ ((aligned (32))); |
| 526 | |
| 527 | /*-------------------------------------------------------------------------*/ |
| 528 | |
| 529 | /* |
| 530 | * EHCI Specification 0.96 Section 3.7 |
| 531 | * Periodic Frame Span Traversal Node (FSTN) |
| 532 | * |
| 533 | * Manages split interrupt transactions (using TT) that span frame boundaries |
| 534 | * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN |
| 535 | * makes the HC jump (back) to a QH to scan for fs/ls QH completions until |
| 536 | * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. |
| 537 | */ |
| 538 | struct ehci_fstn { |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 539 | __hc32 hw_next; /* any periodic q entry */ |
| 540 | __hc32 hw_prev; /* qh or EHCI_LIST_END */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 541 | |
| 542 | /* the rest is HCD-private */ |
| 543 | dma_addr_t fstn_dma; |
| 544 | union ehci_shadow fstn_next; /* ptr to periodic q entry */ |
| 545 | } __attribute__ ((aligned (32))); |
| 546 | |
| 547 | /*-------------------------------------------------------------------------*/ |
| 548 | |
Alan Stern | 16032c4 | 2010-05-12 18:21:35 -0400 | [diff] [blame] | 549 | /* Prepare the PORTSC wakeup flags during controller suspend/resume */ |
| 550 | |
Alan Stern | 4147200 | 2010-06-25 14:02:14 -0400 | [diff] [blame] | 551 | #define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \ |
| 552 | ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup); |
Alan Stern | 16032c4 | 2010-05-12 18:21:35 -0400 | [diff] [blame] | 553 | |
Alan Stern | 4147200 | 2010-06-25 14:02:14 -0400 | [diff] [blame] | 554 | #define ehci_prepare_ports_for_controller_resume(ehci) \ |
| 555 | ehci_adjust_port_wakeup_flags(ehci, false, false); |
Alan Stern | 16032c4 | 2010-05-12 18:21:35 -0400 | [diff] [blame] | 556 | |
| 557 | /*-------------------------------------------------------------------------*/ |
| 558 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | #ifdef CONFIG_USB_EHCI_ROOT_HUB_TT |
| 560 | |
| 561 | /* |
| 562 | * Some EHCI controllers have a Transaction Translator built into the |
| 563 | * root hub. This is a non-standard feature. Each controller will need |
| 564 | * to add code to the following inline functions, and call them as |
| 565 | * needed (mostly in root hub code). |
| 566 | */ |
| 567 | |
Alan Stern | a8e5177 | 2008-05-20 16:58:11 -0400 | [diff] [blame] | 568 | #define ehci_is_TDI(e) (ehci_to_hcd(e)->has_tt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | |
| 570 | /* Returns the speed of a device attached to a port on the root hub. */ |
| 571 | static inline unsigned int |
| 572 | ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) |
| 573 | { |
| 574 | if (ehci_is_TDI(ehci)) { |
Alek Du | 331ac6b | 2009-07-13 12:41:20 +0800 | [diff] [blame] | 575 | switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | case 0: |
| 577 | return 0; |
| 578 | case 1: |
Alan Stern | 288ead4 | 2010-03-04 11:32:30 -0500 | [diff] [blame] | 579 | return USB_PORT_STAT_LOW_SPEED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | case 2: |
| 581 | default: |
Alan Stern | 288ead4 | 2010-03-04 11:32:30 -0500 | [diff] [blame] | 582 | return USB_PORT_STAT_HIGH_SPEED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | } |
| 584 | } |
Alan Stern | 288ead4 | 2010-03-04 11:32:30 -0500 | [diff] [blame] | 585 | return USB_PORT_STAT_HIGH_SPEED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | } |
| 587 | |
| 588 | #else |
| 589 | |
| 590 | #define ehci_is_TDI(e) (0) |
| 591 | |
Alan Stern | 288ead4 | 2010-03-04 11:32:30 -0500 | [diff] [blame] | 592 | #define ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | #endif |
| 594 | |
| 595 | /*-------------------------------------------------------------------------*/ |
| 596 | |
Kumar Gala | 8cd42e9 | 2006-01-20 13:57:52 -0800 | [diff] [blame] | 597 | #ifdef CONFIG_PPC_83xx |
| 598 | /* Some Freescale processors have an erratum in which the TT |
| 599 | * port number in the queue head was 0..N-1 instead of 1..N. |
| 600 | */ |
| 601 | #define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug) |
| 602 | #else |
| 603 | #define ehci_has_fsl_portno_bug(e) (0) |
| 604 | #endif |
| 605 | |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 606 | /* |
| 607 | * While most USB host controllers implement their registers in |
| 608 | * little-endian format, a minority (celleb companion chip) implement |
| 609 | * them in big endian format. |
| 610 | * |
| 611 | * This attempts to support either format at compile time without a |
| 612 | * runtime penalty, or both formats with the additional overhead |
| 613 | * of checking a flag bit. |
Jan Andersson | c430131 | 2011-05-03 20:11:57 +0200 | [diff] [blame] | 614 | * |
| 615 | * ehci_big_endian_capbase is a special quirk for controllers that |
| 616 | * implement the HC capability registers as separate registers and not |
| 617 | * as fields of a 32-bit register. |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 618 | */ |
| 619 | |
| 620 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO |
| 621 | #define ehci_big_endian_mmio(e) ((e)->big_endian_mmio) |
Jan Andersson | c430131 | 2011-05-03 20:11:57 +0200 | [diff] [blame] | 622 | #define ehci_big_endian_capbase(e) ((e)->big_endian_capbase) |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 623 | #else |
| 624 | #define ehci_big_endian_mmio(e) 0 |
Jan Andersson | c430131 | 2011-05-03 20:11:57 +0200 | [diff] [blame] | 625 | #define ehci_big_endian_capbase(e) 0 |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 626 | #endif |
| 627 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 628 | /* |
| 629 | * Big-endian read/write functions are arch-specific. |
| 630 | * Other arches can be added if/when they're needed. |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 631 | */ |
Vladimir Barinov | 91bc4d3 | 2007-12-30 15:21:11 -0800 | [diff] [blame] | 632 | #if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX) |
| 633 | #define readl_be(addr) __raw_readl((__force unsigned *)addr) |
| 634 | #define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) |
| 635 | #endif |
| 636 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 637 | static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, |
| 638 | __u32 __iomem * regs) |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 639 | { |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 640 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 641 | return ehci_big_endian_mmio(ehci) ? |
Al Viro | 68f50e5 | 2007-02-09 16:40:00 +0000 | [diff] [blame] | 642 | readl_be(regs) : |
| 643 | readl(regs); |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 644 | #else |
Al Viro | 68f50e5 | 2007-02-09 16:40:00 +0000 | [diff] [blame] | 645 | return readl(regs); |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 646 | #endif |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 647 | } |
| 648 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 649 | static inline void ehci_writel(const struct ehci_hcd *ehci, |
| 650 | const unsigned int val, __u32 __iomem *regs) |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 651 | { |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 652 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 653 | ehci_big_endian_mmio(ehci) ? |
Al Viro | 68f50e5 | 2007-02-09 16:40:00 +0000 | [diff] [blame] | 654 | writel_be(val, regs) : |
| 655 | writel(val, regs); |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 656 | #else |
Al Viro | 68f50e5 | 2007-02-09 16:40:00 +0000 | [diff] [blame] | 657 | writel(val, regs); |
Benjamin Herrenschmidt | d728e32 | 2006-12-28 15:27:27 +1100 | [diff] [blame] | 658 | #endif |
Benjamin Herrenschmidt | 083522d | 2006-12-15 06:54:08 +1100 | [diff] [blame] | 659 | } |
Kumar Gala | 8cd42e9 | 2006-01-20 13:57:52 -0800 | [diff] [blame] | 660 | |
Vitaly Bordug | 796bcae | 2008-11-09 19:43:30 +0100 | [diff] [blame] | 661 | /* |
| 662 | * On certain ppc-44x SoC there is a HW issue, that could only worked around with |
| 663 | * explicit suspend/operate of OHCI. This function hereby makes sense only on that arch. |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 664 | * Other common bits are dependent on has_amcc_usb23 quirk flag. |
Vitaly Bordug | 796bcae | 2008-11-09 19:43:30 +0100 | [diff] [blame] | 665 | */ |
| 666 | #ifdef CONFIG_44x |
| 667 | static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) |
| 668 | { |
| 669 | u32 hc_control; |
| 670 | |
| 671 | hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS); |
| 672 | if (operational) |
| 673 | hc_control |= OHCI_USB_OPER; |
| 674 | else |
| 675 | hc_control |= OHCI_USB_SUSPEND; |
| 676 | |
| 677 | writel_be(hc_control, ehci->ohci_hcctrl_reg); |
| 678 | (void) readl_be(ehci->ohci_hcctrl_reg); |
| 679 | } |
| 680 | #else |
| 681 | static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) |
| 682 | { } |
| 683 | #endif |
| 684 | |
Kumar Gala | 8cd42e9 | 2006-01-20 13:57:52 -0800 | [diff] [blame] | 685 | /*-------------------------------------------------------------------------*/ |
| 686 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 687 | /* |
| 688 | * The AMCC 440EPx not only implements its EHCI registers in big-endian |
| 689 | * format, but also its DMA data structures (descriptors). |
| 690 | * |
| 691 | * EHCI controllers accessed through PCI work normally (little-endian |
| 692 | * everywhere), so we won't bother supporting a BE-only mode for now. |
| 693 | */ |
| 694 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC |
| 695 | #define ehci_big_endian_desc(e) ((e)->big_endian_desc) |
| 696 | |
| 697 | /* cpu to ehci */ |
| 698 | static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) |
| 699 | { |
| 700 | return ehci_big_endian_desc(ehci) |
| 701 | ? (__force __hc32)cpu_to_be32(x) |
| 702 | : (__force __hc32)cpu_to_le32(x); |
| 703 | } |
| 704 | |
| 705 | /* ehci to cpu */ |
| 706 | static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) |
| 707 | { |
| 708 | return ehci_big_endian_desc(ehci) |
| 709 | ? be32_to_cpu((__force __be32)x) |
| 710 | : le32_to_cpu((__force __le32)x); |
| 711 | } |
| 712 | |
| 713 | static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) |
| 714 | { |
| 715 | return ehci_big_endian_desc(ehci) |
| 716 | ? be32_to_cpup((__force __be32 *)x) |
| 717 | : le32_to_cpup((__force __le32 *)x); |
| 718 | } |
| 719 | |
| 720 | #else |
| 721 | |
| 722 | /* cpu to ehci */ |
| 723 | static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) |
| 724 | { |
| 725 | return cpu_to_le32(x); |
| 726 | } |
| 727 | |
| 728 | /* ehci to cpu */ |
| 729 | static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) |
| 730 | { |
| 731 | return le32_to_cpu(x); |
| 732 | } |
| 733 | |
| 734 | static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) |
| 735 | { |
| 736 | return le32_to_cpup(x); |
| 737 | } |
| 738 | |
| 739 | #endif |
| 740 | |
Ming Lei | 95cf7a1 | 2011-08-30 16:03:13 +0000 | [diff] [blame] | 741 | /* |
| 742 | * Writing to dma coherent memory on ARM may be delayed via L2 |
| 743 | * writing buffer, so introduce the helper which can flush L2 writing |
| 744 | * buffer into memory immediately, especially used to flush ehci |
| 745 | * descriptor to memory. |
| 746 | * */ |
| 747 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE |
Bryan Huntsman | d074fa2 | 2011-11-16 13:52:50 -0800 | [diff] [blame] | 748 | static inline void ehci_sync_mem(void) |
Ming Lei | 95cf7a1 | 2011-08-30 16:03:13 +0000 | [diff] [blame] | 749 | { |
| 750 | mb(); |
| 751 | } |
| 752 | #else |
Bryan Huntsman | d074fa2 | 2011-11-16 13:52:50 -0800 | [diff] [blame] | 753 | static inline void ehci_sync_mem(void) |
Ming Lei | 95cf7a1 | 2011-08-30 16:03:13 +0000 | [diff] [blame] | 754 | { |
| 755 | } |
| 756 | #endif |
| 757 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 758 | /*-------------------------------------------------------------------------*/ |
| 759 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | #ifndef DEBUG |
| 761 | #define STUB_DEBUG_FILES |
| 762 | #endif /* DEBUG */ |
| 763 | |
| 764 | /*-------------------------------------------------------------------------*/ |
| 765 | |
| 766 | #endif /* __LINUX_EHCI_HCD_H */ |