Ondrej Zajicek | 558b7bd | 2007-05-09 02:35:31 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/video/vt8623fb.c - fbdev driver for |
| 3 | * integrated graphic core in VIA VT8623 [CLE266] chipset |
| 4 | * |
| 5 | * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file COPYING in the main directory of this archive for |
| 9 | * more details. |
| 10 | * |
| 11 | * Code is based on s3fb, some parts are from David Boucher's viafb |
| 12 | * (http://davesdomain.org.uk/viafb/) |
| 13 | */ |
| 14 | |
| 15 | #include <linux/version.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/errno.h> |
| 19 | #include <linux/string.h> |
| 20 | #include <linux/mm.h> |
| 21 | #include <linux/tty.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/fb.h> |
| 25 | #include <linux/svga.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/console.h> /* Why should fb driver call console functions? because acquire_console_sem() */ |
| 29 | #include <video/vga.h> |
| 30 | |
| 31 | #ifdef CONFIG_MTRR |
| 32 | #include <asm/mtrr.h> |
| 33 | #endif |
| 34 | |
| 35 | struct vt8623fb_info { |
| 36 | char __iomem *mmio_base; |
| 37 | int mtrr_reg; |
| 38 | struct vgastate state; |
| 39 | struct mutex open_lock; |
| 40 | unsigned int ref_count; |
| 41 | u32 pseudo_palette[16]; |
| 42 | }; |
| 43 | |
| 44 | |
| 45 | |
| 46 | /* ------------------------------------------------------------------------- */ |
| 47 | |
| 48 | static const struct svga_fb_format vt8623fb_formats[] = { |
| 49 | { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
| 50 | FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
| 51 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
| 52 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
| 53 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, |
| 54 | FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
| 55 | { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
| 56 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, |
| 57 | /* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, |
| 58 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ |
| 59 | {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, |
| 60 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, |
| 61 | {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, |
| 62 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, |
| 63 | SVGA_FORMAT_END |
| 64 | }; |
| 65 | |
| 66 | static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, |
| 67 | 60000, 300000, 14318}; |
| 68 | |
| 69 | /* CRT timing register sets */ |
| 70 | |
| 71 | struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; |
| 72 | struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; |
| 73 | struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; |
| 74 | struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; |
| 75 | struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; |
| 76 | struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; |
| 77 | |
| 78 | struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; |
| 79 | struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; |
| 80 | struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; |
| 81 | struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; |
| 82 | struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; |
| 83 | struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; |
| 84 | |
| 85 | struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; |
| 86 | struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; |
| 87 | struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; |
| 88 | struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; |
| 89 | |
| 90 | struct svga_timing_regs vt8623_timing_regs = { |
| 91 | vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, |
| 92 | vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, |
| 93 | vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, |
| 94 | vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, |
| 95 | }; |
| 96 | |
| 97 | |
| 98 | /* ------------------------------------------------------------------------- */ |
| 99 | |
| 100 | |
| 101 | /* Module parameters */ |
| 102 | |
| 103 | static char *mode = "640x480-8@60"; |
| 104 | |
| 105 | #ifdef CONFIG_MTRR |
| 106 | static int mtrr = 1; |
| 107 | #endif |
| 108 | |
| 109 | MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>"); |
| 110 | MODULE_LICENSE("GPL"); |
| 111 | MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); |
| 112 | |
| 113 | module_param(mode, charp, 0644); |
| 114 | MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc)"); |
| 115 | |
| 116 | #ifdef CONFIG_MTRR |
| 117 | module_param(mtrr, int, 0444); |
| 118 | MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); |
| 119 | #endif |
| 120 | |
| 121 | |
| 122 | /* ------------------------------------------------------------------------- */ |
| 123 | |
| 124 | |
| 125 | static struct fb_tile_ops vt8623fb_tile_ops = { |
| 126 | .fb_settile = svga_settile, |
| 127 | .fb_tilecopy = svga_tilecopy, |
| 128 | .fb_tilefill = svga_tilefill, |
| 129 | .fb_tileblit = svga_tileblit, |
| 130 | .fb_tilecursor = svga_tilecursor, |
| 131 | .fb_get_tilemax = svga_get_tilemax, |
| 132 | }; |
| 133 | |
| 134 | |
| 135 | /* ------------------------------------------------------------------------- */ |
| 136 | |
| 137 | |
| 138 | /* image data is MSB-first, fb structure is MSB-first too */ |
| 139 | static inline u32 expand_color(u32 c) |
| 140 | { |
| 141 | return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; |
| 142 | } |
| 143 | |
| 144 | /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ |
| 145 | static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) |
| 146 | { |
| 147 | u32 fg = expand_color(image->fg_color); |
| 148 | u32 bg = expand_color(image->bg_color); |
| 149 | const u8 *src1, *src; |
| 150 | u8 __iomem *dst1; |
| 151 | u32 __iomem *dst; |
| 152 | u32 val; |
| 153 | int x, y; |
| 154 | |
| 155 | src1 = image->data; |
| 156 | dst1 = info->screen_base + (image->dy * info->fix.line_length) |
| 157 | + ((image->dx / 8) * 4); |
| 158 | |
| 159 | for (y = 0; y < image->height; y++) { |
| 160 | src = src1; |
| 161 | dst = (u32 __iomem *) dst1; |
| 162 | for (x = 0; x < image->width; x += 8) { |
| 163 | val = *(src++) * 0x01010101; |
| 164 | val = (val & fg) | (~val & bg); |
| 165 | fb_writel(val, dst++); |
| 166 | } |
| 167 | src1 += image->width / 8; |
| 168 | dst1 += info->fix.line_length; |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ |
| 173 | static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
| 174 | { |
| 175 | u32 fg = expand_color(rect->color); |
| 176 | u8 __iomem *dst1; |
| 177 | u32 __iomem *dst; |
| 178 | int x, y; |
| 179 | |
| 180 | dst1 = info->screen_base + (rect->dy * info->fix.line_length) |
| 181 | + ((rect->dx / 8) * 4); |
| 182 | |
| 183 | for (y = 0; y < rect->height; y++) { |
| 184 | dst = (u32 __iomem *) dst1; |
| 185 | for (x = 0; x < rect->width; x += 8) { |
| 186 | fb_writel(fg, dst++); |
| 187 | } |
| 188 | dst1 += info->fix.line_length; |
| 189 | } |
| 190 | } |
| 191 | |
| 192 | |
| 193 | /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ |
| 194 | static inline u32 expand_pixel(u32 c) |
| 195 | { |
| 196 | return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | |
| 197 | ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; |
| 198 | } |
| 199 | |
| 200 | /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ |
| 201 | static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) |
| 202 | { |
| 203 | u32 fg = image->fg_color * 0x11111111; |
| 204 | u32 bg = image->bg_color * 0x11111111; |
| 205 | const u8 *src1, *src; |
| 206 | u8 __iomem *dst1; |
| 207 | u32 __iomem *dst; |
| 208 | u32 val; |
| 209 | int x, y; |
| 210 | |
| 211 | src1 = image->data; |
| 212 | dst1 = info->screen_base + (image->dy * info->fix.line_length) |
| 213 | + ((image->dx / 8) * 4); |
| 214 | |
| 215 | for (y = 0; y < image->height; y++) { |
| 216 | src = src1; |
| 217 | dst = (u32 __iomem *) dst1; |
| 218 | for (x = 0; x < image->width; x += 8) { |
| 219 | val = expand_pixel(*(src++)); |
| 220 | val = (val & fg) | (~val & bg); |
| 221 | fb_writel(val, dst++); |
| 222 | } |
| 223 | src1 += image->width / 8; |
| 224 | dst1 += info->fix.line_length; |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) |
| 229 | { |
| 230 | if ((info->var.bits_per_pixel == 4) && (image->depth == 1) |
| 231 | && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { |
| 232 | if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) |
| 233 | vt8623fb_iplan_imageblit(info, image); |
| 234 | else |
| 235 | vt8623fb_cfb4_imageblit(info, image); |
| 236 | } else |
| 237 | cfb_imageblit(info, image); |
| 238 | } |
| 239 | |
| 240 | static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
| 241 | { |
| 242 | if ((info->var.bits_per_pixel == 4) |
| 243 | && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) |
| 244 | && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) |
| 245 | vt8623fb_iplan_fillrect(info, rect); |
| 246 | else |
| 247 | cfb_fillrect(info, rect); |
| 248 | } |
| 249 | |
| 250 | |
| 251 | /* ------------------------------------------------------------------------- */ |
| 252 | |
| 253 | |
| 254 | static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) |
| 255 | { |
| 256 | u16 m, n, r; |
| 257 | u8 regval; |
| 258 | int rv; |
| 259 | |
| 260 | rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); |
| 261 | if (rv < 0) { |
| 262 | printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); |
| 263 | return; |
| 264 | } |
| 265 | |
| 266 | /* Set VGA misc register */ |
| 267 | regval = vga_r(NULL, VGA_MIS_R); |
| 268 | vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); |
| 269 | |
| 270 | /* Set clock registers */ |
| 271 | vga_wseq(NULL, 0x46, (n | (r << 6))); |
| 272 | vga_wseq(NULL, 0x47, m); |
| 273 | |
| 274 | udelay(1000); |
| 275 | |
| 276 | /* PLL reset */ |
| 277 | svga_wseq_mask(0x40, 0x02, 0x02); |
| 278 | svga_wseq_mask(0x40, 0x00, 0x02); |
| 279 | } |
| 280 | |
| 281 | |
| 282 | static int vt8623fb_open(struct fb_info *info, int user) |
| 283 | { |
| 284 | struct vt8623fb_info *par = info->par; |
| 285 | |
| 286 | mutex_lock(&(par->open_lock)); |
| 287 | if (par->ref_count == 0) { |
| 288 | memset(&(par->state), 0, sizeof(struct vgastate)); |
| 289 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; |
| 290 | par->state.num_crtc = 0xA2; |
| 291 | par->state.num_seq = 0x50; |
| 292 | save_vga(&(par->state)); |
| 293 | } |
| 294 | |
| 295 | par->ref_count++; |
| 296 | mutex_unlock(&(par->open_lock)); |
| 297 | |
| 298 | return 0; |
| 299 | } |
| 300 | |
| 301 | static int vt8623fb_release(struct fb_info *info, int user) |
| 302 | { |
| 303 | struct vt8623fb_info *par = info->par; |
| 304 | |
| 305 | mutex_lock(&(par->open_lock)); |
| 306 | if (par->ref_count == 0) { |
| 307 | mutex_unlock(&(par->open_lock)); |
| 308 | return -EINVAL; |
| 309 | } |
| 310 | |
| 311 | if (par->ref_count == 1) |
| 312 | restore_vga(&(par->state)); |
| 313 | |
| 314 | par->ref_count--; |
| 315 | mutex_unlock(&(par->open_lock)); |
| 316 | |
| 317 | return 0; |
| 318 | } |
| 319 | |
| 320 | static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 321 | { |
| 322 | int rv, mem, step; |
| 323 | |
| 324 | /* Find appropriate format */ |
| 325 | rv = svga_match_format (vt8623fb_formats, var, NULL); |
| 326 | if (rv < 0) |
| 327 | { |
| 328 | printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); |
| 329 | return rv; |
| 330 | } |
| 331 | |
| 332 | /* Do not allow to have real resoulution larger than virtual */ |
| 333 | if (var->xres > var->xres_virtual) |
| 334 | var->xres_virtual = var->xres; |
| 335 | |
| 336 | if (var->yres > var->yres_virtual) |
| 337 | var->yres_virtual = var->yres; |
| 338 | |
| 339 | /* Round up xres_virtual to have proper alignment of lines */ |
| 340 | step = vt8623fb_formats[rv].xresstep - 1; |
| 341 | var->xres_virtual = (var->xres_virtual+step) & ~step; |
| 342 | |
| 343 | /* Check whether have enough memory */ |
| 344 | mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; |
| 345 | if (mem > info->screen_size) |
| 346 | { |
| 347 | printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); |
| 348 | return -EINVAL; |
| 349 | } |
| 350 | |
| 351 | /* Text mode is limited to 256 kB of memory */ |
| 352 | if ((var->bits_per_pixel == 0) && (mem > (256*1024))) |
| 353 | { |
| 354 | printk(KERN_ERR "fb%d: text framebuffer size too large (%d kB requested, 256 kB possible)\n", info->node, mem >> 10); |
| 355 | return -EINVAL; |
| 356 | } |
| 357 | |
| 358 | rv = svga_check_timings (&vt8623_timing_regs, var, info->node); |
| 359 | if (rv < 0) |
| 360 | { |
| 361 | printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); |
| 362 | return rv; |
| 363 | } |
| 364 | |
| 365 | /* Interlaced mode not supported */ |
| 366 | if (var->vmode & FB_VMODE_INTERLACED) |
| 367 | return -EINVAL; |
| 368 | |
| 369 | return 0; |
| 370 | } |
| 371 | |
| 372 | |
| 373 | static int vt8623fb_set_par(struct fb_info *info) |
| 374 | { |
| 375 | u32 mode, offset_value, fetch_value, screen_size; |
| 376 | u32 bpp = info->var.bits_per_pixel; |
| 377 | |
| 378 | if (bpp != 0) { |
| 379 | info->fix.ypanstep = 1; |
| 380 | info->fix.line_length = (info->var.xres_virtual * bpp) / 8; |
| 381 | |
| 382 | info->flags &= ~FBINFO_MISC_TILEBLITTING; |
| 383 | info->tileops = NULL; |
| 384 | |
| 385 | /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ |
| 386 | info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0); |
| 387 | info->pixmap.blit_y = ~(u32)0; |
| 388 | |
| 389 | offset_value = (info->var.xres_virtual * bpp) / 64; |
| 390 | fetch_value = ((info->var.xres * bpp) / 128) + 4; |
| 391 | |
| 392 | if (bpp == 4) |
| 393 | fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ |
| 394 | |
| 395 | screen_size = info->var.yres_virtual * info->fix.line_length; |
| 396 | } else { |
| 397 | info->fix.ypanstep = 16; |
| 398 | info->fix.line_length = 0; |
| 399 | |
| 400 | info->flags |= FBINFO_MISC_TILEBLITTING; |
| 401 | info->tileops = &vt8623fb_tile_ops; |
| 402 | |
| 403 | /* supports 8x16 tiles only */ |
| 404 | info->pixmap.blit_x = 1 << (8 - 1); |
| 405 | info->pixmap.blit_y = 1 << (16 - 1); |
| 406 | |
| 407 | offset_value = info->var.xres_virtual / 16; |
| 408 | fetch_value = (info->var.xres / 8) + 8; |
| 409 | screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; |
| 410 | } |
| 411 | |
| 412 | info->var.xoffset = 0; |
| 413 | info->var.yoffset = 0; |
| 414 | info->var.activate = FB_ACTIVATE_NOW; |
| 415 | |
| 416 | /* Unlock registers */ |
| 417 | svga_wseq_mask(0x10, 0x01, 0x01); |
| 418 | svga_wcrt_mask(0x11, 0x00, 0x80); |
| 419 | svga_wcrt_mask(0x47, 0x00, 0x01); |
| 420 | |
| 421 | /* Device, screen and sync off */ |
| 422 | svga_wseq_mask(0x01, 0x20, 0x20); |
| 423 | svga_wcrt_mask(0x36, 0x30, 0x30); |
| 424 | svga_wcrt_mask(0x17, 0x00, 0x80); |
| 425 | |
| 426 | /* Set default values */ |
| 427 | svga_set_default_gfx_regs(); |
| 428 | svga_set_default_atc_regs(); |
| 429 | svga_set_default_seq_regs(); |
| 430 | svga_set_default_crt_regs(); |
| 431 | svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF); |
| 432 | svga_wcrt_multi(vt8623_start_address_regs, 0); |
| 433 | |
| 434 | svga_wcrt_multi(vt8623_offset_regs, offset_value); |
| 435 | svga_wseq_multi(vt8623_fetch_count_regs, fetch_value); |
| 436 | |
| 437 | if (info->var.vmode & FB_VMODE_DOUBLE) |
| 438 | svga_wcrt_mask(0x09, 0x80, 0x80); |
| 439 | else |
| 440 | svga_wcrt_mask(0x09, 0x00, 0x80); |
| 441 | |
| 442 | svga_wseq_mask(0x1E, 0xF0, 0xF0); // DI/DVP bus |
| 443 | svga_wseq_mask(0x2A, 0x0F, 0x0F); // DI/DVP bus |
| 444 | svga_wseq_mask(0x16, 0x08, 0xBF); // FIFO read treshold |
| 445 | vga_wseq(NULL, 0x17, 0x1F); // FIFO depth |
| 446 | vga_wseq(NULL, 0x18, 0x4E); |
| 447 | svga_wseq_mask(0x1A, 0x08, 0x08); // enable MMIO ? |
| 448 | |
| 449 | vga_wcrt(NULL, 0x32, 0x00); |
| 450 | vga_wcrt(NULL, 0x34, 0x00); |
| 451 | vga_wcrt(NULL, 0x6A, 0x80); |
| 452 | vga_wcrt(NULL, 0x6A, 0xC0); |
| 453 | |
| 454 | vga_wgfx(NULL, 0x20, 0x00); |
| 455 | vga_wgfx(NULL, 0x21, 0x00); |
| 456 | vga_wgfx(NULL, 0x22, 0x00); |
| 457 | |
| 458 | /* Set SR15 according to number of bits per pixel */ |
| 459 | mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); |
| 460 | switch (mode) { |
| 461 | case 0: |
| 462 | pr_debug("fb%d: text mode\n", info->node); |
| 463 | svga_set_textmode_vga_regs(); |
| 464 | svga_wseq_mask(0x15, 0x00, 0xFE); |
| 465 | svga_wcrt_mask(0x11, 0x60, 0x70); |
| 466 | break; |
| 467 | case 1: |
| 468 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); |
| 469 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); |
| 470 | svga_wseq_mask(0x15, 0x20, 0xFE); |
| 471 | svga_wcrt_mask(0x11, 0x00, 0x70); |
| 472 | break; |
| 473 | case 2: |
| 474 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); |
| 475 | svga_wseq_mask(0x15, 0x00, 0xFE); |
| 476 | svga_wcrt_mask(0x11, 0x00, 0x70); |
| 477 | break; |
| 478 | case 3: |
| 479 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); |
| 480 | svga_wseq_mask(0x15, 0x22, 0xFE); |
| 481 | break; |
| 482 | case 4: |
| 483 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); |
| 484 | svga_wseq_mask(0x15, 0xB6, 0xFE); |
| 485 | break; |
| 486 | case 5: |
| 487 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); |
| 488 | svga_wseq_mask(0x15, 0xAE, 0xFE); |
| 489 | break; |
| 490 | default: |
| 491 | printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); |
| 492 | return (-EINVAL); |
| 493 | } |
| 494 | |
| 495 | vt8623_set_pixclock(info, info->var.pixclock); |
| 496 | svga_set_timings(&vt8623_timing_regs, &(info->var), 1, 1, |
| 497 | (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, |
| 498 | 1, info->node); |
| 499 | |
| 500 | memset_io(info->screen_base, 0x00, screen_size); |
| 501 | |
| 502 | /* Device and screen back on */ |
| 503 | svga_wcrt_mask(0x17, 0x80, 0x80); |
| 504 | svga_wcrt_mask(0x36, 0x00, 0x30); |
| 505 | svga_wseq_mask(0x01, 0x00, 0x20); |
| 506 | |
| 507 | return 0; |
| 508 | } |
| 509 | |
| 510 | |
| 511 | static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 512 | u_int transp, struct fb_info *fb) |
| 513 | { |
| 514 | switch (fb->var.bits_per_pixel) { |
| 515 | case 0: |
| 516 | case 4: |
| 517 | if (regno >= 16) |
| 518 | return -EINVAL; |
| 519 | |
| 520 | outb(0x0F, VGA_PEL_MSK); |
| 521 | outb(regno, VGA_PEL_IW); |
| 522 | outb(red >> 10, VGA_PEL_D); |
| 523 | outb(green >> 10, VGA_PEL_D); |
| 524 | outb(blue >> 10, VGA_PEL_D); |
| 525 | break; |
| 526 | case 8: |
| 527 | if (regno >= 256) |
| 528 | return -EINVAL; |
| 529 | |
| 530 | outb(0xFF, VGA_PEL_MSK); |
| 531 | outb(regno, VGA_PEL_IW); |
| 532 | outb(red >> 10, VGA_PEL_D); |
| 533 | outb(green >> 10, VGA_PEL_D); |
| 534 | outb(blue >> 10, VGA_PEL_D); |
| 535 | break; |
| 536 | case 16: |
| 537 | if (regno >= 16) |
| 538 | return 0; |
| 539 | |
| 540 | if (fb->var.green.length == 5) |
| 541 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | |
| 542 | ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); |
| 543 | else if (fb->var.green.length == 6) |
| 544 | ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | |
| 545 | ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); |
| 546 | else |
| 547 | return -EINVAL; |
| 548 | break; |
| 549 | case 24: |
| 550 | case 32: |
| 551 | if (regno >= 16) |
| 552 | return 0; |
| 553 | |
| 554 | /* ((transp & 0xFF00) << 16) */ |
| 555 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | |
| 556 | (green & 0xFF00) | ((blue & 0xFF00) >> 8); |
| 557 | break; |
| 558 | default: |
| 559 | return -EINVAL; |
| 560 | } |
| 561 | |
| 562 | return 0; |
| 563 | } |
| 564 | |
| 565 | |
| 566 | static int vt8623fb_blank(int blank_mode, struct fb_info *info) |
| 567 | { |
| 568 | switch (blank_mode) { |
| 569 | case FB_BLANK_UNBLANK: |
| 570 | pr_debug("fb%d: unblank\n", info->node); |
| 571 | svga_wcrt_mask(0x36, 0x00, 0x30); |
| 572 | svga_wseq_mask(0x01, 0x00, 0x20); |
| 573 | break; |
| 574 | case FB_BLANK_NORMAL: |
| 575 | pr_debug("fb%d: blank\n", info->node); |
| 576 | svga_wcrt_mask(0x36, 0x00, 0x30); |
| 577 | svga_wseq_mask(0x01, 0x20, 0x20); |
| 578 | break; |
| 579 | case FB_BLANK_HSYNC_SUSPEND: |
| 580 | pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); |
| 581 | svga_wcrt_mask(0x36, 0x10, 0x30); |
| 582 | svga_wseq_mask(0x01, 0x20, 0x20); |
| 583 | break; |
| 584 | case FB_BLANK_VSYNC_SUSPEND: |
| 585 | pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); |
| 586 | svga_wcrt_mask(0x36, 0x20, 0x30); |
| 587 | svga_wseq_mask(0x01, 0x20, 0x20); |
| 588 | break; |
| 589 | case FB_BLANK_POWERDOWN: |
| 590 | pr_debug("fb%d: DPMS off (no sync)\n", info->node); |
| 591 | svga_wcrt_mask(0x36, 0x30, 0x30); |
| 592 | svga_wseq_mask(0x01, 0x20, 0x20); |
| 593 | break; |
| 594 | } |
| 595 | |
| 596 | return 0; |
| 597 | } |
| 598 | |
| 599 | |
| 600 | static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
| 601 | { |
| 602 | unsigned int offset; |
| 603 | |
| 604 | /* Calculate the offset */ |
| 605 | if (var->bits_per_pixel == 0) { |
| 606 | offset = (var->yoffset / 16) * var->xres_virtual + var->xoffset; |
| 607 | offset = offset >> 3; |
| 608 | } else { |
| 609 | offset = (var->yoffset * info->fix.line_length) + |
| 610 | (var->xoffset * var->bits_per_pixel / 8); |
| 611 | offset = offset >> ((var->bits_per_pixel == 4) ? 2 : 1); |
| 612 | } |
| 613 | |
| 614 | /* Set the offset */ |
| 615 | svga_wcrt_multi(vt8623_start_address_regs, offset); |
| 616 | |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | |
| 621 | /* ------------------------------------------------------------------------- */ |
| 622 | |
| 623 | |
| 624 | /* Frame buffer operations */ |
| 625 | |
| 626 | static struct fb_ops vt8623fb_ops = { |
| 627 | .owner = THIS_MODULE, |
| 628 | .fb_open = vt8623fb_open, |
| 629 | .fb_release = vt8623fb_release, |
| 630 | .fb_check_var = vt8623fb_check_var, |
| 631 | .fb_set_par = vt8623fb_set_par, |
| 632 | .fb_setcolreg = vt8623fb_setcolreg, |
| 633 | .fb_blank = vt8623fb_blank, |
| 634 | .fb_pan_display = vt8623fb_pan_display, |
| 635 | .fb_fillrect = vt8623fb_fillrect, |
| 636 | .fb_copyarea = cfb_copyarea, |
| 637 | .fb_imageblit = vt8623fb_imageblit, |
Antonino A. Daplas | 5a87ede | 2007-05-09 02:35:32 -0700 | [diff] [blame^] | 638 | .fb_get_caps = svga_get_caps, |
Ondrej Zajicek | 558b7bd | 2007-05-09 02:35:31 -0700 | [diff] [blame] | 639 | }; |
| 640 | |
| 641 | |
| 642 | /* PCI probe */ |
| 643 | |
| 644 | static int __devinit vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) |
| 645 | { |
| 646 | struct fb_info *info; |
| 647 | struct vt8623fb_info *par; |
| 648 | unsigned int memsize1, memsize2; |
| 649 | int rc; |
| 650 | |
| 651 | /* Ignore secondary VGA device because there is no VGA arbitration */ |
| 652 | if (! svga_primary_device(dev)) { |
| 653 | dev_info(&(dev->dev), "ignoring secondary device\n"); |
| 654 | return -ENODEV; |
| 655 | } |
| 656 | |
| 657 | /* Allocate and fill driver data structure */ |
| 658 | info = framebuffer_alloc(sizeof(struct vt8623fb_info), NULL); |
| 659 | if (! info) { |
| 660 | dev_err(&(dev->dev), "cannot allocate memory\n"); |
| 661 | return -ENOMEM; |
| 662 | } |
| 663 | |
| 664 | par = info->par; |
| 665 | mutex_init(&par->open_lock); |
| 666 | |
| 667 | info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; |
| 668 | info->fbops = &vt8623fb_ops; |
| 669 | |
| 670 | /* Prepare PCI device */ |
| 671 | |
| 672 | rc = pci_enable_device(dev); |
| 673 | if (rc < 0) { |
| 674 | dev_err(&(dev->dev), "cannot enable PCI device\n"); |
| 675 | goto err_enable_device; |
| 676 | } |
| 677 | |
| 678 | rc = pci_request_regions(dev, "vt8623fb"); |
| 679 | if (rc < 0) { |
| 680 | dev_err(&(dev->dev), "cannot reserve framebuffer region\n"); |
| 681 | goto err_request_regions; |
| 682 | } |
| 683 | |
| 684 | info->fix.smem_start = pci_resource_start(dev, 0); |
| 685 | info->fix.smem_len = pci_resource_len(dev, 0); |
| 686 | info->fix.mmio_start = pci_resource_start(dev, 1); |
| 687 | info->fix.mmio_len = pci_resource_len(dev, 1); |
| 688 | |
| 689 | /* Map physical IO memory address into kernel space */ |
| 690 | info->screen_base = pci_iomap(dev, 0, 0); |
| 691 | if (! info->screen_base) { |
| 692 | rc = -ENOMEM; |
| 693 | dev_err(&(dev->dev), "iomap for framebuffer failed\n"); |
| 694 | goto err_iomap_1; |
| 695 | } |
| 696 | |
| 697 | par->mmio_base = pci_iomap(dev, 1, 0); |
| 698 | if (! par->mmio_base) { |
| 699 | rc = -ENOMEM; |
| 700 | dev_err(&(dev->dev), "iomap for MMIO failed\n"); |
| 701 | goto err_iomap_2; |
| 702 | } |
| 703 | |
| 704 | /* Find how many physical memory there is on card */ |
| 705 | memsize1 = (vga_rseq(NULL, 0x34) + 1) >> 1; |
| 706 | memsize2 = vga_rseq(NULL, 0x39) << 2; |
| 707 | |
| 708 | if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) |
| 709 | info->screen_size = memsize1 << 20; |
| 710 | else { |
| 711 | dev_err(&(dev->dev), "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); |
| 712 | info->screen_size = 16 << 20; |
| 713 | } |
| 714 | |
| 715 | info->fix.smem_len = info->screen_size; |
| 716 | strcpy(info->fix.id, "VIA VT8623"); |
| 717 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
| 718 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
| 719 | info->fix.ypanstep = 0; |
| 720 | info->fix.accel = FB_ACCEL_NONE; |
| 721 | info->pseudo_palette = (void*)par->pseudo_palette; |
| 722 | |
| 723 | /* Prepare startup mode */ |
| 724 | |
| 725 | rc = fb_find_mode(&(info->var), info, mode, NULL, 0, NULL, 8); |
| 726 | if (! ((rc == 1) || (rc == 2))) { |
| 727 | rc = -EINVAL; |
| 728 | dev_err(&(dev->dev), "mode %s not found\n", mode); |
| 729 | goto err_find_mode; |
| 730 | } |
| 731 | |
| 732 | rc = fb_alloc_cmap(&info->cmap, 256, 0); |
| 733 | if (rc < 0) { |
| 734 | dev_err(&(dev->dev), "cannot allocate colormap\n"); |
| 735 | goto err_alloc_cmap; |
| 736 | } |
| 737 | |
| 738 | rc = register_framebuffer(info); |
| 739 | if (rc < 0) { |
| 740 | dev_err(&(dev->dev), "cannot register framebugger\n"); |
| 741 | goto err_reg_fb; |
| 742 | } |
| 743 | |
| 744 | printk(KERN_INFO "fb%d: %s on %s, %d MB RAM\n", info->node, info->fix.id, |
| 745 | pci_name(dev), info->fix.smem_len >> 20); |
| 746 | |
| 747 | /* Record a reference to the driver data */ |
| 748 | pci_set_drvdata(dev, info); |
| 749 | |
| 750 | #ifdef CONFIG_MTRR |
| 751 | if (mtrr) { |
| 752 | par->mtrr_reg = -1; |
| 753 | par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1); |
| 754 | } |
| 755 | #endif |
| 756 | |
| 757 | return 0; |
| 758 | |
| 759 | /* Error handling */ |
| 760 | err_reg_fb: |
| 761 | fb_dealloc_cmap(&info->cmap); |
| 762 | err_alloc_cmap: |
| 763 | err_find_mode: |
| 764 | pci_iounmap(dev, par->mmio_base); |
| 765 | err_iomap_2: |
| 766 | pci_iounmap(dev, info->screen_base); |
| 767 | err_iomap_1: |
| 768 | pci_release_regions(dev); |
| 769 | err_request_regions: |
| 770 | /* pci_disable_device(dev); */ |
| 771 | err_enable_device: |
| 772 | framebuffer_release(info); |
| 773 | return rc; |
| 774 | } |
| 775 | |
| 776 | /* PCI remove */ |
| 777 | |
| 778 | static void __devexit vt8623_pci_remove(struct pci_dev *dev) |
| 779 | { |
| 780 | struct fb_info *info = pci_get_drvdata(dev); |
| 781 | struct vt8623fb_info *par = info->par; |
| 782 | |
| 783 | if (info) { |
| 784 | #ifdef CONFIG_MTRR |
| 785 | if (par->mtrr_reg >= 0) { |
| 786 | mtrr_del(par->mtrr_reg, 0, 0); |
| 787 | par->mtrr_reg = -1; |
| 788 | } |
| 789 | #endif |
| 790 | |
| 791 | unregister_framebuffer(info); |
| 792 | fb_dealloc_cmap(&info->cmap); |
| 793 | |
| 794 | pci_iounmap(dev, info->screen_base); |
| 795 | pci_iounmap(dev, par->mmio_base); |
| 796 | pci_release_regions(dev); |
| 797 | /* pci_disable_device(dev); */ |
| 798 | |
| 799 | pci_set_drvdata(dev, NULL); |
| 800 | framebuffer_release(info); |
| 801 | } |
| 802 | } |
| 803 | |
| 804 | |
| 805 | #ifdef CONFIG_PM |
| 806 | /* PCI suspend */ |
| 807 | |
| 808 | static int vt8623_pci_suspend(struct pci_dev* dev, pm_message_t state) |
| 809 | { |
| 810 | struct fb_info *info = pci_get_drvdata(dev); |
| 811 | struct vt8623fb_info *par = info->par; |
| 812 | |
| 813 | dev_info(&(dev->dev), "suspend\n"); |
| 814 | |
| 815 | acquire_console_sem(); |
| 816 | mutex_lock(&(par->open_lock)); |
| 817 | |
| 818 | if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { |
| 819 | mutex_unlock(&(par->open_lock)); |
| 820 | release_console_sem(); |
| 821 | return 0; |
| 822 | } |
| 823 | |
| 824 | fb_set_suspend(info, 1); |
| 825 | |
| 826 | pci_save_state(dev); |
| 827 | pci_disable_device(dev); |
| 828 | pci_set_power_state(dev, pci_choose_state(dev, state)); |
| 829 | |
| 830 | mutex_unlock(&(par->open_lock)); |
| 831 | release_console_sem(); |
| 832 | |
| 833 | return 0; |
| 834 | } |
| 835 | |
| 836 | |
| 837 | /* PCI resume */ |
| 838 | |
| 839 | static int vt8623_pci_resume(struct pci_dev* dev) |
| 840 | { |
| 841 | struct fb_info *info = pci_get_drvdata(dev); |
| 842 | struct vt8623fb_info *par = info->par; |
| 843 | |
| 844 | dev_info(&(dev->dev), "resume\n"); |
| 845 | |
| 846 | acquire_console_sem(); |
| 847 | mutex_lock(&(par->open_lock)); |
| 848 | |
| 849 | if (par->ref_count == 0) { |
| 850 | mutex_unlock(&(par->open_lock)); |
| 851 | release_console_sem(); |
| 852 | return 0; |
| 853 | } |
| 854 | |
| 855 | pci_set_power_state(dev, PCI_D0); |
| 856 | pci_restore_state(dev); |
| 857 | |
| 858 | if (pci_enable_device(dev)) |
| 859 | goto fail; |
| 860 | |
| 861 | pci_set_master(dev); |
| 862 | |
| 863 | vt8623fb_set_par(info); |
| 864 | fb_set_suspend(info, 0); |
| 865 | |
| 866 | mutex_unlock(&(par->open_lock)); |
| 867 | fail: |
| 868 | release_console_sem(); |
| 869 | |
| 870 | return 0; |
| 871 | } |
| 872 | #else |
| 873 | #define vt8623_pci_suspend NULL |
| 874 | #define vt8623_pci_resume NULL |
| 875 | #endif /* CONFIG_PM */ |
| 876 | |
| 877 | /* List of boards that we are trying to support */ |
| 878 | |
| 879 | static struct pci_device_id vt8623_devices[] __devinitdata = { |
| 880 | {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, |
| 881 | {0, 0, 0, 0, 0, 0, 0} |
| 882 | }; |
| 883 | |
| 884 | MODULE_DEVICE_TABLE(pci, vt8623_devices); |
| 885 | |
| 886 | static struct pci_driver vt8623fb_pci_driver = { |
| 887 | .name = "vt8623fb", |
| 888 | .id_table = vt8623_devices, |
| 889 | .probe = vt8623_pci_probe, |
| 890 | .remove = __devexit_p(vt8623_pci_remove), |
| 891 | .suspend = vt8623_pci_suspend, |
| 892 | .resume = vt8623_pci_resume, |
| 893 | }; |
| 894 | |
| 895 | /* Cleanup */ |
| 896 | |
| 897 | static void __exit vt8623fb_cleanup(void) |
| 898 | { |
| 899 | pr_debug("vt8623fb: cleaning up\n"); |
| 900 | pci_unregister_driver(&vt8623fb_pci_driver); |
| 901 | } |
| 902 | |
| 903 | /* Driver Initialisation */ |
| 904 | |
| 905 | int __init vt8623fb_init(void) |
| 906 | { |
| 907 | |
| 908 | #ifndef MODULE |
| 909 | char *option = NULL; |
| 910 | |
| 911 | if (fb_get_options("vt8623fb", &option)) |
| 912 | return -ENODEV; |
| 913 | |
| 914 | if (option && *option) |
| 915 | mode = option; |
| 916 | #endif |
| 917 | |
| 918 | pr_debug("vt8623fb: initializing\n"); |
| 919 | return pci_register_driver(&vt8623fb_pci_driver); |
| 920 | } |
| 921 | |
| 922 | /* ------------------------------------------------------------------------- */ |
| 923 | |
| 924 | /* Modularization */ |
| 925 | |
| 926 | module_init(vt8623fb_init); |
| 927 | module_exit(vt8623fb_cleanup); |