David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 1 | /* |
| 2 | * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ |
| 18 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 19 | #include <linux/init.h> |
| 20 | #include <linux/spinlock.h> |
| 21 | #include <linux/workqueue.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/errno.h> |
| 25 | #include <linux/platform_device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 26 | #include <linux/slab.h> |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 27 | |
| 28 | #include <linux/spi/spi.h> |
| 29 | #include <linux/spi/spi_bitbang.h> |
| 30 | |
| 31 | |
| 32 | /*----------------------------------------------------------------------*/ |
| 33 | |
| 34 | /* |
| 35 | * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support. |
| 36 | * Use this for GPIO or shift-register level hardware APIs. |
| 37 | * |
| 38 | * spi_bitbang_cs is in spi_device->controller_state, which is unavailable |
| 39 | * to glue code. These bitbang setup() and cleanup() routines are always |
| 40 | * used, though maybe they're called from controller-aware code. |
| 41 | * |
| 42 | * chipselect() and friends may use use spi_device->controller_data and |
| 43 | * controller registers as appropriate. |
| 44 | * |
| 45 | * |
| 46 | * NOTE: SPI controller pins can often be used as GPIO pins instead, |
| 47 | * which means you could use a bitbang driver either to get hardware |
| 48 | * working quickly, or testing for differences that aren't speed related. |
| 49 | */ |
| 50 | |
| 51 | struct spi_bitbang_cs { |
| 52 | unsigned nsecs; /* (clock cycle time)/2 */ |
| 53 | u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs, |
| 54 | u32 word, u8 bits); |
| 55 | unsigned (*txrx_bufs)(struct spi_device *, |
| 56 | u32 (*txrx_word)( |
| 57 | struct spi_device *spi, |
| 58 | unsigned nsecs, |
| 59 | u32 word, u8 bits), |
| 60 | unsigned, struct spi_transfer *); |
| 61 | }; |
| 62 | |
| 63 | static unsigned bitbang_txrx_8( |
| 64 | struct spi_device *spi, |
| 65 | u32 (*txrx_word)(struct spi_device *spi, |
| 66 | unsigned nsecs, |
| 67 | u32 word, u8 bits), |
| 68 | unsigned ns, |
| 69 | struct spi_transfer *t |
| 70 | ) { |
| 71 | unsigned bits = spi->bits_per_word; |
| 72 | unsigned count = t->len; |
| 73 | const u8 *tx = t->tx_buf; |
| 74 | u8 *rx = t->rx_buf; |
| 75 | |
| 76 | while (likely(count > 0)) { |
| 77 | u8 word = 0; |
| 78 | |
| 79 | if (tx) |
| 80 | word = *tx++; |
| 81 | word = txrx_word(spi, ns, word, bits); |
| 82 | if (rx) |
| 83 | *rx++ = word; |
| 84 | count -= 1; |
| 85 | } |
| 86 | return t->len - count; |
| 87 | } |
| 88 | |
| 89 | static unsigned bitbang_txrx_16( |
| 90 | struct spi_device *spi, |
| 91 | u32 (*txrx_word)(struct spi_device *spi, |
| 92 | unsigned nsecs, |
| 93 | u32 word, u8 bits), |
| 94 | unsigned ns, |
| 95 | struct spi_transfer *t |
| 96 | ) { |
| 97 | unsigned bits = spi->bits_per_word; |
| 98 | unsigned count = t->len; |
| 99 | const u16 *tx = t->tx_buf; |
| 100 | u16 *rx = t->rx_buf; |
| 101 | |
| 102 | while (likely(count > 1)) { |
| 103 | u16 word = 0; |
| 104 | |
| 105 | if (tx) |
| 106 | word = *tx++; |
| 107 | word = txrx_word(spi, ns, word, bits); |
| 108 | if (rx) |
| 109 | *rx++ = word; |
| 110 | count -= 2; |
| 111 | } |
| 112 | return t->len - count; |
| 113 | } |
| 114 | |
| 115 | static unsigned bitbang_txrx_32( |
| 116 | struct spi_device *spi, |
| 117 | u32 (*txrx_word)(struct spi_device *spi, |
| 118 | unsigned nsecs, |
| 119 | u32 word, u8 bits), |
| 120 | unsigned ns, |
| 121 | struct spi_transfer *t |
| 122 | ) { |
| 123 | unsigned bits = spi->bits_per_word; |
| 124 | unsigned count = t->len; |
| 125 | const u32 *tx = t->tx_buf; |
| 126 | u32 *rx = t->rx_buf; |
| 127 | |
| 128 | while (likely(count > 3)) { |
| 129 | u32 word = 0; |
| 130 | |
| 131 | if (tx) |
| 132 | word = *tx++; |
| 133 | word = txrx_word(spi, ns, word, bits); |
| 134 | if (rx) |
| 135 | *rx++ = word; |
| 136 | count -= 4; |
| 137 | } |
| 138 | return t->len - count; |
| 139 | } |
| 140 | |
Kumar Gala | ff9f477 | 2006-04-02 16:06:35 -0500 | [diff] [blame] | 141 | int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 142 | { |
| 143 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 144 | u8 bits_per_word; |
| 145 | u32 hz; |
| 146 | |
| 147 | if (t) { |
| 148 | bits_per_word = t->bits_per_word; |
| 149 | hz = t->speed_hz; |
| 150 | } else { |
| 151 | bits_per_word = 0; |
| 152 | hz = 0; |
| 153 | } |
| 154 | |
| 155 | /* spi_transfer level calls that work per-word */ |
| 156 | if (!bits_per_word) |
| 157 | bits_per_word = spi->bits_per_word; |
| 158 | if (bits_per_word <= 8) |
| 159 | cs->txrx_bufs = bitbang_txrx_8; |
| 160 | else if (bits_per_word <= 16) |
| 161 | cs->txrx_bufs = bitbang_txrx_16; |
| 162 | else if (bits_per_word <= 32) |
| 163 | cs->txrx_bufs = bitbang_txrx_32; |
| 164 | else |
| 165 | return -EINVAL; |
| 166 | |
| 167 | /* nsecs = (clock period)/2 */ |
| 168 | if (!hz) |
| 169 | hz = spi->max_speed_hz; |
David Brownell | 1e316d7 | 2006-04-06 22:25:56 -0700 | [diff] [blame] | 170 | if (hz) { |
| 171 | cs->nsecs = (1000000000/2) / hz; |
| 172 | if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000)) |
| 173 | return -EINVAL; |
| 174 | } |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 175 | |
| 176 | return 0; |
| 177 | } |
Kumar Gala | ff9f477 | 2006-04-02 16:06:35 -0500 | [diff] [blame] | 178 | EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer); |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 179 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 180 | /** |
| 181 | * spi_bitbang_setup - default setup for per-word I/O loops |
| 182 | */ |
| 183 | int spi_bitbang_setup(struct spi_device *spi) |
| 184 | { |
| 185 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 186 | struct spi_bitbang *bitbang; |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 187 | int retval; |
David Brownell | d52df2e | 2008-01-08 15:32:40 -0800 | [diff] [blame] | 188 | unsigned long flags; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 189 | |
David Brownell | ccf77cc | 2006-04-03 15:46:22 -0700 | [diff] [blame] | 190 | bitbang = spi_master_get_devdata(spi->master); |
| 191 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 192 | if (!cs) { |
Christoph Lameter | e94b176 | 2006-12-06 20:33:17 -0800 | [diff] [blame] | 193 | cs = kzalloc(sizeof *cs, GFP_KERNEL); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 194 | if (!cs) |
| 195 | return -ENOMEM; |
| 196 | spi->controller_state = cs; |
| 197 | } |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 198 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 199 | /* per-word shift register access, in hardware or bitbanging */ |
| 200 | cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; |
| 201 | if (!cs->txrx_word) |
| 202 | return -EINVAL; |
| 203 | |
Hans-Peter Nilsson | 7f8c761 | 2007-02-12 00:52:44 -0800 | [diff] [blame] | 204 | retval = bitbang->setup_transfer(spi, NULL); |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 205 | if (retval < 0) |
| 206 | return retval; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 207 | |
David Brownell | 7d07719 | 2009-06-17 16:26:03 -0700 | [diff] [blame] | 208 | dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 209 | |
| 210 | /* NOTE we _need_ to call chipselect() early, ideally with adapter |
| 211 | * setup, unless the hardware defaults cooperate to avoid confusion |
| 212 | * between normal (active low) and inverted chipselects. |
| 213 | */ |
| 214 | |
| 215 | /* deselect chip (low or high) */ |
David Brownell | d52df2e | 2008-01-08 15:32:40 -0800 | [diff] [blame] | 216 | spin_lock_irqsave(&bitbang->lock, flags); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 217 | if (!bitbang->busy) { |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 218 | bitbang->chipselect(spi, BITBANG_CS_INACTIVE); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 219 | ndelay(cs->nsecs); |
| 220 | } |
David Brownell | d52df2e | 2008-01-08 15:32:40 -0800 | [diff] [blame] | 221 | spin_unlock_irqrestore(&bitbang->lock, flags); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | EXPORT_SYMBOL_GPL(spi_bitbang_setup); |
| 226 | |
| 227 | /** |
| 228 | * spi_bitbang_cleanup - default cleanup for per-word I/O loops |
| 229 | */ |
Hans-Peter Nilsson | 0ffa028 | 2007-02-12 00:52:45 -0800 | [diff] [blame] | 230 | void spi_bitbang_cleanup(struct spi_device *spi) |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 231 | { |
| 232 | kfree(spi->controller_state); |
| 233 | } |
| 234 | EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); |
| 235 | |
| 236 | static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) |
| 237 | { |
| 238 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 239 | unsigned nsecs = cs->nsecs; |
| 240 | |
| 241 | return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); |
| 242 | } |
| 243 | |
| 244 | /*----------------------------------------------------------------------*/ |
| 245 | |
| 246 | /* |
| 247 | * SECOND PART ... simple transfer queue runner. |
| 248 | * |
| 249 | * This costs a task context per controller, running the queue by |
| 250 | * performing each transfer in sequence. Smarter hardware can queue |
| 251 | * several DMA transfers at once, and process several controller queues |
| 252 | * in parallel; this driver doesn't match such hardware very well. |
| 253 | * |
| 254 | * Drivers can provide word-at-a-time i/o primitives, or provide |
| 255 | * transfer-at-a-time ones to leverage dma or fifo hardware. |
| 256 | */ |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 257 | static void bitbang_work(struct work_struct *work) |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 258 | { |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 259 | struct spi_bitbang *bitbang = |
| 260 | container_of(work, struct spi_bitbang, work); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 261 | unsigned long flags; |
David Brownell | 529ba0d | 2009-06-30 11:41:30 -0700 | [diff] [blame] | 262 | int (*setup_transfer)(struct spi_device *, |
| 263 | struct spi_transfer *); |
| 264 | |
| 265 | setup_transfer = bitbang->setup_transfer; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 266 | |
| 267 | spin_lock_irqsave(&bitbang->lock, flags); |
| 268 | bitbang->busy = 1; |
| 269 | while (!list_empty(&bitbang->queue)) { |
| 270 | struct spi_message *m; |
| 271 | struct spi_device *spi; |
| 272 | unsigned nsecs; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 273 | struct spi_transfer *t = NULL; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 274 | unsigned tmp; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 275 | unsigned cs_change; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 276 | int status; |
Brian Niebuhr | b8f2e7b | 2010-07-02 15:30:17 +0000 | [diff] [blame] | 277 | int do_setup = -1; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 278 | |
| 279 | m = container_of(bitbang->queue.next, struct spi_message, |
| 280 | queue); |
| 281 | list_del_init(&m->queue); |
| 282 | spin_unlock_irqrestore(&bitbang->lock, flags); |
| 283 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 284 | /* FIXME this is made-up ... the correct value is known to |
| 285 | * word-at-a-time bitbang code, and presumably chipselect() |
| 286 | * should enforce these requirements too? |
| 287 | */ |
| 288 | nsecs = 100; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 289 | |
| 290 | spi = m->spi; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 291 | tmp = 0; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 292 | cs_change = 1; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 293 | status = 0; |
| 294 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 295 | list_for_each_entry (t, &m->transfers, transfer_list) { |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 296 | |
David Brownell | 529ba0d | 2009-06-30 11:41:30 -0700 | [diff] [blame] | 297 | /* override speed or wordsize? */ |
| 298 | if (t->speed_hz || t->bits_per_word) |
| 299 | do_setup = 1; |
| 300 | |
| 301 | /* init (-1) or override (1) transfer params */ |
| 302 | if (do_setup != 0) { |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 303 | if (!setup_transfer) { |
| 304 | status = -ENOPROTOOPT; |
| 305 | break; |
| 306 | } |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 307 | status = setup_transfer(spi, t); |
| 308 | if (status < 0) |
| 309 | break; |
Brian Niebuhr | b8f2e7b | 2010-07-02 15:30:17 +0000 | [diff] [blame] | 310 | if (do_setup == -1) |
| 311 | do_setup = 0; |
Imre Deak | 4cff33f | 2006-02-17 10:02:18 -0800 | [diff] [blame] | 312 | } |
| 313 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 314 | /* set up default clock polarity, and activate chip; |
| 315 | * this implicitly updates clock and spi modes as |
| 316 | * previously recorded for this device via setup(). |
| 317 | * (and also deselects any other chip that might be |
| 318 | * selected ...) |
| 319 | */ |
| 320 | if (cs_change) { |
| 321 | bitbang->chipselect(spi, BITBANG_CS_ACTIVE); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 322 | ndelay(nsecs); |
| 323 | } |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 324 | cs_change = t->cs_change; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 325 | if (!t->tx_buf && !t->rx_buf && t->len) { |
| 326 | status = -EINVAL; |
| 327 | break; |
| 328 | } |
| 329 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 330 | /* transfer data. the lower level code handles any |
| 331 | * new dma mappings it needs. our caller always gave |
| 332 | * us dma-safe buffers. |
| 333 | */ |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 334 | if (t->len) { |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 335 | /* REVISIT dma API still needs a designated |
| 336 | * DMA_ADDR_INVALID; ~0 might be better. |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 337 | */ |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 338 | if (!m->is_dma_mapped) |
| 339 | t->rx_dma = t->tx_dma = 0; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 340 | status = bitbang->txrx_bufs(spi, t); |
| 341 | } |
Jan Nikitenko | 2cfb8ce | 2008-03-13 12:32:39 -0700 | [diff] [blame] | 342 | if (status > 0) |
| 343 | m->actual_length += status; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 344 | if (status != t->len) { |
Jan Nikitenko | 2cfb8ce | 2008-03-13 12:32:39 -0700 | [diff] [blame] | 345 | /* always report some kind of error */ |
| 346 | if (status >= 0) |
| 347 | status = -EREMOTEIO; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 348 | break; |
| 349 | } |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 350 | status = 0; |
| 351 | |
| 352 | /* protocol tweaks before next transfer */ |
| 353 | if (t->delay_usecs) |
| 354 | udelay(t->delay_usecs); |
| 355 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 356 | if (!cs_change) |
| 357 | continue; |
| 358 | if (t->transfer_list.next == &m->transfers) |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 359 | break; |
| 360 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 361 | /* sometimes a short mid-message deselect of the chip |
| 362 | * may be needed to terminate a mode or command |
| 363 | */ |
| 364 | ndelay(nsecs); |
| 365 | bitbang->chipselect(spi, BITBANG_CS_INACTIVE); |
| 366 | ndelay(nsecs); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 367 | } |
| 368 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 369 | m->status = status; |
| 370 | m->complete(m->context); |
| 371 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 372 | /* normally deactivate chipselect ... unless no error and |
| 373 | * cs_change has hinted that the next message will probably |
| 374 | * be for this chip too. |
| 375 | */ |
| 376 | if (!(status == 0 && cs_change)) { |
| 377 | ndelay(nsecs); |
| 378 | bitbang->chipselect(spi, BITBANG_CS_INACTIVE); |
| 379 | ndelay(nsecs); |
| 380 | } |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 381 | |
| 382 | spin_lock_irqsave(&bitbang->lock, flags); |
| 383 | } |
| 384 | bitbang->busy = 0; |
| 385 | spin_unlock_irqrestore(&bitbang->lock, flags); |
| 386 | } |
| 387 | |
| 388 | /** |
| 389 | * spi_bitbang_transfer - default submit to transfer queue |
| 390 | */ |
| 391 | int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m) |
| 392 | { |
| 393 | struct spi_bitbang *bitbang; |
| 394 | unsigned long flags; |
David Brownell | 1e316d7 | 2006-04-06 22:25:56 -0700 | [diff] [blame] | 395 | int status = 0; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 396 | |
| 397 | m->actual_length = 0; |
| 398 | m->status = -EINPROGRESS; |
| 399 | |
| 400 | bitbang = spi_master_get_devdata(spi->master); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 401 | |
| 402 | spin_lock_irqsave(&bitbang->lock, flags); |
David Brownell | 1e316d7 | 2006-04-06 22:25:56 -0700 | [diff] [blame] | 403 | if (!spi->max_speed_hz) |
| 404 | status = -ENETDOWN; |
| 405 | else { |
| 406 | list_add_tail(&m->queue, &bitbang->queue); |
| 407 | queue_work(bitbang->workqueue, &bitbang->work); |
| 408 | } |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 409 | spin_unlock_irqrestore(&bitbang->lock, flags); |
| 410 | |
David Brownell | 1e316d7 | 2006-04-06 22:25:56 -0700 | [diff] [blame] | 411 | return status; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 412 | } |
| 413 | EXPORT_SYMBOL_GPL(spi_bitbang_transfer); |
| 414 | |
| 415 | /*----------------------------------------------------------------------*/ |
| 416 | |
| 417 | /** |
| 418 | * spi_bitbang_start - start up a polled/bitbanging SPI master driver |
| 419 | * @bitbang: driver handle |
| 420 | * |
| 421 | * Caller should have zero-initialized all parts of the structure, and then |
| 422 | * provided callbacks for chip selection and I/O loops. If the master has |
| 423 | * a transfer method, its final step should call spi_bitbang_transfer; or, |
| 424 | * that's the default if the transfer routine is not initialized. It should |
| 425 | * also set up the bus number and number of chipselects. |
| 426 | * |
| 427 | * For i/o loops, provide callbacks either per-word (for bitbanging, or for |
| 428 | * hardware that basically exposes a shift register) or per-spi_transfer |
| 429 | * (which takes better advantage of hardware like fifos or DMA engines). |
| 430 | * |
Hans-Peter Nilsson | 7f8c761 | 2007-02-12 00:52:44 -0800 | [diff] [blame] | 431 | * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup, |
| 432 | * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi |
| 433 | * master methods. Those methods are the defaults if the bitbang->txrx_bufs |
| 434 | * routine isn't initialized. |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 435 | * |
| 436 | * This routine registers the spi_master, which will process requests in a |
| 437 | * dedicated task, keeping IRQs unblocked most of the time. To stop |
| 438 | * processing those requests, call spi_bitbang_stop(). |
| 439 | */ |
| 440 | int spi_bitbang_start(struct spi_bitbang *bitbang) |
| 441 | { |
| 442 | int status; |
| 443 | |
| 444 | if (!bitbang->master || !bitbang->chipselect) |
| 445 | return -EINVAL; |
| 446 | |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 447 | INIT_WORK(&bitbang->work, bitbang_work); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 448 | spin_lock_init(&bitbang->lock); |
| 449 | INIT_LIST_HEAD(&bitbang->queue); |
| 450 | |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 451 | if (!bitbang->master->mode_bits) |
| 452 | bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; |
| 453 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 454 | if (!bitbang->master->transfer) |
| 455 | bitbang->master->transfer = spi_bitbang_transfer; |
| 456 | if (!bitbang->txrx_bufs) { |
| 457 | bitbang->use_dma = 0; |
| 458 | bitbang->txrx_bufs = spi_bitbang_bufs; |
| 459 | if (!bitbang->master->setup) { |
Kumar Gala | ff9f477 | 2006-04-02 16:06:35 -0500 | [diff] [blame] | 460 | if (!bitbang->setup_transfer) |
| 461 | bitbang->setup_transfer = |
| 462 | spi_bitbang_setup_transfer; |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 463 | bitbang->master->setup = spi_bitbang_setup; |
| 464 | bitbang->master->cleanup = spi_bitbang_cleanup; |
| 465 | } |
| 466 | } else if (!bitbang->master->setup) |
| 467 | return -EINVAL; |
| 468 | |
| 469 | /* this task is the only thing to touch the SPI bits */ |
| 470 | bitbang->busy = 0; |
| 471 | bitbang->workqueue = create_singlethread_workqueue( |
Kay Sievers | 35f74fc | 2009-01-06 10:44:37 -0800 | [diff] [blame] | 472 | dev_name(bitbang->master->dev.parent)); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 473 | if (bitbang->workqueue == NULL) { |
| 474 | status = -EBUSY; |
| 475 | goto err1; |
| 476 | } |
| 477 | |
| 478 | /* driver may get busy before register() returns, especially |
| 479 | * if someone registered boardinfo for devices |
| 480 | */ |
| 481 | status = spi_register_master(bitbang->master); |
| 482 | if (status < 0) |
| 483 | goto err2; |
| 484 | |
| 485 | return status; |
| 486 | |
| 487 | err2: |
| 488 | destroy_workqueue(bitbang->workqueue); |
| 489 | err1: |
| 490 | return status; |
| 491 | } |
| 492 | EXPORT_SYMBOL_GPL(spi_bitbang_start); |
| 493 | |
| 494 | /** |
| 495 | * spi_bitbang_stop - stops the task providing spi communication |
| 496 | */ |
| 497 | int spi_bitbang_stop(struct spi_bitbang *bitbang) |
| 498 | { |
Chris Lesiak | a836f58 | 2007-03-16 13:38:13 -0800 | [diff] [blame] | 499 | spi_unregister_master(bitbang->master); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 500 | |
Chris Lesiak | a836f58 | 2007-03-16 13:38:13 -0800 | [diff] [blame] | 501 | WARN_ON(!list_empty(&bitbang->queue)); |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 502 | |
| 503 | destroy_workqueue(bitbang->workqueue); |
| 504 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 505 | return 0; |
| 506 | } |
| 507 | EXPORT_SYMBOL_GPL(spi_bitbang_stop); |
| 508 | |
| 509 | MODULE_LICENSE("GPL"); |
| 510 | |