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Archit Tanejae1ef4d22010-09-15 18:47:29 +05301/*
2 * linux/drivers/video/omap2/dss/dss_features.c
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/err.h>
23#include <linux/slab.h>
24
25#include <plat/display.h>
26#include <plat/cpu.h>
27
Archit Taneja067a57e2011-03-02 11:57:25 +053028#include "dss.h"
Archit Tanejae1ef4d22010-09-15 18:47:29 +053029#include "dss_features.h"
30
31/* Defines a generic omap register field */
32struct dss_reg_field {
33 enum dss_feat_reg_field id;
34 u8 start, end;
35};
36
37struct omap_dss_features {
38 const struct dss_reg_field *reg_fields;
39 const int num_reg_fields;
40
41 const u32 has_feature;
42
43 const int num_mgrs;
44 const int num_ovls;
Archit Taneja819d8072011-03-01 11:54:00 +053045 const unsigned long max_dss_fck;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053046 const enum omap_display_type *supported_displays;
47 const enum omap_color_mode *supported_color_modes;
Archit Taneja067a57e2011-03-02 11:57:25 +053048 const struct dss_clk_source_name *clksrc_names;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053049};
50
51/* This struct is assigned to one of the below during initialization */
52static struct omap_dss_features *omap_current_dss_features;
53
54static const struct dss_reg_field omap2_dss_reg_fields[] = {
55 { FEAT_REG_FIRHINC, 11, 0 },
56 { FEAT_REG_FIRVINC, 27, 16 },
57 { FEAT_REG_FIFOLOWTHRESHOLD, 8, 0 },
58 { FEAT_REG_FIFOHIGHTHRESHOLD, 24, 16 },
59 { FEAT_REG_FIFOSIZE, 8, 0 },
Archit Taneja87a74842011-03-02 11:19:50 +053060 { FEAT_REG_HORIZONTALACCU, 9, 0 },
61 { FEAT_REG_VERTICALACCU, 25, 16 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +053062};
63
64static const struct dss_reg_field omap3_dss_reg_fields[] = {
65 { FEAT_REG_FIRHINC, 12, 0 },
66 { FEAT_REG_FIRVINC, 28, 16 },
67 { FEAT_REG_FIFOLOWTHRESHOLD, 11, 0 },
68 { FEAT_REG_FIFOHIGHTHRESHOLD, 27, 16 },
69 { FEAT_REG_FIFOSIZE, 10, 0 },
Archit Taneja87a74842011-03-02 11:19:50 +053070 { FEAT_REG_HORIZONTALACCU, 9, 0 },
71 { FEAT_REG_VERTICALACCU, 25, 16 },
72};
73
74static const struct dss_reg_field omap4_dss_reg_fields[] = {
75 { FEAT_REG_FIRHINC, 12, 0 },
76 { FEAT_REG_FIRVINC, 28, 16 },
77 { FEAT_REG_FIFOLOWTHRESHOLD, 15, 0 },
78 { FEAT_REG_FIFOHIGHTHRESHOLD, 31, 16 },
79 { FEAT_REG_FIFOSIZE, 15, 0 },
80 { FEAT_REG_HORIZONTALACCU, 10, 0 },
81 { FEAT_REG_VERTICALACCU, 26, 16 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +053082};
83
84static const enum omap_display_type omap2_dss_supported_displays[] = {
85 /* OMAP_DSS_CHANNEL_LCD */
Tomi Valkeinenf8df01f2011-02-24 14:21:25 +020086 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
Archit Tanejae1ef4d22010-09-15 18:47:29 +053087
88 /* OMAP_DSS_CHANNEL_DIGIT */
89 OMAP_DISPLAY_TYPE_VENC,
90};
91
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +020092static const enum omap_display_type omap3430_dss_supported_displays[] = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +053093 /* OMAP_DSS_CHANNEL_LCD */
94 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
95 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
96
97 /* OMAP_DSS_CHANNEL_DIGIT */
98 OMAP_DISPLAY_TYPE_VENC,
99};
100
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200101static const enum omap_display_type omap3630_dss_supported_displays[] = {
102 /* OMAP_DSS_CHANNEL_LCD */
103 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
104 OMAP_DISPLAY_TYPE_DSI,
105
106 /* OMAP_DSS_CHANNEL_DIGIT */
107 OMAP_DISPLAY_TYPE_VENC,
108};
109
Archit Tanejad50cd032010-12-02 11:27:08 +0000110static const enum omap_display_type omap4_dss_supported_displays[] = {
111 /* OMAP_DSS_CHANNEL_LCD */
112 OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
113
114 /* OMAP_DSS_CHANNEL_DIGIT */
115 OMAP_DISPLAY_TYPE_VENC,
116
117 /* OMAP_DSS_CHANNEL_LCD2 */
118 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
119 OMAP_DISPLAY_TYPE_DSI,
120};
121
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530122static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
123 /* OMAP_DSS_GFX */
124 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
125 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
126 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
127 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
128
129 /* OMAP_DSS_VIDEO1 */
130 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
131 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
132 OMAP_DSS_COLOR_UYVY,
133
134 /* OMAP_DSS_VIDEO2 */
135 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
136 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
137 OMAP_DSS_COLOR_UYVY,
138};
139
140static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
141 /* OMAP_DSS_GFX */
142 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
143 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
144 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
145 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
146 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
147 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
148
149 /* OMAP_DSS_VIDEO1 */
150 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
151 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
152 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
153
154 /* OMAP_DSS_VIDEO2 */
155 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
156 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
157 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
158 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
159 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
160};
161
Archit Taneja067a57e2011-03-02 11:57:25 +0530162static const struct dss_clk_source_name omap2_dss_clk_source_names[] = {
163 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "N/A" },
164 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "N/A" },
165 { DSS_CLK_SRC_FCK, "DSS_FCLK1" },
166};
167
168static const struct dss_clk_source_name omap3_dss_clk_source_names[] = {
169 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "DSI1_PLL_FCLK" },
170 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "DSI2_PLL_FCLK" },
171 { DSS_CLK_SRC_FCK, "DSS1_ALWON_FCLK" },
172};
173
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530174/* OMAP2 DSS Features */
175static struct omap_dss_features omap2_dss_features = {
176 .reg_fields = omap2_dss_reg_fields,
177 .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
178
Archit Tanejad50cd032010-12-02 11:27:08 +0000179 .has_feature =
180 FEAT_LCDENABLEPOL | FEAT_LCDENABLESIGNAL |
Archit Taneja87a74842011-03-02 11:19:50 +0530181 FEAT_PCKFREEENABLE | FEAT_FUNCGATED |
182 FEAT_ROWREPEATENABLE | FEAT_RESIZECONF,
Archit Tanejad50cd032010-12-02 11:27:08 +0000183
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530184 .num_mgrs = 2,
185 .num_ovls = 3,
Archit Taneja819d8072011-03-01 11:54:00 +0530186 .max_dss_fck = 173000000,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530187 .supported_displays = omap2_dss_supported_displays,
188 .supported_color_modes = omap2_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530189 .clksrc_names = omap2_dss_clk_source_names,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530190};
191
192/* OMAP3 DSS Features */
Samreen8fbde102010-11-04 12:28:41 +0100193static struct omap_dss_features omap3430_dss_features = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530194 .reg_fields = omap3_dss_reg_fields,
195 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
196
Archit Tanejad50cd032010-12-02 11:27:08 +0000197 .has_feature =
198 FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL |
199 FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
Archit Taneja87a74842011-03-02 11:19:50 +0530200 FEAT_FUNCGATED | FEAT_ROWREPEATENABLE |
201 FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530202
203 .num_mgrs = 2,
204 .num_ovls = 3,
Archit Taneja819d8072011-03-01 11:54:00 +0530205 .max_dss_fck = 173000000,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200206 .supported_displays = omap3430_dss_supported_displays,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530207 .supported_color_modes = omap3_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530208 .clksrc_names = omap3_dss_clk_source_names,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530209};
210
Samreen8fbde102010-11-04 12:28:41 +0100211static struct omap_dss_features omap3630_dss_features = {
212 .reg_fields = omap3_dss_reg_fields,
213 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
214
Archit Tanejad50cd032010-12-02 11:27:08 +0000215 .has_feature =
216 FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL |
217 FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
Archit Taneja87a74842011-03-02 11:19:50 +0530218 FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED |
219 FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT |
220 FEAT_RESIZECONF,
Samreen8fbde102010-11-04 12:28:41 +0100221
222 .num_mgrs = 2,
223 .num_ovls = 3,
Archit Taneja819d8072011-03-01 11:54:00 +0530224 .max_dss_fck = 173000000,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200225 .supported_displays = omap3630_dss_supported_displays,
Samreen8fbde102010-11-04 12:28:41 +0100226 .supported_color_modes = omap3_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530227 .clksrc_names = omap3_dss_clk_source_names,
Samreen8fbde102010-11-04 12:28:41 +0100228};
229
Archit Tanejad50cd032010-12-02 11:27:08 +0000230/* OMAP4 DSS Features */
231static struct omap_dss_features omap4_dss_features = {
Archit Taneja87a74842011-03-02 11:19:50 +0530232 .reg_fields = omap4_dss_reg_fields,
233 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
Archit Tanejad50cd032010-12-02 11:27:08 +0000234
235 .has_feature =
236 FEAT_GLOBAL_ALPHA | FEAT_PRE_MULT_ALPHA |
Archit Taneja87a74842011-03-02 11:19:50 +0530237 FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1,
Archit Tanejad50cd032010-12-02 11:27:08 +0000238
239 .num_mgrs = 3,
240 .num_ovls = 3,
Archit Taneja819d8072011-03-01 11:54:00 +0530241 .max_dss_fck = 186000000,
Archit Tanejad50cd032010-12-02 11:27:08 +0000242 .supported_displays = omap4_dss_supported_displays,
243 .supported_color_modes = omap3_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530244 .clksrc_names = omap3_dss_clk_source_names,
Archit Tanejad50cd032010-12-02 11:27:08 +0000245};
246
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530247/* Functions returning values related to a DSS feature */
248int dss_feat_get_num_mgrs(void)
249{
250 return omap_current_dss_features->num_mgrs;
251}
252
253int dss_feat_get_num_ovls(void)
254{
255 return omap_current_dss_features->num_ovls;
256}
257
Archit Taneja819d8072011-03-01 11:54:00 +0530258/* Max supported DSS FCK in Hz */
259unsigned long dss_feat_get_max_dss_fck(void)
260{
261 return omap_current_dss_features->max_dss_fck;
262}
263
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530264enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
265{
266 return omap_current_dss_features->supported_displays[channel];
267}
268
269enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
270{
271 return omap_current_dss_features->supported_color_modes[plane];
272}
273
Archit Taneja8dad2ab2010-11-25 17:58:10 +0530274bool dss_feat_color_mode_supported(enum omap_plane plane,
275 enum omap_color_mode color_mode)
276{
277 return omap_current_dss_features->supported_color_modes[plane] &
278 color_mode;
279}
280
Archit Taneja067a57e2011-03-02 11:57:25 +0530281const char *dss_feat_get_clk_source_name(enum dss_clk_source id)
282{
283 return omap_current_dss_features->clksrc_names[id].clksrc_name;
284}
285
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530286/* DSS has_feature check */
287bool dss_has_feature(enum dss_feat_id id)
288{
289 return omap_current_dss_features->has_feature & id;
290}
291
292void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
293{
294 if (id >= omap_current_dss_features->num_reg_fields)
295 BUG();
296
297 *start = omap_current_dss_features->reg_fields[id].start;
298 *end = omap_current_dss_features->reg_fields[id].end;
299}
300
301void dss_features_init(void)
302{
303 if (cpu_is_omap24xx())
304 omap_current_dss_features = &omap2_dss_features;
Samreen8fbde102010-11-04 12:28:41 +0100305 else if (cpu_is_omap3630())
306 omap_current_dss_features = &omap3630_dss_features;
307 else if (cpu_is_omap34xx())
308 omap_current_dss_features = &omap3430_dss_features;
Archit Tanejad50cd032010-12-02 11:27:08 +0000309 else
310 omap_current_dss_features = &omap4_dss_features;
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530311}