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Rohit Vaswani99fb6f22011-08-15 13:37:32 -07001/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_9615_H
24#define __ASM_ARCH_MSM_IOMAP_9615_H
25
26/* Physical base address and size of peripherals.
27 * Ordered by the virtual base addresses they will be mapped at.
28 *
29 * If you add or remove entries here, you'll want to edit the
30 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
31 * changes.
32 *
33 */
34
35#define MSM9615_TMR_PHYS 0x0200A000
36#define MSM9615_TMR_SIZE SZ_4K
37
38#define MSM9615_QGIC_DIST_PHYS 0x02000000
39#define MSM9615_QGIC_DIST_SIZE SZ_4K
40
41#define MSM9615_QGIC_CPU_PHYS 0x02002000
42#define MSM9615_QGIC_CPU_SIZE SZ_4K
43
Jeff Ohlsteind19bf442011-09-09 12:48:18 -070044#define MSM9615_DMOV_PHYS 0x18320000
Rohit Vaswani99fb6f22011-08-15 13:37:32 -070045#define MSM9615_DMOV_SIZE SZ_1M
46
47#define MSM9615_TLMM_PHYS 0x00800000
48#define MSM9615_TLMM_SIZE SZ_1M
49
50#define MSM9615_ACC0_PHYS 0x02008000
51#define MSM9615_ACC0_SIZE SZ_4K
52
Rohit Vaswani71c86b72011-09-09 16:51:46 -070053#define MSM9615_APCS_GCC_PHYS 0x02011000
Rohit Vaswani99fb6f22011-08-15 13:37:32 -070054#define MSM9615_APCS_GCC_SIZE SZ_4K
55
56#define MSM9615_SAW0_PHYS 0x02009000
57#define MSM9615_SAW0_SIZE SZ_4K
58
59#define MSM9615_TCSR_PHYS 0x1A400000
60#define MSM9615_TCSR_SIZE SZ_4K
61
Vikram Mulukutla489e39e2011-08-31 18:04:05 -070062#define MSM9615_L2CC_PHYS 0x02040000
63#define MSM9615_L2CC_SIZE SZ_4K
64
65#define MSM9615_CLK_CTL_PHYS 0x00900000
66#define MSM9615_CLK_CTL_SIZE SZ_16K
67
68#define MSM9615_LPASS_CLK_CTL_PHYS 0x28000000
69#define MSM9615_LPASS_CLK_CTL_SIZE SZ_4K
70
Rohit Vaswani71c86b72011-09-09 16:51:46 -070071#define MSM9615_RPM_PHYS 0x00108000
72#define MSM9615_RPM_SIZE SZ_4K
73
74#define MSM9615_RPM_MPM_PHYS 0x00200000
75#define MSM9615_RPM_MPM_SIZE SZ_4K
76
77#define MSM9615_APCS_GLB_PHYS 0x02010000
78#define MSM9615_APCS_GLB_SIZE SZ_4K
79
Amit Blay07734982011-09-21 11:07:43 +030080#define MSM9615_HSUSB_PHYS 0x12500000
81#define MSM9615_HSUSB_SIZE SZ_4K
82
Siddartha Mohanadoss5d49cec2011-09-21 10:26:15 -070083#define MSM9615_QFPROM_PHYS 0x00700000
84#define MSM9615_QFPROM_SIZE SZ_4K
85
Rohit Vaswani99fb6f22011-08-15 13:37:32 -070086#endif