Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 1 | /* include/linux/msm_mdp.h |
| 2 | * |
| 3 | * Copyright (C) 2007 Google Incorporated |
Ken Zhang | 420dd20 | 2013-01-08 14:28:20 -0500 | [diff] [blame] | 4 | * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved. |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | #ifndef _MSM_MDP_H_ |
| 16 | #define _MSM_MDP_H_ |
| 17 | |
| 18 | #include <linux/types.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 19 | #include <linux/fb.h> |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 20 | |
| 21 | #define MSMFB_IOCTL_MAGIC 'm' |
| 22 | #define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) |
| 23 | #define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 24 | #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) |
| 25 | #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) |
| 26 | #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) |
| 27 | #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 28 | #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 29 | /* new ioctls's for set/get ccs matrix */ |
| 30 | #define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) |
| 31 | #define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) |
| 32 | #define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ |
| 33 | struct mdp_overlay) |
| 34 | #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) |
Kuogee Hsieh | 586fd16 | 2012-02-14 15:24:16 -0800 | [diff] [blame] | 35 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 36 | #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ |
| 37 | struct msmfb_overlay_data) |
Kuogee Hsieh | 586fd16 | 2012-02-14 15:24:16 -0800 | [diff] [blame] | 38 | #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY |
| 39 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 40 | #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ |
| 41 | struct mdp_page_protection) |
| 42 | #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ |
| 43 | struct mdp_page_protection) |
| 44 | #define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ |
| 45 | struct mdp_overlay) |
| 46 | #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) |
| 47 | #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ |
| 48 | struct msmfb_overlay_blt) |
| 49 | #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 50 | #define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ |
| 51 | struct mdp_histogram_start_req) |
| 52 | #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) |
Carl Vanderlip | 0d6ef4a | 2013-05-30 11:48:48 -0700 | [diff] [blame] | 53 | #define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 54 | |
| 55 | #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ |
| 56 | struct msmfb_overlay_3d) |
| 57 | |
kuogee hsieh | 405dc30 | 2011-07-21 15:06:59 -0700 | [diff] [blame] | 58 | #define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ |
| 59 | struct msmfb_mixer_info_req) |
Nagamalleswararao Ganji | 0737d65 | 2011-10-14 02:02:33 -0700 | [diff] [blame] | 60 | #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ |
| 61 | struct msmfb_overlay_data) |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 62 | #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) |
Vinay Kalia | e1ba270 | 2011-12-21 16:24:52 -0800 | [diff] [blame] | 63 | #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) |
| 64 | #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 65 | #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ |
| 66 | struct msmfb_data) |
| 67 | #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ |
| 68 | struct msmfb_data) |
| 69 | #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 70 | #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) |
Padmanabhan Komanduru | f3b0c23 | 2012-07-27 20:46:06 +0530 | [diff] [blame] | 71 | #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) |
| 72 | #define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) |
Vishnuvardhan Prodduturi | feb2629 | 2013-02-06 18:23:35 +0530 | [diff] [blame] | 73 | #define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) |
Kalyan Thota | 9284a27 | 2012-11-02 20:55:30 +0530 | [diff] [blame] | 74 | #define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) |
Vishnuvardhan Prodduturi | feb2629 | 2013-02-06 18:23:35 +0530 | [diff] [blame] | 75 | #define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ |
Ken Zhang | 4e83b93 | 2012-12-02 21:15:47 -0500 | [diff] [blame] | 76 | struct mdp_display_commit) |
Vishnuvardhan Prodduturi | feb2629 | 2013-02-06 18:23:35 +0530 | [diff] [blame] | 77 | #define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) |
Ken Zhang | 420dd20 | 2013-01-08 14:28:20 -0500 | [diff] [blame] | 78 | #define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) |
Deva Ramasubramanian | 166b098 | 2013-01-25 20:11:41 -0800 | [diff] [blame] | 79 | #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \ |
| 80 | unsigned int) |
Terence Hampson | 3e636aa | 2013-05-08 19:01:51 -0400 | [diff] [blame] | 81 | #define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) |
Kuogee Hsieh | a77eca6 | 2012-09-13 13:22:04 -0700 | [diff] [blame] | 82 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 83 | #define FB_TYPE_3D_PANEL 0x10101010 |
| 84 | #define MDP_IMGTYPE2_START 0x10000 |
| 85 | #define MSMFB_DRIVER_VERSION 0xF9E8D701 |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 86 | |
| 87 | enum { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 88 | NOTIFY_UPDATE_START, |
| 89 | NOTIFY_UPDATE_STOP, |
| 90 | }; |
| 91 | |
| 92 | enum { |
Carl Vanderlip | 0d6ef4a | 2013-05-30 11:48:48 -0700 | [diff] [blame] | 93 | NOTIFY_TYPE_NO_UPDATE, |
| 94 | NOTIFY_TYPE_SUSPEND, |
| 95 | NOTIFY_TYPE_UPDATE, |
| 96 | }; |
| 97 | |
| 98 | enum { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 99 | MDP_RGB_565, /* RGB 565 planer */ |
| 100 | MDP_XRGB_8888, /* RGB 888 padded */ |
| 101 | MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ |
Padmanabhan Komanduru | d9f38b0 | 2012-02-02 18:57:03 +0530 | [diff] [blame] | 102 | MDP_Y_CBCR_H2V2_ADRENO, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 103 | MDP_ARGB_8888, /* ARGB 888 */ |
| 104 | MDP_RGB_888, /* RGB 888 planer */ |
| 105 | MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ |
| 106 | MDP_YCRYCB_H2V1, /* YCrYCb interleave */ |
Pawan Kumar | 42acdef | 2013-03-21 19:55:49 +0530 | [diff] [blame] | 107 | MDP_CBYCRY_H2V1, /* CbYCrY interleave */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 108 | MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
| 109 | MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
Adrian Salido-Moreno | e55fa12 | 2012-05-29 15:36:08 -0700 | [diff] [blame] | 110 | MDP_Y_CRCB_H1V2, |
| 111 | MDP_Y_CBCR_H1V2, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 112 | MDP_RGBA_8888, /* ARGB 888 */ |
| 113 | MDP_BGRA_8888, /* ABGR 888 */ |
| 114 | MDP_RGBX_8888, /* RGBX 888 */ |
| 115 | MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ |
| 116 | MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ |
| 117 | MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ |
Pradeep Jilagam | 9b4a6be | 2011-10-03 17:19:20 +0530 | [diff] [blame] | 118 | MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 119 | MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ |
| 120 | MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ |
| 121 | MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ |
Adrian Salido-Moreno | 2b41048 | 2011-08-15 10:40:40 -0700 | [diff] [blame] | 122 | MDP_YCRCB_H1V1, /* YCrCb interleave */ |
| 123 | MDP_YCBCR_H1V1, /* YCbCr interleave */ |
Adrian Salido-Moreno | e55fa12 | 2012-05-29 15:36:08 -0700 | [diff] [blame] | 124 | MDP_BGR_565, /* BGR 565 planer */ |
Adrian Salido-Moreno | d559ef1 | 2012-07-12 20:16:14 -0700 | [diff] [blame] | 125 | MDP_BGR_888, /* BGR 888 */ |
Adrian Salido-Moreno | 330c0bf | 2012-08-22 14:15:33 -0700 | [diff] [blame] | 126 | MDP_Y_CBCR_H2V2_VENUS, |
Pawan Kumar | 7985438 | 2013-02-14 15:27:12 +0530 | [diff] [blame] | 127 | MDP_BGRX_8888, /* BGRX 8888 */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 128 | MDP_IMGTYPE_LIMIT, |
kuogee hsieh | 1ce7e4c | 2012-01-13 14:05:54 -0800 | [diff] [blame] | 129 | MDP_RGB_BORDERFILL, /* border fill pipe */ |
Adrian Salido-Moreno | e55fa12 | 2012-05-29 15:36:08 -0700 | [diff] [blame] | 130 | MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 131 | MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 132 | }; |
| 133 | |
| 134 | enum { |
| 135 | PMEM_IMG, |
| 136 | FB_IMG, |
| 137 | }; |
| 138 | |
Liyuan Li | d973663 | 2011-11-11 13:47:59 -0800 | [diff] [blame] | 139 | enum { |
| 140 | HSIC_HUE = 0, |
| 141 | HSIC_SAT, |
| 142 | HSIC_INT, |
| 143 | HSIC_CON, |
| 144 | NUM_HSIC_PARAM, |
| 145 | }; |
| 146 | |
Adrian Salido-Moreno | 1857f06 | 2012-05-29 17:57:28 -0700 | [diff] [blame] | 147 | #define MDSS_MDP_ROT_ONLY 0x80 |
Adrian Salido-Moreno | e55fa12 | 2012-05-29 15:36:08 -0700 | [diff] [blame] | 148 | #define MDSS_MDP_RIGHT_MIXER 0x100 |
| 149 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 150 | /* mdp_blit_req flag values */ |
| 151 | #define MDP_ROT_NOP 0 |
| 152 | #define MDP_FLIP_LR 0x1 |
| 153 | #define MDP_FLIP_UD 0x2 |
| 154 | #define MDP_ROT_90 0x4 |
| 155 | #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) |
| 156 | #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) |
| 157 | #define MDP_DITHER 0x8 |
| 158 | #define MDP_BLUR 0x10 |
| 159 | #define MDP_BLEND_FG_PREMULT 0x20000 |
Padmanabhan Komanduru | dd10bf1 | 2012-10-17 20:27:33 +0530 | [diff] [blame] | 160 | #define MDP_IS_FG 0x40000 |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 161 | #define MDP_DEINTERLACE 0x80000000 |
| 162 | #define MDP_SHARPENING 0x40000000 |
| 163 | #define MDP_NO_DMA_BARRIER_START 0x20000000 |
| 164 | #define MDP_NO_DMA_BARRIER_END 0x10000000 |
| 165 | #define MDP_NO_BLIT 0x08000000 |
| 166 | #define MDP_BLIT_WITH_DMA_BARRIERS 0x000 |
| 167 | #define MDP_BLIT_WITH_NO_DMA_BARRIERS \ |
| 168 | (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) |
| 169 | #define MDP_BLIT_SRC_GEM 0x04000000 |
| 170 | #define MDP_BLIT_DST_GEM 0x02000000 |
| 171 | #define MDP_BLIT_NON_CACHED 0x01000000 |
| 172 | #define MDP_OV_PIPE_SHARE 0x00800000 |
| 173 | #define MDP_DEINTERLACE_ODD 0x00400000 |
| 174 | #define MDP_OV_PLAY_NOWAIT 0x00200000 |
| 175 | #define MDP_SOURCE_ROTATED_90 0x00100000 |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 176 | #define MDP_OVERLAY_PP_CFG_EN 0x00080000 |
Ajay Singh Parmar | 4c7ccb3 | 2012-02-21 12:56:04 +0530 | [diff] [blame] | 177 | #define MDP_BACKEND_COMPOSITION 0x00040000 |
Nagamalleswararao Ganji | 880f847 | 2011-12-14 03:52:28 -0800 | [diff] [blame] | 178 | #define MDP_BORDERFILL_SUPPORTED 0x00010000 |
| 179 | #define MDP_SECURE_OVERLAY_SESSION 0x00008000 |
Adrian Salido-Moreno | 9a8485c | 2013-02-06 14:08:28 -0800 | [diff] [blame] | 180 | #define MDP_OV_PIPE_FORCE_DMA 0x00004000 |
Nagamalleswararao Ganji | 880f847 | 2011-12-14 03:52:28 -0800 | [diff] [blame] | 181 | #define MDP_MEMORY_ID_TYPE_FB 0x00001000 |
Sree Sesha Aravind Vadrevu | 3514313 | 2013-03-12 02:32:06 -0700 | [diff] [blame] | 182 | #define MDP_BWC_EN 0x00000400 |
Sree Sesha Aravind Vadrevu | 05d4d22 | 2013-04-01 14:31:28 -0700 | [diff] [blame] | 183 | #define MDP_DECIMATION_EN 0x00000800 |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 184 | #define MDP_TRANSP_NOP 0xffffffff |
| 185 | #define MDP_ALPHA_NOP 0xff |
| 186 | |
| 187 | #define MDP_FB_PAGE_PROTECTION_NONCACHED (0) |
| 188 | #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) |
| 189 | #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) |
| 190 | #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) |
| 191 | #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) |
| 192 | /* Sentinel: Don't use! */ |
| 193 | #define MDP_FB_PAGE_PROTECTION_INVALID (5) |
| 194 | /* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ |
| 195 | #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 196 | |
| 197 | struct mdp_rect { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 198 | uint32_t x; |
| 199 | uint32_t y; |
| 200 | uint32_t w; |
| 201 | uint32_t h; |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 202 | }; |
| 203 | |
| 204 | struct mdp_img { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 205 | uint32_t width; |
| 206 | uint32_t height; |
| 207 | uint32_t format; |
| 208 | uint32_t offset; |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 209 | int memory_id; /* the file descriptor */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 210 | uint32_t priv; |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 211 | }; |
| 212 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 213 | /* |
| 214 | * {3x3} + {3} ccs matrix |
| 215 | */ |
| 216 | |
| 217 | #define MDP_CCS_RGB2YUV 0 |
| 218 | #define MDP_CCS_YUV2RGB 1 |
| 219 | |
| 220 | #define MDP_CCS_SIZE 9 |
| 221 | #define MDP_BV_SIZE 3 |
| 222 | |
| 223 | struct mdp_ccs { |
| 224 | int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ |
| 225 | uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ |
| 226 | uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ |
| 227 | }; |
| 228 | |
Nagamalleswararao Ganji | 4b99172 | 2011-01-28 13:24:34 -0800 | [diff] [blame] | 229 | struct mdp_csc { |
| 230 | int id; |
| 231 | uint32_t csc_mv[9]; |
| 232 | uint32_t csc_pre_bv[3]; |
| 233 | uint32_t csc_post_bv[3]; |
| 234 | uint32_t csc_pre_lv[6]; |
| 235 | uint32_t csc_post_lv[6]; |
| 236 | }; |
| 237 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 238 | /* The version of the mdp_blit_req structure so that |
| 239 | * user applications can selectively decide which functionality |
| 240 | * to include |
| 241 | */ |
| 242 | |
| 243 | #define MDP_BLIT_REQ_VERSION 2 |
| 244 | |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 245 | struct mdp_blit_req { |
| 246 | struct mdp_img src; |
| 247 | struct mdp_img dst; |
| 248 | struct mdp_rect src_rect; |
| 249 | struct mdp_rect dst_rect; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 250 | uint32_t alpha; |
| 251 | uint32_t transp_mask; |
| 252 | uint32_t flags; |
| 253 | int sharpening_strength; /* -127 <--> 127, default 64 */ |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 254 | }; |
| 255 | |
| 256 | struct mdp_blit_req_list { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 257 | uint32_t count; |
Daniel Walker | da6df07 | 2010-04-23 16:04:20 -0700 | [diff] [blame] | 258 | struct mdp_blit_req req[]; |
| 259 | }; |
| 260 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 261 | #define MSMFB_DATA_VERSION 2 |
| 262 | |
| 263 | struct msmfb_data { |
| 264 | uint32_t offset; |
| 265 | int memory_id; |
| 266 | int id; |
| 267 | uint32_t flags; |
| 268 | uint32_t priv; |
Vinay Kalia | e1ba270 | 2011-12-21 16:24:52 -0800 | [diff] [blame] | 269 | uint32_t iova; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 270 | }; |
| 271 | |
| 272 | #define MSMFB_NEW_REQUEST -1 |
| 273 | |
| 274 | struct msmfb_overlay_data { |
| 275 | uint32_t id; |
| 276 | struct msmfb_data data; |
| 277 | uint32_t version_key; |
| 278 | struct msmfb_data plane1_data; |
| 279 | struct msmfb_data plane2_data; |
Adrian Salido-Moreno | 1857f06 | 2012-05-29 17:57:28 -0700 | [diff] [blame] | 280 | struct msmfb_data dst_data; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 281 | }; |
| 282 | |
| 283 | struct msmfb_img { |
| 284 | uint32_t width; |
| 285 | uint32_t height; |
| 286 | uint32_t format; |
| 287 | }; |
| 288 | |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 289 | #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 |
| 290 | struct msmfb_writeback_data { |
| 291 | struct msmfb_data buf_info; |
| 292 | struct msmfb_img img; |
| 293 | }; |
| 294 | |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 295 | #define MDP_PP_OPS_ENABLE 0x1 |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 296 | #define MDP_PP_OPS_READ 0x2 |
| 297 | #define MDP_PP_OPS_WRITE 0x4 |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 298 | #define MDP_PP_OPS_DISABLE 0x8 |
Ken Zhang | 824758e | 2012-08-15 11:02:21 -0400 | [diff] [blame] | 299 | #define MDP_PP_IGC_FLAG_ROM0 0x10 |
| 300 | #define MDP_PP_IGC_FLAG_ROM1 0x20 |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 301 | |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 302 | #define MDSS_PP_DSPP_CFG 0x000 |
| 303 | #define MDSS_PP_SSPP_CFG 0x100 |
| 304 | #define MDSS_PP_LM_CFG 0x200 |
| 305 | #define MDSS_PP_WB_CFG 0x300 |
Ping Li | 8231ae4 | 2013-01-09 20:39:25 -0500 | [diff] [blame] | 306 | |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 307 | #define MDSS_PP_ARG_MASK 0x3C00 |
| 308 | #define MDSS_PP_ARG_NUM 4 |
Carl Vanderlip | 793aa58 | 2013-03-18 10:18:47 -0700 | [diff] [blame] | 309 | #define MDSS_PP_ARG_SHIFT 10 |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 310 | #define MDSS_PP_LOCATION_MASK 0x0300 |
| 311 | #define MDSS_PP_LOGICAL_MASK 0x00FF |
Ping Li | 8231ae4 | 2013-01-09 20:39:25 -0500 | [diff] [blame] | 312 | |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 313 | #define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) |
| 314 | #define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) |
Ping Li | 8231ae4 | 2013-01-09 20:39:25 -0500 | [diff] [blame] | 315 | #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) |
| 316 | #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) |
| 317 | |
| 318 | |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 319 | struct mdp_qseed_cfg { |
| 320 | uint32_t table_num; |
| 321 | uint32_t ops; |
| 322 | uint32_t len; |
| 323 | uint32_t *data; |
| 324 | }; |
| 325 | |
Ping Li | 87cca83 | 2013-01-30 18:27:52 -0500 | [diff] [blame] | 326 | struct mdp_sharp_cfg { |
| 327 | uint32_t flags; |
| 328 | uint32_t strength; |
| 329 | uint32_t edge_thr; |
| 330 | uint32_t smooth_thr; |
| 331 | uint32_t noise_thr; |
| 332 | }; |
| 333 | |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 334 | struct mdp_qseed_cfg_data { |
| 335 | uint32_t block; |
| 336 | struct mdp_qseed_cfg qseed_data; |
| 337 | }; |
| 338 | |
Carl Vanderlip | 94d9b78 | 2013-01-16 12:13:52 -0800 | [diff] [blame] | 339 | #define MDP_OVERLAY_PP_CSC_CFG 0x1 |
| 340 | #define MDP_OVERLAY_PP_QSEED_CFG 0x2 |
| 341 | #define MDP_OVERLAY_PP_PA_CFG 0x4 |
| 342 | #define MDP_OVERLAY_PP_IGC_CFG 0x8 |
Ping Li | 87cca83 | 2013-01-30 18:27:52 -0500 | [diff] [blame] | 343 | #define MDP_OVERLAY_PP_SHARP_CFG 0x10 |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 344 | #define MDP_OVERLAY_PP_HIST_CFG 0x20 |
Carl Vanderlip | 5702713 | 2013-03-18 13:53:16 -0700 | [diff] [blame] | 345 | #define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 346 | |
| 347 | #define MDP_CSC_FLAG_ENABLE 0x1 |
| 348 | #define MDP_CSC_FLAG_YUV_IN 0x2 |
| 349 | #define MDP_CSC_FLAG_YUV_OUT 0x4 |
| 350 | |
| 351 | struct mdp_csc_cfg { |
| 352 | /* flags for enable CSC, toggling RGB,YUV input/output */ |
| 353 | uint32_t flags; |
| 354 | uint32_t csc_mv[9]; |
| 355 | uint32_t csc_pre_bv[3]; |
| 356 | uint32_t csc_post_bv[3]; |
| 357 | uint32_t csc_pre_lv[6]; |
| 358 | uint32_t csc_post_lv[6]; |
| 359 | }; |
| 360 | |
| 361 | struct mdp_csc_cfg_data { |
| 362 | uint32_t block; |
| 363 | struct mdp_csc_cfg csc_data; |
| 364 | }; |
| 365 | |
Ping Li | 5822924 | 2012-11-30 14:05:43 -0500 | [diff] [blame] | 366 | struct mdp_pa_cfg { |
| 367 | uint32_t flags; |
| 368 | uint32_t hue_adj; |
| 369 | uint32_t sat_adj; |
| 370 | uint32_t val_adj; |
| 371 | uint32_t cont_adj; |
| 372 | }; |
| 373 | |
Carl Vanderlip | 94d9b78 | 2013-01-16 12:13:52 -0800 | [diff] [blame] | 374 | struct mdp_igc_lut_data { |
| 375 | uint32_t block; |
| 376 | uint32_t len, ops; |
| 377 | uint32_t *c0_c1_data; |
| 378 | uint32_t *c2_data; |
| 379 | }; |
| 380 | |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 381 | struct mdp_histogram_cfg { |
| 382 | uint32_t ops; |
| 383 | uint32_t block; |
| 384 | uint8_t frame_cnt; |
| 385 | uint8_t bit_mask; |
| 386 | uint16_t num_bins; |
| 387 | }; |
| 388 | |
Carl Vanderlip | 5702713 | 2013-03-18 13:53:16 -0700 | [diff] [blame] | 389 | struct mdp_hist_lut_data { |
| 390 | uint32_t block; |
| 391 | uint32_t ops; |
| 392 | uint32_t len; |
| 393 | uint32_t *data; |
| 394 | }; |
| 395 | |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 396 | struct mdp_overlay_pp_params { |
| 397 | uint32_t config_ops; |
| 398 | struct mdp_csc_cfg csc_cfg; |
| 399 | struct mdp_qseed_cfg qseed_cfg[2]; |
Ping Li | 5822924 | 2012-11-30 14:05:43 -0500 | [diff] [blame] | 400 | struct mdp_pa_cfg pa_cfg; |
Carl Vanderlip | 94d9b78 | 2013-01-16 12:13:52 -0800 | [diff] [blame] | 401 | struct mdp_igc_lut_data igc_cfg; |
Ping Li | 87cca83 | 2013-01-30 18:27:52 -0500 | [diff] [blame] | 402 | struct mdp_sharp_cfg sharp_cfg; |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 403 | struct mdp_histogram_cfg hist_cfg; |
Carl Vanderlip | 5702713 | 2013-03-18 13:53:16 -0700 | [diff] [blame] | 404 | struct mdp_hist_lut_data hist_lut_cfg; |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 405 | }; |
| 406 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 407 | struct mdp_overlay { |
| 408 | struct msmfb_img src; |
| 409 | struct mdp_rect src_rect; |
| 410 | struct mdp_rect dst_rect; |
| 411 | uint32_t z_order; /* stage number */ |
| 412 | uint32_t is_fg; /* control alpha & transp */ |
| 413 | uint32_t alpha; |
| 414 | uint32_t transp_mask; |
| 415 | uint32_t flags; |
| 416 | uint32_t id; |
Sree Sesha Aravind Vadrevu | 05d4d22 | 2013-04-01 14:31:28 -0700 | [diff] [blame] | 417 | uint32_t user_data[7]; |
| 418 | uint8_t horz_deci; |
| 419 | uint8_t vert_deci; |
Carl Vanderlip | dfe5751 | 2012-07-23 12:34:47 -0700 | [diff] [blame] | 420 | struct mdp_overlay_pp_params overlay_pp_cfg; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 421 | }; |
| 422 | |
| 423 | struct msmfb_overlay_3d { |
| 424 | uint32_t is_3d; |
| 425 | uint32_t width; |
| 426 | uint32_t height; |
| 427 | }; |
| 428 | |
| 429 | |
| 430 | struct msmfb_overlay_blt { |
| 431 | uint32_t enable; |
| 432 | uint32_t offset; |
| 433 | uint32_t width; |
| 434 | uint32_t height; |
| 435 | uint32_t bpp; |
| 436 | }; |
| 437 | |
| 438 | struct mdp_histogram { |
| 439 | uint32_t frame_cnt; |
| 440 | uint32_t bin_cnt; |
| 441 | uint32_t *r; |
| 442 | uint32_t *g; |
| 443 | uint32_t *b; |
| 444 | }; |
| 445 | |
Sree Sesha Aravind Vadrevu | 7bacaaa | 2013-03-20 11:50:25 -0700 | [diff] [blame] | 446 | enum { |
| 447 | DISPLAY_MISR_EDP, |
| 448 | DISPLAY_MISR_DSI0, |
| 449 | DISPLAY_MISR_DSI1, |
| 450 | DISPLAY_MISR_HDMI, |
| 451 | DISPLAY_MISR_LCDC, |
| 452 | DISPLAY_MISR_ATV, |
| 453 | DISPLAY_MISR_DSI_CMD, |
| 454 | DISPLAY_MISR_MAX |
| 455 | }; |
| 456 | |
| 457 | enum { |
| 458 | MISR_OP_NONE, |
| 459 | MISR_OP_SFM, |
| 460 | MISR_OP_MFM, |
| 461 | MISR_OP_BM, |
| 462 | MISR_OP_MAX |
| 463 | }; |
| 464 | |
| 465 | struct mdp_misr { |
| 466 | uint32_t block_id; |
| 467 | uint32_t frame_count; |
| 468 | uint32_t crc_op_mode; |
| 469 | uint32_t crc_value[32]; |
| 470 | }; |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 471 | |
| 472 | /* |
| 473 | |
Ken Zhang | 6a43163 | 2012-08-08 16:46:22 -0400 | [diff] [blame] | 474 | mdp_block_type defines the identifiers for pipes in MDP 4.3 and up |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 475 | |
| 476 | MDP_BLOCK_RESERVED is provided for backward compatibility and is |
| 477 | deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used |
| 478 | instead. |
| 479 | |
Ken Zhang | 6a43163 | 2012-08-08 16:46:22 -0400 | [diff] [blame] | 480 | MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, |
| 481 | same for others. |
| 482 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 483 | */ |
| 484 | |
| 485 | enum { |
| 486 | MDP_BLOCK_RESERVED = 0, |
| 487 | MDP_BLOCK_OVERLAY_0, |
| 488 | MDP_BLOCK_OVERLAY_1, |
| 489 | MDP_BLOCK_VG_1, |
| 490 | MDP_BLOCK_VG_2, |
| 491 | MDP_BLOCK_RGB_1, |
| 492 | MDP_BLOCK_RGB_2, |
| 493 | MDP_BLOCK_DMA_P, |
| 494 | MDP_BLOCK_DMA_S, |
| 495 | MDP_BLOCK_DMA_E, |
Pravin Tamkhane | b18c9e2 | 2012-04-13 18:29:34 -0700 | [diff] [blame] | 496 | MDP_BLOCK_OVERLAY_2, |
Carl Vanderlip | bf16fdf6 | 2013-03-11 13:45:45 -0700 | [diff] [blame] | 497 | MDP_LOGICAL_BLOCK_DISP_0 = 0x10, |
Ken Zhang | 6a43163 | 2012-08-08 16:46:22 -0400 | [diff] [blame] | 498 | MDP_LOGICAL_BLOCK_DISP_1, |
| 499 | MDP_LOGICAL_BLOCK_DISP_2, |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 500 | MDP_BLOCK_MAX, |
| 501 | }; |
| 502 | |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 503 | /* |
| 504 | * mdp_histogram_start_req is used to provide the parameters for |
| 505 | * histogram start request |
| 506 | */ |
| 507 | |
| 508 | struct mdp_histogram_start_req { |
| 509 | uint32_t block; |
| 510 | uint8_t frame_cnt; |
| 511 | uint8_t bit_mask; |
Carl Vanderlip | 1631632 | 2012-10-08 16:47:34 -0700 | [diff] [blame] | 512 | uint16_t num_bins; |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 513 | }; |
| 514 | |
| 515 | /* |
| 516 | * mdp_histogram_data is used to return the histogram data, once |
| 517 | * the histogram is done/stopped/cance |
| 518 | */ |
| 519 | |
| 520 | struct mdp_histogram_data { |
| 521 | uint32_t block; |
Ken Zhang | 0f523bd | 2012-08-23 11:14:03 -0400 | [diff] [blame] | 522 | uint32_t bin_cnt; |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 523 | uint32_t *c0; |
| 524 | uint32_t *c1; |
| 525 | uint32_t *c2; |
Carl Vanderlip | 7b8b640 | 2012-03-01 10:58:03 -0800 | [diff] [blame] | 526 | uint32_t *extra_info; |
Carl Vanderlip | ba093a2 | 2011-11-22 13:59:59 -0800 | [diff] [blame] | 527 | }; |
| 528 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 529 | struct mdp_pcc_coeff { |
| 530 | uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; |
| 531 | }; |
| 532 | |
| 533 | struct mdp_pcc_cfg_data { |
| 534 | uint32_t block; |
| 535 | uint32_t ops; |
| 536 | struct mdp_pcc_coeff r, g, b; |
| 537 | }; |
| 538 | |
Ken Zhang | bf5fb4c | 2012-08-19 14:41:01 -0400 | [diff] [blame] | 539 | #define MDP_GAMUT_TABLE_NUM 8 |
| 540 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 541 | enum { |
| 542 | mdp_lut_igc, |
| 543 | mdp_lut_pgc, |
| 544 | mdp_lut_hist, |
| 545 | mdp_lut_max, |
| 546 | }; |
| 547 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 548 | struct mdp_ar_gc_lut_data { |
| 549 | uint32_t x_start; |
| 550 | uint32_t slope; |
| 551 | uint32_t offset; |
| 552 | }; |
| 553 | |
| 554 | struct mdp_pgc_lut_data { |
| 555 | uint32_t block; |
| 556 | uint32_t flags; |
| 557 | uint8_t num_r_stages; |
| 558 | uint8_t num_g_stages; |
| 559 | uint8_t num_b_stages; |
| 560 | struct mdp_ar_gc_lut_data *r_data; |
| 561 | struct mdp_ar_gc_lut_data *g_data; |
| 562 | struct mdp_ar_gc_lut_data *b_data; |
| 563 | }; |
| 564 | |
| 565 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 566 | struct mdp_lut_cfg_data { |
| 567 | uint32_t lut_type; |
| 568 | union { |
| 569 | struct mdp_igc_lut_data igc_lut_data; |
| 570 | struct mdp_pgc_lut_data pgc_lut_data; |
| 571 | struct mdp_hist_lut_data hist_lut_data; |
| 572 | } data; |
| 573 | }; |
| 574 | |
Carl Vanderlip | f0fd8e7 | 2012-05-03 15:08:20 -0700 | [diff] [blame] | 575 | struct mdp_bl_scale_data { |
| 576 | uint32_t min_lvl; |
| 577 | uint32_t scale; |
| 578 | }; |
Pravin Tamkhane | 67726da | 2012-04-13 11:59:11 -0700 | [diff] [blame] | 579 | |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 580 | struct mdp_pa_cfg_data { |
| 581 | uint32_t block; |
Ping Li | 5822924 | 2012-11-30 14:05:43 -0500 | [diff] [blame] | 582 | struct mdp_pa_cfg pa_data; |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 583 | }; |
| 584 | |
Ken Zhang | 7fb8577 | 2012-08-18 14:51:33 -0400 | [diff] [blame] | 585 | struct mdp_dither_cfg_data { |
| 586 | uint32_t block; |
| 587 | uint32_t flags; |
| 588 | uint32_t g_y_depth; |
| 589 | uint32_t r_cr_depth; |
| 590 | uint32_t b_cb_depth; |
| 591 | }; |
| 592 | |
Ken Zhang | bf5fb4c | 2012-08-19 14:41:01 -0400 | [diff] [blame] | 593 | struct mdp_gamut_cfg_data { |
| 594 | uint32_t block; |
| 595 | uint32_t flags; |
| 596 | uint32_t gamut_first; |
| 597 | uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; |
| 598 | uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM]; |
| 599 | uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM]; |
| 600 | uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM]; |
| 601 | }; |
| 602 | |
Carl Vanderlip | e8ed5ec | 2012-09-28 16:04:10 -0700 | [diff] [blame] | 603 | struct mdp_calib_config_data { |
| 604 | uint32_t ops; |
| 605 | uint32_t addr; |
| 606 | uint32_t data; |
| 607 | }; |
| 608 | |
Carl Vanderlip | e5592b6 | 2013-05-16 21:00:03 -0700 | [diff] [blame] | 609 | #define MDSS_MAX_BL_BRIGHTNESS 255 |
| 610 | #define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1) |
| 611 | |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 612 | #define MDSS_AD_MODE_AUTO_BL 0x0 |
| 613 | #define MDSS_AD_MODE_AUTO_STR 0x1 |
| 614 | #define MDSS_AD_MODE_TARG_STR 0x3 |
| 615 | #define MDSS_AD_MODE_MAN_STR 0x7 |
Carl Vanderlip | 819c509 | 2013-05-19 12:08:33 -0700 | [diff] [blame] | 616 | #define MDSS_AD_MODE_CALIB 0xF |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 617 | |
| 618 | #define MDP_PP_AD_INIT 0x10 |
| 619 | #define MDP_PP_AD_CFG 0x20 |
| 620 | |
| 621 | struct mdss_ad_init { |
| 622 | uint32_t asym_lut[33]; |
| 623 | uint32_t color_corr_lut[33]; |
| 624 | uint8_t i_control[2]; |
| 625 | uint16_t black_lvl; |
| 626 | uint16_t white_lvl; |
| 627 | uint8_t var; |
| 628 | uint8_t limit_ampl; |
| 629 | uint8_t i_dither; |
| 630 | uint8_t slope_max; |
| 631 | uint8_t slope_min; |
| 632 | uint8_t dither_ctl; |
| 633 | uint8_t format; |
| 634 | uint8_t auto_size; |
| 635 | uint16_t frame_w; |
| 636 | uint16_t frame_h; |
| 637 | uint8_t logo_v; |
| 638 | uint8_t logo_h; |
Carl Vanderlip | e5592b6 | 2013-05-16 21:00:03 -0700 | [diff] [blame] | 639 | uint32_t bl_lin_len; |
| 640 | uint32_t *bl_lin; |
| 641 | uint32_t *bl_lin_inv; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 642 | }; |
| 643 | |
Carl Vanderlip | 5e81ced | 2013-05-23 20:02:14 -0700 | [diff] [blame^] | 644 | #define MDSS_AD_BL_CTRL_MODE_EN 1 |
| 645 | #define MDSS_AD_BL_CTRL_MODE_DIS 0 |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 646 | struct mdss_ad_cfg { |
| 647 | uint32_t mode; |
| 648 | uint32_t al_calib_lut[33]; |
| 649 | uint16_t backlight_min; |
| 650 | uint16_t backlight_max; |
| 651 | uint16_t backlight_scale; |
| 652 | uint16_t amb_light_min; |
| 653 | uint16_t filter[2]; |
| 654 | uint16_t calib[4]; |
| 655 | uint8_t strength_limit; |
| 656 | uint8_t t_filter_recursion; |
Carl Vanderlip | 956360e | 2013-04-04 20:57:17 -0700 | [diff] [blame] | 657 | uint16_t stab_itr; |
Carl Vanderlip | 5e81ced | 2013-05-23 20:02:14 -0700 | [diff] [blame^] | 658 | uint32_t bl_ctrl_mode; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 659 | }; |
| 660 | |
| 661 | /* ops uses standard MDP_PP_* flags */ |
| 662 | struct mdss_ad_init_cfg { |
| 663 | uint32_t ops; |
| 664 | union { |
| 665 | struct mdss_ad_init init; |
| 666 | struct mdss_ad_cfg cfg; |
| 667 | } params; |
| 668 | }; |
| 669 | |
| 670 | /* mode uses MDSS_AD_MODE_* flags */ |
| 671 | struct mdss_ad_input { |
| 672 | uint32_t mode; |
| 673 | union { |
| 674 | uint32_t amb_light; |
| 675 | uint32_t strength; |
Carl Vanderlip | 819c509 | 2013-05-19 12:08:33 -0700 | [diff] [blame] | 676 | uint32_t calib_bl; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 677 | } in; |
Carl Vanderlip | 16e7953 | 2013-04-02 11:12:16 -0700 | [diff] [blame] | 678 | uint32_t output; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 679 | }; |
| 680 | |
Carl Vanderlip | a088b7c | 2013-05-17 13:52:53 -0700 | [diff] [blame] | 681 | #define MDSS_CALIB_MODE_BL 0x1 |
Carl Vanderlip | 95a07e1 | 2013-05-17 13:51:38 -0700 | [diff] [blame] | 682 | struct mdss_calib_cfg { |
| 683 | uint32_t ops; |
| 684 | uint32_t calib_mask; |
| 685 | }; |
| 686 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 687 | enum { |
| 688 | mdp_op_pcc_cfg, |
| 689 | mdp_op_csc_cfg, |
| 690 | mdp_op_lut_cfg, |
Pravin Tamkhane | 67726da | 2012-04-13 11:59:11 -0700 | [diff] [blame] | 691 | mdp_op_qseed_cfg, |
Carl Vanderlip | f0fd8e7 | 2012-05-03 15:08:20 -0700 | [diff] [blame] | 692 | mdp_bl_scale_cfg, |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 693 | mdp_op_pa_cfg, |
Ken Zhang | 7fb8577 | 2012-08-18 14:51:33 -0400 | [diff] [blame] | 694 | mdp_op_dither_cfg, |
Ken Zhang | bf5fb4c | 2012-08-19 14:41:01 -0400 | [diff] [blame] | 695 | mdp_op_gamut_cfg, |
Carl Vanderlip | e8ed5ec | 2012-09-28 16:04:10 -0700 | [diff] [blame] | 696 | mdp_op_calib_cfg, |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 697 | mdp_op_ad_cfg, |
| 698 | mdp_op_ad_input, |
Carl Vanderlip | 95a07e1 | 2013-05-17 13:51:38 -0700 | [diff] [blame] | 699 | mdp_op_calib_mode, |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 700 | mdp_op_max, |
| 701 | }; |
| 702 | |
Pawan Kumar | 9807ea1 | 2013-02-14 18:12:02 +0530 | [diff] [blame] | 703 | enum { |
| 704 | WB_FORMAT_NV12, |
| 705 | WB_FORMAT_RGB_565, |
| 706 | WB_FORMAT_RGB_888, |
| 707 | WB_FORMAT_xRGB_8888, |
| 708 | WB_FORMAT_ARGB_8888, |
| 709 | WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */ |
| 710 | }; |
| 711 | |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 712 | struct msmfb_mdp_pp { |
| 713 | uint32_t op; |
| 714 | union { |
| 715 | struct mdp_pcc_cfg_data pcc_cfg_data; |
| 716 | struct mdp_csc_cfg_data csc_cfg_data; |
| 717 | struct mdp_lut_cfg_data lut_cfg_data; |
Pravin Tamkhane | 67726da | 2012-04-13 11:59:11 -0700 | [diff] [blame] | 718 | struct mdp_qseed_cfg_data qseed_cfg_data; |
Carl Vanderlip | f0fd8e7 | 2012-05-03 15:08:20 -0700 | [diff] [blame] | 719 | struct mdp_bl_scale_data bl_scale_data; |
Ken Zhang | 77ce019 | 2012-08-10 11:27:19 -0400 | [diff] [blame] | 720 | struct mdp_pa_cfg_data pa_cfg_data; |
Ken Zhang | 7fb8577 | 2012-08-18 14:51:33 -0400 | [diff] [blame] | 721 | struct mdp_dither_cfg_data dither_cfg_data; |
Ken Zhang | bf5fb4c | 2012-08-19 14:41:01 -0400 | [diff] [blame] | 722 | struct mdp_gamut_cfg_data gamut_cfg_data; |
Carl Vanderlip | e8ed5ec | 2012-09-28 16:04:10 -0700 | [diff] [blame] | 723 | struct mdp_calib_config_data calib_cfg; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 724 | struct mdss_ad_init_cfg ad_init_cfg; |
Carl Vanderlip | 95a07e1 | 2013-05-17 13:51:38 -0700 | [diff] [blame] | 725 | struct mdss_calib_cfg mdss_calib_cfg; |
Carl Vanderlip | 8b493b0 | 2013-03-22 13:40:02 -0700 | [diff] [blame] | 726 | struct mdss_ad_input ad_input; |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 727 | } data; |
| 728 | }; |
| 729 | |
Manoj Rao | a8e39d9 | 2013-02-16 08:47:21 -0800 | [diff] [blame] | 730 | #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 731 | enum { |
| 732 | metadata_op_none, |
| 733 | metadata_op_base_blend, |
Ken Zhang | 420dd20 | 2013-01-08 14:28:20 -0500 | [diff] [blame] | 734 | metadata_op_frame_rate, |
Manoj Rao | a8e39d9 | 2013-02-16 08:47:21 -0800 | [diff] [blame] | 735 | metadata_op_vic, |
Pawan Kumar | 9807ea1 | 2013-02-14 18:12:02 +0530 | [diff] [blame] | 736 | metadata_op_wb_format, |
Adrian Salido-Moreno | 9bf71f3 | 2013-03-05 19:23:44 -0800 | [diff] [blame] | 737 | metadata_op_get_caps, |
Sree Sesha Aravind Vadrevu | 7bacaaa | 2013-03-20 11:50:25 -0700 | [diff] [blame] | 738 | metadata_op_crc, |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 739 | metadata_op_max |
| 740 | }; |
Pravin Tamkhane | 02a4068 | 2011-11-29 14:17:01 -0800 | [diff] [blame] | 741 | |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 742 | struct mdp_blend_cfg { |
| 743 | uint32_t is_premultiplied; |
| 744 | }; |
| 745 | |
Pawan Kumar | 9807ea1 | 2013-02-14 18:12:02 +0530 | [diff] [blame] | 746 | struct mdp_mixer_cfg { |
| 747 | uint32_t writeback_format; |
| 748 | uint32_t alpha; |
| 749 | }; |
| 750 | |
Adrian Salido-Moreno | 9bf71f3 | 2013-03-05 19:23:44 -0800 | [diff] [blame] | 751 | struct mdss_hw_caps { |
| 752 | uint32_t mdp_rev; |
| 753 | uint8_t rgb_pipes; |
| 754 | uint8_t vig_pipes; |
| 755 | uint8_t dma_pipes; |
Sree Sesha Aravind Vadrevu | 10c4d77 | 2013-03-28 13:11:12 -0700 | [diff] [blame] | 756 | uint32_t features; |
Adrian Salido-Moreno | 9bf71f3 | 2013-03-05 19:23:44 -0800 | [diff] [blame] | 757 | }; |
| 758 | |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 759 | struct msmfb_metadata { |
| 760 | uint32_t op; |
| 761 | uint32_t flags; |
| 762 | union { |
Sree Sesha Aravind Vadrevu | 7bacaaa | 2013-03-20 11:50:25 -0700 | [diff] [blame] | 763 | struct mdp_misr misr_request; |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 764 | struct mdp_blend_cfg blend_cfg; |
Pawan Kumar | 9807ea1 | 2013-02-14 18:12:02 +0530 | [diff] [blame] | 765 | struct mdp_mixer_cfg mixer_cfg; |
Ken Zhang | 420dd20 | 2013-01-08 14:28:20 -0500 | [diff] [blame] | 766 | uint32_t panel_frame_rate; |
Manoj Rao | a8e39d9 | 2013-02-16 08:47:21 -0800 | [diff] [blame] | 767 | uint32_t video_info_code; |
Adrian Salido-Moreno | 9bf71f3 | 2013-03-05 19:23:44 -0800 | [diff] [blame] | 768 | struct mdss_hw_caps caps; |
Ken Zhang | 5cf85c0 | 2012-08-23 19:32:52 -0700 | [diff] [blame] | 769 | } data; |
| 770 | }; |
Ken Zhang | 5295d80 | 2012-11-07 18:33:16 -0500 | [diff] [blame] | 771 | |
Adrian Salido-Moreno | 1a74a49 | 2013-05-11 21:24:43 -0700 | [diff] [blame] | 772 | #define MDP_MAX_FENCE_FD 32 |
Ken Zhang | 5295d80 | 2012-11-07 18:33:16 -0500 | [diff] [blame] | 773 | #define MDP_BUF_SYNC_FLAG_WAIT 1 |
| 774 | |
| 775 | struct mdp_buf_sync { |
| 776 | uint32_t flags; |
| 777 | uint32_t acq_fen_fd_cnt; |
| 778 | int *acq_fen_fd; |
| 779 | int *rel_fen_fd; |
| 780 | }; |
| 781 | |
Terence Hampson | 3e636aa | 2013-05-08 19:01:51 -0400 | [diff] [blame] | 782 | struct mdp_async_blit_req_list { |
| 783 | struct mdp_buf_sync sync; |
| 784 | uint32_t count; |
| 785 | struct mdp_blit_req req[]; |
| 786 | }; |
| 787 | |
Ken Zhang | 4e83b93 | 2012-12-02 21:15:47 -0500 | [diff] [blame] | 788 | #define MDP_DISPLAY_COMMIT_OVERLAY 1 |
Ken Zhang | 5e8588d | 2012-10-01 11:46:42 -0700 | [diff] [blame] | 789 | struct mdp_buf_fence { |
| 790 | uint32_t flags; |
| 791 | uint32_t acq_fen_fd_cnt; |
| 792 | int acq_fen_fd[MDP_MAX_FENCE_FD]; |
| 793 | int rel_fen_fd[MDP_MAX_FENCE_FD]; |
| 794 | }; |
| 795 | |
Ken Zhang | 4e83b93 | 2012-12-02 21:15:47 -0500 | [diff] [blame] | 796 | |
| 797 | struct mdp_display_commit { |
| 798 | uint32_t flags; |
| 799 | uint32_t wait_for_finish; |
| 800 | struct fb_var_screeninfo var; |
Ken Zhang | 5e8588d | 2012-10-01 11:46:42 -0700 | [diff] [blame] | 801 | struct mdp_buf_fence buf_fence; |
Ken Zhang | 4e83b93 | 2012-12-02 21:15:47 -0500 | [diff] [blame] | 802 | }; |
| 803 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 804 | struct mdp_page_protection { |
| 805 | uint32_t page_protection; |
| 806 | }; |
| 807 | |
kuogee hsieh | 405dc30 | 2011-07-21 15:06:59 -0700 | [diff] [blame] | 808 | |
| 809 | struct mdp_mixer_info { |
| 810 | int pndx; |
| 811 | int pnum; |
| 812 | int ptype; |
| 813 | int mixer_num; |
| 814 | int z_order; |
| 815 | }; |
| 816 | |
| 817 | #define MAX_PIPE_PER_MIXER 4 |
| 818 | |
| 819 | struct msmfb_mixer_info_req { |
| 820 | int mixer_num; |
| 821 | int cnt; |
| 822 | struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; |
| 823 | }; |
| 824 | |
Ravishangar Kalyanam | 6bc448a | 2012-03-14 11:31:52 -0700 | [diff] [blame] | 825 | enum { |
| 826 | DISPLAY_SUBSYSTEM_ID, |
| 827 | ROTATOR_SUBSYSTEM_ID, |
| 828 | }; |
kuogee hsieh | 405dc30 | 2011-07-21 15:06:59 -0700 | [diff] [blame] | 829 | |
Adrian Salido-Moreno | 96d88d4 | 2012-12-20 13:01:39 -0800 | [diff] [blame] | 830 | enum { |
| 831 | MDP_IOMMU_DOMAIN_CP, |
| 832 | MDP_IOMMU_DOMAIN_NS, |
| 833 | }; |
| 834 | |
Deva Ramasubramanian | 166b098 | 2013-01-25 20:11:41 -0800 | [diff] [blame] | 835 | enum { |
| 836 | MDP_WRITEBACK_MIRROR_OFF, |
| 837 | MDP_WRITEBACK_MIRROR_ON, |
| 838 | MDP_WRITEBACK_MIRROR_PAUSE, |
| 839 | MDP_WRITEBACK_MIRROR_RESUME, |
| 840 | }; |
| 841 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 842 | #ifdef __KERNEL__ |
Adrian Salido-Moreno | 96d88d4 | 2012-12-20 13:01:39 -0800 | [diff] [blame] | 843 | int msm_fb_get_iommu_domain(struct fb_info *info, int domain); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 844 | /* get the framebuffer physical address information */ |
Ravishangar Kalyanam | 6bc448a | 2012-03-14 11:31:52 -0700 | [diff] [blame] | 845 | int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num, |
| 846 | int subsys_id); |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 847 | struct fb_info *msm_fb_get_writeback_fb(void); |
| 848 | int msm_fb_writeback_init(struct fb_info *info); |
Vinay Kalia | e1ba270 | 2011-12-21 16:24:52 -0800 | [diff] [blame] | 849 | int msm_fb_writeback_start(struct fb_info *info); |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 850 | int msm_fb_writeback_queue_buffer(struct fb_info *info, |
| 851 | struct msmfb_data *data); |
| 852 | int msm_fb_writeback_dequeue_buffer(struct fb_info *info, |
| 853 | struct msmfb_data *data); |
Vinay Kalia | e1ba270 | 2011-12-21 16:24:52 -0800 | [diff] [blame] | 854 | int msm_fb_writeback_stop(struct fb_info *info); |
Vinay Kalia | 27020d1 | 2011-10-14 17:50:29 -0700 | [diff] [blame] | 855 | int msm_fb_writeback_terminate(struct fb_info *info); |
Adrian Salido-Moreno | 96d88d4 | 2012-12-20 13:01:39 -0800 | [diff] [blame] | 856 | int msm_fb_writeback_set_secure(struct fb_info *info, int enable); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 857 | #endif |
| 858 | |
| 859 | #endif /*_MSM_MDP_H_*/ |