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Mike Turquetteb2476492012-03-15 23:11:19 -07001/*
2 * linux/include/linux/clk-private.h
3 *
4 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
5 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __LINUX_CLK_PRIVATE_H
12#define __LINUX_CLK_PRIVATE_H
13
14#include <linux/clk-provider.h>
15#include <linux/list.h>
16
17/*
18 * WARNING: Do not include clk-private.h from any file that implements struct
19 * clk_ops. Doing so is a layering violation!
20 *
21 * This header exists only to allow for statically initialized clock data. Any
22 * static clock data must be defined in a separate file from the logic that
23 * implements the clock operations for that same data.
24 */
25
26#ifdef CONFIG_COMMON_CLK
27
28struct clk {
29 const char *name;
30 const struct clk_ops *ops;
31 struct clk_hw *hw;
32 struct clk *parent;
33 char **parent_names;
34 struct clk **parents;
35 u8 num_parents;
36 unsigned long rate;
37 unsigned long new_rate;
38 unsigned long flags;
39 unsigned int enable_count;
40 unsigned int prepare_count;
41 struct hlist_head children;
42 struct hlist_node child_node;
43 unsigned int notifier_count;
44#ifdef CONFIG_COMMON_CLK_DEBUG
45 struct dentry *dentry;
46#endif
47};
48
Mike Turquette9d9f78e2012-03-15 23:11:20 -070049/*
50 * DOC: Basic clock implementations common to many platforms
51 *
52 * Each basic clock hardware type is comprised of a structure describing the
53 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
54 * unique flags for that hardware type, a registration function and an
55 * alternative macro for static initialization
56 */
57
58extern struct clk_ops clk_fixed_rate_ops;
59
60#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \
61 _fixed_rate_flags) \
62 static struct clk _name; \
63 static char *_name##_parent_names[] = {}; \
64 static struct clk_fixed_rate _name##_hw = { \
65 .hw = { \
66 .clk = &_name, \
67 }, \
68 .fixed_rate = _rate, \
69 .flags = _fixed_rate_flags, \
70 }; \
71 static struct clk _name = { \
72 .name = #_name, \
73 .ops = &clk_fixed_rate_ops, \
74 .hw = &_name##_hw.hw, \
75 .parent_names = _name##_parent_names, \
76 .num_parents = \
77 ARRAY_SIZE(_name##_parent_names), \
78 .flags = _flags, \
79 };
80
81extern struct clk_ops clk_gate_ops;
82
83#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \
84 _flags, _reg, _bit_idx, \
85 _gate_flags, _lock) \
86 static struct clk _name; \
87 static char *_name##_parent_names[] = { \
88 _parent_name, \
89 }; \
90 static struct clk *_name##_parents[] = { \
91 _parent_ptr, \
92 }; \
93 static struct clk_gate _name##_hw = { \
94 .hw = { \
95 .clk = &_name, \
96 }, \
97 .reg = _reg, \
98 .bit_idx = _bit_idx, \
99 .flags = _gate_flags, \
100 .lock = _lock, \
101 }; \
102 static struct clk _name = { \
103 .name = #_name, \
104 .ops = &clk_gate_ops, \
105 .hw = &_name##_hw.hw, \
106 .parent_names = _name##_parent_names, \
107 .num_parents = \
108 ARRAY_SIZE(_name##_parent_names), \
109 .parents = _name##_parents, \
110 .flags = _flags, \
111 };
112
113extern struct clk_ops clk_divider_ops;
114
115#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
116 _flags, _reg, _shift, _width, \
117 _divider_flags, _lock) \
118 static struct clk _name; \
119 static char *_name##_parent_names[] = { \
120 _parent_name, \
121 }; \
122 static struct clk *_name##_parents[] = { \
123 _parent_ptr, \
124 }; \
125 static struct clk_divider _name##_hw = { \
126 .hw = { \
127 .clk = &_name, \
128 }, \
129 .reg = _reg, \
130 .shift = _shift, \
131 .width = _width, \
132 .flags = _divider_flags, \
133 .lock = _lock, \
134 }; \
135 static struct clk _name = { \
136 .name = #_name, \
137 .ops = &clk_divider_ops, \
138 .hw = &_name##_hw.hw, \
139 .parent_names = _name##_parent_names, \
140 .num_parents = \
141 ARRAY_SIZE(_name##_parent_names), \
142 .parents = _name##_parents, \
143 .flags = _flags, \
144 };
145
146extern struct clk_ops clk_mux_ops;
147
148#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
149 _reg, _shift, _width, \
150 _mux_flags, _lock) \
151 static struct clk _name; \
152 static struct clk_mux _name##_hw = { \
153 .hw = { \
154 .clk = &_name, \
155 }, \
156 .reg = _reg, \
157 .shift = _shift, \
158 .width = _width, \
159 .flags = _mux_flags, \
160 .lock = _lock, \
161 }; \
162 static struct clk _name = { \
163 .name = #_name, \
164 .ops = &clk_mux_ops, \
165 .hw = &_name##_hw.hw, \
166 .parent_names = _parent_names, \
167 .num_parents = \
168 ARRAY_SIZE(_parent_names), \
169 .parents = _parents, \
170 .flags = _flags, \
171 };
172
Mike Turquetteb2476492012-03-15 23:11:19 -0700173/**
174 * __clk_init - initialize the data structures in a struct clk
175 * @dev: device initializing this clk, placeholder for now
176 * @clk: clk being initialized
177 *
178 * Initializes the lists in struct clk, queries the hardware for the
179 * parent and rate and sets them both.
180 *
181 * Any struct clk passed into __clk_init must have the following members
182 * populated:
183 * .name
184 * .ops
185 * .hw
186 * .parent_names
187 * .num_parents
188 * .flags
189 *
190 * It is not necessary to call clk_register if __clk_init is used directly with
191 * statically initialized clock data.
192 */
193void __clk_init(struct device *dev, struct clk *clk);
194
195#endif /* CONFIG_COMMON_CLK */
196#endif /* CLK_PRIVATE_H */