Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/module.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/slab.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 10 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 11 | #include <linux/interrupt.h> |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 12 | #include <linux/seq_file.h> |
| 13 | #include <linux/debugfs.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 14 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 15 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <asm/processor.h> |
| 17 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 18 | #include <asm/sections.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 19 | #include <asm/uaccess.h> |
| 20 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 21 | #include <asm/proto.h> |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 22 | #include <asm/pat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 24 | /* |
| 25 | * The current flushing context - we pass it instead of 5 arguments: |
| 26 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 27 | struct cpa_data { |
| 28 | unsigned long vaddr; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 29 | pgprot_t mask_set; |
| 30 | pgprot_t mask_clr; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | int numpages; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 32 | int flushtlb; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 33 | unsigned long pfn; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 34 | unsigned force_split : 1; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 35 | }; |
| 36 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame^] | 37 | #ifdef CONFIG_PROC_FS |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 38 | static unsigned long direct_pages_count[PG_LEVEL_NUM]; |
| 39 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame^] | 40 | void update_page_count(int level, unsigned long pages) |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 41 | { |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 42 | unsigned long flags; |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame^] | 43 | |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 44 | /* Protect against CPA */ |
| 45 | spin_lock_irqsave(&pgd_lock, flags); |
| 46 | direct_pages_count[level] += pages; |
| 47 | spin_unlock_irqrestore(&pgd_lock, flags); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 48 | } |
| 49 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame^] | 50 | static void split_page_count(int level) |
| 51 | { |
| 52 | direct_pages_count[level]--; |
| 53 | direct_pages_count[level - 1] += PTRS_PER_PTE; |
| 54 | } |
| 55 | |
| 56 | int arch_report_meminfo(char *page) |
| 57 | { |
| 58 | int n = sprintf(page, "DirectMap4k: %8lu\n" |
| 59 | "DirectMap2M: %8lu\n", |
| 60 | direct_pages_count[PG_LEVEL_4K], |
| 61 | direct_pages_count[PG_LEVEL_2M]); |
| 62 | #ifdef CONFIG_X86_64 |
| 63 | n += sprintf(page + n, "DirectMap1G: %8lu\n", |
| 64 | direct_pages_count[PG_LEVEL_1G]); |
| 65 | #endif |
| 66 | return n; |
| 67 | } |
| 68 | #else |
| 69 | static inline void split_page_count(int level) { } |
| 70 | #endif |
| 71 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 72 | #ifdef CONFIG_X86_64 |
| 73 | |
| 74 | static inline unsigned long highmap_start_pfn(void) |
| 75 | { |
| 76 | return __pa(_text) >> PAGE_SHIFT; |
| 77 | } |
| 78 | |
| 79 | static inline unsigned long highmap_end_pfn(void) |
| 80 | { |
| 81 | return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT; |
| 82 | } |
| 83 | |
| 84 | #endif |
| 85 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 86 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 87 | # define debug_pagealloc 1 |
| 88 | #else |
| 89 | # define debug_pagealloc 0 |
| 90 | #endif |
| 91 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 92 | static inline int |
| 93 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 94 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 95 | return addr >= start && addr < end; |
| 96 | } |
| 97 | |
| 98 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 99 | * Flushing functions |
| 100 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 101 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 102 | /** |
| 103 | * clflush_cache_range - flush a cache range with clflush |
| 104 | * @addr: virtual start address |
| 105 | * @size: number of bytes to flush |
| 106 | * |
| 107 | * clflush is an unordered instruction which needs fencing with mfence |
| 108 | * to avoid ordering issues. |
| 109 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 110 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 111 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 112 | void *vend = vaddr + size - 1; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 113 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 114 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 115 | |
| 116 | for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size) |
| 117 | clflush(vaddr); |
| 118 | /* |
| 119 | * Flush any possible final partial cacheline: |
| 120 | */ |
| 121 | clflush(vend); |
| 122 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 123 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 124 | } |
| 125 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 126 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 127 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 128 | unsigned long cache = (unsigned long)arg; |
| 129 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 130 | /* |
| 131 | * Flush all to work around Errata in early athlons regarding |
| 132 | * large page flushing. |
| 133 | */ |
| 134 | __flush_tlb_all(); |
| 135 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 136 | if (cache && boot_cpu_data.x86_model >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 137 | wbinvd(); |
| 138 | } |
| 139 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 140 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 141 | { |
| 142 | BUG_ON(irqs_disabled()); |
| 143 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 144 | on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 145 | } |
| 146 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 147 | static void __cpa_flush_range(void *arg) |
| 148 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 149 | /* |
| 150 | * We could optimize that further and do individual per page |
| 151 | * tlb invalidates for a low number of pages. Caveat: we must |
| 152 | * flush the high aliases on 64bit as well. |
| 153 | */ |
| 154 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 155 | } |
| 156 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 157 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 158 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 159 | unsigned int i, level; |
| 160 | unsigned long addr; |
| 161 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 162 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 163 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 164 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 165 | on_each_cpu(__cpa_flush_range, NULL, 1, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 166 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 167 | if (!cache) |
| 168 | return; |
| 169 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 170 | /* |
| 171 | * We only need to flush on one CPU, |
| 172 | * clflush is a MESI-coherent instruction that |
| 173 | * will cause all other CPUs to flush the same |
| 174 | * cachelines: |
| 175 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 176 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 177 | pte_t *pte = lookup_address(addr, &level); |
| 178 | |
| 179 | /* |
| 180 | * Only flush present addresses: |
| 181 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 182 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 183 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 184 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 185 | } |
| 186 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 187 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 188 | * Certain areas of memory on x86 require very specific protection flags, |
| 189 | * for example the BIOS area or kernel text. Callers don't always get this |
| 190 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 191 | * checks and fixes these known static required protection bits. |
| 192 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 193 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 194 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 195 | { |
| 196 | pgprot_t forbidden = __pgprot(0); |
| 197 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 198 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 199 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 200 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 201 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 202 | if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 203 | pgprot_val(forbidden) |= _PAGE_NX; |
| 204 | |
| 205 | /* |
| 206 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 207 | * Does not cover __inittext since that is gone later on. On |
| 208 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 209 | */ |
| 210 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 211 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 212 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 213 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 214 | * The .rodata section needs to be read-only. Using the pfn |
| 215 | * catches all aliases. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 216 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 217 | if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, |
| 218 | __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 219 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 220 | |
| 221 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 222 | |
| 223 | return prot; |
| 224 | } |
| 225 | |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 226 | /* |
| 227 | * Lookup the page table entry for a virtual address. Return a pointer |
| 228 | * to the entry and the level of the mapping. |
| 229 | * |
| 230 | * Note: We return pud and pmd either when the entry is marked large |
| 231 | * or when the present bit is not set. Otherwise we would return a |
| 232 | * pointer to a nonexisting mapping. |
| 233 | */ |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 234 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 235 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | pgd_t *pgd = pgd_offset_k(address); |
| 237 | pud_t *pud; |
| 238 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 239 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 240 | *level = PG_LEVEL_NONE; |
| 241 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | if (pgd_none(*pgd)) |
| 243 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 244 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | pud = pud_offset(pgd, address); |
| 246 | if (pud_none(*pud)) |
| 247 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 248 | |
| 249 | *level = PG_LEVEL_1G; |
| 250 | if (pud_large(*pud) || !pud_present(*pud)) |
| 251 | return (pte_t *)pud; |
| 252 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | pmd = pmd_offset(pud, address); |
| 254 | if (pmd_none(*pmd)) |
| 255 | return NULL; |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 256 | |
| 257 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 258 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 261 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 262 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 263 | return pte_offset_kernel(pmd, address); |
| 264 | } |
| 265 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 266 | /* |
| 267 | * Set the new pmd in all the pgds we know about: |
| 268 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 269 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 270 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 271 | /* change init_mm */ |
| 272 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 273 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 274 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 275 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 277 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 278 | pgd_t *pgd; |
| 279 | pud_t *pud; |
| 280 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 281 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 282 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 283 | pud = pud_offset(pgd, address); |
| 284 | pmd = pmd_offset(pud, address); |
| 285 | set_pte_atomic((pte_t *)pmd, pte); |
| 286 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 288 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | } |
| 290 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 291 | static int |
| 292 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 293 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 294 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 295 | unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 296 | pte_t new_pte, old_pte, *tmp; |
| 297 | pgprot_t old_prot, new_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 298 | int i, do_split = 1; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 299 | unsigned int level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 300 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 301 | if (cpa->force_split) |
| 302 | return 1; |
| 303 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 304 | spin_lock_irqsave(&pgd_lock, flags); |
| 305 | /* |
| 306 | * Check for races, another CPU might have split this page |
| 307 | * up already: |
| 308 | */ |
| 309 | tmp = lookup_address(address, &level); |
| 310 | if (tmp != kpte) |
| 311 | goto out_unlock; |
| 312 | |
| 313 | switch (level) { |
| 314 | case PG_LEVEL_2M: |
Andi Kleen | 31422c5 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 315 | psize = PMD_PAGE_SIZE; |
| 316 | pmask = PMD_PAGE_MASK; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 317 | break; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 318 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 319 | case PG_LEVEL_1G: |
Andi Kleen | 5d3c8b2 | 2008-02-13 16:20:35 +0100 | [diff] [blame] | 320 | psize = PUD_PAGE_SIZE; |
| 321 | pmask = PUD_PAGE_MASK; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 322 | break; |
| 323 | #endif |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 324 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 325 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 326 | goto out_unlock; |
| 327 | } |
| 328 | |
| 329 | /* |
| 330 | * Calculate the number of pages, which fit into this large |
| 331 | * page starting at address: |
| 332 | */ |
| 333 | nextpage_addr = (address + psize) & pmask; |
| 334 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 335 | if (numpages < cpa->numpages) |
| 336 | cpa->numpages = numpages; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 337 | |
| 338 | /* |
| 339 | * We are safe now. Check whether the new pgprot is the same: |
| 340 | */ |
| 341 | old_pte = *kpte; |
| 342 | old_prot = new_prot = pte_pgprot(old_pte); |
| 343 | |
| 344 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 345 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 346 | |
| 347 | /* |
| 348 | * old_pte points to the large page base address. So we need |
| 349 | * to add the offset of the virtual address: |
| 350 | */ |
| 351 | pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); |
| 352 | cpa->pfn = pfn; |
| 353 | |
| 354 | new_prot = static_protections(new_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 355 | |
| 356 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 357 | * We need to check the full range, whether |
| 358 | * static_protection() requires a different pgprot for one of |
| 359 | * the pages in the range we try to preserve: |
| 360 | */ |
| 361 | addr = address + PAGE_SIZE; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 362 | pfn++; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 363 | for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 364 | pgprot_t chk_prot = static_protections(new_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 365 | |
| 366 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 367 | goto out_unlock; |
| 368 | } |
| 369 | |
| 370 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 371 | * If there are no changes, return. maxpages has been updated |
| 372 | * above: |
| 373 | */ |
| 374 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 375 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 376 | goto out_unlock; |
| 377 | } |
| 378 | |
| 379 | /* |
| 380 | * We need to change the attributes. Check, whether we can |
| 381 | * change the large page in one go. We request a split, when |
| 382 | * the address is not aligned and the number of pages is |
| 383 | * smaller than the number of pages in the large page. Note |
| 384 | * that we limited the number of possible pages already to |
| 385 | * the number of pages in the large page. |
| 386 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 387 | if (address == (nextpage_addr - psize) && cpa->numpages == numpages) { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 388 | /* |
| 389 | * The address is aligned and the number of pages |
| 390 | * covers the full page. |
| 391 | */ |
| 392 | new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot)); |
| 393 | __set_pmd_pte(kpte, address, new_pte); |
| 394 | cpa->flushtlb = 1; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 395 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 396 | } |
| 397 | |
| 398 | out_unlock: |
| 399 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 400 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 401 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 402 | } |
| 403 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 404 | static LIST_HEAD(page_pool); |
| 405 | static unsigned long pool_size, pool_pages, pool_low; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 406 | static unsigned long pool_used, pool_failed; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 407 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 408 | static void cpa_fill_pool(struct page **ret) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 409 | { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 410 | gfp_t gfp = GFP_KERNEL; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 411 | unsigned long flags; |
| 412 | struct page *p; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 413 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 414 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 415 | * Avoid recursion (on debug-pagealloc) and also signal |
| 416 | * our priority to get to these pagetables: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 417 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 418 | if (current->flags & PF_MEMALLOC) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 419 | return; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 420 | current->flags |= PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 421 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 422 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 423 | * Allocate atomically from atomic contexts: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 424 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 425 | if (in_atomic() || irqs_disabled() || debug_pagealloc) |
| 426 | gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 427 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 428 | while (pool_pages < pool_size || (ret && !*ret)) { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 429 | p = alloc_pages(gfp, 0); |
| 430 | if (!p) { |
| 431 | pool_failed++; |
| 432 | break; |
| 433 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 434 | /* |
| 435 | * If the call site needs a page right now, provide it: |
| 436 | */ |
| 437 | if (ret && !*ret) { |
| 438 | *ret = p; |
| 439 | continue; |
| 440 | } |
| 441 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 442 | list_add(&p->lru, &page_pool); |
| 443 | pool_pages++; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 444 | spin_unlock_irqrestore(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 445 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 446 | |
| 447 | current->flags &= ~PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 448 | } |
| 449 | |
| 450 | #define SHIFT_MB (20 - PAGE_SHIFT) |
| 451 | #define ROUND_MB_GB ((1 << 10) - 1) |
| 452 | #define SHIFT_MB_GB 10 |
| 453 | #define POOL_PAGES_PER_GB 16 |
| 454 | |
| 455 | void __init cpa_init(void) |
| 456 | { |
| 457 | struct sysinfo si; |
| 458 | unsigned long gb; |
| 459 | |
| 460 | si_meminfo(&si); |
| 461 | /* |
| 462 | * Calculate the number of pool pages: |
| 463 | * |
| 464 | * Convert totalram (nr of pages) to MiB and round to the next |
| 465 | * GiB. Shift MiB to Gib and multiply the result by |
| 466 | * POOL_PAGES_PER_GB: |
| 467 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 468 | if (debug_pagealloc) { |
| 469 | gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB; |
| 470 | pool_size = POOL_PAGES_PER_GB * gb; |
| 471 | } else { |
| 472 | pool_size = 1; |
| 473 | } |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 474 | pool_low = pool_size; |
| 475 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 476 | cpa_fill_pool(NULL); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 477 | printk(KERN_DEBUG |
| 478 | "CPA: page pool initialized %lu of %lu pages preallocated\n", |
| 479 | pool_pages, pool_size); |
| 480 | } |
| 481 | |
Ingo Molnar | 7afe15b | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 482 | static int split_large_page(pte_t *kpte, unsigned long address) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 483 | { |
Thomas Gleixner | 7b610ee | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 484 | unsigned long flags, pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 485 | unsigned int i, level; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 486 | pte_t *pbase, *tmp; |
| 487 | pgprot_t ref_prot; |
| 488 | struct page *base; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 489 | |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 490 | /* |
| 491 | * Get a page from the pool. The pool list is protected by the |
| 492 | * pgd_lock, which we have to take anyway for the split |
| 493 | * operation: |
| 494 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 495 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 496 | if (list_empty(&page_pool)) { |
| 497 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 498 | base = NULL; |
| 499 | cpa_fill_pool(&base); |
| 500 | if (!base) |
| 501 | return -ENOMEM; |
| 502 | spin_lock_irqsave(&pgd_lock, flags); |
| 503 | } else { |
| 504 | base = list_first_entry(&page_pool, struct page, lru); |
| 505 | list_del(&base->lru); |
| 506 | pool_pages--; |
| 507 | |
| 508 | if (pool_pages < pool_low) |
| 509 | pool_low = pool_pages; |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 510 | } |
| 511 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 512 | /* |
| 513 | * Check for races, another CPU might have split this page |
| 514 | * up for us already: |
| 515 | */ |
| 516 | tmp = lookup_address(address, &level); |
Ingo Molnar | 6ce9fc1 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 517 | if (tmp != kpte) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 518 | goto out_unlock; |
| 519 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 520 | pbase = (pte_t *)page_address(base); |
Jeremy Fitzhardinge | 6944a9c | 2008-03-17 16:37:01 -0700 | [diff] [blame] | 521 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 522 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 523 | |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 524 | #ifdef CONFIG_X86_64 |
| 525 | if (level == PG_LEVEL_1G) { |
| 526 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
| 527 | pgprot_val(ref_prot) |= _PAGE_PSE; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 528 | } |
| 529 | #endif |
| 530 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 531 | /* |
| 532 | * Get the target pfn from the original entry: |
| 533 | */ |
| 534 | pfn = pte_pfn(*kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 535 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 536 | set_pte(&pbase[i], pfn_pte(pfn, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 537 | |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 538 | if (address >= (unsigned long)__va(0) && |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame^] | 539 | address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT)) |
| 540 | split_page_count(level); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 541 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 542 | /* |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 543 | * Install the new, split up pagetable. Important details here: |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 544 | * |
| 545 | * On Intel the NX bit of all levels must be cleared to make a |
| 546 | * page executable. See section 4.13.2 of Intel 64 and IA-32 |
| 547 | * Architectures Software Developer's Manual). |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 548 | * |
| 549 | * Mark the entry present. The current mapping might be |
| 550 | * set to not present, which we preserved above. |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 551 | */ |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 552 | ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 553 | pgprot_val(ref_prot) |= _PAGE_PRESENT; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 554 | __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 555 | base = NULL; |
| 556 | |
| 557 | out_unlock: |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 558 | /* |
| 559 | * If we dropped out via the lookup_address check under |
| 560 | * pgd_lock then stick the page back into the pool: |
| 561 | */ |
| 562 | if (base) { |
| 563 | list_add(&base->lru, &page_pool); |
| 564 | pool_pages++; |
| 565 | } else |
| 566 | pool_used++; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 567 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 568 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 569 | return 0; |
| 570 | } |
| 571 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 572 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 573 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 574 | unsigned long address = cpa->vaddr; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 575 | int do_split, err; |
| 576 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 577 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 579 | repeat: |
Ingo Molnar | f0646e4 | 2008-01-30 13:33:43 +0100 | [diff] [blame] | 580 | kpte = lookup_address(address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | if (!kpte) |
Ingo Molnar | d1a4be6 | 2008-04-18 21:32:22 +0200 | [diff] [blame] | 582 | return 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 583 | |
| 584 | old_pte = *kpte; |
| 585 | if (!pte_val(old_pte)) { |
| 586 | if (!primary) |
| 587 | return 0; |
| 588 | printk(KERN_WARNING "CPA: called for zero pte. " |
| 589 | "vaddr = %lx cpa->vaddr = %lx\n", address, |
| 590 | cpa->vaddr); |
| 591 | WARN_ON(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | return -EINVAL; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 593 | } |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 594 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 595 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 596 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 597 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 598 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 599 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 600 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 601 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 602 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 603 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 604 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 605 | /* |
| 606 | * We need to keep the pfn from the existing PTE, |
| 607 | * after all we're only going to change it's attributes |
| 608 | * not the memory it points to |
| 609 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 610 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 611 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 612 | /* |
| 613 | * Do we really change anything ? |
| 614 | */ |
| 615 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 616 | set_pte_atomic(kpte, new_pte); |
| 617 | cpa->flushtlb = 1; |
| 618 | } |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 619 | cpa->numpages = 1; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 620 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 622 | |
| 623 | /* |
| 624 | * Check, whether we can keep the large page intact |
| 625 | * and just change the pte: |
| 626 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 627 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 628 | /* |
| 629 | * When the range fits into the existing large page, |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 630 | * return. cp->numpages and cpa->tlbflush have been updated in |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 631 | * try_large_page: |
| 632 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 633 | if (do_split <= 0) |
| 634 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 635 | |
| 636 | /* |
| 637 | * We have to split the large page: |
| 638 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 639 | err = split_large_page(kpte, address); |
| 640 | if (!err) { |
| 641 | cpa->flushtlb = 1; |
| 642 | goto repeat; |
| 643 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 644 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 645 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 646 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 648 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 649 | |
| 650 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 651 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 652 | struct cpa_data alias_cpa; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 653 | int ret = 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 654 | |
| 655 | if (cpa->pfn > max_pfn_mapped) |
| 656 | return 0; |
| 657 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 658 | /* |
| 659 | * No need to redo, when the primary call touched the direct |
| 660 | * mapping already: |
| 661 | */ |
| 662 | if (!within(cpa->vaddr, PAGE_OFFSET, |
| 663 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 664 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 665 | alias_cpa = *cpa; |
| 666 | alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT); |
| 667 | |
| 668 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
| 669 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 670 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 671 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 672 | if (ret) |
| 673 | return ret; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 674 | /* |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 675 | * No need to redo, when the primary call touched the high |
| 676 | * mapping already: |
| 677 | */ |
| 678 | if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end)) |
| 679 | return 0; |
| 680 | |
| 681 | /* |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 682 | * If the physical address is inside the kernel map, we need |
| 683 | * to touch the high mapped kernel as well: |
| 684 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 685 | if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) |
| 686 | return 0; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 687 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 688 | alias_cpa = *cpa; |
| 689 | alias_cpa.vaddr = |
| 690 | (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base; |
| 691 | |
| 692 | /* |
| 693 | * The high mapping range is imprecise, so ignore the return value. |
| 694 | */ |
| 695 | __change_page_attr_set_clr(&alias_cpa, 0); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 696 | #endif |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 697 | return ret; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 698 | } |
| 699 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 700 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 701 | { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 702 | int ret, numpages = cpa->numpages; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 703 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 704 | while (numpages) { |
| 705 | /* |
| 706 | * Store the remaining nr of pages for the large page |
| 707 | * preservation check. |
| 708 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 709 | cpa->numpages = numpages; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 710 | |
| 711 | ret = __change_page_attr(cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 712 | if (ret) |
| 713 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 714 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 715 | if (checkalias) { |
| 716 | ret = cpa_process_alias(cpa); |
| 717 | if (ret) |
| 718 | return ret; |
| 719 | } |
| 720 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 721 | /* |
| 722 | * Adjust the number of pages with the result of the |
| 723 | * CPA operation. Either a large page has been |
| 724 | * preserved or a single page update happened. |
| 725 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 726 | BUG_ON(cpa->numpages > numpages); |
| 727 | numpages -= cpa->numpages; |
| 728 | cpa->vaddr += cpa->numpages * PAGE_SIZE; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 729 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 730 | return 0; |
| 731 | } |
| 732 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 733 | static inline int cache_attr(pgprot_t attr) |
| 734 | { |
| 735 | return pgprot_val(attr) & |
| 736 | (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD); |
| 737 | } |
| 738 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 739 | static int change_page_attr_set_clr(unsigned long addr, int numpages, |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 740 | pgprot_t mask_set, pgprot_t mask_clr, |
| 741 | int force_split) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 742 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 743 | struct cpa_data cpa; |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 744 | int ret, cache, checkalias; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 745 | |
| 746 | /* |
| 747 | * Check, if we are requested to change a not supported |
| 748 | * feature: |
| 749 | */ |
| 750 | mask_set = canon_pgprot(mask_set); |
| 751 | mask_clr = canon_pgprot(mask_clr); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 752 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 753 | return 0; |
| 754 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 755 | /* Ensure we are PAGE_SIZE aligned */ |
| 756 | if (addr & ~PAGE_MASK) { |
| 757 | addr &= PAGE_MASK; |
| 758 | /* |
| 759 | * People should not be passing in unaligned addresses: |
| 760 | */ |
| 761 | WARN_ON_ONCE(1); |
| 762 | } |
| 763 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 764 | cpa.vaddr = addr; |
| 765 | cpa.numpages = numpages; |
| 766 | cpa.mask_set = mask_set; |
| 767 | cpa.mask_clr = mask_clr; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 768 | cpa.flushtlb = 0; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 769 | cpa.force_split = force_split; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 770 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 771 | /* No alias checking for _NX bit modifications */ |
| 772 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 773 | |
| 774 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 775 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 776 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 777 | * Check whether we really changed something: |
| 778 | */ |
| 779 | if (!cpa.flushtlb) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 780 | goto out; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 781 | |
| 782 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 783 | * No need to flush, when we did not set any of the caching |
| 784 | * attributes: |
| 785 | */ |
| 786 | cache = cache_attr(mask_set); |
| 787 | |
| 788 | /* |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 789 | * On success we use clflush, when the CPU supports it to |
| 790 | * avoid the wbindv. If the CPU does not support it and in the |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 791 | * error case we fall back to cpa_flush_all (which uses |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 792 | * wbindv): |
| 793 | */ |
| 794 | if (!ret && cpu_has_clflush) |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 795 | cpa_flush_range(addr, numpages, cache); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 796 | else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 797 | cpa_flush_all(cache); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 798 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 799 | out: |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 800 | cpa_fill_pool(NULL); |
| 801 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 802 | return ret; |
| 803 | } |
| 804 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 805 | static inline int change_page_attr_set(unsigned long addr, int numpages, |
| 806 | pgprot_t mask) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 807 | { |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 808 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 809 | } |
| 810 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 811 | static inline int change_page_attr_clear(unsigned long addr, int numpages, |
| 812 | pgprot_t mask) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 813 | { |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 814 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 815 | } |
| 816 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 817 | int _set_memory_uc(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 818 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 819 | /* |
| 820 | * for now UC MINUS. see comments in ioremap_nocache() |
| 821 | */ |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 822 | return change_page_attr_set(addr, numpages, |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 823 | __pgprot(_PAGE_CACHE_UC_MINUS)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 824 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 825 | |
| 826 | int set_memory_uc(unsigned long addr, int numpages) |
| 827 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 828 | /* |
| 829 | * for now UC MINUS. see comments in ioremap_nocache() |
| 830 | */ |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 831 | if (reserve_memtype(addr, addr + numpages * PAGE_SIZE, |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 832 | _PAGE_CACHE_UC_MINUS, NULL)) |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 833 | return -EINVAL; |
| 834 | |
| 835 | return _set_memory_uc(addr, numpages); |
| 836 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 837 | EXPORT_SYMBOL(set_memory_uc); |
| 838 | |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 839 | int _set_memory_wc(unsigned long addr, int numpages) |
| 840 | { |
| 841 | return change_page_attr_set(addr, numpages, |
| 842 | __pgprot(_PAGE_CACHE_WC)); |
| 843 | } |
| 844 | |
| 845 | int set_memory_wc(unsigned long addr, int numpages) |
| 846 | { |
| 847 | if (!pat_wc_enabled) |
| 848 | return set_memory_uc(addr, numpages); |
| 849 | |
| 850 | if (reserve_memtype(addr, addr + numpages * PAGE_SIZE, |
| 851 | _PAGE_CACHE_WC, NULL)) |
| 852 | return -EINVAL; |
| 853 | |
| 854 | return _set_memory_wc(addr, numpages); |
| 855 | } |
| 856 | EXPORT_SYMBOL(set_memory_wc); |
| 857 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 858 | int _set_memory_wb(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 859 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 860 | return change_page_attr_clear(addr, numpages, |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 861 | __pgprot(_PAGE_CACHE_MASK)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 862 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 863 | |
| 864 | int set_memory_wb(unsigned long addr, int numpages) |
| 865 | { |
| 866 | free_memtype(addr, addr + numpages * PAGE_SIZE); |
| 867 | |
| 868 | return _set_memory_wb(addr, numpages); |
| 869 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 870 | EXPORT_SYMBOL(set_memory_wb); |
| 871 | |
| 872 | int set_memory_x(unsigned long addr, int numpages) |
| 873 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 874 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 875 | } |
| 876 | EXPORT_SYMBOL(set_memory_x); |
| 877 | |
| 878 | int set_memory_nx(unsigned long addr, int numpages) |
| 879 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 880 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 881 | } |
| 882 | EXPORT_SYMBOL(set_memory_nx); |
| 883 | |
| 884 | int set_memory_ro(unsigned long addr, int numpages) |
| 885 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 886 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 887 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 888 | |
| 889 | int set_memory_rw(unsigned long addr, int numpages) |
| 890 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 891 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 892 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 893 | |
| 894 | int set_memory_np(unsigned long addr, int numpages) |
| 895 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 896 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT)); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 897 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 898 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 899 | int set_memory_4k(unsigned long addr, int numpages) |
| 900 | { |
| 901 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), |
| 902 | __pgprot(0), 1); |
| 903 | } |
| 904 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 905 | int set_pages_uc(struct page *page, int numpages) |
| 906 | { |
| 907 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 908 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 909 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 910 | } |
| 911 | EXPORT_SYMBOL(set_pages_uc); |
| 912 | |
| 913 | int set_pages_wb(struct page *page, int numpages) |
| 914 | { |
| 915 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 916 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 917 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 918 | } |
| 919 | EXPORT_SYMBOL(set_pages_wb); |
| 920 | |
| 921 | int set_pages_x(struct page *page, int numpages) |
| 922 | { |
| 923 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 924 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 925 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 926 | } |
| 927 | EXPORT_SYMBOL(set_pages_x); |
| 928 | |
| 929 | int set_pages_nx(struct page *page, int numpages) |
| 930 | { |
| 931 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 932 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 933 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 934 | } |
| 935 | EXPORT_SYMBOL(set_pages_nx); |
| 936 | |
| 937 | int set_pages_ro(struct page *page, int numpages) |
| 938 | { |
| 939 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 940 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 941 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 942 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 943 | |
| 944 | int set_pages_rw(struct page *page, int numpages) |
| 945 | { |
| 946 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 947 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 948 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 949 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 950 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 951 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 952 | |
| 953 | static int __set_pages_p(struct page *page, int numpages) |
| 954 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 955 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 956 | .numpages = numpages, |
| 957 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 958 | .mask_clr = __pgprot(0)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 959 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 960 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 961 | } |
| 962 | |
| 963 | static int __set_pages_np(struct page *page, int numpages) |
| 964 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 965 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 966 | .numpages = numpages, |
| 967 | .mask_set = __pgprot(0), |
| 968 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 969 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 970 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 971 | } |
| 972 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 974 | { |
| 975 | if (PageHighMem(page)) |
| 976 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 977 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 978 | debug_check_no_locks_freed(page_address(page), |
| 979 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 980 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 981 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 982 | /* |
Ingo Molnar | 12d6f21 | 2008-01-30 13:33:58 +0100 | [diff] [blame] | 983 | * If page allocator is not up yet then do not call c_p_a(): |
| 984 | */ |
| 985 | if (!debug_pagealloc_enabled) |
| 986 | return; |
| 987 | |
| 988 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 989 | * The return value is ignored as the calls cannot fail. |
| 990 | * Large pages are kept enabled at boot time, and are |
| 991 | * split up quickly with DEBUG_PAGEALLOC. If a splitup |
| 992 | * fails here (due to temporary memory shortage) no damage |
| 993 | * is done because we just keep the largepage intact up |
| 994 | * to the next attempt when it will likely be split up: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 995 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 996 | if (enable) |
| 997 | __set_pages_p(page, numpages); |
| 998 | else |
| 999 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1000 | |
| 1001 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1002 | * We should perform an IPI and flush all tlbs, |
| 1003 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1004 | */ |
| 1005 | __flush_tlb_all(); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 1006 | |
| 1007 | /* |
| 1008 | * Try to refill the page pool here. We can do this only after |
| 1009 | * the tlb flush. |
| 1010 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 1011 | cpa_fill_pool(NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1012 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1013 | |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 1014 | #ifdef CONFIG_DEBUG_FS |
| 1015 | static int dpa_show(struct seq_file *m, void *v) |
| 1016 | { |
| 1017 | seq_puts(m, "DEBUG_PAGEALLOC\n"); |
| 1018 | seq_printf(m, "pool_size : %lu\n", pool_size); |
| 1019 | seq_printf(m, "pool_pages : %lu\n", pool_pages); |
| 1020 | seq_printf(m, "pool_low : %lu\n", pool_low); |
| 1021 | seq_printf(m, "pool_used : %lu\n", pool_used); |
| 1022 | seq_printf(m, "pool_failed : %lu\n", pool_failed); |
| 1023 | |
| 1024 | return 0; |
| 1025 | } |
| 1026 | |
| 1027 | static int dpa_open(struct inode *inode, struct file *filp) |
| 1028 | { |
| 1029 | return single_open(filp, dpa_show, NULL); |
| 1030 | } |
| 1031 | |
| 1032 | static const struct file_operations dpa_fops = { |
| 1033 | .open = dpa_open, |
| 1034 | .read = seq_read, |
| 1035 | .llseek = seq_lseek, |
| 1036 | .release = single_release, |
| 1037 | }; |
| 1038 | |
Ingo Molnar | a4928cf | 2008-04-23 13:20:56 +0200 | [diff] [blame] | 1039 | static int __init debug_pagealloc_proc_init(void) |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 1040 | { |
| 1041 | struct dentry *de; |
| 1042 | |
| 1043 | de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL, |
| 1044 | &dpa_fops); |
| 1045 | if (!de) |
| 1046 | return -ENOMEM; |
| 1047 | |
| 1048 | return 0; |
| 1049 | } |
| 1050 | __initcall(debug_pagealloc_proc_init); |
| 1051 | #endif |
| 1052 | |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1053 | #ifdef CONFIG_HIBERNATION |
| 1054 | |
| 1055 | bool kernel_page_present(struct page *page) |
| 1056 | { |
| 1057 | unsigned int level; |
| 1058 | pte_t *pte; |
| 1059 | |
| 1060 | if (PageHighMem(page)) |
| 1061 | return false; |
| 1062 | |
| 1063 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 1064 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 1065 | } |
| 1066 | |
| 1067 | #endif /* CONFIG_HIBERNATION */ |
| 1068 | |
| 1069 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1070 | |
| 1071 | /* |
| 1072 | * The testcases use internal knowledge of the implementation that shouldn't |
| 1073 | * be exposed to the rest of the kernel. Include these directly here. |
| 1074 | */ |
| 1075 | #ifdef CONFIG_CPA_DEBUG |
| 1076 | #include "pageattr-test.c" |
| 1077 | #endif |