blob: f8696081c5b1fd089dc99d0abfc1021af6ec6868 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Board specific pci fixups.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/types.h>
31#include <linux/pci.h>
32#include <linux/kernel.h>
33#include <linux/init.h>
34
35#include <asm/jmr3927/jmr3927.h>
36
37int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
38{
39 unsigned char irq = pin;
40
41 /* IRQ rotation (PICMG) */
42 irq--; /* 0-3 */
43 if (dev->bus->parent == NULL &&
44 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
45 /* PCI CardSlot (IDSEL=A23, DevNu=12) */
46 /* PCIA => PCIC (IDSEL=A23) */
47 /* NOTE: JMR3927 JP1 must be set to OPEN */
48 irq = (irq + 2) % 4;
49 } else if (dev->bus->parent == NULL &&
50 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
51 /* PCI CardSlot (IDSEL=A22, DevNu=11) */
52 /* PCIA => PCIA (IDSEL=A22) */
53 /* NOTE: JMR3927 JP1 must be set to OPEN */
54 irq = (irq + 0) % 4;
55 } else {
56 /* PCI Backplane */
57 irq = (irq + 3 + slot) % 4;
58 }
59 irq++; /* 1-4 */
60
61 switch (irq) {
62 case 1:
63 irq = JMR3927_IRQ_IOC_PCIA;
64 break;
65 case 2:
66 // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;
67 irq = JMR3927_IRQ_IOC_PCID;
68 break;
69 case 3:
70 irq = JMR3927_IRQ_IOC_PCIC;
71 break;
72 case 4:
73 // wrong for backplane irq = JMR3927_IRQ_IOC_PCID;
74 irq = JMR3927_IRQ_IOC_PCIB;
75 break;
76 }
77
78 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
79 if (dev->bus->parent == NULL &&
80 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) {
81 extern int jmr3927_ether1_irq;
82 /* check this irq line was reserved for ether1 */
83 if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
84 irq = JMR3927_IRQ_ETHER0;
85 else
86 irq = 0; /* disable */
87 }
88 return irq;
89}
90
91/* Do platform specific device initialization at pci_enable_device() time */
92int pcibios_plat_dev_init(struct pci_dev *dev)
93{
94 return 0;
95}
96
97int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
98{
99 /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
100 if (!(dev->vendor == PCI_VENDOR_ID_EFAR &&
101 dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1))
102 return pci_get_irq(dev, pin);
103
104 dev->irq = irq;
105}