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Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +08001/*
2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
Nicolas Ferre21f81872012-02-11 15:41:40 +010026 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010029 tcb0 = &tcb0;
30 tcb1 = &tcb1;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +080031 };
32 cpus {
33 cpu@0 {
34 compatible = "arm,arm926ejs";
35 };
36 };
37
38 memory@20000000 {
39 reg = <0x20000000 0x08000000>;
40 };
41
42 ahb {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 apb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +010055 #interrupt-cells = <2>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +080056 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>;
60 };
61
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080062 ramc0: ramc@ffffea00 {
63 compatible = "atmel,at91sam9260-sdramc";
64 reg = <0xffffea00 0x200>;
65 };
66
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080067 pmc: pmc@fffffc00 {
68 compatible = "atmel,at91rm9200-pmc";
69 reg = <0xfffffc00 0x100>;
70 };
71
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080072 rstc@fffffd00 {
73 compatible = "atmel,at91sam9260-rstc";
74 reg = <0xfffffd00 0x10>;
75 };
76
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +080077 shdwc@fffffd10 {
78 compatible = "atmel,at91sam9260-shdwc";
79 reg = <0xfffffd10 0x10>;
80 };
81
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010082 pit: timer@fffffd30 {
83 compatible = "atmel,at91sam9260-pit";
84 reg = <0xfffffd30 0xf>;
85 interrupts = <1 4>;
86 };
87
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010088 tcb0: timer@fffa0000 {
89 compatible = "atmel,at91rm9200-tcb";
90 reg = <0xfffa0000 0x100>;
91 interrupts = <17 4 18 4 19 4>;
92 };
93
94 tcb1: timer@fffdc000 {
95 compatible = "atmel,at91rm9200-tcb";
96 reg = <0xfffdc000 0x100>;
97 interrupts = <26 4 27 4 28 4>;
98 };
99
Nicolas Ferre21f81872012-02-11 15:41:40 +0100100 pioA: gpio@fffff400 {
101 compatible = "atmel,at91rm9200-gpio";
102 reg = <0xfffff400 0x100>;
103 interrupts = <2 4>;
104 #gpio-cells = <2>;
105 gpio-controller;
106 interrupt-controller;
107 };
108
109 pioB: gpio@fffff600 {
110 compatible = "atmel,at91rm9200-gpio";
111 reg = <0xfffff600 0x100>;
112 interrupts = <3 4>;
113 #gpio-cells = <2>;
114 gpio-controller;
115 interrupt-controller;
116 };
117
118 pioC: gpio@fffff800 {
119 compatible = "atmel,at91rm9200-gpio";
120 reg = <0xfffff800 0x100>;
121 interrupts = <4 4>;
122 #gpio-cells = <2>;
123 gpio-controller;
124 interrupt-controller;
125 };
126
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800127 dbgu: serial@fffff200 {
128 compatible = "atmel,at91sam9260-usart";
129 reg = <0xfffff200 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100130 interrupts = <1 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800131 status = "disabled";
132 };
133
134 usart0: serial@fffb0000 {
135 compatible = "atmel,at91sam9260-usart";
136 reg = <0xfffb0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100137 interrupts = <6 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800138 atmel,use-dma-rx;
139 atmel,use-dma-tx;
140 status = "disabled";
141 };
142
143 usart1: serial@fffb4000 {
144 compatible = "atmel,at91sam9260-usart";
145 reg = <0xfffb4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100146 interrupts = <7 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800147 atmel,use-dma-rx;
148 atmel,use-dma-tx;
149 status = "disabled";
150 };
151
152 usart2: serial@fffb8000 {
153 compatible = "atmel,at91sam9260-usart";
154 reg = <0xfffb8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100155 interrupts = <8 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800156 atmel,use-dma-rx;
157 atmel,use-dma-tx;
158 status = "disabled";
159 };
160
161 usart3: serial@fffd0000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfffd0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100164 interrupts = <23 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800165 atmel,use-dma-rx;
166 atmel,use-dma-tx;
167 status = "disabled";
168 };
169
170 usart4: serial@fffd4000 {
171 compatible = "atmel,at91sam9260-usart";
172 reg = <0xfffd4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100173 interrupts = <24 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800174 atmel,use-dma-rx;
175 atmel,use-dma-tx;
176 status = "disabled";
177 };
178
179 usart5: serial@fffd8000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfffd8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100182 interrupts = <25 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 status = "disabled";
186 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100187
188 macb0: ethernet@fffc4000 {
189 compatible = "cdns,at32ap7000-macb", "cdns,macb";
190 reg = <0xfffc4000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100191 interrupts = <21 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100192 status = "disabled";
193 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800194 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800195
196 nand0: nand@40000000 {
197 compatible = "atmel,at91rm9200-nand";
198 #address-cells = <1>;
199 #size-cells = <1>;
200 reg = <0x40000000 0x10000000
201 0xffffe800 0x200
202 >;
203 atmel,nand-addr-offset = <21>;
204 atmel,nand-cmd-offset = <22>;
205 gpios = <&pioC 13 0
206 &pioC 14 0
207 0
208 >;
209 status = "disabled";
210 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800211
212 usb0: ohci@00500000 {
213 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
214 reg = <0x00500000 0x100000>;
215 interrupts = <20 4>;
216 status = "disabled";
217 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800218 };
Jean-Christophe PLAGNIOL-VILLARD3b3f8282012-02-05 18:25:33 +0800219
220 i2c@0 {
221 compatible = "i2c-gpio";
222 gpios = <&pioA 23 0 /* sda */
223 &pioA 24 0 /* scl */
224 >;
225 i2c-gpio,sda-open-drain;
226 i2c-gpio,scl-open-drain;
227 i2c-gpio,delay-us = <2>; /* ~100 kHz */
228 #address-cells = <1>;
229 #size-cells = <0>;
230 status = "disabled";
231 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800232};