Linus Walleij | bb3cee2 | 2009-04-23 10:22:13 +0100 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * arch/arm/mach-u300/core.c |
| 4 | * |
| 5 | * |
| 6 | * Copyright (C) 2007-2009 ST-Ericsson AB |
| 7 | * License terms: GNU General Public License (GPL) version 2 |
| 8 | * Core platform support, IRQ handling and device definitions. |
| 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
| 10 | */ |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/spinlock.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/bitops.h> |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/mm.h> |
| 18 | #include <linux/termios.h> |
| 19 | #include <linux/amba/bus.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/gpio.h> |
| 22 | |
| 23 | #include <asm/types.h> |
| 24 | #include <asm/setup.h> |
| 25 | #include <asm/memory.h> |
| 26 | #include <asm/hardware/vic.h> |
| 27 | #include <asm/mach/map.h> |
| 28 | #include <asm/mach/irq.h> |
| 29 | |
| 30 | #include <mach/hardware.h> |
| 31 | #include <mach/syscon.h> |
| 32 | |
| 33 | #include "clock.h" |
| 34 | #include "mmc.h" |
Linus Walleij | c7c8c78 | 2009-08-14 10:59:05 +0100 | [diff] [blame^] | 35 | #include "spi.h" |
Linus Walleij | bb3cee2 | 2009-04-23 10:22:13 +0100 | [diff] [blame] | 36 | |
| 37 | /* |
| 38 | * Static I/O mappings that are needed for booting the U300 platforms. The |
| 39 | * only things we need are the areas where we find the timer, syscon and |
| 40 | * intcon, since the remaining device drivers will map their own memory |
| 41 | * physical to virtual as the need arise. |
| 42 | */ |
| 43 | static struct map_desc u300_io_desc[] __initdata = { |
| 44 | { |
| 45 | .virtual = U300_SLOW_PER_VIRT_BASE, |
| 46 | .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE), |
| 47 | .length = SZ_64K, |
| 48 | .type = MT_DEVICE, |
| 49 | }, |
| 50 | { |
| 51 | .virtual = U300_AHB_PER_VIRT_BASE, |
| 52 | .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE), |
| 53 | .length = SZ_32K, |
| 54 | .type = MT_DEVICE, |
| 55 | }, |
| 56 | { |
| 57 | .virtual = U300_FAST_PER_VIRT_BASE, |
| 58 | .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE), |
| 59 | .length = SZ_32K, |
| 60 | .type = MT_DEVICE, |
| 61 | }, |
| 62 | { |
| 63 | .virtual = 0xffff2000, /* TCM memory */ |
| 64 | .pfn = __phys_to_pfn(0xffff2000), |
| 65 | .length = SZ_16K, |
| 66 | .type = MT_DEVICE, |
| 67 | }, |
| 68 | |
| 69 | /* |
| 70 | * This overlaps with the IRQ vectors etc at 0xffff0000, so these |
| 71 | * may have to be moved to 0x00000000 in order to use the ROM. |
| 72 | */ |
| 73 | /* |
| 74 | { |
| 75 | .virtual = U300_BOOTROM_VIRT_BASE, |
| 76 | .pfn = __phys_to_pfn(U300_BOOTROM_PHYS_BASE), |
| 77 | .length = SZ_64K, |
| 78 | .type = MT_ROM, |
| 79 | }, |
| 80 | */ |
| 81 | }; |
| 82 | |
| 83 | void __init u300_map_io(void) |
| 84 | { |
| 85 | iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc)); |
| 86 | } |
| 87 | |
| 88 | /* |
| 89 | * Declaration of devices found on the U300 board and |
| 90 | * their respective memory locations. |
| 91 | */ |
| 92 | static struct amba_device uart0_device = { |
| 93 | .dev = { |
| 94 | .init_name = "uart0", /* Slow device at 0x3000 offset */ |
| 95 | .platform_data = NULL, |
| 96 | }, |
| 97 | .res = { |
| 98 | .start = U300_UART0_BASE, |
| 99 | .end = U300_UART0_BASE + SZ_4K - 1, |
| 100 | .flags = IORESOURCE_MEM, |
| 101 | }, |
| 102 | .irq = { IRQ_U300_UART0, NO_IRQ }, |
| 103 | }; |
| 104 | |
| 105 | /* The U335 have an additional UART1 on the APP CPU */ |
| 106 | #ifdef CONFIG_MACH_U300_BS335 |
| 107 | static struct amba_device uart1_device = { |
| 108 | .dev = { |
| 109 | .init_name = "uart1", /* Fast device at 0x7000 offset */ |
| 110 | .platform_data = NULL, |
| 111 | }, |
| 112 | .res = { |
| 113 | .start = U300_UART1_BASE, |
| 114 | .end = U300_UART1_BASE + SZ_4K - 1, |
| 115 | .flags = IORESOURCE_MEM, |
| 116 | }, |
| 117 | .irq = { IRQ_U300_UART1, NO_IRQ }, |
| 118 | }; |
| 119 | #endif |
| 120 | |
| 121 | static struct amba_device pl172_device = { |
| 122 | .dev = { |
| 123 | .init_name = "pl172", /* AHB device at 0x4000 offset */ |
| 124 | .platform_data = NULL, |
| 125 | }, |
| 126 | .res = { |
| 127 | .start = U300_EMIF_CFG_BASE, |
| 128 | .end = U300_EMIF_CFG_BASE + SZ_4K - 1, |
| 129 | .flags = IORESOURCE_MEM, |
| 130 | }, |
| 131 | }; |
| 132 | |
| 133 | |
| 134 | /* |
| 135 | * Everything within this next ifdef deals with external devices connected to |
| 136 | * the APP SPI bus. |
| 137 | */ |
| 138 | static struct amba_device pl022_device = { |
| 139 | .dev = { |
| 140 | .coherent_dma_mask = ~0, |
| 141 | .init_name = "pl022", /* Fast device at 0x6000 offset */ |
| 142 | }, |
| 143 | .res = { |
| 144 | .start = U300_SPI_BASE, |
| 145 | .end = U300_SPI_BASE + SZ_4K - 1, |
| 146 | .flags = IORESOURCE_MEM, |
| 147 | }, |
| 148 | .irq = {IRQ_U300_SPI, NO_IRQ }, |
| 149 | /* |
| 150 | * This device has a DMA channel but the Linux driver does not use |
| 151 | * it currently. |
| 152 | */ |
| 153 | }; |
| 154 | |
| 155 | static struct amba_device mmcsd_device = { |
| 156 | .dev = { |
| 157 | .init_name = "mmci", /* Fast device at 0x1000 offset */ |
| 158 | .platform_data = NULL, /* Added later */ |
| 159 | }, |
| 160 | .res = { |
| 161 | .start = U300_MMCSD_BASE, |
| 162 | .end = U300_MMCSD_BASE + SZ_4K - 1, |
| 163 | .flags = IORESOURCE_MEM, |
| 164 | }, |
| 165 | .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, |
| 166 | /* |
| 167 | * This device has a DMA channel but the Linux driver does not use |
| 168 | * it currently. |
| 169 | */ |
| 170 | }; |
| 171 | |
| 172 | /* |
| 173 | * The order of device declaration may be important, since some devices |
| 174 | * have dependencies on other devices being initialized first. |
| 175 | */ |
| 176 | static struct amba_device *amba_devs[] __initdata = { |
| 177 | &uart0_device, |
| 178 | #ifdef CONFIG_MACH_U300_BS335 |
| 179 | &uart1_device, |
| 180 | #endif |
| 181 | &pl022_device, |
| 182 | &pl172_device, |
| 183 | &mmcsd_device, |
| 184 | }; |
| 185 | |
| 186 | /* Here follows a list of all hw resources that the platform devices |
| 187 | * allocate. Note, clock dependencies are not included |
| 188 | */ |
| 189 | |
| 190 | static struct resource gpio_resources[] = { |
| 191 | { |
| 192 | .start = U300_GPIO_BASE, |
| 193 | .end = (U300_GPIO_BASE + SZ_4K - 1), |
| 194 | .flags = IORESOURCE_MEM, |
| 195 | }, |
| 196 | { |
| 197 | .name = "gpio0", |
| 198 | .start = IRQ_U300_GPIO_PORT0, |
| 199 | .end = IRQ_U300_GPIO_PORT0, |
| 200 | .flags = IORESOURCE_IRQ, |
| 201 | }, |
| 202 | { |
| 203 | .name = "gpio1", |
| 204 | .start = IRQ_U300_GPIO_PORT1, |
| 205 | .end = IRQ_U300_GPIO_PORT1, |
| 206 | .flags = IORESOURCE_IRQ, |
| 207 | }, |
| 208 | { |
| 209 | .name = "gpio2", |
| 210 | .start = IRQ_U300_GPIO_PORT2, |
| 211 | .end = IRQ_U300_GPIO_PORT2, |
| 212 | .flags = IORESOURCE_IRQ, |
| 213 | }, |
| 214 | #ifdef U300_COH901571_3 |
| 215 | { |
| 216 | .name = "gpio3", |
| 217 | .start = IRQ_U300_GPIO_PORT3, |
| 218 | .end = IRQ_U300_GPIO_PORT3, |
| 219 | .flags = IORESOURCE_IRQ, |
| 220 | }, |
| 221 | { |
| 222 | .name = "gpio4", |
| 223 | .start = IRQ_U300_GPIO_PORT4, |
| 224 | .end = IRQ_U300_GPIO_PORT4, |
| 225 | .flags = IORESOURCE_IRQ, |
| 226 | }, |
| 227 | #ifdef CONFIG_MACH_U300_BS335 |
| 228 | { |
| 229 | .name = "gpio5", |
| 230 | .start = IRQ_U300_GPIO_PORT5, |
| 231 | .end = IRQ_U300_GPIO_PORT5, |
| 232 | .flags = IORESOURCE_IRQ, |
| 233 | }, |
| 234 | { |
| 235 | .name = "gpio6", |
| 236 | .start = IRQ_U300_GPIO_PORT6, |
| 237 | .end = IRQ_U300_GPIO_PORT6, |
| 238 | .flags = IORESOURCE_IRQ, |
| 239 | }, |
| 240 | #endif /* CONFIG_MACH_U300_BS335 */ |
| 241 | #endif /* U300_COH901571_3 */ |
| 242 | }; |
| 243 | |
| 244 | static struct resource keypad_resources[] = { |
| 245 | { |
| 246 | .start = U300_KEYPAD_BASE, |
| 247 | .end = U300_KEYPAD_BASE + SZ_4K - 1, |
| 248 | .flags = IORESOURCE_MEM, |
| 249 | }, |
| 250 | { |
| 251 | .name = "coh901461-press", |
| 252 | .start = IRQ_U300_KEYPAD_KEYBF, |
| 253 | .end = IRQ_U300_KEYPAD_KEYBF, |
| 254 | .flags = IORESOURCE_IRQ, |
| 255 | }, |
| 256 | { |
| 257 | .name = "coh901461-release", |
| 258 | .start = IRQ_U300_KEYPAD_KEYBR, |
| 259 | .end = IRQ_U300_KEYPAD_KEYBR, |
| 260 | .flags = IORESOURCE_IRQ, |
| 261 | }, |
| 262 | }; |
| 263 | |
| 264 | static struct resource rtc_resources[] = { |
| 265 | { |
| 266 | .start = U300_RTC_BASE, |
| 267 | .end = U300_RTC_BASE + SZ_4K - 1, |
| 268 | .flags = IORESOURCE_MEM, |
| 269 | }, |
| 270 | { |
| 271 | .start = IRQ_U300_RTC, |
| 272 | .end = IRQ_U300_RTC, |
| 273 | .flags = IORESOURCE_IRQ, |
| 274 | }, |
| 275 | }; |
| 276 | |
| 277 | /* |
| 278 | * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2) |
| 279 | * but these are not yet used by the driver. |
| 280 | */ |
| 281 | static struct resource fsmc_resources[] = { |
| 282 | { |
| 283 | .start = U300_NAND_IF_PHYS_BASE, |
| 284 | .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1, |
| 285 | .flags = IORESOURCE_MEM, |
| 286 | }, |
| 287 | }; |
| 288 | |
| 289 | static struct resource i2c0_resources[] = { |
| 290 | { |
| 291 | .start = U300_I2C0_BASE, |
| 292 | .end = U300_I2C0_BASE + SZ_4K - 1, |
| 293 | .flags = IORESOURCE_MEM, |
| 294 | }, |
| 295 | { |
| 296 | .start = IRQ_U300_I2C0, |
| 297 | .end = IRQ_U300_I2C0, |
| 298 | .flags = IORESOURCE_IRQ, |
| 299 | }, |
| 300 | }; |
| 301 | |
| 302 | static struct resource i2c1_resources[] = { |
| 303 | { |
| 304 | .start = U300_I2C1_BASE, |
| 305 | .end = U300_I2C1_BASE + SZ_4K - 1, |
| 306 | .flags = IORESOURCE_MEM, |
| 307 | }, |
| 308 | { |
| 309 | .start = IRQ_U300_I2C1, |
| 310 | .end = IRQ_U300_I2C1, |
| 311 | .flags = IORESOURCE_IRQ, |
| 312 | }, |
| 313 | |
| 314 | }; |
| 315 | |
| 316 | static struct resource wdog_resources[] = { |
| 317 | { |
| 318 | .start = U300_WDOG_BASE, |
| 319 | .end = U300_WDOG_BASE + SZ_4K - 1, |
| 320 | .flags = IORESOURCE_MEM, |
| 321 | }, |
| 322 | { |
| 323 | .start = IRQ_U300_WDOG, |
| 324 | .end = IRQ_U300_WDOG, |
| 325 | .flags = IORESOURCE_IRQ, |
| 326 | } |
| 327 | }; |
| 328 | |
| 329 | /* TODO: These should be protected by suitable #ifdef's */ |
| 330 | static struct resource ave_resources[] = { |
| 331 | { |
| 332 | .name = "AVE3e I/O Area", |
| 333 | .start = U300_VIDEOENC_BASE, |
| 334 | .end = U300_VIDEOENC_BASE + SZ_512K - 1, |
| 335 | .flags = IORESOURCE_MEM, |
| 336 | }, |
| 337 | { |
| 338 | .name = "AVE3e IRQ0", |
| 339 | .start = IRQ_U300_VIDEO_ENC_0, |
| 340 | .end = IRQ_U300_VIDEO_ENC_0, |
| 341 | .flags = IORESOURCE_IRQ, |
| 342 | }, |
| 343 | { |
| 344 | .name = "AVE3e IRQ1", |
| 345 | .start = IRQ_U300_VIDEO_ENC_1, |
| 346 | .end = IRQ_U300_VIDEO_ENC_1, |
| 347 | .flags = IORESOURCE_IRQ, |
| 348 | }, |
| 349 | { |
| 350 | .name = "AVE3e Physmem Area", |
| 351 | .start = 0, /* 0 will be remapped to reserved memory */ |
| 352 | .end = SZ_1M - 1, |
| 353 | .flags = IORESOURCE_MEM, |
| 354 | }, |
| 355 | /* |
| 356 | * The AVE3e requires two regions of 256MB that it considers |
| 357 | * "invisible". The hardware will not be able to access these |
| 358 | * adresses, so they should never point to system RAM. |
| 359 | */ |
| 360 | { |
| 361 | .name = "AVE3e Reserved 0", |
| 362 | .start = 0xd0000000, |
| 363 | .end = 0xd0000000 + SZ_256M - 1, |
| 364 | .flags = IORESOURCE_MEM, |
| 365 | }, |
| 366 | { |
| 367 | .name = "AVE3e Reserved 1", |
| 368 | .start = 0xe0000000, |
| 369 | .end = 0xe0000000 + SZ_256M - 1, |
| 370 | .flags = IORESOURCE_MEM, |
| 371 | }, |
| 372 | }; |
| 373 | |
| 374 | static struct platform_device wdog_device = { |
| 375 | .name = "wdog", |
| 376 | .id = -1, |
| 377 | .num_resources = ARRAY_SIZE(wdog_resources), |
| 378 | .resource = wdog_resources, |
| 379 | }; |
| 380 | |
| 381 | static struct platform_device i2c0_device = { |
| 382 | .name = "stddci2c", |
| 383 | .id = 0, |
| 384 | .num_resources = ARRAY_SIZE(i2c0_resources), |
| 385 | .resource = i2c0_resources, |
| 386 | }; |
| 387 | |
| 388 | static struct platform_device i2c1_device = { |
| 389 | .name = "stddci2c", |
| 390 | .id = 1, |
| 391 | .num_resources = ARRAY_SIZE(i2c1_resources), |
| 392 | .resource = i2c1_resources, |
| 393 | }; |
| 394 | |
| 395 | static struct platform_device gpio_device = { |
| 396 | .name = "u300-gpio", |
| 397 | .id = -1, |
| 398 | .num_resources = ARRAY_SIZE(gpio_resources), |
| 399 | .resource = gpio_resources, |
| 400 | }; |
| 401 | |
| 402 | static struct platform_device keypad_device = { |
| 403 | .name = "keypad", |
| 404 | .id = -1, |
| 405 | .num_resources = ARRAY_SIZE(keypad_resources), |
| 406 | .resource = keypad_resources, |
| 407 | }; |
| 408 | |
| 409 | static struct platform_device rtc_device = { |
| 410 | .name = "rtc0", |
| 411 | .id = -1, |
| 412 | .num_resources = ARRAY_SIZE(rtc_resources), |
| 413 | .resource = rtc_resources, |
| 414 | }; |
| 415 | |
| 416 | static struct platform_device fsmc_device = { |
| 417 | .name = "nandif", |
| 418 | .id = -1, |
| 419 | .num_resources = ARRAY_SIZE(fsmc_resources), |
| 420 | .resource = fsmc_resources, |
| 421 | }; |
| 422 | |
| 423 | static struct platform_device ave_device = { |
| 424 | .name = "video_enc", |
| 425 | .id = -1, |
| 426 | .num_resources = ARRAY_SIZE(ave_resources), |
| 427 | .resource = ave_resources, |
| 428 | }; |
| 429 | |
| 430 | /* |
| 431 | * Notice that AMBA devices are initialized before platform devices. |
| 432 | * |
| 433 | */ |
| 434 | static struct platform_device *platform_devs[] __initdata = { |
| 435 | &i2c0_device, |
| 436 | &i2c1_device, |
| 437 | &keypad_device, |
| 438 | &rtc_device, |
| 439 | &gpio_device, |
| 440 | &fsmc_device, |
| 441 | &wdog_device, |
| 442 | &ave_device |
| 443 | }; |
| 444 | |
| 445 | |
| 446 | /* |
| 447 | * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected |
| 448 | * together so some interrupts are connected to the first one and some |
| 449 | * to the second one. |
| 450 | */ |
| 451 | void __init u300_init_irq(void) |
| 452 | { |
| 453 | u32 mask[2] = {0, 0}; |
| 454 | int i; |
| 455 | |
| 456 | for (i = 0; i < NR_IRQS; i++) |
| 457 | set_bit(i, (unsigned long *) &mask[0]); |
| 458 | u300_enable_intcon_clock(); |
Russell King | b7c11ec | 2009-06-14 11:01:44 +0100 | [diff] [blame] | 459 | vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], 0); |
| 460 | vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], 0); |
Linus Walleij | bb3cee2 | 2009-04-23 10:22:13 +0100 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | |
| 464 | /* |
| 465 | * U300 platforms peripheral handling |
| 466 | */ |
| 467 | struct db_chip { |
| 468 | u16 chipid; |
| 469 | const char *name; |
| 470 | }; |
| 471 | |
| 472 | /* |
| 473 | * This is a list of the Digital Baseband chips used in the U300 platform. |
| 474 | */ |
| 475 | static struct db_chip db_chips[] __initdata = { |
| 476 | { |
| 477 | .chipid = 0xb800, |
| 478 | .name = "DB3000", |
| 479 | }, |
| 480 | { |
| 481 | .chipid = 0xc000, |
| 482 | .name = "DB3100", |
| 483 | }, |
| 484 | { |
| 485 | .chipid = 0xc800, |
| 486 | .name = "DB3150", |
| 487 | }, |
| 488 | { |
| 489 | .chipid = 0xd800, |
| 490 | .name = "DB3200", |
| 491 | }, |
| 492 | { |
| 493 | .chipid = 0xe000, |
| 494 | .name = "DB3250", |
| 495 | }, |
| 496 | { |
| 497 | .chipid = 0xe800, |
| 498 | .name = "DB3210", |
| 499 | }, |
| 500 | { |
| 501 | .chipid = 0xf000, |
| 502 | .name = "DB3350 P1x", |
| 503 | }, |
| 504 | { |
| 505 | .chipid = 0xf100, |
| 506 | .name = "DB3350 P2x", |
| 507 | }, |
| 508 | { |
| 509 | .chipid = 0x0000, /* List terminator */ |
| 510 | .name = NULL, |
| 511 | } |
| 512 | }; |
| 513 | |
| 514 | static void u300_init_check_chip(void) |
| 515 | { |
| 516 | |
| 517 | u16 val; |
| 518 | struct db_chip *chip; |
| 519 | const char *chipname; |
| 520 | const char unknown[] = "UNKNOWN"; |
| 521 | |
| 522 | /* Read out and print chip ID */ |
| 523 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR); |
| 524 | /* This is in funky bigendian order... */ |
| 525 | val = (val & 0xFFU) << 8 | (val >> 8); |
| 526 | chip = db_chips; |
| 527 | chipname = unknown; |
| 528 | |
| 529 | for ( ; chip->chipid; chip++) { |
| 530 | if (chip->chipid == (val & 0xFF00U)) { |
| 531 | chipname = chip->name; |
| 532 | break; |
| 533 | } |
| 534 | } |
| 535 | printk(KERN_INFO "Initializing U300 system on %s baseband chip " \ |
| 536 | "(chip ID 0x%04x)\n", chipname, val); |
| 537 | |
| 538 | #ifdef CONFIG_MACH_U300_BS26 |
| 539 | if ((val & 0xFF00U) != 0xc800) { |
| 540 | printk(KERN_ERR "Platform configured for BS25/BS26 " \ |
| 541 | "with DB3150 but %s detected, expect problems!", |
| 542 | chipname); |
| 543 | } |
| 544 | #endif |
| 545 | #ifdef CONFIG_MACH_U300_BS330 |
| 546 | if ((val & 0xFF00U) != 0xd800) { |
| 547 | printk(KERN_ERR "Platform configured for BS330 " \ |
| 548 | "with DB3200 but %s detected, expect problems!", |
| 549 | chipname); |
| 550 | } |
| 551 | #endif |
| 552 | #ifdef CONFIG_MACH_U300_BS335 |
| 553 | if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) { |
| 554 | printk(KERN_ERR "Platform configured for BS365 " \ |
| 555 | " with DB3350 but %s detected, expect problems!", |
| 556 | chipname); |
| 557 | } |
| 558 | #endif |
| 559 | #ifdef CONFIG_MACH_U300_BS365 |
| 560 | if ((val & 0xFF00U) != 0xe800) { |
| 561 | printk(KERN_ERR "Platform configured for BS365 " \ |
| 562 | "with DB3210 but %s detected, expect problems!", |
| 563 | chipname); |
| 564 | } |
| 565 | #endif |
| 566 | |
| 567 | |
| 568 | } |
| 569 | |
| 570 | /* |
| 571 | * Some devices and their resources require reserved physical memory from |
| 572 | * the end of the available RAM. This function traverses the list of devices |
| 573 | * and assigns actual adresses to these. |
| 574 | */ |
| 575 | static void __init u300_assign_physmem(void) |
| 576 | { |
| 577 | unsigned long curr_start = __pa(high_memory); |
| 578 | int i, j; |
| 579 | |
| 580 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) { |
| 581 | for (j = 0; j < platform_devs[i]->num_resources; j++) { |
| 582 | struct resource *const res = |
| 583 | &platform_devs[i]->resource[j]; |
| 584 | |
| 585 | if (IORESOURCE_MEM == res->flags && |
| 586 | 0 == res->start) { |
| 587 | res->start = curr_start; |
| 588 | res->end += curr_start; |
| 589 | curr_start += (res->end - res->start + 1); |
| 590 | |
| 591 | printk(KERN_INFO "core.c: Mapping RAM " \ |
| 592 | "%#x-%#x to device %s:%s\n", |
| 593 | res->start, res->end, |
| 594 | platform_devs[i]->name, res->name); |
| 595 | } |
| 596 | } |
| 597 | } |
| 598 | } |
| 599 | |
| 600 | void __init u300_init_devices(void) |
| 601 | { |
| 602 | int i; |
| 603 | u16 val; |
| 604 | |
| 605 | /* Check what platform we run and print some status information */ |
| 606 | u300_init_check_chip(); |
| 607 | |
| 608 | /* Set system to run at PLL208, max performance, a known state. */ |
| 609 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 610 | val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK; |
| 611 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 612 | /* Wait for the PLL208 to lock if not locked in yet */ |
| 613 | while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) & |
| 614 | U300_SYSCON_CSR_PLL208_LOCK_IND)); |
Linus Walleij | c7c8c78 | 2009-08-14 10:59:05 +0100 | [diff] [blame^] | 615 | /* Initialize SPI device with some board specifics */ |
| 616 | u300_spi_init(&pl022_device); |
Linus Walleij | bb3cee2 | 2009-04-23 10:22:13 +0100 | [diff] [blame] | 617 | |
| 618 | /* Register the AMBA devices in the AMBA bus abstraction layer */ |
| 619 | u300_clock_primecells(); |
| 620 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 621 | struct amba_device *d = amba_devs[i]; |
| 622 | amba_device_register(d, &iomem_resource); |
| 623 | } |
| 624 | u300_unclock_primecells(); |
| 625 | |
| 626 | u300_assign_physmem(); |
| 627 | |
Linus Walleij | c7c8c78 | 2009-08-14 10:59:05 +0100 | [diff] [blame^] | 628 | /* Register subdevices on the SPI bus */ |
| 629 | u300_spi_register_board_devices(); |
| 630 | |
Linus Walleij | bb3cee2 | 2009-04-23 10:22:13 +0100 | [diff] [blame] | 631 | /* Register the platform devices */ |
| 632 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); |
| 633 | |
| 634 | #ifndef CONFIG_MACH_U300_SEMI_IS_SHARED |
| 635 | /* |
| 636 | * Enable SEMI self refresh. Self-refresh of the SDRAM is entered when |
| 637 | * both subsystems are requesting this mode. |
| 638 | * If we not share the Acc SDRAM, this is never the case. Therefore |
| 639 | * enable it here from the App side. |
| 640 | */ |
| 641 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) | |
| 642 | U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE; |
| 643 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR); |
| 644 | #endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */ |
| 645 | } |
| 646 | |
| 647 | static int core_module_init(void) |
| 648 | { |
| 649 | /* |
| 650 | * This needs to be initialized later: it needs the input framework |
| 651 | * to be initialized first. |
| 652 | */ |
| 653 | return mmc_init(&mmcsd_device); |
| 654 | } |
| 655 | module_init(core_module_init); |